Fundamental of

Microprocessor
Sr. Lec. Sujan Shrestha
9801104103
[email protected]
Why Microprocessor????
• Which device got micro-processor??
- Fan , television, computer, bulb, remote, traffic light, router?????
- Any device which need programming got a processor.
• First Generation – 1946-1959
• Vacuum tube based
• Second Generation – 1959-1965
• Transistor based
• Third Generation – 1965-1971
• Integrated Circuit based
• Fourth Generation – 1971-1980
• VLSI microprocessor based
• Fifth Generation -1980-onwards
• ULSI microprocessor based or bio-chip
Stored Program Concept
• The term Stored Program Control Concept refers to the storage of
instructions in computer memory to enable it to perform a variety of tasks
in sequence or intermittently.
• The idea was introduced in the late 1940s by John von Neumann who
proposed that a program be electronically stored in the binary-number
format in a memory device so that instructions could be modified by the
computer as determined by intermediate computational results.
• ENIAC (Electronic Numerical Integrator and Computer) was the first
computing system designed in the early 1940s. It was based on Stored
Program Concept in which machine use memory for processing data.
Stored Program Concept
• Stored program concept - a program must be in main memory in
order for it to be executed. The instructions are fetched, decoded and
executed one at a time.
Von-Neumann Architecture vs Harvard Architecture

Harvard Architecture

Shared memory unit

 Von Neumann Architecture vs Harvard Architecture

• Von Neumann architecture is based on the stored-program computer concept,

where instruction data and program data are stored in the same memory. This
design is still used in most computers produced today.
• The term "von Neumann architecture" has evolved to mean any stored-program
computer in which an instruction fetch and a data operation cannot occur at the
same time because they share a common bus. This is referred to as the von
Neumann bottleneck and often limits the performance of the system.
• The design of a von Neumann architecture machine is simpler than a Harvard
architecture machine—which is also a stored-program system but has one
dedicated set of address and data buses for reading and writing to memory, and
another set of address and data buses to fetch instructions.
Features Von-neumann Architecture Harvard Architecture
Memory System Has only one bus that is used for both instructions fetches Has separate memory space for instructions and
and data transfers. data which physically separates signals and
storage code and data memory.

Instruction The processing unit would require two clock cycles to The processing unit can complete an instruction
Processing complete an instruction. in one cycle if appropriate pipelining plans have
been set.

Use Von Neumann architecture is usually used literally in all Harvard architecture is a new concept used
machines from desktop computers, notebooks, high specifically in microcontrollers and digital signal
performance computers to workstations. processing (DSP).

Cost Instructions and data use the same bus system therefore Complex kind of architecture because it employs
the design and development of control unit is simplified, two buses for instruction and data, a factor that
hence the cost of production becomes minimum. makes development of the control unit
comparatively more expensive.
Power of 2
• 20 = 1, 21 = 2 , 22 = 4 , 23 = 8 , 24 = 16 , 25 = 32 , 26 = 64 , 27 = 128 ,
28 = 256 , 29 = 512 , 210 = 1024 or 1 K
• 212 = 22 * 210 = 4 K, 217 = 27 * 210 = 128 K, 220 = 210 * 210 = 1 M
• 223 = 23 * 220 = 8 M, 226 = 26 * 220 = 64 M, 230 = 220 * 210 = 1 G
• 234 = 24 * 230 = 16 G, 235 = 25 * 230 = 32 G, 240 = 230 * 210 = 1 T
• 248 = 28 * 240 = 256 T
Evolution of Microprocessors (Intel series)
What is Microprocessor?
• Microprocessor is an electronic circuit that functions as the central
processing unit (CPU) of a computer, providing computational control.
In short, processor as a chip.
What is a Microprocessor?
Definition:
“The Microprocessor is a
Can perform Multipurpose, Can be instructed
multiple tasks to perform
Programmable, specific task
Provides
Synchronization
Clock Driven, Store
Intermediate
Form of an
Register Based, Processing data
Integrated Digital-Integrated Circuit
circuit (IC) which accepts binary data as input,
processes it according to instructions stored in its memory, and provides
results as output.”

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A computer System

Stores Programs
Memory , address and
data

Process
data and CPU
programs
Interface to give
I/O Devices
input and output
Data vs program
• Data – text, audio, image
• Programs – applications, messaging app, mp4 player, image viewer,
VLC player

• How data are stored? Are they stored in the same form as video or
songs, photos??
• Each and everything are stored in the form of 0 and 1
An image example
• Divided into millions of pixels, each pixel represents color.
• 1 bit can store 2 color, 2 bit can 4 colors, 3 bit can represent 8 and
current system is of 24 bit which can represent 16,777,216 colors
• Every thing on the form of 0,1 either it is data or programs.
• 8 bit is equivalent to 1 byte and 16 bit is equivalent to 2 byte which
also means word
• If we are saying memory then it mean primary memory as secondary
memory didn’t exist at that time.
• ROM - Read only memory (used to store data permanently)
• RAM – Random access memory (volatile, which is we are talking here
as memory). Everything happens in RAM.
• RAM is made up of either flip-flop(S-RAM) or transistor(D-RAM). Flip-flop
works on the principle of set and reset and transistor works on the principle
of charging and discharging.
We use hexa-decimal numbering in Microprocessor, Why?

• We, human being are familiar with decimal but computer keeps data
as binary numbers.
• For decimal representation 4 binary bits are required from 0000 to
1010.
• It looks 1011,1100,….., 1111 looks redundant. Though it looks just 6
numbers but can you distinguish between 9999 and FFFF.
• FFFF means 65535
Binary to hexa-decimal conversion
• First decimal to binary Binary Hexa-decimal
•8 4 2 1 1010 AH
1011 B
1100 C
• 9 means 10012 1101 D

• 7 means 01112 1110 E

1111 F
• 14 means 11102
• Hexa-decimal to decimal system Hexa-decimal binary
3 0011
A 1010
•2 3
2
2
2
1
2
0
3A 00111010
• 10012 means 9 H AB 10101011
128C 0001001010001100
4FA2 1000111110100010
Basic concepts of Microprocessor
Microprocessor Silicon chip which includes ALU,
Register circuits & Control circuits

Microprocessor

Registers

Control
Logic

ALU

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Basic concepts of Micro-controller
Computer as a chip
Silicon chip which includes
Microcontroller microprocessor, memory & I/O in a
single package.
Microcontroller

RAM

Micro
ROM
Processor

I/O

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 Microprocessor vs
Microcontroller

Micro-processor Micro-controller

21
Microprocessor vs Microcontroller
Microprocessor Microcontroller
It is vital part of computer system. It is vital part of embedded system.
It contain CPU inside it but does not It has CPU, fixed size of RAM, ROM and
contain on chip RAM, ROM and other peripherals mounted on a single chip.
peripherals.
It is multipurpose device which performs It is designed for specific task with fixed
several tasks. input, processing and output.
E.g. Software development, word E.g. Operating a washing machine,
processing, playing games, surfing etc. handling mouse click event etc.
It operates at high speed compared to It operates at comparatively lower speed
microcontroller. than microprocessor.
E.g. Clock speed of latest microprocessor is E.g. Clock speed is measured in MHz.
measured in GHz.
Application: Application:
Desktop PC’s, Laptops, notepads etc. Microwave oven, washing machine,
remote control, Mouse etc.
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Basic concepts of Microprocessors
A small computer with a
Microcomputer microprocessor as its CPU.
Includes memory, I/O etc.

Microcomputer

RAM

Micro
Keyboard ROM Display
processor

I/O

23
Components of Microprocessor
Small additional
• Performs memory location,
Arithmetic and which are used to
Logical operations
Arithmetic store and transfer
and Register data.
Logical Array
Unit (ALU)

Control Unit

• Brain of the computer.

• It controls and executes the flow of data between the
microprocessor, memory and peripherals.
• Signal permits the CPU to receive or transmit data.
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Basic concepts of Microprocessors
• Microprocessor is a computer Central Processing Unit
(CPU) on a single chip that contains millions of transistors
connected by wires.

Processor No. of transistors

Intel 8085 6500
Pentium IV 42 million
Core i3 1.4 Billion
Core i7 1.7 Billion

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Features of Microprocessor
• Cost-effective − The microprocessor chips are available at low prices
and results its low cost.
• Size − The microprocessor is of small size chip, hence is portable.
• Low Power Consumption − Microprocessors are manufactured by
using metal-oxide semiconductor technology, which has low power
consumption.
• Versatility − The microprocessors are versatile as we can use the same
chip in a number of applications by configuring the software program.
• Reliability − The failure rate of an IC in microprocessors is very low,
hence it is reliable.
System Bus

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System bus
• The network of wires or electronic pathways is known as 'Bus'.

• The technique was developed to reduce costs and improve modularity.

• Classification
1. Address Bus - Transfer Address
2. Data Bus - Transfer Data
3. Control Bus - Transfer Control Signal

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System bus
CPU Memory Input/Output

Control Bus

Address Bus

Data Bus

System Bus

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Address Bus
CPU Memory Input/Output

Control Bus

Address Bus

Data Bus

System Bus

30
Address Bus
• Transfers the addresses of Memory or I/O devices.

• Address bus is unidirectional.

• The maximum address capacity is equal to two to the power of the

number of lines present (2lines).

E.g. 8085 has 16-address lines

 Maximum address capacity => 216 = 65536 bytes

31
Data bus
CPU Memory Input/Output

Control Bus

Address Bus

Data Bus

System Bus

32
Data Bus
• It is used to transfer data within Microprocessor and Memory/IO
devices.
• Data Bus is bidirectional as Microprocessor requires to send and
receive data.
• Each wire of data bus is used to transfer the data corresponding to a
single bit of binary data.
E.g. 8085 has 8 - data lines

8085 is known as 8-bit processor

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System bus
CPU Memory Input/Output

Control Bus

Address Bus

Data Bus

System Bus

34
Control Bus
• Microprocessor uses control bus to process data.
i.e. what to do with the selected memory location.
• Some control signals are Read, Write and Opcode fetch etc.
• Control Bus is bidirectional.
• This is a dedicated bus, because all timing signals are generated
according to control signal.

35
Microprocessor systems with
bus organization

36
Microprocessor systems with bus organization

Input/Output
Arithmetic
and Register
Logical Array System Bus
Unit (ALU)

Control Unit Memory

ROM RAM

37
Micro-processor Architecture and Operation
Memory
Address Data
location
1000 3E
1001 22
……… …..
2000 …
2001 6C

Micro-processor

I/O Devices
Read Operation
Memory
Address Data
location
Step One
Select address 1000 3E
1001 22
Address Bus ……… ….. Data Bus
2000 …
Step two
2001 6C
Micro-processor Bus carry data

Step three
Triger read Control bus
signal
Control Unit I/O Devices
Write Operation
Memory
Address Data
location
1000 3E
Step 1
1001 22 Data Bus
Select the
address ……… …..
2000 …
Step 3
Address Bus 2001 6C Carry
Micro-processor
Data
Step 2
Trigger the Control
write signal Bus

Control Unit I/O Devices

Instruction Cycle Memory
Address Data
Retrieves program location
instruction from its 1000 3E
memory – fetch
Understanding 1001 22
what the
……… …..
operation -
Decode 2000 …
2001 6C
Micro-processor

Performing the
operation -
Execute I/O Devices

Decoding for 2 bit

00 - add
01 - sub
10 - mul
11 - div
1. Instruction cycle: this term is defined as the number of steps
required by the CPU to complete the entire process ie. Fetching,
decoding and execution of one instruction. The fetch, decode and
execute cycles are carried out in synchronization with the clock.
2. Machine cycle: It is the time required by the microprocessor to
complete the operation of accessing the memory devices or I/O devices.
In machine cycle various operations like opcode fetch, memory read,
memory write, I/O read, I/O write are performed.
3. T-state: Each clock cycle is called as T-states.
Instruction
• Operation completes one by one
• 3 billion operation in 1 second so we couldn’t figure out such a speedy
task.
• Instruction consists of opcodes and operand.
• Opcodes means "operation codes". They tell the circuitry (in this
case, the microprocessor) which operation to perform e.g. addition,
subtraction.
• Operands are the data contents on which the operation is to be
performed.
• e.g. MVI A,00H
• here instruction MVI is an opcode. A & B are operands.
System Bus in 8085 Micro-processor
• Data bus – 8085 consists of 8 bit data bus which carry 8 bit data and it is
bidirectional in nature.
• Address bus – 8085 consists of 16 bit data bus which carry 16 bit address data
and unidirectional in nature.
• Control bus – 8085 send various control signal to control the operation in
different components.
• ALE (Address Enable Latch) is the control signal which is nothing but a positive
going pulse generated when a new operation is started by microprocessor. So
when pulse goes high means ALE=1, it makes address bus enable and
when ALE=0, means low pulse makes data bus enable.
Register
• They are formed by set of flip-fops. Each flip flop can store 1 bit. As general
purpose register are of 8 bit so it has 8 flipflops. Eg., B,C,D,E,H,L,A
• 35 H 0 0 1 1 0 1 0 1

• MVI B, 35 H  move immediate data 35 H in register B

• In Assembly language we directly access register like variables in other
programming. We cannot create, there are 7 register which we or programmer
can use and operate.
• These 7 are General purpose register which are accessible for a programmer
• Some time we need to operate on 16 bit data then we can make a pair. B pair
with C, D with E and H with L.
• There are other register known as special purpose register which are allocated for
specific task. Program Counter, Stack pointer, Instruction register, temporary
register etc.
 Program Counter
RAM

Micro-processor
Address Data
It takes the address 1000 1A
PC
1001 1001 4C
PC -->1002 Address Bus
1002 23
Now, Instruction is Data Bus 1003 E2
decoded i.e.
………
understanding the Instruction
opcode side by Register 4C Control Bus
side PC is Read
incremented

Up-to this process it is called fetching.

ID Instructor The value which here is called opcode
PC contains the Decoder
address of next
instruction.
It is 16 bit register
Program Counter
Program Counter(PC)
• Sequence the execution of an instructions.

CPU
Address Memory
PC 0003H Instruction 4
0002H Instruction 3

IR 0001H Instruction 2
0000H Instruction 1

49
INR/DCR
• Increment Register helps to increment the value of Program Counter
• INR/ DCR used for stack. We will discuss it later.
Timing and Control Circuit
• It is analogy to human brain. It instruct what other field to do.
• It’s input is instruction from instruction decoder and output is control
signal.
 Data Bus
5
Accumulator Temp
(A)=2 Register 3

B=3

5
ALU 2+3=5
AAALU
a=2
b=3
2
a+b
ADD B
Value of A added with value of
B and stored in A
A is accumulating the result so
it is called accumulator
Accumulator and ALU ADD enable signal from control bus
• Temporary register : Store the data for temporary from register or
input devices. It is unidirectional
• Accumulator – store the result from ALU. It is bidirectional
• ALU – operates arithmetic and logical operation by getting the signal
from timing and Control circuit.
 Flag registers
Flags tells the status of the current result from the ALU.
It is unidirectional for data bus but bidirectional for ALU

Sign flag
Carry Flag

Zero flag Auxiliary Flag Parity Flag

Signed binary numbers
The Flag register is a Special Purpose Register. Depending upon the value of result after any
arithmetic and logical operation the flag bits become set (1) or reset (0). In 8085 microprocessor,
flag register consists of 8 bits and only 5 of them are useful.
1.Sign Flag (S) – After any operation if the MSB (B(7)) of the result is 1, it indicates the number
is negative and the sign flag becomes set, i.e. 1. If the MSB is 0, it indicates the number is positive
and the sign flag becomes reset i.e. 0.
from 00H to 7F, sign flag is 0 and from 80H to FF, sign flag is 1
1 refers MSB is 1 (negative) and 0 refers MSB is 0 (positive)
Example:
MVI A 30 (load 30H in register A)
MVI B 40 (load 40H in register B)
SUB B (A = A – B)
These set of instructions will set the sign flag to 1 as 30 – 40 is a negative number.
MVI A 40 (load 40H in register A)
MVI B 30 (load 30H in register B)
SUB B (A = A – B)
These set of instructions will reset the sign flag to 0 as 40 – 30 is a positive number.
2.Parity Flag (P) – If after any arithmetic or logical operation the result
has even parity, an even number of 1 bits, the parity register becomes set
i.e. 1, otherwise it becomes reset i.e. 0.
1-accumulator has even number of 1 bits
0-accumulator has odd parity
Example:
MVI A, 02H (load 02H in register A)
MVI B, 03H
ADD B
This instruction will set the parity flag to 1 as the Binary code of 05H is
00000101, which contains even number of ones i.e. 2.
3. Zero Flag (Z) – After any arithmetical or logical operation if the result is 0 (00)H, the zero flag
becomes set i.e. 1, otherwise it becomes reset i.e. 0.
00H zero flag is 1.
from 01H to FFH zero flag is 0
1- zero result
0- non-zero result
Example:
MVI A 10 (load 10H in register A)
SUB A (A = A – A)
These set of instructions will set the zero flag to 1 as 10H – 10H is 00H

4. Auxiliary Carry Flag (AC) – This flag is used in BCD number system(0-9). If after any arithmetic or
logical operation D(3) generates any carry and passes on to B(4) this flag becomes set i.e. 1,
otherwise it becomes reset i.e. 0. This is the only flag register which is not accessible by the
programmer
1-carry out from bit 3 on addition or borrow into bit 3 on subtraction
0-otherwise
Example:
MVI A, 2B (load 2BH in register A)
MVI B, 39 (load 39H in register B)
ADD B (A = A + B)
These set of instructions will set the auxiliary carry flag to 1, as on adding 2B and 39, addition of lower
order nibbles B and 9 will generate a carry.
5.Carry Flag (CY) – Carry is generated when performing n bit operations and the result is
more than n bits, then this flag becomes set i.e. 1, otherwise it becomes reset i.e. 0.
During subtraction (A-B), if A>B it becomes reset and if (A<B) it becomes set.
Carry flag is also called borrow flag.
1-carry out from MSB bit on addition or borrow into MSB bit on subtraction
0-no carry out or borrow into MSB bit
Example:
MVI A 30 (load 30H in register A)
MVI B 40 (load 40H in register B)
SUB B (A = A – B)
These set of instructions will set the carry flag to 1 as 30 – 40 generates a carry/borrow.
MVI A 40 (load 40H in register A)
MVI B 30 (load 30H in register B)
SUB B (A = A – B)
These set of instructions will reset the sign flag to 0 as 40 – 30 does not generate any
carry/borrow.
Flag Register
D7 D6 D5 D4 D3 D2 D1 D0
S Z  AC  P  CY

:Undefined P -Parity Flag

Set (1) if result has even 1 0 0 1 0 0 1 1
P=1
S -Sign Flag no. of 1’s & Reset(0) if
Set (1) if 7th bit of result is 1; result has odd no. of 1’s
otherwise reset (0) CY -Carry Flag
1 0 1 0 1 0 1 0 Set (1) if arithmetic
S=1
AC -Auxiliary Carry Flag operation results in
Set (1) when carry bit is carry;
rd
generated by 3 bit &
Z -Zero Flag otherwise reset(0)
th
passed to bit 4 bit.
Set (1) when result is zero; 1 1 1
otherwise reset(0) 1 1 1 1 0 1 0 1 0 1 0
1 0 1 0 0 0 1 0 1 0 1 0 + 0 1 1 0 1 0 0 1
-1 0 1 0 + 0 1 1 0 1 0 0 1 1 0 0 0 1 0 0 1 1
0 0 0 0 1 0 0 1 0 0 1 1 CY = 1
Z=1 AC = 1
Flag Register
D7 D6 D5 D4 D3 D2 D1 D0
S Z  AC  P  CY

• 5 Flag Register for set/reset operations.

• Helpful in decision making.
• Conditions are tested through software instructions.
Example:
JC (Jump On Carry) is implemented to change the
sequence of program when CY(Carry Flag) is set(1).

63
What will be the result of flag registers if we perform
33
+A6

What will be the result of flag registers if we perform

FF
+01
WZ pair
• We don’t read about it, they are temporary register which are used by
microprocessor.
• XCHG instruction means exchange – it interchange HL pair and DE pair
- HL = 1234H , DE = 345AH
-firstly HL value is stored in WZ i.e., WZ = 1234H
-Secondly, DE value is stored in HL i.e., HL = 345AH
-lastly, WZ value is stored in DE = 1234H
 Data

Stack Pointer Stored randomly

• What is a stack? Program

• It is a data structure which operates in LIFO
last in first out.
• It is easy to fetch data if stored structurally. As
if one address is known then other address Stack
Stored in structure
aren’t required to remember
• Only one address is enough to fetch data from memory
stack
• SP is the address of top of stack so it is 16 bit
register.

4002 04
4003 03
Value of Top of stack = 04 4004 02
Address of Top of stack = 4002 4005 01
Value of stack Pointer = 4002
 4001 1A
4002 04
PUSH 1A
4003 03

Push operation decrements the value of address 4004 02

SP = 4001 4005 01

POP 4002 04
4003 03
Pop operation increments the value of address 4004 02
SP = 4003 4005 01
 INTA RST6.5 TRAP
INTR RST5.5 RST7.5 SID SOD

Interrupt Control Serial I/O Control

8-Bit Internal Data Bus

Instruction
Accumulator (8) Temp. Reg. (8) Multiplexer
Reg. (8)
W (8) Z (8)
Temp. Reg. Temp. Reg.
Instruction B (8) C (8)
Decoder Reg. Reg.

Register Select
Flag (5) and D (8) E (8)
Flip-Flops Machine Reg. Reg.
Cycle H (8) L (8)
Encoding Reg. Reg.
Arithmetic Stack Pointer (16)
Logic Unit
Power +5 V (ALU) (8) Program Counter (16)
Supply GND
Increment/Decrement
Address Latch (16)
X1 CLK
Timing and Control Reset
X2 GEN Address Buffer Data/Address Buffer
Control Status DMA
(8) (8)

CLK RD WR S0 S1 IO/M HLDA RESET OUT

OUT ALE A15 - A8 AD7 – AD0
HOLD RESET IN Address
READY Address/Data69
Bus Bus
 INTA RST6.5 TRAP
UsedUsed toINTR
hold
8-bitdata
data(i.e. temporary
RST7.5 SID SOD
• to store RST5.5 to perform arithmetic & logical operations.
data)
• Result during ALU
of operation is operation.
stored
Interrupt in Accumulator. Serial I/O Control
Control

8-Bit Internal Data Bus

Accumulator (8) Temp. Reg. (8)

Instruction When Instruction is fetched from
Multiplexer
Reg. (8)
memory, itWis(8)loadedZin(8)the
Instruction Registor
Temp. (IR).
Reg. Temp. Reg.
Instruction S Z AC
B (8) P
C (8) CY
Decoder Reg. Reg.
Flag (5) and

Register Select
Flip-Flops Machine
InstructionD decoder
(8) Edecodes
(8)
Reg. Reg.
Cycle the information
H (8) present
L (8) in the
Encoding InstructionReg.
register.Reg.
Arithmetic Stack Pointer (16)
Logic Unit
(ALU) (8) Program Counter (16)
Increment/Decrement
Address Latch (16)
X1 CLK
Timing and Control Reset
GEN
• Performs
Control Computing
Status Functions.
DMA Address Buffer Data/Address Buffer
(8) (8)
• Accumulator, Temporary Register
CLK RD WR S0 S1 HLDA RESET OUT
OUT
and Flag Registers
ALE
are part of ALU. A15 - A8 AD7 – AD0
HOLD RESET IN Address
READY Address/Data70
Bus Bus
 INTA RST6.5 TRAP
INTR RST5.5 RST7.5 SID SOD
A multiplexer pulls out the right group
Interrupt Control of bits, depending on the instruction.
Serial I/O Control

8-Bit Internal Data Bus

Instruction
Accumulator (8) Temp. Reg. (8) Multiplexer
Reg. (8)
W (8) Z (8)
• • Two additional 8-bit register,
Each register can hold 8-bit data. which holds Temp. Reg. Temp. Reg.
• the
Thesetemporary datawork
registers can during execution
in pairInstruction
to hold
Decoder
of
16- B (8) C (8)
some instructions.
bit data and Flag
their (5)
pairing combination
and is
Reg. Reg.

Register Select
D (8) E (8)
• They are used
like B-C, D-E & H-L.internally,
Flip-Flops so they are
Machine not Reg. Reg.
available to the programmer. Cycle H (8) L (8)
It increments the program counter as Encoding Reg. Reg.
instructions
16-bit
It register
is a 16-bit execute,
used
register works
Arithmetic increments
to store the which
like stack, and is
memory Stack Pointer (16)
decrements
address
always the stack
location
Logic pointer
of
Unit
the
incremented/decrementednext as needed,
instruction
by 2 andbe
to
during
(ALU) (8) Program Counter (16)
supports
executed. the 16-bit
push & pop operations. increment and decrement
Increment/Decrement
instructions. Address Latch (16)
• The content stored in the SP and PC is
X1 CLK
loaded
Timing and into the Address BufferResetand
Control
GEN Address Buffer Data/Address Buffer
Data/Address
Control Buffer.
Status DMA
(8) (8)
• The memory and I/O chips are connected
CLK RD WR S0 S1 HLDA RESET OUT
to
OUT
these buses
ALE
that can exchange the A15 - A8 AD7 – AD0
HOLD RESET IN
data.
READY Address Address/Data71
Bus Bus
 INTA RST6.5 TRAP
INTR RST5.5 RST7.5 SID SOD
A multiplexer pulls out the right group
Interrupt Control of bits, depending on the instruction.
Serial I/O Control

8-Bit Internal Data Bus

Instruction
Accumulator (8) Temp. Reg. (8) Multiplexer
Reg. (8)
W (8) Z (8)
• • Two additional 8-bit register,
Each register can hold 8-bit data. which holds Temp. Reg. Temp. Reg.
• the
Thesetemporary datawork
registers can during execution
in pairInstruction
to hold
Decoder
of
16- B (8) C (8)
some instructions.
bit data and Flag
their (5)
pairing combination
and is
Reg. Reg.

Register Select
D (8) E (8)
• They are used
like B-C, D-E & H-L.internally,
Flip-Flops so they are
Machine not Reg. Reg.
available to the programmer. Cycle H (8) L (8)
It increments the program counter as Encoding Reg. Reg.
instructions
16-bit
It register
is a 16-bit execute,
used
register works
Arithmetic increments
to store the which
like stack, and is
memory Stack Pointer (16)
decrements
address
always the stack
location
Logic pointer
of
Unit
the
incremented/decrementednext as needed,
instruction
by 2 andbe
to
during
(ALU) (8) Program Counter (16)
supports
executed. the 16-bit
push & pop operations. increment and decrement
Increment/Decrement
instructions. Address Latch (16)
• The content stored in the SP and PC is
X1 CLK
loaded
Timing and into the Address BufferResetand
Control
GEN Address Buffer Data/Address Buffer
Data/Address
Control Buffer.
Status DMA
(8) (8)
• The memory and I/O chips are connected
CLK RD WR S0 S1 HLDA RESET OUT
to
OUT
these buses
ALE
that can exchange the A15 - A8 AD7 – AD0
HOLD RESET IN
data.
READY Address Address/Data72
Bus Bus
 INTA RST6.5 TRAP
INTR RST5.5 RST7.5 SID SOD

Interrupt Control Serial I/O Control

8-Bit Internal Data Bus

Instruction
Accumulator (8) Temp. Reg. (8) Multiplexer
Reg. (8)
W (8) Z (8)
Temp. Reg. Temp. Reg.
Instruction B (8) C (8)
Decoder Reg. Reg.
Flag (5) and

Register Select
D (8) E (8)
Flip-Flops Machine Reg. Reg.
Cycle H (8) L (8)
Encoding Reg. Reg.
This unit synchronizes all the microprocessor operations
Arithmetic with the
Stack Pointer (16)
clock and generates control signal necessary for communication
Logic Unit
betweenInput
Perform signal to synchronize
(ALU)
microprocessor microprocessor
(8) & peripheral.
synchronization Program Counter (16)
Frequency Control
Read/write Signals
either to/from memory orsignal
peripherals.
with with peripheral
peripheral
Address device.
device.
Shows DMA control
read/write
Latch status
Enable controlto/from
Increment/Decrement
signalmemoryAddress
or I/O.Latch (16)
X1 CLK
Signal to RESET microprocessor
Timing and Control Reset and other devicesData/Address
connected to
X2 GEN Address Buffer Buffer
Control Status DMA
it. (8) (8)

CLK RD WR S0 S1 HLDA RESET OUT

OUT ALE A15 - A8 AD7 – AD0
HOLD RESET IN Address
READY Address/Data73
Bus Bus
 INTA RST6.5 TRAP
INTR RST5.5 RST7.5 SID SOD

Interrupt Control Serial I/O Control

8-Bit Internal Data Bus

Instruction
Accumulator (8) Temp. Reg. (8) Multiplexer
Reg. (8)
W (8) Z (8)
Temp. Reg. Temp. Reg.
Instruction B (8) C (8)
Decoder Reg. Reg.
Flag (5) and

Register Select
D (8) E (8)
Flip-Flops Machine Reg. Reg.
Cycle H (8) L (8)
Encoding Reg. Reg.
Arithmetic Stack Pointer (16)
Logic Unit
(ALU) (8) Program Counter (16)
Increment/Decrement
Address Latch (16)
X1 CLK
Timing and Control Reset
X2 GEN Address Buffer Data/Address Buffer
Control Status DMA
(8) (8)

CLK RD WR S0 S1 HLDA RESET OUT

OUT ALE A15 - A8 AD7 – AD0
HOLD RESET IN Address
READY Address/Data74
Bus Bus
 INTA RST6.5 TRAP
INTR RST5.5 RST7.5 SID SOD

Interrupt Control Serial I/O Control

8-Bit Internal Data Bus

Instruction
Accumulator (8) Temp. Reg. (8) It controls
Reg. (8) the serial data communication by
Multiplexer
using two instructions:
W (8) Z (8)
Temp. Reg. Temp. Reg.
i.
Instruction SID (Serial input
B (8)
data)C (8)
ii. SOD (Serial output
Decoder Reg. data)
Reg.
Flag (5) and

Register Select
D (8) E (8)
Flip-Flops Machine Reg. Reg.
Cycle H (8) L (8)
• It controls the Encoding
interrupts Reg. Reg.
during aArithmetic
process. Stack Pointer (16)
• There areLogic Unit
5 interrupt signals
(ALU) (8) Program Counter (16)
in 8085 microprocessor:
Increment/Decrement
TRAP, RST 7.5, RST 6.5, RST Address Latch (16)
X1 CLK
5.5, INTR.
Timing and Control Reset
X2 GEN Address Buffer Data/Address Buffer
Control Status DMA
(8) (8)

CLK RD WR S0 S1 HLDA RESET OUT

OUT ALE A15 - A8 AD7 – AD0
HOLD RESET IN Address
READY Address/Data75
Bus Bus
 INTA RST6.5 TRAP
INTR RST5.5 RST7.5 SID SOD

Interrupt Control Serial I/O Control

8-Bit Internal Data Bus

Instruction
Accumulator (8) Temp. Reg. (8) Multiplexer
Reg. (8)
W (8) Z (8)
Temp. Reg. Temp. Reg.
Instruction B (8) C (8)
Decoder Reg. Reg.

Register Select
Flag (5) and D (8) E (8)
Flip-Flops Machine Reg. Reg.
Cycle H (8) L (8)
Encoding Reg. Reg.
Arithmetic Stack Pointer (16)
Logic Unit
Power +5 V (ALU) (8) Program Counter (16)
Supply GND
Increment/Decrement
Address Latch (16)
X1 CLK
Timing and Control Reset
X2 GEN Address Buffer Data/Address Buffer
Control Status DMA
(8) (8)

CLK RD WR S0 S1 IO/M HLDA RESET OUT

OUT ALE A15 - A8 AD7 – AD0
HOLD RESET IN Address
READY Address/Data76
Bus Bus
Thank you