|HOME |ABOUT |ARTICLES |ACK |FEEDBACK |TOC |LINKS |BLOG |JOBS | Search
TUTORIALS INTRODUCTION Index
Introduction
SystemVerilog Vmm Log
Verification Vmm Env
Vmm Data
Constructs Vmm Channel
Interface Verification methodological manual (VMM) , co-authored by verification experts from Vmm Atomic Generator
OOPS ARM and Synopsys, describes how to use SystemVerilog to develop scalable, Vmm Xactor
predictable and reusable verification environments. VMM has become important factor Vmm Callback
Randomization in increasing verification reuse, improved verification productivity and timeliness. Vmm Test
Functional Coverage Vmm Channel Record
VMM consists coding guide lines and base classes. VMM is focused on Coverage And Playback
Assertion
driven verification methodology. VMM supports both the top-down and bottom-up Vmm Scenario
DPI approaches. VMM follows layered test bench architecture to take the full advantage of Generator
UVM Tutorial the automation. The VMM for SystemVerilog TestBench architecture comprises five Vmm Opts
layers.
VMM Tutorial Report a Bug or
OVM Tutorial The layered TestBench is the heart of the verification environment in VMM: Comment on This section
Easy Labs : SV - Your input is what keeps
signal layer: Testbench.in improving with
Easy Labs : UVM This layer connects the TestBench to the RTL design. It consists of interface, clocking, time!
Easy Labs : OVM and modport constructs.
Easy Labs : VMM
command layer:
AVM Switch TB This layer contains lower-level driver and monitor components, as well as the
VMM Ethernet assertions. This layer provides a transaction-level interface to the layer above and
sample drives the physical pins via the signal layer.
functional layer:
Verilog This layer contains higher-level driver and monitor components, as well as the self-
Verification
checking structure (scoreboard/tracker).
Verilog Switch TB scenario layer:
Basic Constructs This layer uses generators to produce streams or sequences of transactions that are
applied to the functional layer. The generators have a set of weights, constraints or
scenarios specified by the test layer. The randomness of constrained-random testing
is introduced within this layer.
OpenVera
Constructs test layer:
Switch TB Tests are located in this layer. Test layer can interact with all the layers. This layer
RVM Switch TB allows to pass directed commands to functional and command layer.
RVM Ethernet sample
Specman E
Interview Questions
VMM libraries consists following sub libraries
VMM Standard Library
VMM Register Abstraction Layer (RAL)
VMM Hardware Abstraction Layer (HAL)
VMM Scoreboarding
The VMM Standard Library provides base classes for key aspects of the verification
environment, transaction generation, notification service and a message logging
service.
These libraries can be downloaded from http://www.vmmcentral.org
Following are some of the classes and macros defined in the VMM Standard Library
vmm_env :
The class is a base class used to implement verification environments.
vmm_xactor :
This base class is to be used as the basis for all transactors, including bus-functional
models, monitors and generators. It provides a standard control mechanism expected
to be found in all transactors.
vmm_channel :
This class implements a generic transaction-level interface mechanism. Transaction-
level interfaces remove the higher-level layers from the physical interface details.
Using channels, transactors pass transactions from one to other.
vmm_data :
This base class is to be used as the basis for all transaction descriptors and data
models. It provides a standard set of methods expected to be found in all descriptors.
User must extend vmm_data to create a custom transaction.
vmm_log :
The vmm_log class used implements an interface to the message service. These
classes provide a mechanism for reporting simulation activity to a file or a terminal. To
ensure a consistent look and feel to the messages issued from different sources,
vmm_log is used.
vmm_atomic_gen :
This is a macro. This macro defines a atomic generator for generating transaction
which are derived from vmm_data.
vmm_scenario_gen :
Defines a scenario generator class to generate sequences of related instances of the
specified class.
vmm_notify :
The vmm_notify class implements an interface to the notification service. The
notification service provides a synchronization mechanism for concurrent threads or
transactors.
vmm_test :
This class will be useful for runtime selection of testcases to run on an environment.
<< PREVIOUS PAGE TOP NEXT PAGE >>
copyright © 2007-2017 :: all rights reserved www.testbench.in::Disclaimer
