Journal of Operation and Automation in Power Engineering

Vol. 4, No. 2, Dec. 2016, Pages: 117-131

http://joape.uma.ac.ir

A New Structure of Buck-Boost Z-Source Converter Based on Z-H Converter

E. Babaei*, T. Ahmadzadeh
Faculty of Electrical and Computer Engineering, University of Tabriz, Tabriz, Iran.

Abstract- In this paper, a new structure for buck-boost Z-source converter based on Z-H topology is proposed. The
proposed converter consists of two LC networks similar to the conventional Z-source and Z-H converters. One of the
characteristics of the proposed structure is that, without any changing in its’ power circuit, it can be used in different
conversions such as dc/dc, dc/ac and ac/ac. This unique characteristic of the proposed structure is similar to matrix
converters. To use this structure in different conversions just control system should be changed. Other main advantages
of the proposed converter are simpler topology, step-up and step-down capabilities and low ripple in voltage and
current waveforms. Due to capabilities of the proposed converter mentioned above, it can be used in applications such
as connect renewable energy sources to the grid, speed control of induction machines, electric vehicles and etc. In this
paper, a complete analysis of the proposed converter in dc/dc conversion with details and mathematical equations is
presented. Moreover, for the proposed topology, the ripple of inductors and capacitors is given. A suitable control
method is presented, too. Also, the power losses and efficiency of the proposed converter are calculated. The
correctness operation of the proposed converter is reconfirmed by the experimental results.
Keyword: Buck-boost dc/dc converter, LC network, Shoot-through (ST) state, Z-H converter, Z-source inverter.

1. INTRODUCTION In Ref. [1], a Z-source converter has been presented

The conventional voltage source converters are to overcome the problems of the conventional voltage
extensively used in industry. Nevertheless, they have source and current source converters. Also, the control
their own conceptual and theoretical limitations. The method of Z-source converter for dc/ac, ac/dc, ac/ac and
voltage source inverters are step-down for dc/ac dc/dc conversions has been provided. The main circuit
conversion and step-up for ac/dc conversion. To obtain a of Z-source converter connects by two impedance
desired ac output voltage, in conditions which overdrive source networks (LC networks) in X shape to the dc
requires and the available dc voltage is limited, an source, load or another converter. In the conventional
additional dc/dc boost converter is necessary. It is voltage source and current source converters, a
noticeable that the additional power converter decreases capacitor and inductor are used, respectively. Hence, the
efficiency and increases system cost. The upper and unique features in Z-source converter do not exist in
lower devices of each phase leg cannot be gated on them. The Z-source concept can be applied to all dc/ac
simultaneously because of occurring a shoot-through [2], ac/dc [3], ac/ac [4], and dc/dc [5] conversions.
and destructing the devices. Besides, the conventional Up to now, several modified PWM control techniques
current source converters have their own conceptual and for a Z-source inverter have been presented in order to
theoretical limitations. The current source inverters are gain simple implementation, low device stress and less
step-up for dc/ac conversion and step-down for ac/dc commutation per switching cycle. The SPWM and
conversion. In current source converters, at least one of SVPWM modulation techniques for 2-level three-phase
the upper and lower devices has to be gated on. If not, H-bridge topologies are extensively used. In addition,
an open circuit of the dc inductor occurs and destroys other methods of modulation will be described as
the devices. follows:
Some of sinusoidal PWM (SPWM) modulation
Received: 15 May 2015 techniques are simple boost control [1, 6], maximum
Revised: 15 Nov. 2015 and 5 Apr. 2016
boost control and maximum boost control with third-
Accepted: 12 Aug. 2016
Corresponding author: harmonic injection [6, 7], constant boost control and
E-mail: [email protected] (E. Babaei) constant boost control with third-harmonic injection [8,
9]. In [10], some of SPWM modulation techniques have
 2016 University of Mohaghegh Ardabili. All rights reserved. been compared in terms of the voltage gain. In simple
boost control method, shoot-through states created for
E. Babaei, T. Ahmadzadeh: A New Structure of Buck-Boost Z-Source Converter Based on Z-H Converter 118

step-up voltage. To create shoot-through states, a carrier inverters based on the combination of switched
triangular signal is compared to the three phase inductors and transformers has been presented. In the
sinusoidal reference signal and two straight lines. presented inverter, the high voltage gain is achieved by
Disadvantage of this modulation technique is that when increasing the ratio of the transformer and the number of
the shoot-through range increases, the modulation index switched inductor cells that can reduces efficiency. In
decreases. Also, for the application which needs a [22], to reach high voltage gain with high efficiency, a
higher voltage boost, the device rating is increased. In new topology for boost Z-source inverter based on
[6], for solving this issue, maximum boost control and switched-inductor cell has been presented. Having
maximum boost control with third-harmonic injection common earth between the input source and inverter
methods have been presented. Maximum boost control and capability to generate higher voltage gain by using
method in comparison with simple boost control method lower amount of the duty cycles are some advantages of
increases the boost factor range. Nevertheless, the the presented Z-source inverter. In [23], a topology for
shoot-through time intervals are variable in this method. half-bridge switched boost Z-source inverter has been
Hence, low-frequency ripple generates in the capacitor presented. The presented half-bridge inverter uses more
voltage and inductor current. This issue causes active elements rather than capacitors and inductors in
increasing size and cost of the LC network components. comparison with the conventional half-bridge Z-source
To solve these problems, the maximum constant boost inverter that results in reduction of weight, size and cost.
control and constant boost control with third-harmonic Moreover, the presented inverter has the capability of
injection methods have been proposed [7, 8]. In these eliminating inverter leg short circuit issues and is able to
control methods, the maximum boost factor achieves further increase the output voltage level in comparison
and the time intervals of shoot-through states are with its conventional types.
constant which eliminates the low-frequency harmonic In Z-source converters, a diode or a switch is
component in the LC network. Another efficient essential preceding of the LC network. This diode (or
modulation technique for conventional inverter switch) creates discontinuity in the current. This issue
topologies is space vector pulse width modulation creates an unwanted operation mode in during the non-
(SVPWM) control method. In this control method, the shoot-through switching state. Moreover, this diode (or
commutation time of switches and the harmonic of the switch) prevents the reverse current. Hence, these
output voltage/current are efficaciously reduced. Also, converters are applied only when there is no need for
the voltage stress and switching loss decreased because energy return to input source [24, 25]. In [25], a Z-H
of the suitable dc-link voltage. These unique converter has been presented by using the concept of Z-
characteristics in SVPWM control method can be source converter. In the structure of Z-H converter also
applied for various Z-source converters. It should be used a LC network but it is different in terms of
noted that, for keeping the advantages of SVPWM connection. So that, the LC network of the Z-H
control method in the Z-source converters, the shoot- converter has two ports in its' input and four ports in its'
through switching state should correctly inserted in the output. Two input ports of the LC network are
switching cycle without any change in the volt-sec connected to two ports of the input source, and its' four
balance. output ports are connected to one H-bridge. Two ports
In [11-14], some of the SVPWM techniques have and two middle points of the H-bridge are connected to
been presented for Z-source topologies. By creating two two capacitors and two inductors respectively. In
new modifications in SVPWM control method, addition, the Z-H converter compared to the Z-source
experiments and performance analysis have been inverter eliminates diode proceeding of LC network and
presented [15, 16]. In addition, modified SVPWM shoot-through switching state. The Z-H topology
techniques have been given to reduce the common mode directly can be applied to dc/dc, dc/ac, ac/dc and ac/ac
voltage and currents for photovoltaic systems [17, 18] conversions without any change in its structure similar
and motor drives [19]. to the Z-source topology [25-27].
In [20], a switched-inductor Z-source inverter In this paper, a new buck-boost Z-source converter
topology using two batteries has been presented. This based on Z-H topology is proposed. One of the
inverter is capable of increasing the output voltage level advantages of the proposed converter is the positive and
in comparison to the other structures of Z-source negative output voltage. It is noticeable that this feature
inverter in lower duty cycle. As a result, the presented can be used in electrochemical power supply. In
topology is more effective in improvement of the output electrochemical power supply, sometimes it requires
power quality. In [21], a structure for quasi-Z-source positive voltage and other times it needs negative
Journal of Operation and Automation in Power Engineering, Vol. 4, No. 2, Dec. 2016 119

voltages. Moreover, the magnitude of the positive and 2. PROPOSED BUCK-BOOST Z-SOURCE
negative voltages is different. One of the other CONVERTER
characteristics of the proposed structure is that, without Fig. 1 shows the power circuit of the proposed buck-
any changing in its’ power circuit, the proposed boost Z-source converter. The proposed converter
structure can be used in different conversions such as consists of four bidirectional switches and two LC
dc/dc, dc/ac and ac/ac. This unique characteristic of the networks. It is distinct in terms of connection with
proposed structure is similar to matrix converters. To conventional Z-source and Z-H converters.
L1 i L1
use this structure in different conversions, just the
control system should be changed. The difference of the  v L1 
S1 S2
proposed structure with matrix converters is that in  VC1  iC1
matrix converters due to not using of energy storage ii
C1 io
elements, the converter does not have ability to be 
Vi 

operated in step-up mode. Whereas the proposed Vo
iC 2
structure due to the use of energy storage elements can 

be used in both step-up and step-down modes. Because C2 S3 S4
VC 2
the proposed topology can act as dc/dc, dc/ac and ac/ac L2 i L2

operations, so the proposed converter can be replaced  vL2 
with some dc/dc, dc/ac and ac/ac converters based on
Fig. 1. The proposed buck-boost Z-source converter.
Z‐source converters. Due to capabilities of the proposed
converter, it can be used in applications such as connect Considering Fig. 1, the switches S1 and S 2 are
renewable energy sources to the grid, speed control of complementary controlled. There is same condition for
induction machines, fuel cell systems, photovoltaic
S 3 and S 4 . When the switches S1 and S 4 are turned
systems, wind turbines, motor drives, electric vehicles
and etc. Also, the Z-source concept can be easily on, the switches S2 and S3 are turned off
applied to adjustable-speed drive (ASD) systems. The simultaneously, and when the switches S 2 and S 3 are
Z-source rectifier/inverter system can produce an output turned on, the switches S1 and S 4 are turned off. The
voltage greater than the ac input voltage by controlling
duty cycle for the switches S 2 and S 3 is considered
the boost factor, which is impossible for the
conventional ASD systems. Moreover, the proposed D . The proposed converter has two D  [0, 0.5) and
converter in ac/ac conversion theoretically, can boost D  (0.5, 1] operating zones. In the first operating
the ac voltage to any desired magnitude. A very big zone, the converter operates in buck-boost operation,
difference compared to the Z-source ac/ac converter is and in the second operating zone, the converter is only
that the output voltage of the proposed ac/ac converter is in boost operation. Fig. 2 shows the control signals for
a sinusoidal waveform. Therefore, the main advantages both operating zones of D  [0, 0.5) and D  (0.5, 1] .
of proposed converter in ac/ac conversion are simple
The equivalent circuits of converter in T0 (which the
structure and not needing any additional filter in circuit.
Also, the details of calculation of voltages and switches S 2 and S 3 are turned on) and T1 (which the
currents of all components are presented in this paper. switches S1 and S 4 are turned on) time intervals for
Moreover, for the proposed topology, the ripple of both operating zones are shown in Fig. 3.
inductors and capacitors is given. A suitable control Assuming same values for L1 and L2 inductors
method is presented, too. In addition, the power losses
( L1  L2  L ) and also same values for C1 and C2
and efficiency of the proposed converter are calculated.
Since there is no need to any changes in power circuit of capacitors ( C1  C2  C ), the following results are
converter for different conversions, so in this paper, achieved:
only the operation and analysis of the proposed
V C1  VC 2  VC (1)
converter in dc/dc conversion with details and
mathematical equations is presented. It is noticeable v L1  v L 2  v L (2)
that, the operation and analysis of the proposed Where, VC and v L are the voltages across the
converter at other conversions are same with dc/dc capacitors and inductors, respectively.
conversion. The experimental results are given to
validate the correctness operation of the proposed For T0 time interval (Fig. 3(a)), the following
converter. equations can be written:
E. Babaei, T. Ahmadzadeh: A New Structure of Buck-Boost Z-Source Converter Based on Z-H Converter 120

Ac , Ar Where, Vi and Vo are the input and output voltages

1 of converter, respectively.
Ac
0.5 For T1 time interval (Fig. 3(b)), the following
Ar
D  [0, 0.5) equations are obtained:
0 t
vL,T1  Vi  VC (5)
S1 & S4
1 Vo,T1  VC  Vi (6)
0 t
According to Eqs. (4) and (6), the value of output
T0 T1
S 2 & S3 voltage is equal in both time intervals of T0 and T1 .
1
0 t Considering the voltage balancing law, the average
D T (1  D) T voltage of an inductor is zero. So, from Eqs. (3) and
T (5), the voltages across the capacitors can be obtained as
(a) follows:
Ac , Ar
T1 1 D
VC  Vi  Vi  0 for D  [0, 0.5) (7)
1
Ar T1  T0 1  2D
D  (0.5, 1]
T1 1 D
0.5 VC  Vi  Vi  0 for D  (0.5, 1] (8)
Ac
T1  T0 1  2D
0 t
S1 & S 4 Where, D  T0 / T is duty cycle of S 2 and S 3
1 switches.
0 t
T0 T1 By placing the value of VC from Eqs. (7) and (8) into
S 2 & S3
1 Eqs. (4) and (6), the output voltage in both operating
0 t zones and for all times is given by:
DT (1  D) T
D
T Vo  Vi  0 for D  [0, 0.5) (9)
1  2D
(b)
D
Vo  Vi  0 for D  (0.5, 1] (10)
Fig. 2. The control signals, (a) in D  [0, 0.5) operating zone, (b) 1  2D
in D  (0.5, 1] operating zone.
From Eqs. (9) and (10), the buck-boost factor ( B ) of
converter can be defined as follows:
L1 iL1 L1 iL1 Vo D
B  for D  [0, 0.5) & D  (0.5, 1] (11)
 vL1   vL1  Vi 1  2D
S1 S2 S1 S2
C1 iC1 C1 iC1 In the first operating zone, B can be variable in
ii ii
 VC1  io  VC1  io ranges of 0  B  1 (buck operation) and 1  B ~ 
 
Vi 
 Vi 
 (boost operation). In the second operating zone, it can
Vo Vo
iC 2

iC 2
 be variable in range of ~   B  1 (only boost
  mode).
C2 VC 2 S 3 S4 C2 VC 2 S 3 S4
L2 i L2 L2 i L2
Fig. 4 shows the curves of voltage gain and stress
 
voltage on capacitors versus duty cycle. Fig. 4 contains
 vL2   vL2 
D  [0, 0.5) and D  (0.5, 1] operating zones. The
(a) (b)
value of output voltage is positive in the first operating
Fig. 3. The equivalent circuits, (a) in T0 time interval, (b) in T1
zone and is negative in the second operating zone. In
time interval.
D  [0, 0.5) operating zone, the proposed converter
vL,T 0  VC (3) acts as buck-boost (buck in 0  D  1 and boost in
3
Vo,T 0  VC  Vi (4)
Journal of Operation and Automation in Power Engineering, Vol. 4, No. 2, Dec. 2016 121

1
 D  0.5 ). In operating zone of D  (0.5, 1] , the iL1,T 0 
VC
t  I1, L1 for 0  t  T0 (20)
3 L1
converter is only in boost operation.
VC
10
10 iL 2, T 0  t  I1, L2 for 0  t  T0 (21)
88 L2
VC
6
Vi During T0 time interval, the current through the
4
22 inductors in the first operating zone is increased and in
Vo V
& C 00 the second operating zone is decreased.
Vi Vi
-22 From Eq. (5) and assuming the new time origin, the
Vo
-44 initial currents of L1 and L2 inductors at the beginning
Vi
-66
of T1 time interval are equal to I 2, L1 and I 2, L 2 ,
-88
10
-10 respectively, so, the currents through the inductors are
00 0.2
0.2 0.4 00.5
0.4 .5 0.6
0.6 0.8
0.8 1 given by:
D
Vi  VC
Fig. 4. Variations of the voltage gain and stress voltage on iL1,T1  t  I 2, L1 for 0  t  T1 (22)
capacitors in terms of duty cycle. L1
Vi  VC
In time interval of T0 (Fig. 3(a)), the following iL2,T1  t  I 2, L2 for 0  t  T1 (23)
equations are obtained:
L2

iC1,T 0  ii,T 0  io,T 0  iL1,T 0 (12) During T1 time interval, the current through the

iC 2,T 0  ii,T 0  iL2,T 0 (13) inductors in the first operating zone is decreased and in
the second operating zone is increased.
iC 2,T 0  iL2,T 0  io,T 0 (14) Considering Eqs. (20) to (23), in order to transfer
power from the input voltage source to output, in the
Where, iC and i L are the instantaneous currents
first operating zone the voltage across the capacitors
through the capacitors and inductors, respectively. Also, should be positive and their values are smaller than the
ii and io are the input and output currents of converter, input voltage source. Also, in the second operating zone
respectively. the voltage across the capacitors should be negative and
their values are greater than the input voltage source.
In time interval of T1 (Fig. 3(b)), the following
Assuming that there is no power losses in the
equations are obtained: converter, so, the following equation can be written:
iC1,T1  ii,T1  io,T1  iL1,T1 (15) Vi I i  Vo I o (24)
iC 2,T1  ii,T1  iL2,T1 (16)
By substituting the value of Vo from Eqs. (11) into
iC1,T1  iL2,T1 (17)
(24), the average current of input voltage source ( I i , av )
iC 2,T1  iL1,T1  io,T1 (18)
is equal to:
Assuming that the load is purely resistance ( RL ), in I i, av  BIo, av (25)
both operating zones and for all times, the output
current ( io ) and its’ average value ( I o, av ) is equal to: 3. CURRENT AND VOLTAGE RIPPLE
CALCULATION
Vo It should be noted that the currents through the inductors
io  I o, av  (19) of L1 and L2 at the end of T0 and T1 time intervals are
RL
different, but both inductors have the same current
From Eq. (3) and assuming that the initial currents of ripple. So, in both operating zones, and considering Eqs.
L1 and L2 inductors at the beginning of T0 time (7), (8) and (20) to (23), the current ripple of inductors
interval are equal to I1, L1 and I1, L2 , respectively, so, the can be achieved as follows:
currents through the inductors ( i L1 and iL 2 ) in T0 time
interval are given by:
E. Babaei, T. Ahmadzadeh: A New Structure of Buck-Boost Z-Source Converter Based on Z-H Converter 122

Ac , Ar Ac , Ar

1 1
Ar
Ac D  (0.5, 1]
0.5 0.5
Ac
Ar D  [0, 0.5)
0 t 0 t
T0 T1 T0 T1
ii ii
DT (1  D)T DT (1  D)T
2 I 2, L 2 2 I 2, L 2
ii ,T 1 ii ,T 1
I1 I1
I i, av ii,T 0
ii,T 0
0 t I i, av
I 2 I 2
0 t
VC1  VC 2  VC VC1  VC 2  VC

1 D 0 t
Vi VC 1 D
1  2D Vi VC
0 t 1  2D

iC1  iC 2  iC iC1  iC 2  iC
iC ,T 1 iC ,T 1
I 2, L 2 I 2, L 2
I1 I1
0 I C , av t iC ,T 0 I C
I C 0 I C , av t
 I1, L1  I1, L1
iC ,T 0
I2 I2

vL1  vL2  vL v L,T 0 vL1  vL2  vL

v L ,T 1
VC Vi  VC
v L ,T 1 v L,T 0
0 t 0 t
Vi  VC VC

iL1 iL1
I 2, L1 i L1, T 0 i L1, T 1
i L1, T 0 i L1, T 1
I 2, L1
I L1, av
I 1, L1 I L
I L1, av
I 1, L1 I L
0 t 0 t
i L2 i L2
i L 2, T 0 i L 2 , T 1
I 2, L 2
i L 2, T 0 i L 2, T 1
I 2, L 2 I L 2, av
I1, L 2 I L
I L 2, av
I1, L 2 I L
0 t 0 t

Vo Vo

0 t
BVi Vo
BVi Vo
0 t
io io
Vo
I o, av 0 t
RL
Vo
0 t I o, av
RL
T T
(a) (b)

Fig. 5. Waveforms of the proposed converter, (a) operating zone of D  [0, 0.5) , (b) operating zone of D  (0.5, 1] .
Journal of Operation and Automation in Power Engineering, Vol. 4, No. 2, Dec. 2016 123

Considering Eqs. (12) to (14), the capacitors current

I L1  I L 2  I L  I 2, L1  I1, L1  I 2, L 2  I1, L 2 at the end of T0 time interval ( I 2 ) is equal to:
VC D(1  D) Vi (26)
 DT  I 2, C1  I 2, C 2  I 2  I 2, L1 (36)
L 1  2D Lf

Where, f  1/ T is the switching frequency of Considering Eqs. (15) to (18), the capacitors current
converter. at the end of T1 time interval ( I1 ) is given by:
In steady state and according to the current balancing
I1, C1  I1, C 2  I1  I1, L2 (37)
law, the average current of C1 capacitor is zero. So,
from Eqs. (12) and (15) and considering Eqs. (11), (19) From Eqs. (36) and (37), the current ripple of
and (25), the average current of L1 inductor ( I L1, av ) in capacitors ( I C ) in both operating zones can be
both operating zones is given by: obtained as follows:

D(1  D) I C1  I C 2  I C  I 2  I1   I 2, L1  I1, L 2 (38)

I L1, av  (1  B) I o, av  Vi (27)
RL (1  2D) 2
Considering Eq. (36), the voltage ripple across the
Considering the current balancing law for C2
capacitors ( VC ) in both operating zones can be
capacitor, Eqs. (11), (13), (16), (19) and (25), the
achieved as follows:
average current of L2 inductor ( I L 2, av ) in both
operating zones is equal to: D( I L1, av )
VC1  VC 2  VC   (39)
Cf
2
D
I L 2, av  BIo, av  Vi (28)
RL (1  2D) 2 By substituting Eq. (13) into Eq. (14), the current
through the input voltage source at the end of T0 time
The average current of inductors can also be
interval ( I 2 ) is given by:
calculated from the following equation:

I1, L1  I 2, L1 ii,T 0  I 2  io (40)

I L1, av  (29) t T 0DT
2
From Eqs. (16) and (37), the current through the input
I1, L 2  I 2, L 2
I L 2, av  (30) voltage source at the end of T1 time interval ( I 1 ) is
2
equal to:
Also, the current ripple of inductors can be obtained
as follows: ii , T 1  I1 2I1, L 2 (41)
t T 1(1 D )T

Considering Eqs. (1) to (41), the voltage and current

waveforms of the proposed converter in both operating
I L  I 2, L1  I1, L1  I 2, L2  I1, L2 (31) zones of D  [0, 0.5) and D  (0.5, 1] are shown in

From Eqs. (29) to (31), in both operating zones, the Fig. 5. It is noticeable that the proposed converter has
step-down and step-up capability for dc/dc and ac/ac
currents through the inductors at the end of T0 and T1
conversions, whereas for dc/ac conversion has only
time intervals are given by:
step-up capability. In Table 1, the final equations for
2I L1, av  I L different conversions have been summarized. In Table 1,
I 2, L1  (32) D1 and D2 are the duty cycle for D1  [0, 0.5) and
2
2I L1, av  I L D2  (0.5, 1] operating zones, respectively, and B1 and
I1, L1  (33)
2 B2 are the boost factors for first and second operating
2I  I L zones. Also, Vm and f i are the amplitude and frequency
I 2, L 2  L 2, av (34)
2 of input voltage source, respectively.
2I  I L
I1, L 2  L 2, av (35)
2
E. Babaei, T. Ahmadzadeh: A New Structure of Buck-Boost Z-Source Converter Based on Z-H Converter 124

Table 1. The final equations for different conversions of the proposed converter.

Power The voltage across the The voltage across the inductors
Output voltage Capability
conversion capacitors v L,T 0 vL,T 1

1 D 1 D D step-down and
dc/dc BVi Vi Vi  Vi
1  2D 1  2D 1 2D step-up
1 1  D1 1  D1 D1
Vi  B1Vi  0 Vi Vi  Vi
1  2D1 1  2D1 1  2D1 1 2D1 Only
dc/ac
1 1  D2 1  D2 D2 step-up
Vi  B2Vi  0 Vi Vi  Vi
1  2D2 1  2D2 1  2D2 1 2D2
1 D 1 D step-down and
ac/ac B(Vm sin 2 fi t ) [Vm sin 2 fi t ] [Vm sin 2 fi t ] BVm sin 2 fi t
1  2D 1  2D step-up

It is noticeable that the proposed converter has step-

RL (1  2D)
down and step-up capability for dc/dc and ac/ac L1  (46)
f xL1 %
conversions, whereas for dc/ac conversion has only
step-up capability. In Table 1, the final equations for RL (1  D)(1  2D)
L2  (47)
different conversions have been summarized. Df xL 2 %

4. DESIGN THE VALUES OF L AND C

Ripples of capacitor voltage and inductor current effect 5. CALCULATION OF POWER LOSSES AND
EFFICIENCY
on stability of inverters. To properly design the values of
Assuming that each power electronic switch has a
C1 and C2 capacitors, the allowable voltage ripple
resistor RT (indicating the forward resistance) and a
xC % may be used, which is defined as follows [27]:
voltage source VT (indicating the forward voltage drop)
VC which are series with switch, so, to calculate the power
xC1 %  xC 2 %  xC %  (42)
VC losses of one switch the following equation can be used:
Considering (27) and by substituting the values of VC PS  PC, S  PSW, S (48)
and VC from (7) and (39) into (42), the rated value of
Where, PC , S and PSW, S are the conduction and
C1 and C2 capacitances is calculated as follows:
switching power losses of S switch, respectively.
D(1  2D)(I L1, av ) The conduction power losses of a switch can be
C1  C2  C 
f (1  D)(Vi ) xC % obtained as follows [28]:
(43)
D2 PC, S  PR, S  PVT  (RS I S2, rms)  (VT I S , av ) (49)

f RL (1  2D) xC %
Where, PR, S and PVT are the ohmic loss of S switch
To properly design the values of L1 and L2 inductors, and the power loss associated with the forward voltage
the allowable current ripples xL1 % and xL 2 % are drop ( VT ), respectively. Also, I S , rms and I S , av are the

I L1 RMS and average currents through the S switch,

carried out, which is defined as follows: xL1 %  respectively.
I L1, av
The switching power loss of a switch is equal to the
(44) sum of all turn on power loss ( Pon ,S ) and turn off power
I L 2
xL 2 %  (45) loss (Poff ,S ) in a cycle of the output voltage. This can be
I L 2, av
written as follows:
By substituting the values of I L1 and I L1, av from
PSW , S  Pon , S  Poff , S  (Eon , S  Eoff , S ) f (50)
Eqs. (26) and (27) into Eq. (44), and by placing the the
values of I L 2 and I L2av from Eqs. (26) and (28) into Where, Eon, S and Eoff , S are the energy losses during
Eq. (45), the rated values of L1 and L2 inductances are the turn-on and turn-off time intervals of S switch,
calculated as follows: respectively.
To calculate the turn-on and turn-off energy losses of
Journal of Operation and Automation in Power Engineering, Vol. 4, No. 2, Dec. 2016 125

a switch, we have: PSW , S  (E on , S  E off , S ) f

ton, S (V C v L )I L 1, av f (60)
Eon, S   vS (t ) iS (t )dt (51)  (t on , S 2  t off , S 2 )
0 6
toff , S
By substituting the values of PC , S and PSW, S from
Eoff , S   vS (t ) iS (t )dt (52)
0 Eqs. (57) and (60) into Eq. (48), the power loss of S 2
Where, vS (t ) and iS (t ) are the instantaneous voltage switch is equal to:
and current of S switch, respectively. PS 2  PC , S 2  PSW , S 2
Considering Figs. 1 and 3, the currents through the  DI L1, av ( RS 2 I L1, av  VT ) (61)
S 2 switch in time intervals of T0 and T1 can be (VC  vL ) I L1, av f
calculated as follows:  (ton, S 2  toff , S 2 )
6
iS 2  I L1, av for 0  t  T0 (53) According to Figs. 1 and 3, the currents through S1 ,
iS 2  0 for 0  t  T1 (54) S 3 and S 4 switches in time intervals of T0 and T1 can
From Eqs. (53) and (54), the RMS current through be calculated as follows:
the S 2 switch is equal to: 0 for 0  t  T0
iS 1   (62)
I L1, av for 0  t  T1
I S 2, rms  I L1, av D (55)
I L 2, av for 0  t  T0
Considering Eqs. (53) and (54), the average current iS 3   (63)
0 for 0  t  T1
through the S 2 switch is given by:
0 for 0  t  T0
1 T T iS 4   (64)
I S 2, av  0 iS 2 dt  I L1, av 0  DI L1, av (56) I L 2, av for 0  t  T1
T T
Considering Eqs. (48) to (64), the power losses of
By substituting the values of I S 2, rms and I S 2, av from
S1 , S 3 and S 4 switches can be similarly calculated as
Eqs. (55) and (56) into Eq. (49), we have:
follows:
PC , S  ( RS I S2, rms)  (VT I S , av ) PS1  PC , S1  PSW , S1
(57)
 DI L1, av ( RS 2 I L1, av  VT )  (1  D) I L1, av ( RS1 I L1, av VT )
(65)
(VC  vL ) I L1, av f
It is noticeable that to calculate the turn-on and turn-  (t on, S1  t off , S1 )
6
off energy losses of a switch, the linear approximation
of the voltage and current during switching period can PS 3  PC , S 3  PSW, S 3
be used [29], so, the energy losses during the turn-on  DI L 2, av ( RS 3 I L 2, av  VT ) (66)
time interval of S 2 switch is equal to: (VC  vL ) I L 2, av f
 (ton, S 3  toff , S 3 )
ton, S 2 6
ton, S 2
Eon, S 2   vS 2 (t ) iS 2 (t )dt  I L1, av (VC  vL ) (58) PS 4  PC , S 4  PSW, S 4
0 6
 (1  D) I L 2, av ( RS 4 I L 2, av  VT ) (67)
The energy loss during the turn-off time interval of
(VC  vL ) I L 2, av f
S 2 switch is given by:  (ton, S 4  toff , S 4 )
6
toff , S 2
toff , S 2
Eoff , S 2   vS 2 (t ) iS 2 (t )dt  I L1, av (VC  vL ) (59) Assuming that each capacitor has an equivalent series
0 6 resistor ( rC ), so, to calculate the ohmic loss of one
By placing the values of Eon, S 2 and Eoff,S 2 from Eqs. capacitor the following equation can be used:
(58) and (59) into Eq. (50), we have: PrC  rC I C2 ,rms (68)

Where, I C, rms is the RMS current through the

capacitor.
E. Babaei, T. Ahmadzadeh: A New Structure of Buck-Boost Z-Source Converter Based on Z-H Converter 126

From Eqs. (12) and (17), the RMS current of C1 Po

 (77)
capacitor can be obtained as follows: Po  PLoss
1 T 2
I C1, rms   iC1 dt 6. CONSIDERING EQUIVALENT SERIES
T 0
(69) RESISTANCE (ESR)
D( I i , av  I o, av  I L1, av ) 2 In order to study the converter with presence of ESR

 (1  D)(I L 2, av ) 2 capacitor, a resistor in series with the capacitor ( RC )
should be considered.
By substituting the value of I C1, rms from Eq. (69) into
Table 2. Comparison of the values obtained in states with and
Eq. (68), the ohmic power loss of C1 capacitor is given without ESR capacitors.
by: Parameters Without ESR With ESR
v L ,T 0 VC VC  VRC
PrC1  rC1 I C21, rms
vL,T 1 Vi  VC Vi  (VC  VRC)
 rC1D( I i , av  I o, av  I L1, av ) 2 (70) 1 D 1 D
VC Vi Vi  VRC
 rC1 (1  D)(I L 2, av ) 2 1  2D 1  2D
D D
Vo Vi Vi
From Eqs. (13) and (16), the RMS current of C2 1 2D 1 2D
Vo Vo
capacitor can be calculated as follows: io
RL RL
1 T 2 VC VC  VRC
I C 2, rms   iC 2 dt iL1, T 0 t  I1, L1 t  I1, L1
T 0 iL,T 0
L1 L1

 ( I i , av  I L 2, av ) 2 D  (1  D)
VC VC  VRC
(71) iL 2, T 0 t  I1, L2 t  I1, L2
L2 L2
 I i , av  I L 2, av Vi  VC Vi  (VC  VRC)
iL1, T 1 t  I 2, L1 t  I2, L1
L1 L1
iL,T 1
By placing the value of I C 2, rms from Eq. (71) into Eq. Vi  VC Vi  (VC  VRC)
i L 2, T 1 t  I 2, L2 t  I 2, L2
(68), the ohmic power loss of C2 capacitor is equal to: L2 L2
I RC - IC   I2, L1  I1, L2
PrC2  rC 2 I C2 2, rms  rC 2 (I i, av  I L2, av )2 (72) VRC - RC IC

Assuming that each inductor has a equivalent series Assuming that RC1  RC 2  RC , Table 2 shows the
resistor ( rL ), so, to calculate the winding power loss of comparison between the values obtained in states with
one inductor the following equation can be used: and without presence of ESR capacitors. It is noticeable
that other relationships are exactly similar to each other
PrL  rL I L2,rms (73)
in with and without presence of ESR capacitors.
Where, I L, rms is the RMS current through the
7. COMPARISON
inductor. The proposed buck-boost converter has simple structure.
From Eq. (73), the winding power loss of L1 and L2 It has two LC networks consists of two inductors and
inductors can be calculated as follows: two capacitors. In conventional Z-source, in during the
time interval of non-ST state, the diode before the LC
PrL1  rL1 I L21, rms  rL1 I L21, av (74) network creates an unfavorable operation mode. In
PrL2  rL2 I L22, rms  rL1 I L22, av (75) addition, diode prevents the reverse current. Thus, using
of such converters is limited to such applications which
The total power losses of the proposed buck-boost are no need to energy return to input source [1, 25-26].
converter in dc/dc conversion can be expressed as: It should be mentioned that in the proposed converter,
the diode before the LC network has not been used.
PLoss  ( PS1  PS 2  PS 3  PS 4 )  ( PrC1  PrC2 )
(76) Without any need to buck and boost transformer or
 ( PrL1  PrL2 ) dc/dc converter, the proposed converter can produce
Considering Eq. (76), the efficiency of the proposed lower or higher voltage than the input voltage in its’
converter can be obtained using the following equation: output. Moreover, due to the existence of LC network,
the reliability of converter is increased. This converter
Journal of Operation and Automation in Power Engineering, Vol. 4, No. 2, Dec. 2016 127

has waveforms with low ripple, so, the additional filter (5), the voltages across the L1 and L2 inductors are
is not needed in circuit. positive for T0 time interval and those are negative for
In conventional Z-H converter, to increase and
T1 time interval. So, we have:
decrease the output voltage, two separate structures are
used (which can be as its’ disadvantage) [25, 26]. On 1 D 1  0.4
VC1  VC 2  VC  Vi   30  90V
the other hand, the conventional dc/dc buck-boost 1  2D 1  (2  0.4)
converter is only usable in dc/dc conversion. Whereas, vL1, T 0  vL2, T 0  vL, T 0  VC  90V
the proposed converter can be used to dc/dc, dc/ac and
vL1, T1  vL2, T1  vL, T1  Vi  VC  30  90  60V
ac/ac conversion without any change in its’ topology. In
addition, the gain factor of conventional dc/dc buck- From Eqs. (26) and (27), the current ripple of L1
boost converter is equal to D/(1-D). So, the converter inductor and its’ average value are equal to:
will have the maximum voltage gain when duty cycle is D (1  D ) V i 0.4(1  0.4) 30
I L 1    1.2  0.3  0.36A
close to one. Whereas, the gain factor of the proposed 1  2D Lf 1  (2  0.4) 100
converter is equal to D/(1-2D). Thus, the converter will I L1, av  (1  B)Io, av  (1  2) 1.5  4.5 A
have the maximum voltage gain when the duty cycle is
Also, from Eqs. (26) and (28), the current ripple of
close to 0.5. Moreover, in comparison with the
L2 inductor and its’ average value are given by:
conventional dc/dc buck-boost converter, the proposed
converter has two D  [0, 0.5) and D  (0.5, 1] D (1  D ) V i 0.4(1  0.4) 30
I L 2    0.36A
1  2D Lf 1  (2  0.4) 100
operating zones. Table 3 shows a comparison between
the two structures of conventional Z-H converter in I L2, av  BIo, av  2 1.5  3 A
step-down and step-up modes with the proposed Z-H From Eqs. (20) and (21), in the first operating zone
buck-boost converter. Table 4 shows a comparison and during T0 time interval, the currents through the
between conventional Z-source inverter, conventional inductors are increased and from Eqs. (22) and (23),
Z-H buck and boost converters, conventional buck-
those are decreased in during T1 time interval (Figs.
boost converter and the proposed Z-H buck-boost
5(a) and 6). Hence, from Eqs. (32) to (35), the currents
converter.
through the L1 and L2 inductors at the end of T0 and
8. EXPERIMENTAL RESULTS T1 time intervals can be calculated as follows:
The experimental results are used for checking the
2I L1, av  I L1
(2  4.5)  0.36
correct performance of the proposed Z-source converter. I 2, L1    4.68 A
2 2
The parameters used in experimental are given in Table
2I  I L1 (2  4.5)  0.36
5. The experimental results in D  [0, 0.5) operating I1, L1  L1, av   4.32 A
2 2
zone for B  2 and D  0.4 (boost mode) and for
2I  I L 2 (2  3)  0.36
B  0.5 and D  0.25 (buck mode) are shown in Figs. I 2, L 2  L 2, av   3.18 A
6 and 7, respectively. 2 2
2I  I L 2 (2  3)  0.36
8.1. Calculation of voltages and currents values I1, L 2  L 2, av   2.82 A
2 2
For B  2 and D  0.4 (boost mode), the following
According to Figs. 5(a) and 6, in the first operating
results can be obtained: According to Figs. 4, 5(a) and 6,
zone and both during T0 and T1 time intervals, the
in operating zone of D  [0, 0.5) , from Eq. (9) the
currents through the capacitors have falling modes.
value of output voltage is positive and the proposed
Hence, from Eqs. (36) and (37), the capacitors current at
converter acts as boost in 3-1 ≤ D ≤ 0.5. From Eqs. (11)
the end of T0 and T1 time intervals are equal to:
and (19), the output voltage and current of converter can
be obtained as follows: I2, C1  I2, C 2  I2  I2, L1  4.68 A
Vo  BVi  2  30  60V I1, C1  I1, C 2  I1  I1, L2  2.82 A
Vo 60 From Eq. (39), the voltage ripple across the
io  Io, av    1.5 A
RL 40 capacitors is given by:
D (I L 1,av ) 0.4  4.5
In first operating, considering Figs. 4, 5(a) and 6, V C 1  V C 2  V C    3.83V
Cf 470 103
from Eq. (7) the values of the average voltages of C1
and C2 capacitors are positive, and from Eqs. (3) and
E. Babaei, T. Ahmadzadeh: A New Structure of Buck-Boost Z-Source Converter Based on Z-H Converter 128

Table 3. Comparison between the two structures of conventional Z-H converter in step-down and step-up modes with the proposed Z-H
buck-boost converter.
The proposed Z-H buck-boost
dc/dc Power The conventional Z-H buck converter The conventional Z-H boost converter
converter
Conversion
T0 time interval T1 time interval T0 time interval T1 time interval T0 time interval T1 time interval
1 D 1 D 1 D 1 D
VC DVi DVi Vi Vi Vi Vi
1  2D 1  2D 1  2D 1  2D
1 D D 1 D D
vL (1  D)Vi  DVi Vi  Vi Vi  Vi
1  2D 1 2D 1  2D 1 2D
1 1 D D
Vo (1  2D)Vi (1  2D)Vi Vi Vi Vi Vi
1  2D 1  2D 1 2D 1 2D
Vi D(1  D) Vi D(1  D) Vi
I L D(1  D)  
Lf 1  2D Lf 1  2D Lf

Table 4. Comparison of characteristics for variety of the buck and boost converters.
Voltage gain
Converter ( Vo / Vi ) Advantages Disadvantages Description

 Needing one switch (or

The  Having two operating zones
diode) before the LC Diode creates an unpleasant
conventional M  Step-down and step-up
network operation mode in during the
Z-source 1 2D capability
 Diode prevents the reverse non-ST switching state.
converter  Employing in all of conversions
current.
 Having two operating zones
The  Elimination diode before the LC
conventional 1 network Needing four bidirectional
It has only step-up capability.
Z-H boost 1  2D  Employing in all of conversions switches in all of conversions
converter without any change in its’
topology
 Having two operating zones  Needing four unidirectional
The  Elimination diode before the LC switches in dc/dc, dc/ac and
conventional network ac/dc conversions It has only step-down
1 2D
Z-H buck  Employing in all of conversions  Needing four bidirectional capability.
converter without any change in its’ switches in ac/ac
topology conversions
Duty cycle is equal to D in
The  Needing one unidirectional the equation denominator of
D  Only can be used in dc/dc
conventional switch gain factor of converter. So,
conversion
buck-boost 1 D  Step-down and step-up the converter will have the
converter  Having one operating zones
capability maximum voltage gain when
duty cycle is close to one.
 Having two operating zones In the proposed converter, the
 Elimination diode before the LC value of duty cycle has been
The proposed network changed from D to 2D in
Z-H buck- D  Step-down and step-up Needing four bidirectional the equation denominator of
boost 1 2D capability switches gain factor of converter. So,
converter  Employing in dc/dc, dc/ac and the converter will have the
ac/ac conversions without any maximum voltage gain when
change in its’ topology duty cycle is close to half.

Table 5. The parameters of converter. I1 2I1, L2  2  2.82  5.64 A

Input Impedance-source Switching
Load
voltage network frequency From Eq. (25), the average current of input voltage
( RL )
( Vi ) C1  C2 L1  L2 ( f) source can be obtained as follows:
30V 47 F 10 mH 40  10 kHz
Ii, av  BIo, av  2 1.5  3 A
From Eqs. (40) and (41), in the first operating zone,
8.1. Design the values of inductors and capacitors
the current through input source has constant value in For D = 0.4, ΔIL1 = ΔIL2 =0.36 and ΔVc1 = ΔVc2 = 3.83,
during T0 time interval, and it is decreased in during T1 the values of inductors and capacitors can be calculated
time interval (Figs. 5(a) and 6), so, we have: as follows:

I 2  io  1.5 A

Journal of Operation and Automation in Power Engineering, Vol. 4, No. 2, Dec. 2016 129

From Eq. (43), the rated value of C1 and C2

VC1  VC 2 [V ]
capacitances is equal to:
D2 (0.4)2
C1  C 2    47 F
f R L (1  2D )x C % (80 103 )(0.042)
From Eqs. (44) and (45), the allowable current ripples
xL1 % and xL 2 % are given by:
I L1 0.36
xL1 %    0.08
I L1, av 4.5
iC1  iC 2 [ A] I L 2 0.36
xL 2 %    0.12
I L 2, av 3
From Eqs. (46) and (47), the rated values of L1 and
L2 inductances are equal to:
RL (1  2D) 40(1  0.8)
L1    10 mH
f xL1 % (10 103 )(0.08)
RL (1  D)(1  2D) 40(0.6)(0.2)
L2    10 mH
Df xL 2 % (4000)(0.12)
vL1  vL 2 [V ]
VC1  VC 2 [V ]

iC1  iC 2 [ A]
iL1 [ A]

Vo [V ] vL1  vL 2 [V ]

Fig. 6. Experimental results in D  [0, 0.5) operating zone for iL1 [ A]

B  2 and D  0.4 (boost mode).

From Eq. (42), the allowable voltage ripple xC % is

given by:

VC 3.83
xC1 %  xC 2 %  xC %    0.042
VC 90
E. Babaei, T. Ahmadzadeh: A New Structure of Buck-Boost Z-Source Converter Based on Z-H Converter 130

D (1  D ) V i 0.25(1  0.25) 30
Vo [V ] I L 2    0.11A
1  2D Lf 1  (2  0.25) 100

I L2, av  BIo, av  0.5  0.375  0.19 A

From Eqs. (20) and (21), in the first operating zone
and during T0 time interval, the currents through the
inductors are increased and from Eqs. (22) and (23),
those are decreased in during T1 time interval (Figs.
5(a) and 7). Hence, from Eqs. (32) to (35), the currents
Fig. 7. Experimental results in D  [0, 0.5) operating zone for
through the L1 and L2 inductors at the end of T0 and
B  0.5 and D  0.25 (buck mode).
T1 time intervals can be calculated as follows:
Considering theoretical values calculated for the
boost operation in D  [0, 0.5) operating zone, it is 2I L1, av  I L1
(2  0.56)  0.11
I 2, L1    0.61 A
observed that the given experimental results in Fig. 6 2 2
are similar to both theoretical results and Fig. 5(a). 2I  I L1 (2  0.56)  0.11
I1, L1  L1, av   0.5 A
For B = 0.5 and D = 0.25 (buck mode), the following 2 2
results can be obtained: 2I  I L 2 (2  0.19)  0.11
I 2, L 2  L 2, av   0.24 A
According to Figs. 4, 5(a) and 7, in operating zone of 2 2
D  [0, 0.5) , from (9) the value of output voltage is 2I  I L 2 (2  0.19)  0.11
I1, L 2  L 2, av   0.13 A
positive and the proposed converter acts as buck in 2 2
1 According to Figs. 5(a) and 7, in the first operating
0  D  . So, from Eqs. (11) and (19), the output
3 zone and both during T0 and T1 time intervals, the
voltage and current of converter can be obtained as currents through the capacitors have falling modes.
follows: Hence, from Eqs. (36) and (37), the capacitors current at
Vo  BVi  0.5  30  15V the end of T0 and T1 time intervals are equal to:

io  Io, av 
Vo 15
  0.375 A I2, C1  I2, C 2  I2  I2, L1  0.61 A
RL 40
I1, C1  I1, C 2  I1  I1, L2  0.13 A
In first operating, considering Figs. 4, 5(a) and 7,
From Eqs. (39), the voltage ripple across the
from Eq. (7) the values of the average voltages of C1
capacitors is given by:
and C2 capacitors are positive, and from Eqs. (3) and
D (I L 1,av ) 0.25  0.56
(5), the voltages across the L1 and L2 inductors are V C 1  V C 2  V C    0.3V
Cf 470 103
positive for T0 time interval and those are negative for
From Eqs. (40) and (41), in the first operating zone,
T1 time interval. So, we have: the current through input source has constant value in
during T0 time interval, and it is decreased in during T1
1 D 1  0.25
VC1  VC 2  VC  Vi   30  45V time interval (Figs. 5(a) and 7), so, we have:
1  2D 1  (2  0.25)
vL1, T 0  vL2, T 0  vL, T 0  VC  45V I 2  io  0.375 A
vL1, T1  vL2, T1  vL, T1  Vi  VC  30  45  15V I1 2I1, L2  2  0.13  0.26 A
From Eqs. (26) and (27), the current ripple of L1 From Eqs. (25), the average current of input voltage
inductor and its’ average value are equal to: source can be obtained as follows:

I L 1 
D (1  D ) V i

0.25(1  0.25) 30
 0.375  0.3  0.11A Ii, av  BIo, av  0.5  0.375  0.19 A
1  2D Lf 1  (2  0.25) 100
I L1, av  (1  B)Io, av  (1  0.5)  0.375  0.56 A Considering theoretical values calculated for the
buck operation in D  [0, 0.5) operating zone, it is
Also, from Eqs. (26) and (28), the current ripple of
L2 inductor and its’ average value are given by: observed that the given experimental results in Fig. 7
are similar to both theoretical results and Fig. 5(a).
Journal of Operation and Automation in Power Engineering, Vol. 4, No. 2, Dec. 2016 131

9. CONCLUSIONS [14] Y. Liu, B. Ge, F.J.T.E. Ferreira, A.T. de Almeida, and

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