A B C D E

MODEL NAME : GDI5A

PCB NO : DA600273000
1 BOM P/N : 431AII31L51 Dell/Compal LA-K033P 1

TGL+MEC1418 board Schematic Document

Compal LA-K033P
2020-09-15
REV : 1.0 (A00)
@ : Un-pop Component
2
N3@/V3@ : : Inspiron (fTPM)/Vostro(HWTPM)TLGL@/:TGL-U 2

BASE@/PREM@:Pentium,Celeron/i3,i5,i7
EC@ : EC Support
JP@/PJP@ : JUMP
100@/1000@:Lan
NOI2CTCH@/I2CTCH@:USB touch/I2C touch
EMI@/ESD@/RF@ : EMI, ESD and RF Component
@EMI@/@ESD@/@RF@ : EMI, ESD and RF Un-POP
3
Component CMC@ : XDP Component 3

CONN@ : Connector Component

KBBL@ : KB Backlight
750_CTPM@:750 and China TPM
ST_CTPM@:ST and China TPM
CTPM@:China TPM
FFS@:FreeFall Sensor
TYPEC@:TypeC
TYPE@EMI@/TYPEC@ESD@: EMI, ESD, TypeC ComponentP
4 4

CB@/PCB_R1@/PCB_R3_G@/PCB_R3_T@/PSB_R3_H@/PCB_R3_TM@:PC Dell Confidential Document.

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Or any other application without got DELL permmition

T itle
Block Diagram

Size D oc um ent N um ber R ev

C LA-K033P A00

Date: Wednesday, June 31, 2019 Sheet 1 of 101

A B C D E
 A B C D E

Block Diagram

DDR4

DDR4 2666MHz Channel A 4GB/8GB/16GB

SODIMM A

DDR4
1 1
DDR4 2666MHz Channel B 4GB/8GB/16GB

SODIMM B

USB2.0 x 1

Port 1 (USB3.0 Type-A)

Intel CPU
USB3.0 x 1 Gen1
eDP connector eDP 1.2
Ice Lake-U4+2

USB2.0 x 1

HDMI connector , 1.4 DDI x 4 Port 2 (USB3.0 Type-A)

USB3.0 x 1 Gen1

USB2.0 x 1 Port 3 (USB2.0 Type-A)

USB3.0 x 2 Gen1
15W
USB Type-C
Connector BGA 1526 balls
USB2.0 x 1 (PortB)

Reserve 50 x 25 mm

CC

TPS25810
2 2
Reserve

Card reader
USB2.0 x 1 SD 3.0 SD Card slot
RTS5144

RJ45 CC , USB2.0 CC , USB2.0 LAN 10/100 PCIe x 1 USB2.0 x 1

Transformer
Connector # LAN 10/100/1000
P35 BT with WLAN
PCIe x 1

M.2 SSD (NVMe) PCIe x 4

USB2.0 x 1 Camera

ODD SATA x 1

PCH-LP

2.5" SATA x 1
HDD/SSD
USB2.0 x 1 Finger print

# FFS SMBus
# dTPM
3 SPI 3
NPCT750

Reserve

SPI ROM
16 MB+8MB
2CH SPEAKER
(2CH 2W/4ohm)

HDA CODEC HDA RTC

RING2/SLEEVE
Realtek ALC3204-CG

HP_R/L

Universal Jack
Precision
I2C
Touchpad
Click Pad

eSPI PS/2

SMSC KBC 1416

MEC1416-NU
Battery RTC
4 4

Charger Daughter board

Thermal sensor
Keyboard PWM FAN
NCT7718W Dell Confidential Document.
Anyone CANNOT duplicate, modify, forward
Or any other application without got DELL permmition

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Block Diagram

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C LA-K033P A00

Date: Wednesday, June 31, 2019 Sheet 2 of 101

A B C D E
 5 4 3 2 1

FUSE 1.5A_24V
(F1) +DCBAT_LCD

0ohm 0603 +TS_VDD

D
(R81)
+TS_VDD_IN D
(F5)

0ohm 0805
(RA1)
+5V_PVDD

PJPW01
RT6226AGQUF DGPU_PWROK PJPW02
0ohm 1206
(PUW01) +1.35VGPUP +1.35V_VRAM +5V_HDD
USB_EN# (RS32)
SY6288D20AAC
+USB3_VCC
(UU1)
JP7 +5V_ODD
PJP501 PJP502

SY8180CRAC EN_5V PJP503

SY6288D20AAC USB_EN#

(PU501) +5VALWP +5VALW (UU2) +USB2_VCC FUSE 1.5A_6V

+5V_HDMI
(FI1)
Adapter/Battery/19V
CPU PWR EM5209VF SIO_SLP_S3#
FUSE 0.5A_13.2V
PJP301
(UZ3)
+5VS +5V_KB_BL
GPU PWR SY8286BRAC BAS40C (F3)
(PU301) +3VLP (D1) +RTC_CELL
Peripheral Device PWR
SY6861A1AAC OVP_TRIP_P1

+CCG_VBUS
(UT3)
EN_3V

+RTC_VCC
ADAPTER
+3VALWP

+PWR_SRC AUX_ON
+19V_VIN (+19VB) SY6288C20AAC
(UL2) +LAN_VDD33
PJP302
C VCCST_EN_R VCCST_R C
LCD_VCC_TEST_EN
AOZ1334DI
or +VCCST_CPU
SIO_SLP_S3# EDP_VDD_EN (UZ12)
EM5209VF SY6288C20AAC
CHARGER CHARGER +3VALW +3VS +LCDVDD
(UZ2) (U1)
ISL95538HRZ-TI ISL95522HRZ-T
(PUB01)UMA
(PUB01)DSC PCH_PWR_EN
TPS22967DSGR +3VALW_DSW
(UZ4) +3VALW_PCH
AOZ1334DI VCCSTG_R
+17.4V_BATT+
PCH +VCC1.05_OUT_FET (UZ8) +VCCSTG_CPU
1/0VS_DGUP_EN
RT9059GSP
+1.0VGPUP
(PU1001)
BATTERY
DGPU_MAIN_EN
+1.8VS_DGPU_MAIN
PJP1801
RT8061AZQW
PCH_PRIM_EN PJP1802
EM5209VF
+1.8VALWP +1.8V_PRIM (UZ6)
(PU1801) DGPU_PWR_EN

+1.8VS_DGPU_AON

PJP2501 SIO_SLP_S4# PJP2502

RT9059GSP
+2.5VP +2.5V_MEM
(PU2501)

JPC2
+2.5V_PG

+1.2V_VCCPLL_OC_P +VCCPLL_OC
PJPM01
RT8207PGQW +2.5V_PG
PJPM02
EM5201V
(PUM01) +1.2VP +1.2V_DDR (UZ13)@

B 0.6V_DDR_VTT_ON PJPM03 B

+0.6VSP +0.6V_DDR_VTT

RT3612EBGQW MVP_VR_ON_EN

(PUZ1) +VCCIN

1.8V_PWM_PG
RT6543GQW
(PUG1 +VCCIN_AUX

RT8816BGQW VGA_CORE_EN

(PUV01) +VGA_CORE

A A

Security Classification Compal Secret Data Compal Electronics,Inc.

Issued Date 2015/10/22 DecipheredDate 2013/10/28 Tiiitttlle

PowerMAP
THIIIS S HE E T OF ENGIIINEERIIING DRAW IIING IIIS THE PROPRIIIETARY P ROP E RTY OF COM P A L ELECTRONIIICS,,, IIINC...A ND CONTAIIINS CONFIDE NTIA L Siiize Documenttt Number
A ND TRA DE S E CRE T IIINFORMATION... THIIIS S HE ET M A Y NO T B E TRA NS FE RED FROM THE CUS TODY OF THE COM P E TE NT DIIIVIIISIIION OF R& D Rev
DE P A RTM E NT E X CE PT AS AUTHORIIIZED B Y COM P A L ELECTRONIIICS,,, IIINC... NEIIITHER THIIIS S HE ET NOR THE IIINFORMATION IIIT CONTAIIINS M A Y
BE US E D BY OR DIIISCLOSED TO A NY THIIIRD P A RTY WIIITHOUT PRIIIOR W RIIITTEN CONS E NT OF COM P A L ELECTRONIIICS,,, IIINC... LA-K033P 0.1

Dattte::: Monday,,, Jullly29,,, 2019 Sheettt 3 of 101

5 4 3 2 1
 5 4 3 2 1

Main Function:SMB/I2C Block Diagrams

1kohm 2.2k ohm

+3VALW_PCH +3VS
ICL-U 1kohm 2.2k ohm
DK27 MEM_SMBCLK 253
SMBCLK PCH_SMBCLK PCH_SMBCLK SCL

D
DP24 MEM_SMBDATA DMN66D 254 DIMMA D
SMBDATA PCH_SMBDAT PCH_SMBDATA SDA DDR4
SMBus Address: 000
1kohm 253
PCH_SMBCLK SCL
254 DIMMB
1kohm
+3VALW_PCH PCH_SMBDATA SDA DDR4
DK24 SML0_SMBCLK 0 ohm
SMBus Address: 010
SML0CLK GPU_THM_SMBCLK
1
DJ24 SML0_SMBDATA 0ohm PCH_SMBCLK SCL
SML0DATA GPU_THM_SMBDAT FFS
4
PCH_SMBDATA SDA LNG2DM
1kohm SMBus Address: 0101001b

1kohm
+3VALW_PCH 2.2kohm
SML1CLK
DN22 SML1_SMBCLK
+3VS
SML1DATA 2.2kohm
DL22 SML1_SMBDATA 8
THM_SML1_CLK SCL Thermal
DMN66D 7
NCT7718W
THM_SML1_DATA SDA
SMBus Address: 1001100xb (x is R/W bit)
DT23 DT24
I2C_0_SDA
C C

I2C_0_SCL

2.2k ohm @

+3VALW_EC 2.2k ohm @

12 11

SMB02_CLK SMB02_DATA 4.7kohm 2.2kohm

4.7kohm
+3VS 2.2kohm
+TP_VDD

6
KBC I2C_0_SCL I2C_0_SCL_R
DMN66D 7
MEC 1418 I2C_0_SDA I2C_0_SDA_R
1 TPCONN
B 4.7kohm CLK_TP_SIO B

2
+TP_VDD DAT_TP_SIO
4.7kohm
@
78 0 ohm
PS2_CLK0 CLK_TP_SIO
@
79 0 ohm
PS2_DAT0 DAT_TP_SIO 2.2k ohm @

97 0ohm
+3VALW_EC
SMB04_CLK CLK_TP_SIO_I2C_CLK 2.2k ohm @
96 0ohm
SMB04_DATA DAT_TP_SIO_I2C_DAT

4.7kohm

4.7kohm
+3VALW_EC

9 100ohm 7
PBAT_CHG_SMBCLK CLK_SMB SCL
SMB01_CLK
8 100ohm 6 BATT CONN
SMB01_DATA PBAT_CHG_SMBDAT DAT_SMB SDA

A 0ohm 21 A
SDA

0ohm 22 Charger
SCL ISL95522
SMBus Address: 1001100 (R/W#)

Securiiity Clllassiiifiiicatiiion CompalSecret Data

Tiiitttlle
Compal Electronics,Inc.
Issued Date 2018/04/01 Deciphered Date 2019/04/01

THIIIS S HE E T OF ENGIIINEERIIING DRAW IIING IIIS THE PROPRIIIETARY P ROP E RTY OF COM P A L ELECTRONIIICS,,, IIINC...A ND CONTAIIINS CONFIDENTIASLi ize Documenttt Number
SMB/I2CBlockDiagrams
A ND TRA DE S E CRET IIINFORMATION... THIIIS S HE E T M A Y NOT BE TRA NS FE RED FROM THE CUS TODY OF THE COM P E TE NT DIIIVIIISIIION OF R& D Rev
DE P A RTM E NT E X CE PT AS AUTHORIIIZED B Y COM P A L ELECTRONIIICS,,, IIINC... NEIIITHER THIIIS S HE ET NOR THE IIINFORMATION IIIT CONTAIIINS
M A Y BE US E D BY OR DIIISCLOSED TO A NY THIIIRD P A RTY WIIITHOUT PRIIIOR W RIIITTEN CONS E NT OF COM P A L ELECTRONIIICS,,, IIINC... LA-K033P 0..2

Dattte::: Monday,,, Jullly29,,, 2019 Sheettt 61 offf 101

5 4 3 2 1
 5 4 3 2 1

POWERSTATES
USB 2.0 DESTINATION
Signal SLP SLP SLP ALW AYS SUS RUN
CLOCKS
State S3# S4# S5# PLANE PLANE PLANE 1 USB2.0 port1 Board ID & Model ID Table
2 USB2.0 Port2
S0 (Full ON) / M0 HIGH HIGH HIGH ON ON ON ON
3 USB2.0 port3,IO/B
S3 (Suspend to RAM) / M3 LOW HIGH HIGH ON ON OFF OFF
4 Touch screen
D
S4 (Suspend to DISK) / M3 LOW LOW HIGH ON OFF OFF OFF 5 Finger printer D

6 CCD
S5 (SOFT OFF) / M3 LOW LOW LOW ON OFF OFF OFF
7 Card reader , IO/B
G3 OFF OFF OFF OFF OFF OFF OFF
8 Typec-C

DS3 --- --- --- --- --- --- --- 9 Reserved

10 BT

Voltage Rails
Power Plane Description S0 S3 S4/S5 G3
+19V_ADPIN Adapter power supply N/A N/A N/A N/A
+17.4V_BATT++ Battery power supply N/A N/A N/A N/A
+19VB AC or battery power rail forSystem N/A N/A N/A N/A
+RTC_SOC RTC power ON ON ON ON
+3VALW_DSW +3VALW power for PCH DSW rails ON ON ON* OFF
+5VALW System +5V always on power rail ON ON ON* OFF
+3VALW System +3V always on power rail ON ON ON* OFF
+1.8V_PRIM System +1.8V always on power rail ON ON ON* OFF
C C
+1.0V_PRIM System +1.0V always on power rail ON ON ON* OFF
+1.2V_DDR DDR4 +1.2V power rail ON ON OFF OFF
+2.5V_MEM DDR4 +2.5V power rail ON ON OFF OFF
+0.6V_DDR_VTT DDR +0.6VS power rail for DDR terminator ON OFF OFF OFF
USB3.0 PCIE SATA DESTINATION
+VCCIN_AUX CPU and PCH merged auxiliary power rail ON ON ON OFF
+VCCST +1.05 VCCST power rail ON ON ON OFF USB3.0-1 PCIE-1 USB3.0 (MB)(Type-A)
+VCCSTG +1.05 VCCSTG power rail ON OFF OFF OFF
USB3.0-2 PCIE-2 USB3.0 (MB)(Type-A)
VCCPLL +1.05 VCCPLL power rail ON ON ON OFF
+VCC_IN Core voltage for CPU ON OFF OFF OFF USB3.0-3 PCIE-3 USB3.0 (Type-C)
+3VLP +19VB to +3VLP power rail for suspend power ON ON ON OFF
USB3.0-4 PCIE-4 USB3.0 (Type-C)
+3VALW_DSW +19VB to DSW power rail for suspend power ON ON ON OFF
+3VALW_PCH +3VALW power for PCH suspend rails ON ON ON* OFF USB3.0-5 PCIE-5 GPU
+5VS System +5VS power rail ON OFF OFF OFF
USB3.0-6 PCIE-6 GPU
+3VS System +3VS power rail ON OFF OFF OFF
+1.35V_MEM_GFX +1.35V power rail for GPU ON OFF OFF OFF PCIE-7 GPU
+3VGS +3V power rail for GPU ON OFF OFF OFF PCIE-8 GPU
+1.8VGS +1.8V power rail for GPU ON OFF OFF OFF
+0.95VSDGPU +0.95V power rail for GPU ON OFF OFF OFF PCIE-9 LOM
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF
B
PCIE-10 WLAN B

PCIE-11 SATA-0 SATA HDD

PCIE-12 SATA-1A SATA ODD

PCIE-13 NVME SSD

PCIE-14 NVME SSD

PCIE-15 SATA-1B NVME SSD

PCIE-16 SATA-2 NVME SSD

Note : VCCIN_AUX only down to 0V while SLP_S0# is asserted. On S3 mode, it only can down to 1.1V.

A A

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINSCONFIDENTIAL

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT BE
TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, NEITHER
SecurrriitttyClassiifffiicatttiion
2018///04///01
CompalllSecretttDatatt
2019///04///01 Titti e
ll
Compal Electronics,Inc.
THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY IsI sued Dattte Deciiiphererr d Dattte
WITHOUT DELL'SEXPRESS WRITTENCONSENT.
THIIIS SHEET OF ENGIIINEERIIING DRAWIIING IIISTHE PROPRIIIETARY PROPE RTY OF C OMP A L ELECTRONIIICS,,, IIINC...AND CONTAIIINS CONFIIIDENT III A L
NotesList
S ii ze DocumentttNumberrr
A ND TRADE S E C RE T IIINFORMATIIION... THIIIS SHEET MA Y NOT BE TRANSF E RED F ROM THE CUSTOD Y OF THE C OMP E TE NT DIIIVIIISIIIONOF R& D Rev
DEPARTME N T EXCEPT AS AUTHORIIIZED BY C OMP A L ELECTRONIIICS,,, IIINC...NEIIITHER THIIIS SHEET NOR THE IIINFORMATIIION IIITCONTAIIINS MA Y BE US E D
BY OR DIIISCLOSED TO A NY THIIIRD PARTY WIIITHOUT PRIIIOR WRIIITTEN C ONS E NT OF C OMP A L ELECTRONIIICS,,, IIINC... LA-K033P 0..3
Dattte:::Wednesday,,, Jully31,,,2019 Sheettt 3 offf101
5 4 3 2 1
 A B C D E

1 1

2 2

3 3

4 4

Dell Confidential Document.

Anyone CANNOT duplicate, modify, forward
Or any other application without got DELL permmition

T itle
Block Diagram

Size D oc um ent N um ber R ev

C LA-K033P A00

Date: Wednesday, June 31, 2019 Sheet 6 of 101

A B C D E
 5 4 3 2 1

Main Function: CPU(1/13)

UC1A

Y5 BB5
[38] EDP_TXN0 Y3 DDIA_TXN_0 TCP0_TX_N0 BB6
[38] EDP_TXP0 Y1 DDIA_TXP_0 TCP0_TX_P0 AV6
[38] EDP_TXN1 Y2 DDIA_TXN_1 TCP0_TX_N1 AV5
[38] EDP_TXP1 V2 DDIA_TXP_1 TCP0_TX_P1 BH2
V1 DDIA_TXN_2 TCP0_TXRX_N0 BH1

D
eDP V3
V5
DDIA_TXP_2
DDIA_TXN_3
TCP0_TXRX_P0 BF1
TCP0_TXRX_N1 BF2 D
DDIA_TXP_3 TCP0_TXRX_P1
W4 AY5
[38] EDP_AUXN W 3 DDIA_AUX_N TCP0_AUX_N AY6
[38] EDP_AUXP DDIA_AUX_P TCP0_AUX_P
AE3 DDI
[40] CPU_DP1_N0 AE5 DDIB_T XN_0 AR5
[40] CPU_DP1_P0 AE2 DDIB_TXP_0 TCP1_TX_N0 AR6
+3VS [40] CPU_DP1_N1 AE1 DDIB_TXN_1 TCP1_TX_P0 AL5
[40] CPU_DP1_P1 AC5 DDIB_TXP_1 TCP1_TX_N1 AL3
[40] CPU_DP1_N2 AC3 DDIB_TXN_2 TCP1_TX_P1 BD2
1 2 CPU_DP1_CTRL_CLK
RC4031 2.2K_0402_5% HDMI [40]
[40]
CPU_DP1_P2
CPU_DP1_N3
AC1 DDIB_TXP_2
AC2 DDIB_TXN_3
TCP1_TXRX_N0
TCP1_TXRX_P0
BD1
BB1
1 2 CPU_DP1_CTRL_DATA 0128 modify [40] CPU_DP1_P3 DDIB_T XP_3 TCP1_TXRX_N1 BB2
RC4032 2.2K_0402_5% no VGA AD3
TCP1_TXRX_P1
AD4 DDIB_AUX_N AN3
I2CTCH@ DDIB_AUX_P TCP1_AUX_N AN5
TOUCH_SCREEN_RST_LCD 1 2 TOUCH_SCREEN_RST DP15 TCP1_AUX_P
[38] TOUCH_SCREEN_RST_LCD RC293 0_0201_5% DJ17 GPP_E22/DDPA_CTRLCLK/PCIE_LNK_DOWN TBT/USB/DP
GPP_E23/DDPA_CTRLDATA/BK4/SBK4 BF6
+3VALW _PCH 0128 modify DL40 TCP2_TX_N0 BF5
[40] CPU_DP1_CTRL_CLK DP42 GPP_H16/DDPB_CTRLCLK TCP2_TX_P0 BJ5
[40] CPU_DP1_CTRL_DATA GPP_H17/DDPB_CTRLDATA TCP2_TX_N1 BJ6
USB_OC1# DL17 TCP2_TX_P1 BL1
10K_0201_5% 2 1 RC1
DK17 GPP_E18/DDP1_CTRLCLK/TBT_LSX0_TXD TCP2_TXRX_N0 BL2
GPP_E19/DDP1_CTRLDATA/TBT_LSX0_RXD TCP2_TXRX_P0 BM2
10K_0201_5% 2 1 RC2 USB_OC2# DN17 TCP2_TXRX_N1 BM1
DP17 GPP_E20/DDP2_CTRLCLK/TBT_LSX1_TXD TCP2_TXRX_P1
GPP_E21/DDP2_CTRLDATA/TBT_LSX1_RXD BG6
100K_0201_5% 2 1 RC3 EDP_HPD DK34 TCP2_AUX_N BG5
DL34 GPP_D9/ISH_SPI_CS_N/DDP3_CTRLCLK/GSPI2_CS0_N/TBT_LSX2_TXD TCP2_AUX_P
GPP_D10/ISH_SPI_CLK/DDP3_CTRLDATA/GSPI2_CLK/TBT_LSX2_RXD
DN33 BP6
DL33 GPP_D11/ISH_SPI_MISO/DDP4_CTRLCLK/GSPI2_MISO/TBT_LSX3_TXD TCP3_TX_N0 BP5
100K_0201_5% 2 @ 1 RC5 USB_OC1# GPP_D12/ISH_SPI_MOSI/DDP4_CTRLDATA/GSPI2_MOSI/TBT_LSX3_RXD TCP3_TX_P0 BV5
C EDP_HPD DW 11 TCP3_TX_N1 BV6 C
BKLT_IN_CPU [38] EDP_HPD CPU_DP1_HPD CV42 GPP_E14/DPPE_HPDA/DISP_MISCA TCP3_TX_P1 BR1
100K_0201_5% 2 1 RC6 [40] CPU_DP1_HPD CV39 GPP_A18/DDSP_HPDB/DISP_MISCB TCP3_TXRX_N0 BR2
CY43 GPP_A19/DDSP_HPD1/DISP_MISC1 TCP3_TXRX_P0 BT2
Pull Low with eDP Side CR41 GPP_A20/DDSP_HPD2/DISP_MISC2 TCP3_TXRX_N1 BT1
0128 modify [73] USB_OC1#
USB_OC1#
USB_OC2# CT41 GPP_A14/USB_OC1_N/DDSP_HPD3/DISP_MISC3 TCP3_TXRX_P1
[42] USB_OC2# DV14 GPP_A15/USB_OC2_N/DDSP_HPD4/DISP_MISC4
0225 modify for I2C panel GPP_E17
BT 6
TCP3_AUX_N BT5
DN21 TCP3_AUX_P
[38] EDP_VDD_EN BKLT_IN_CPU DL19 EDP_VDDEN AY1 TCRCOMP_DN RC7 1 2 150_0201_1%
GPIO DEVICE CONTROL DU19 EDP_BKLTEN TC_RCOMP_N AY2 TCRCOMP_DP
[38] EDP_BKLT_CTRL RSVD_1 J3 EDP_BKLTCTL T C_RCOMP_P
T P1 RSVD_1
USB_OC0# USB Port (MB) CT38 RTC_DET#_R
GPP_A17/DISP_MISCC CV43
1@ 2
DISP_UT ILS D2 RC8 0_0201_5% RTC_DET# [66]
T P2 R2 DISP_UT ILS GPP_A21 CV41
USB_OC1# USB Port (IO) 150_0201_1% 2 1 RC9 DP_RCOMP
DISP_RCOMP GPP_A22 KB_DET# [63]
USB_OC2# USB Port (Type-C) RC3948 1 2 100K_0402_5% RSVD_1 1 0f 19
Need Confirm +3VALW _PCH
ICL-U_BGA1526
USB_OC3# CCG5 @
KB_DET# 100K_0402_5% 2 1 RC11
DEVSLP0 HDD RT C_DET # 100K_0402_5% 2 1 RC95

DEVSLP1 NA
DEVSLP2 M.2 SSD
BKLT_IN_EDP 2 1 BKLT_IN_CPU
[10,38] BKLT_IN_EDP RC10 0_0201_5%
BKLT_IN_EC 2 1
[58] BKLT_IN_EC RC12 0_0201_5%
if RC6 pop, RC12 need to pop

B B

A A

Security Classification Compal Secret Data Compal Electronics,Inc.

Issued Date 2015/10/22 DecipheredDate 2013/10/28 Tiiitttlle

P006 - ICL-U(1/13)TCSS,EDP
THIIIS S HE E T OF ENGIIINEERIIING DRAW IIING IIIS THE PROPRIIIETARY P ROP E RTY OF COM P A L ELECTRONIIICS,,, IIINC...A ND CONTAIIINS CONFIDE NTIA L Siiize Documenttt Number
A ND TRA DE S E CRE T IIINFORMATION... THIIIS S HE ET M A Y NO T B E TRA NS FE RED FROM THE CUS TODY OF THE COM P E TE NT DIIIVIIISIIION OF R& D Rev
DE P A RTM E NT E X CE PT AS AUTHORIIIZED B Y COM P A L ELECTRONIIICS,,, IIINC... NEIIITHER THIIIS S HE ET NOR THE IIINFORMATION IIIT CONTAIIINS M A Y
BE US E D BY OR DIIISCLOSED TO A NY THIIIRD P A RTY WIIITHOUT PRIIIOR W RIIITTEN CONS E NT OF COM P A L ELECTRONIIICS,,, IIINC... LA-K033P 0...1(X00)

Dattte::: Monday,,, Jullly29,,, 2019 Sheettt 6 of 101

5 4 3 2 1
 5 4 3 2 1

Main Function: CPU(2/13) UC1B

[23] DDR_M0_D[0..7] DDR_M0_D0 CA48 LP4(NIL) / DDR4(NIL) LP4(NIL) / DDR4(NIL)
BL48 DDR_M0_CLK#0 DDR_M0_CLK#0 [23]
DDR_M0_D1 CA47 DDRA_DQ0_0/DDR0_DQ0_0 DDRA_CLK_N/DDR0_CLK_N_0 BL47 DDR_M0_CLK0 DDR_M0_CLK0 [23]
DDR_M0_D2 CA49 DDRA_DQ0_1/DDR0_DQ0_1 DDRA_CLK_P/DDR0_CLK_P_0 BF42 DDR_M0_CLK#1 DDR_M0_CLK#1 [23]
DDR_M0_D3 BV49 DDRA_DQ0_2/DDR0_DQ0_2 DDRB_CLK_N/DDR0_CLK_N_1 BF43 DDR_M0_CLK1
DDR_M0_CLK1 [23]
DDR_M0_D4 CA45 DDRA_DQ0_3/DDR0_DQ0_3 DDRB_CLK_P/DDR0_CLK_P_1
DDR_M0_D5 BV47 DDRA_DQ0_4/DDR0_DQ0_4 BG49 DDR_M0_CKE0 DDR_M0_CKE0 [23]
DDR_M0_D6 BV45 DDRA_DQ0_5/DDR0_DQ0_5 DDRA_CKE0/DDR0_CKE0 BJ47 DDR_M0_CKE2
BV48 DDRA_DQ0_6/DDR0_DQ0_6 DDRA_CKE1/NC BF38 DDR_M0_CKE3 TP3
[23] DDR_M0_D[8..15] DDR_M0_D7
DDR_M0_D8 CC42 DDRA_DQ0_7/DDR0_DQ0_7 DDRB_CKE0/NC BF41 DDR_M0_CKE1 TP4
D CC39 DDRA_DQ1_0/DDR0_DQ1_0 DDRB_CKE1/DDR0_CKE1 DDR_M0_CKE1 [23] D
DDR_M0_D9
DDR_M0_D10 CC43 DDRA_DQ1_1/DDR0_DQ1_1 BM38 DDR_M0_CS#0 DDR_M0_CS#0 [23]
DDR_M0_D11 CE38 DDRA_DQ1_2/DDR0_DQ1_2 DDRA_CS_0/DDR0_CS#0 BM42DDR_M0_CS1
DDR_M0_CS1 [23]
DDR_M0_D12 CC38 DDRA_DQ1_3/DDR0_DQ1_3 DDRA_CS_1/NC BP42 DDR_M0_CS0 DDR_M0_CS0 [23]
DDR_M0_D13 CE39 DDRA_DQ1_4/DDR0_DQ1_4 DDRB_CS_0/NC BG42 DDR_M0_CS#1
DDR_M0_CS#1[23]
DDR_M0_D14 CE42 DDRA_DQ1_5/DDR0_DQ1_5 DDRB_CS_1/DDR0_CS#1
DDR_M0_D15 CE43 DDRA_DQ1_6/DDR0_DQ1_6 BM43 DDR_M0_BA0
[23] DDR_M0_D[16..23] DDR_M0_D16 BT48 DDRA_DQ1_7/DDR0_DQ1_7 DDRB_CA4/DDR0_BA0 BG39 DDR_M0_BA1 DDR_M0_BA0 [23]
DDR_M0_D17 BT47 DDRA_DQ2_0/DDR0_DQ2_0 NC/DDR0_BA1 DDR_M0_BA1 [23]
DDR_M0_D18 BT49 DDRA_DQ2_1/DDR0_DQ2_1 BB49 DDR_M0_BG0
DDR_M0_D19 BN49 DDRA_DQ2_2/DDR0_DQ2_2 DDRA_CA5/DDR0_BG0 BD47 DDR_M0_BG1 DDR_M0_BG0 [23]
DDR_M0_D20 BT45 DDRA_DQ2_3/DDR0_DQ2_3 NC/DDR0_BG1 DDR_M0_BG1 [23]
DDR_M0_D21 BN47 DDRA_DQ2_4/DDR0_DQ2_4 BB48 DDR_M0_MA0 DDR_M0_MA0 [23]
DDR_M0_D22 BN45 DDRA_DQ2_5/DDR0_DQ2_5 NC/DDR0_MA0 BL49 DDR_M0_MA1 DDR_M0_MA1 [23]
DDR_M0_D23 BN48 DDRA_DQ2_6/DDR0_DQ2_6 NC/DDR0_MA1 BG38 DDR_M0_MA2 DDR_M0_MA2 [23]
[23] DDR_M0_D[24..31] BV42 DDRA_DQ2_7/DDR0_DQ2_7 DDRB_CA5/DDR0_MA2 BL45 DDR_M0_MA3
DDR_M0_D24 DDR_M0_MA3 [23]
DDR_M0_D25 BV39 DDRA_DQ3_0/DDR0_DQ3_0 NC/DDR0_MA3 BJ46 DDR_M0_MA4 DDR_M0_MA4 [23]
DDR_M0_D26 BV43 DDRA_DQ3_1/DDR0_DQ3_1 NC/DDR0_MA4 BG48 DDR_M0_MA5 DDR_M0_MA5 [23]
DDR_M0_D27BW38 DDRA_DQ3_2/DDR0_DQ3_2 DDRA_CA0/DDR0_MA5 BE45 DDR_M0_MA6 DDR_M0_MA6 [23]
DDR_M0_D28 BV38 DDRA_DQ3_3/DDR0_DQ3_3 DDRA_CA2/DDR0_MA6 BG45 DDR_M0_MA7 DDR_M0_MA7 [23]
DDR_M0_D29BW39 DDRA_DQ3_4/DDR0_DQ3_4 DDRA_CA4/DDR0_MA7 BG47 DDR_M0_MA8 DDR_M0_MA8 [23]
DDR_M0_D30BW42 DDRA_DQ3_5/DDR0_DQ3_5 DDRA_CA3/DDR0_MA8 BE47 DDR_M0_MA9 DDR_M0_MA9 [23]
DDR_M0_D31BW43 DDRA_DQ3_6/DDR0_DQ3_6 DDRA_CA1/DDR0_MA9 BJ38
DDR_M0_MA10 DDR_M0_MA10 [23]
[23] DDR_M0_D[32..39] AY48 DDRA_DQ3_7/DDR0_DQ3_7 NC/DDR0_MA10 BB47 DDR_M0_MA11 DDR_M0_MA11 [23]
C
DDR_M0_D32 DDR_M0_MA12 [23]
DDR_M0_D33 AY47 DDRB_DQ0_0/DDR0_DQ4_0 NC/DDR0_MA11 BE48 DDR_M0_MA12 C

DDR_M0_D34 AY49 DDRB_DQ0_1/DDR0_DQ4_1 NC/DDR0_MA12 BM39 DDR_M0_MA13 DDR_M0_MA13 [23]

DDR_M0_D35 AU45 DDRB_DQ0_2/DDR0_DQ4_2 DDRB_CA0/DDR0_MA13 BG43 DDR_M0_MA14_WE# DDR_M0_MA14_WE# [23]
DDR_M0_D36 AY45 DDRB_DQ0_3/DDR0_DQ4_3 DDRB_CA2/DDR0_MA14WE# BJ42 DDR_M0_MA15_CAS# DDR_M0_MA15_CAS# [23]
DDR_M0_D37 AU47 DDRB_DQ0_4/DDR0_DQ4_4 DDRB_CA1/DDR0_MA15CAS# BM41 DDR_M0_MA16_RAS# DDR_M0_MA16_RAS# [23]
DDR_M0_D38 AU48 DDRB_DQ0_5/DDR0_DQ4_5 DDRB_CA3/DDR0_MA16RAS#
DDR_M0_D39 AU49 DDRB_DQ0_6/DDR0_DQ4_6 BJ39 DDR_M0_ODT0
[23] DDR_M0_D[40..47] AY42 DDRB_DQ0_7/DDR0_DQ4_7 NC/DDR0_ODT_0 BB45 DDR_M0_ODT0 [23]
DDR_M0_D40 DDR_M0_ODT1
AY38 DDRB_DQ1_0/DDR0_DQ5_0 NC/DDR0_ODT_1 DDR_M0_ODT1 [23]
DDR_M0_D41
DDR_M0_D42 AY43 DDRB_DQ1_1/DDR0_DQ5_1 BY47 DDR_M0_DQS#0 DDR_M0_DQS#0 [23]
DDR_M0_D43 BB39 DDRB_DQ1_2/DDR0_DQ5_2 DDRA_DQSN_0/DDR0_DQSN_0 BY46 DDR_M0_DQS0 DDR_M0_DQS0 [23]
DDR_M0_D44 AY39 DDRB_DQ1_3/DDR0_DQ5_3 DDRA_DQSP_0/DDR0_DQSP_0 CC41 DDR_M0_DQS#1
DDR_M0_DQS#1 [23]
DDR_M0_D45 BB38 DDRB_DQ1_4/DDR0_DQ5_4 DDRA_DQSN_1/DDR0_DQSN_1 CE41 DDR_M0_DQS1
DDR_M0_DQS1 [23]
DDR_M0_D46 BB42 DDRB_DQ1_5/DDR0_DQ5_5 DDRA_DQSP_1/DDR0_DQSP_1 BR47 DDR_M0_DQS#2
DDR_M0_DQS#2 [23]
BB43 DDRB_DQ1_6/DDR0_DQ5_6 DDRA_DQSN_2/DDR0_DQSN_2 BR46 DDR_M0_DQS2
[23] DDR_M0_D[48..55] DDR_M0_D47 DDR_M0_DQS2 [23]
DDR_M0_D48 AR48 DDRB_DQ1_7/DDR0_DQ5_7 DDRA_DQSP_2/DDR0_DQSP_2 BV41 DDR_M0_DQS#3 DDR_M0_DQS#3 [23]
DDR_M0_D49 AR47 DDRB_DQ2_0/DDR0_DQ6_0 DDRA_DQSN_3/DDR0_DQSN_3 BW41 DDR_M0_DQS3
DDR_M0_DQS3 [23]
DDR_M0_D50 AR49 DDRB_DQ2_1/DDR0_DQ6_1 DDRA_DQSP_3/DDR0_DQSP_3 AV46 DDR_M0_DQS#4 DDR_M0_DQS#4 [23]
DDR_M0_D51 AM45 DDRB_DQ2_2/DDR0_DQ6_2 DDRB_DQSN_0/DDR0_DQSN_4 AV47 DDR_M0_DQS4 DDR_M0_DQS4 [23]
DDR_M0_D52 AR45 DDRB_DQ2_3/DDR0_DQ6_3 DDRB_DQSP_0/DDR0_DQSP_4 AY41
DDR_M0_DQS#5 DDR_M0_DQS#5 [23]
DDR_M0_D53 AM47 DDRB_DQ2_4/DDR0_DQ6_4 DDRB_DQSN_1/DDR0_DQSN_5 BB41 DDR_M0_DQS5 DDR_M0_DQS5 [23]
AM48 DDRB_DQ2_5/DDR0_DQ6_5 DDRB_DQSP_1/DDR0_DQSP_5 AN46 DDR_M0_DQS#6 DDR_M0_DQS#6 [23]
DDR_M0_D54
DDR_M0_D55 AM49 DDRB_DQ2_6/DDR0_DQ6_6 DDRB_DQSN_2/DDR0_DQSN_6 AN47 DDR_M0_DQS6 DDR_M0_DQS6 [23]
[23] DDR_M0_D[56..63] AT42 DDRB_DQ2_7/DDR0_DQ6_7 DDRB_DQSP_2/DDR0_DQSP_6 AR41 DDR_M0_DQS#7 DDR_M0_DQS#7 [23]
B DDR_M0_D56 B
DDR_M0_D57 AT39 DDRB_DQ3_0/DDR0_DQ7_0 DDRB_DQSN_3/DDR0_DQSN_7 AT41 DDR_M0_DQS7 DDR_M0_DQS7 [23]
DDR_M0_D58 AR43 DDRB_DQ3_1/DDR0_DQ7_1 DDRB_DQSP_3/DDR0_DQSP_7
DDR_M0_D59 AT38 DDRB_DQ3_2/DDR0_DQ7_2 BF39 DDR_M0_PAR
DDR_M0_D60 AR38 DDRB_DQ3_3/DDR0_DQ7_3 NC/DDR0_PAR BE49 DDR_M0_PAR [23]
DDR_M0_ACT#
AR39 DDRB_DQ3_4/DDR0_DQ7_4 NC/DDR0_ACT# BD46 DDR_M0_ALERT# DDR_M0_ACT#[23]
DDR_M0_D61
DDR_M0_D62 AR42 DDRB_DQ3_5/DDR0_DQ7_5 NC/DDR0_ALERT# DDR_M0_ALERT# [23]
DDR_M0_D63 AT43 DDRB_DQ3_6/DDR0_DQ7_6 M38
DDRB_DQ3_7/DDR0_DQ7_7 RSVD_73 C44
DDR0_VREF_CA B45 +V_DDR_REFA_R
100_0201_1%2 1 RC17 DDR_COMP_0 D47
DDR_RCOMP_0 DDR1_VREF_CA M39 +V_DDR_REFB_R
100_0201_1%2 1 RC18DDR_COMP_1 E46 DDR_VTT_CNTL
1 RC19 DDR_COMP_2 C47 DDR_RCOMP_1 DDR_VTT_CTL DK47
100_0201_1%2 DDR_DRAMRST# [23]
DDR_RCOMP_2 2 of 19 DRAM_RESET#
ICL-U_BGA1526
@
CADNote:
Min trace width=20 mils, spacing of adjacent signal=20mils
Buffer with Open Drain Output For VTT power control
+1.2V_DDR+3VS

0.1U_0402_16V7K 2 1 CC1
1

UC4 RC20
A 1 5 200K_0402_1% A
NC VCC
DDR_VTT_CNTL 2
A
2

4
3
GND
Y
1
0.6V_DDR_VTT_ON [86] SecurityClassification Compal Secret Data Compal Electronics, Inc.
@ 2014/09/08 2013/10/28 Title
74AUP1G07GW_TSSOP5 CC2
Issued Date Deciphered Date
2 100P_0402_50V8J T HIS SHEET OF ENG INEERING DRAW ING IS T H E PRO PRIET ARY P R O P E R T Y OF C O M P A L ELECT RO NICS, INC. A N D CO NT AINS CO NFIDENT IAL
P007 - ICL-U(2/13)DDR4
A N D T R A D E SECRET INFO RMAT IO N. T HIS SHEET M A Y N O T BE T R A N S F E R ED F R O M T H E C U S T O D Y OF T H E C O M P E T E N T DIVISION OF R & D Size DocumentNumber Rev
D E P A R T M E N T EXCEPT AS AUT HO RIZED BY C O M P A L ELECT RO NICS, INC. NEIT HER T HIS SHEET N O R T H E INFO RMAT IO N IT CO NT AINS
M A Y BE U S E D BY OR DISCLO SED TO A N Y T HIRD P A R T Y W IT HO UT PRIO R W RIT T EN C O N S E N T OF C O M P A L ELECT RO NICS, INC. LA-K033P 0.1(X00)

Date: Monday,July29,2019 Sheet 7 of 101

5 4 3 2 1
 5 4 3 2 1

Main Function: CPU(3/13)

D UC1C D

[24] DDR_M1_D[0..7] DDR_M1_D0 AK48 LP4(NIL) / DDR4(NIL) LP4(NIL) / DDR4(NIL) Y48 DDR_M1_CLK#0
AK45 DDRC_DQ0_0/DDR1_DQ0_0 DDRC_CLK_N/DDR1_CLK_N_0 Y47 DDR_M1_CLK0 DDR_M1_CLK#0 [24]
DDR_M1_D1 DDR_M1_CLK0 [24]
DDR_M1_D2 AK49 DDRC_DQ0_1/DDR1_DQ0_1 DDRC_CLK_P/DDR1_CLK_P_0 M43 DDR_M1_CLK#1
AG47 DDRC_DQ0_2/DDR1_DQ0_2 DDRD_CLK_N/DDR1_CLK_N_1 M42 DDR_M1_CLK#1 [24]
DDR_M1_D3 DDR_M1_CLK1
AK47 DDRC_DQ0_3/DDR1_DQ0_3 DDRD_CLK_P/DDR1_CLK_P_1 DDR_M1_CLK1 [24]
DDR_M1_D4
DDR_M1_D5 AG45 DDRC_DQ0_4/DDR1_DQ0_4 U45 DDR_M1_CKE0
DDR_M1_D6 AG48 DDRC_DQ0_5/DDR1_DQ0_5 DDRC_CKE0/DDR1_CKE0 V46 DDR_M1_CKE2 DDR_M1_CKE0[24]
DDR_M1_D7 AG49 DDRC_DQ0_6/DDR1_DQ0_6 DDRC_CKE1/NC M41 DDR_M1_CKE3 TP5
[24] DDR_M1_D[8..15] TP6
DDR_M1_D8 AJ38 DDRC_DQ0_7/DDR1_DQ0_7 DDRD_CKE0/NC P43 DDR_M1_CKE1
DDRD_CKE1/DDR1_CKE1 DDR_M1_CKE1 [24]
DDR_M1_D9 AL39 DDRC_DQ1_0/DDR1_DQ1_0
DDR_M1_D10 AJ39 DDRC_DQ1_1/DDR1_DQ1_1 V42 DDR_M1_CS#0 DDR_M1_CS#0 [24]
DDR_M1_D11 AL43 DDRC_DQ1_2/DDR1_DQ1_2 DDRC_CS_0/DDR1_CS#0 V 39 DDR_M1_CS1 DDR_M1_CS1 [24]
DDR_M1_D12 AL38 DDRC_DQ1_3/DDR1_DQ1_3 DDRC_CS_1/NC Y39 DDR_M1_CS0 DDR_M1_CS0 [24]
DDR_M1_D13 AJ42 DDRC_DQ1_4/DDR1_DQ1_4 DDRD_CS_0/NC T39
DDR_M1_CS#1
DDRD_CS_1/DDR1_CS#1 DDR_M1_CS#1 [24]
DDR_M1_D14 AL42 DDRC_DQ1_5/DDR1_DQ1_5
DDR_M1_D15 AJ43 DDRC_DQ1_6/DDR1_DQ1_6 T38 DDR_M1_BA0 DDR_M1_BA0 [24]
[24] DDR_M1_D[16..23] DDR_M1_D16 AB49 DDRC_DQ1_7/DDR1_DQ1_7 DDRD_CA4/DDR1_BA0 T42 DDR_M1_BA1
DDR_M1_D17 AB48 DDRC_DQ2_0/DDR1_DQ2_0 NC/DDR1_BA1 DDR_M1_BA1 [24]
DDR_M1_D18 AE49 DDRC_DQ2_1/DDR1_DQ2_1 R45 DDR_M1_BG0 DDR_M1_BG0 [24]
DDR_M1_D19 AE47 DDRC_DQ2_2/DDR1_DQ2_2 DDRC_CA5/DDR1_BG0 N47 DDR_M1_BG1
AE48 DDRC_DQ2_3/DDR1_DQ2_3 NC/DDR1_BG1 DDR_M1_BG1 [24]
DDR_M1_D20
DDR_M1_D21 AB47 DDRC_DQ2_4/DDR1_DQ2_4 P42 DDR_M1_MA0 DDR_M1_MA0 [24] C
C
DDR_M1_D22 AB45 DDRC_DQ2_5/DDR1_DQ2_5 NC/DDR1_MA0 Y49 DDR_M1_MA1 DDR_M1_MA1 [24]
DDR_M1_D23 AE45 DDRC_DQ2_6/DDR1_DQ2_6 NC/DDR1_MA1 U 48 DDR_M1_MA2 DDR_M1_MA2 [24]
[24] DDR_M1_D[24..31] DDR_M1_D24 AD38 DDRC_DQ2_7/DDR1_DQ2_7 DDRD_CA5/DDR1_MA2 Y45 DDR_M1_MA3
DDR_M1_MA3 [24]
DDR_M1_D25 AD39 DDRC_DQ3_0/DDR1_DQ3_0 NC/DDR1_MA3 U 47 DDR_M1_MA4 DDR_M1_MA4 [24]
DDR_M1_D26 AE39 DDRC_DQ3_1/DDR1_DQ3_1 NC/DDR1_MA4 R 49
DDR_M1_MA5 DDR_M1_MA5 [24]
DDR_M1_D27 AE43 DDRC_DQ3_2/DDR1_DQ3_2 DDRC_CA0/DDR1_MA5 U 49 DDR_M1_MA6 DDR_M1_MA6 [24]
AE38 DDRC_DQ3_3/DDR1_DQ3_3 DDRC_CA2/DDR1_MA6 M47
DDR_M1_D28 DDR_M1_MA7 DDR_M1_MA7 [24]
DDR_M1_D29 AD43 DDRC_DQ3_4/DDR1_DQ3_4 DDRC_CA4/DDR1_MA7 M45 DDR_M1_MA8 DDR_M1_MA8 [24]
DDR_M1_D30 AD42 DDRC_DQ3_5/DDR1_DQ3_5 DDRC_CA3/DDR1_MA8 R 47
DDR_M1_MA9 DDR_M1_MA9 [24]
DDR_M1_D31 AE42 DDRC_DQ3_6/DDR1_DQ3_6 DDRC_CA1/DDR1_MA9 P39 DDR_M1_MA10 DDR_M1_MA10 [24]
[24] DDR_M1_D[32..39] DDR_M1_D32 J48 DDRC_DQ3_7/DDR1_DQ3_7 NC/DDR1_MA10 N 46 DDR_M1_MA11
NC/DDR1_MA11 R 48 DDR_M1_MA11 [24]
DDR_M1_D33 J45 DDRD_DQ0_0/DDR1_DQ4_0 DDR_M1_MA12 DDR_M1_MA12 [24]
DDR_M1_D34 J49 DDRD_DQ0_1/DDR1_DQ4_1 NC/DDR1_MA12 Y41 DDR_M1_MA13
DDRD_CA0/DDR1_MA13 V41 DDR_M1_MA13 [24]
DDR_M1_D35 G47 DDRD_DQ0_2/DDR1_DQ4_2 DDR_M1_MA14_WE# DDR_M1_MA14_WE# [24]
DDR_M1_D36 J47 DDRD_DQ0_3/DDR1_DQ4_3 DDRD_CA2/DDR1_MA14WE# Y 42
DDR_M1_MA15_CAS# DDR_M1_MA15_CAS# [24]
DDR_M1_D37 G45 DDRD_DQ0_4/DDR1_DQ4_4 DDRD_CA1/DDR1_MA15CAS# V 47 DDR_M1_MA16_RAS# DDR_M1_MA16_RAS# [24]
G48 DDRD_DQ0_5/DDR1_DQ4_5 DDRD_CA3/DDR1_MA16RAS#
DDR_M1_D38
DDR_M1_D39 E48 DDRD_DQ0_6/DDR1_DQ4_6 V43 DDR_M1_ODT0
[24] DDR_M1_D[40..47] J38 DDRD_DQ0_7/DDR1_DQ4_7 NC/DDR1_ODT_0 V38 DDR_M1_ODT0 [24]
DDR_M1_D40 DDR_M1_ODT1
G39 DDRD_DQ1_0/DDR1_DQ5_0 NC/DDR1_ODT_1 DDR_M1_ODT1 [24]
DDR_M1_D41
DDR_M1_D42 G38 DDRD_DQ1_1/DDR1_DQ5_1 AH46 DDR_M1_DQS#0 DDR_M1_DQS#0 [24]
G42 DDRD_DQ1_2/DDR1_DQ5_2 DDRC_DQSN_0/DDR1_DQSN_0 AH47 DDR_M1_DQS0
DDR_M1_D43 DDR_M1_DQS0 [24]
DDR_M1_D44 J39 DDRD_DQ1_3/DDR1_DQ5_3 DDRC_DQSP_0/DDR1_DQSP_0 A J41 DDR_M1_DQS#1 DDR_M1_DQS#1 [24]
J42 DDRD_DQ1_4/DDR1_DQ5_4 DDRC_DQSN_1/DDR1_DQSN_1 A L41 DDR_M1_DQS1
B DDR_M1_D45 DDR_M1_DQS1 [24] B
DDR_M1_D46 G43 DDRD_DQ1_5/DDR1_DQ5_5 DDRC_DQSP_1/DDR1_DQSP_1 A C47 DDR_M1_DQS#2 DDR_M1_DQS#2 [24]
DDR_M1_D47 J43 DDRD_DQ1_6/DDR1_DQ5_6 DDRC_DQSN_2/DDR1_DQSN_2 A C46 DDR_M1_DQS2 DDR_M1_DQS2 [24]
[24] DDR_M1_D[48..55] DDR_M1_D48 B43 DDRD_DQ1_7/DDR1_DQ5_7 DDRC_DQSP_2/DDR1_DQSP_2 A E41 DDR_M1_DQS#3 DDR_M1_DQS#3 [24]
DDR_M1_D49 D43 DDRD_DQ2_0/DDR1_DQ6_0 DDRC_DQSN_3/DDR1_DQSN_3 A D41 DDR_M1_DQS3
DDR_M1_DQS3 [24]
DDR_M1_D50 A43 DDRD_DQ2_1/DDR1_DQ6_1 DDRC_DQSP_3/DDR1_DQSP_3 H 47 DDR_M1_DQS#4 DDR_M1_DQS#4 [24]
DDR_M1_D51 C40 DDRD_DQ2_2/DDR1_DQ6_2 DDRD_DQSN_0/DDR1_DQSN_4 H 46
DDR_M1_DQS4 DDR_M1_DQS4 [24]
DDR_M1_D52 C43 DDRD_DQ2_3/DDR1_DQ6_3 DDRD_DQSP_0/DDR1_DQSP_4 G 41 DDR_M1_DQS#5 DDR_M1_DQS#5 [24]
DDR_M1_D53 D40 DDRD_DQ2_4/DDR1_DQ6_4 DDRD_DQSN_1/DDR1_DQSN_5 J 41
DDR_M1_DQS5 DDR_M1_DQS5 [24]
DDR_M1_D54 B40 DDRD_DQ2_5/DDR1_DQ6_5 DDRD_DQSP_1/DDR1_DQSP_5 C 42 DDR_M1_DQS#6 DDR_M1_DQS#6 [24]
DDR_M1_D55 A40 DDRD_DQ2_6/DDR1_DQ6_6 DDRD_DQSN_2/DDR1_DQSN_6 D 42
DDR_M1_DQS6 DDR_M1_DQS6 [24]
[24] DDR_M1_D[56..63] DDR_M1_D56 B35 DDRD_DQ2_7/DDR1_DQ6_7 DDRD_DQSP_2/DDR1_DQSP_6 D 36 DDR_M1_DQS#7 DDR_M1_DQS#7 [24]
DDR_M1_D57 D35 DDRD_DQ3_0/DDR1_DQ7_0 DDRD_DQSN_3/DDR1_DQSN_7 C 36 DDR_M1_DQS7 DDR_M1_DQS7 [24]
DDR_M1_D58 A35 DDRD_DQ3_1/DDR1_DQ7_1 DDRD_DQSP_3/DDR1_DQSP_7
DDR_M1_D59 D38 DDRD_DQ3_2/DDR1_DQ7_2 P38 DDR_M1_PAR DDR_M1_PAR [24]
DDR_M1_D60 C35 DDRD_DQ3_3/DDR1_DQ7_3 NC/DDR1_PAR M48
DDR_M1_ACT# DDR_M1_ACT#[24]
DDR_M1_D61 C38 DDRD_DQ3_4/DDR1_DQ7_4 NC/DDR1_ACT# M49 DDR_M1_ALERT# DDR_M1_ALERT# [24]
DDR_M1_D62 B38 DDRD_DQ3_5/DDR1_DQ7_5 NC/DDR1_ALERT#
DDR_M1_D63 A38 DDRD_DQ3_6/DDR1_DQ7_6
DDRD_DQ3_7/DDR1_DQ7_7 3 of 19
ICL-U_BGA1526
@

A A

SecurityClassification Compal Secret Data Compal Electronics, Inc.

Issued Date 2014/09/08 Deciphered Date 2013/10/28 Title

T HIS SHEET OF ENG INEERING DRAW ING IS T H E PRO PRIET ARY P R O P E R T Y OF C O M P A L ELECT RO NICS, INC. A N D CO NT AINS CO NFIDENT IAL
P008 - ICL-U(3/13)DDR4
A N D T R A D E SECRET INFO RMAT IO N. T HIS SHEET M A Y N O T BE T R A N S F E R ED F R O M T H E C U S T O D Y OF T H E C O M P E T E N T DIVISION OF R & D Size DocumentNumber Rev
D E P A R T M E N T EXCEPT AS AUT HO RIZED BY C O M P A L ELECT RO NICS, INC. NEIT HER T HIS SHEET N O R T H E INFO RMAT IO N IT CO NT AINS
M A Y BE U S E D BY OR DISCLO SED TO A N Y T HIRD P A R T Y W IT HO UT PRIO R W RIT T EN C O N S E N T OF C O M P A L ELECT RO NICS, INC. LA-K033P 0.1(X00)

Date: Monday,July29,2019 Sheet 8 of 101

5 4 3 2 1
 5 4 3 2 1

Main Function: CPU(4/13) RC21 1 2 100K_0201_5% CPU_SPI_0_CLK

+3VS
UC1E
QC1A
DB42

2
CPU_SPI_CLK RC22 1 @ 2 33_0402_5% CPU_SPI_0_CLK L2N7002DW1T1G_SC88-6
[66] CPU_SPI_CLK CPU_SPI_0_D0 Strap Pin DD43 SPI0_CLK DK27 MEM_SMBCLK
CPU_SPI_D0 RC23 1 @ 2 0_0402_5%
[66] CPU_SPI_D0 CPU_SPI_D1 RC24 1 @ 2 0_0402_5% CPU_SPI_0_D1 DF43 SPI0_MOSI GPP_C0/SMBCLK DP24 MEM_SMBDATA MEM_SMBCLK 6 1
[66] CPU_SPI_D1 SPI0_MISO GPP_C1/SMBDATA GPP_C2 PCH_SMBCLK [23,24]
CPU_SPI_D2 RC25 1 @ 2 0_0402_5% CPU_SPI_0_D2 Strap Pin DF42 SMBUS DL24
CPU_SPI_0_D3 Strap Pin DD41 SPI0_IO2 GPP_C2/SMBALERT#

5
RC22 CPU_SPI_D3 RC26 1 @ 2 0_0402_5% SPI 0 QC1B
RC22 @
CPU_SPI_0_CS#0 DB43 SPI0_IO3
SMB -> DDR4,FFS
4.99_0402_1% S RES 1/16W 0 +-5%0402 L2N7002DW1T1G_SC88-6
SD034499B80 SD028000080 R2 CPU_SPI_0_CS#1
CPU_SPI_0_CS#2
DF41 SPI0_CS0#
DB41 SPI0_CS1# GPP_C3/SML0CLK
DK24
DJ24
SML0_SMBCLK
SML0_SMBDATA
MEM_SMBDATA 3 4
PCH_SMBDATA [23,24]
RC23
[66] CPU_SPI_0_CS#2 SPI0_CS2# SML0 GPP_C4/SML0DATA DP22 GPP_C5 SML0 -> EC, THM,GPU +3VS
GPP_C5/SML0ALERT#
RC23 @ S RES 1/16W 0 +-5%0402
TPM_SPI_IRQ# DV16
4.99_0402_1% SD028000080
+3VS [66] TPM_SPI_IRQ# GPP_E11/SPI1_CLK/BK1/SBK1 SML1_SMBCLK
TYPEC@ 1
SD034499B80 DT16 DN22 PCH_SMBDATA 2
DU18 GPP_E13/SPI1_MOSI/BK3/SBK3 GPP_C6/SML1CLK/SUSW ARN_N/SUSPW RDNACK DL22 SML1_SMBDATA 2.2K_0402_5% RC27
RC24
DT18 GPP_E12/SPI1_MISO/BK2/SBK2 SPI 1 SML1 GPP_C7/SML1DATA/SUSACK# CCG5C PCH_SMBCLK 2 1
S RES 1/16W 0 +-5%0402
RC24 @ SD028000080 1 2 SATA_LED# DW 18 GPP_E1/SPI1_IO2 2.2K_0402_5% RC29
4.99_0402_1% RC4030 10K_0402_5% HDD_DET# DW 16 GPP_E2/SPI1_IO3 CR47 ESPI_CLK_RRC301 EMI@ 2 49.9_0201_1%
D [67] HDD_DET# GPP_A5/ESPI_CLK ESPI_CLK [58] D
SD034499B80 RC25 SATA_LED# DU16 GPP_E10/SPI1_CS_N/BK0/SBK0 CN45 ESPI_IO0_RRC31 1 2 10_0201_1%
S RES 1/16W 0 +-5%0402 [63,68] SATA_LED# GPP_E8/SATALED#/SPI1_CS1# GPP_A0/ESPI_IO0 ESPI_IO0 [58] +3VALW_PCH
CN48 ESPI_IO1_RRC32 1 2 10_0201_1% ESPI_IO1 [58]
SD028000080 GPP_A1/ESPI_IO1 CN49 ESPI_IO2_RRC33 1 2 10_0201_1% ESPI_IO2 [58] 1
RC25 @ DV19 eSPI GPP_A2/ESPI_IO2 CN47 ESPI_IO3_RRC34 1 2 10_0201_1% CC3 @RF@
GPP_A3/ESPI_IO3 ESPI_CS# ESPI_IO3 [58]
4.99_0402_1% RC26 2 @ 1 CPU_SPI_0_D0 DW 19 CL_CLK MLINK CT45 10P_0402_50V8J MEM_SMBCLK 1K_0201_5% 2 1 RC36
[79] XDP_SPI_SI ESPI_CS# [58]
SD034499B80 S RES 1/16W 0 +-5%0402 RC35 1K_0402_1% DT19 CL_DATA GPP_A4/ESPI_CS# CR46 ESPI_RESET# MEM_SMBDATA 1K_0201_5% 2 1 RC37
CPU_SPI_0_D2 CL_RST# GPP_A6/ESPI_RESET# ESPI_RESET# [58] 2
SD028000080 [79] XDP_SPI_IO2 2 @ 1
RC38 1K_0402_1% ESPI_RESET#RC39 2 1 75K_0201_1% ESPI1.8V
RC26 @ 5 of19 ESPI_CS# RC40 2 @ 1 75K_0201_1% SML0_SMBCLK 499_0201_1%2 1 RC41
4.99_0402_1% ICL-U_BGA1526 SML0_SMBDATA 499_0201_1%2 1 RC42
SD034499B80 R2 @ ESPI_CS#Pull down75K unpop
ESPI_RST#Pull down 75K pop
R2 Resistor should be 5Ω for 1.8V and 3.3V.
SML1_SMBCLK 1K_0201_5% 2 1 RC43
Follow Centenariosetting SML1_SMBDATA 1K_0201_5% 2 1 RC44
R2 to be placed on SPI0_CLK, SPI0_MISO, SPI0_MOSI,
SPI0_IO_2 and SPI0_IO_3. It is an optional to have R2 on the channel.
It can be removed to reduce BOM cost. @RF@
SML1_SMBCLK CC4 1 2 33P_0201_50V8J

SML0_SMBCLK RC45 1 @ 2 0_0201_5% GPU_THM_SMBCLK [58,66]

GPP_C2/SMBALERT#(INTERNAL PD 20K) GPP_C5 (Internal 20 K internal Pull Down): SML0ALERT# SML0_SMBDATA RC46 1 @ 2 0_0201_5%
SPI0_MOSI(NO INTERNALPU/PD) SPI0_IO2(NO INTERNALPU/PD) SPI0_IO3 GPU_THM_SMBDAT[58,66]

0 = TLS CONFIDENTIALITYDISABLE 0 = Enable eSPI.(Default) RFRequest

0 = Enable 0 = Enable 0 = Enable
1 = Disable +3.3V_SPI 1 = Disable +3.3V_SPI 1 = Disable +3.3V_SPI 1 = TLS CONFIDENTIALITY ENABLE +3VALW_PCH 1 = Disable eSPI. +3VALW_PCH

RC47 1 2 100K_0201_5% RC48 1 2 100K_0201_5%

RC49 1 2 100K_0201_5% RC50 1 @ 2 4.7K_0201_5% GPP_C5
CPU_SPI_0_D0 RC51 1 @ 2 4.7K_0201_5% CPU_SPI_0_D2 RC52 1 @ 2 4.7K_0201_5%
CPU_SPI_0_D3 RC53 1 @ 2 100K_0201_5% RC55 1 @ 2 20K_0201_5%
GPP_C2 RC54 1 2 4.7K_0201_5%

C C

NPI popD11 @ R1-->50ohm

MP popRC56 1 D11 2 +3VALW_PCH R2 -->5ohm
+3.3V_SPI RB751S40T1G_SOD523-2
PCH R2 R1 SPI1-64 Mb
2 1
Closed to ROM_1 0_0402_5% RC56

CC5
1 2
0.1U_0402_10V7K
R1 SPI2-12 8Mb
SPI_CLK_ROM RC57 1
R1 2 49.9_0402_1% CPU_SPI_CLK CPU_SPI_0_CS#01
UC5
8
CS# VCC
SPI_D0_ROM
SPI_D1_ROM
RC58
RC59
1
1
2 49.9_0402_1% CPU_SPI_D0
2 49.9_0402_1% CPU_SPI_D1
SPI_D2_ROM
SPI_D3_ROM
3
7
W P# SCLK 6
5
SPI_CLK_ROM
SPI_D0_ROM SPI_CLK_ROM
R1 TPM
SPI_D2_ROM RC60 2 1 49.9_0402_1% CPU_SPI_D2 RC61 4 HOLD# SI/SIO0 SPI_D1_ROM
2
SPI_D3_ROM 2 1 49.9_0402_1% CPU_SPI_D3 GND SO/SIO1
W 25Q64JVSSIQ_SO8

2
33_0402_5%
64Mb FlashROM

RC62 33P_0402_50V8J
@EMI@
XTAL_38P4M_IN

ROM_1

1
+3.3V_SPI XTAL_38P4M_OUT RC631 2 200K_0201_1%

Closed to ROM_2

2
RC64 2 @ 1 4.7K_0402_5% 1 2 YC1

CC7
@EMI@
CC6 0.1U_0402_10V7K 1 3
R1 CPU_SPI_0_CS#11
UC6
8
24

1
SPI_CLK_ROM2 RC65 1 2 49.9_0402_1% CPU_SPI_CLK 2 2
SPI_D2_ROM2 3 CS# VCC 6
SPI_D0_ROM2 RC66 1 2 49.9_0402_1% CPU_SPI_D0 RC67 SPI_CLK_ROM2 38.4MHZ_10PF_8Y38420005
SPI_D1_ROM2 SPI_D3_ROM2 7 W P# SCLK 5 SPI_D0_ROM2 CC9
1 2 49.9_0402_1% CPU_SPI_D1 CC8
SPI_D2_ROM2 RC68 2 1 49.9_0402_1% CPU_SPI_D2 RC69 4 HOLD# SI/SIO0 2 SPI_D1_ROM2 10P_0201_50V8J 10P_0201_50V8J
SPI_D3_ROM2 2 1 49.9_0402_1% CPU_SPI_D3 GND SO/SIO1 1 1
W 25Q128JVSIQ_SO8
place colse to UC3 EVT1_30
128Mb FlashROM
Intel SPEC :
CL = Specified Crystal Capacitive Load = 10 pF
B FLASH ROM ROM_2 Series Resistance < or = 30 Ω
Frequency Tolerance < or 100 PPM
B

Aging ±3 PPM

UC1J CC10
PCH_RTCX1 1 2
PCH_RTCX2
CJ3 CF5 6.8P_0402_50V8C
CJ5 CLKOUT_PCIE_N0 CLKOUT_PCIE_N5 CF3
DK33 CLKOUT_PCIE_P0 CLKOUT_PCIE_P5 DP40

1
YC2
GPP_D5/SRCCLKREQ0# GPP_H11/SRCCLKREQ5# 32.768KHZ_9PF_X1A000141000200
CL2 RC71 20ppm / 9pF
[52] CLK_PCIE_N1 CL1 CLKOUT_PCIE_N1 DL48 PCH_RTCX1 10M_0402_5% ESR <50kohm(MAX)
[52] CLK_PCIE_P1 DN34 CLKOUT_PCIE_P1 RTCX1 DL49 PCH_RTCX2

2
WLAN---> +3VS RC721 2 10K_0201_5%
GPP_D6/SRCCLKREQ1#
RTC
RTCX2

1
CC11
[52] CLKREQ_PCIE#1 CL3 DT47 PCH_RTCRST# 1 2
[51] CLK_PCIE_N2 CL5 CLKOUT_PCIE_N2 RTCRST# DK46 PCH_SRTCRST#
[51] CLK_PCIE_P2 DP34 CLKOUT_PCIE_P2 SRTCRST#
LAN---> [51] CLKREQ_PCIE#2 +3VS RC73 1 GPP_D7/SRCCLKREQ2# DF49 SUSCLK RC74 1 2 33_0402_5%
6.8P_0402_50V8C
2 10K_0402_5%
CK3 GPD8/SUSCLK SUSCLK_R[52,68]
CK4 CLKOUT_PCIE_N3
DP36 CLKOUT_PCIE_P3 DW 8 XTAL_38P4M_IN_CPU RC75 1 2 33_0402_5% XTAL_38P4M_IN
GPP_D8/SRCCLKREQ3# XTAL XTAL_IN DU8 XTAL_38P4M_OUT_CPU RC76 1 2 33_0402_5% XTAL_38P4M_OUT
CJ2 XTAL_OUT
[68] CLK_PCIE_N4 CJ1 CLKOUT_PCIE_N4
[68] CLK_PCIE_P4 DN40 CLKOUT_PCIE_P4 DU6 XCLK_BIASREF RC78 1
SSD--> +3VS RC771 2 10K_0201_5%
GPP_H10/SRCCLKREQ4# XCLK_BIASREF
2 60.4_0201_1%
[68] CLKREQ_PCIE#4 +RTC_SOC
SUSCLK CC12 1 2 0.1U_0201_10V6K
10 of19
ICL-U_BGA1526 @EMI@
@ PCH_SRTCRST# 2 1
RC79 20K_0402_5%
12
CC13 1U_0201_6.3V6M
12
@ CLRP1 SHORTPADS
CLR all register bits
PCH_RTCRST# 2 1
RC80 20K_0402_5%
A 12 A
CC14 1U_0201_6.3V6M
12
@ CLRP2 SHORTPADS
CLR CMOS

SecuriiityClllassiiifiiicatiiion Compal SecretData Compal Electronics, Inc.

Issued Date 2018/04/01 Deciiiphered Date 2019/04/01 Titlelti

THIS S HE ET O F ENGIIINEERING DRAW IIING IIISTHE P R O P RI ETARY P R O PERTY O F C O MP AL ELECTRONICS,,, IIINC. AND CONTAIIINS CONFIIIDENTIIIAL Siize
WHL-U(3/12)SPI,ESPI,SMB,LPC
DocumentttNumberrr Rev
AND TR AD E S E C RET IIINFORMATIIION. THIS S HE E T MAY NO T B E TR ANS F E RED F R O M THE C US TO D Y O F THE C O MP E TENT DIVIIISIIION O F R & D
D E P ARTME NT E X C E PT AS AUTHO R I Z E D B Y C O MP AL ELECTRONICS,,, IIINC. NEIIITHER THIS S HE E T NO R THE IIINFORMATIIION IIIT CONTAIIINS MAY
BE US E D BY OR D I S CLO SED TO ANY THIRD P AR TY WIIITHOUT P RI O R W RI TTEN C O NS E NT OF CO MP AL ELECTRONICS,,, IIINC.
Custttom
LA-K033P 0..2

Date::: Tuesday,,, Jullly30,,,2019 Sheettt9 offf101

5 4 3 2 1
 5 4 3 2 1

Main Function: CPU(5/13)

UC1F

CH48 DV33 +3VS

NRB_BIT Strap Pin CF48 GPP_B16/GSPI0_CLK GPP_D13/ISH_UART0_RXD DW 33
CF47 GPP_B18/GSPI0_MOSI GPP_D14/ISH_UART0_TXD DT33 SKUID
CH49 GPP_B17/GSPI0_MISO GPP_D15/ISH_UART0_RTS_N/GSPI2_CS1_N/IMGCLKOUT5 DU33 SML0BALERT# RC82 1 @ 2 0_0201_5%
CH47 GPP_B15/GSPI0_CS0# GPP_D16/ISH_UART0_CTS_N/CNV_WCEN DBC_PANEL_EN 10K_0201_5%2 1 RC83
[56] SPKR GPP_B14/SPKR/TIME_SYNC1/GSPI0_CS1# ISH_I2C_1_SDA 1 RC112
UART DK22 SIO_EXT_WAKE# SIO_EXT_WAKE# [58] 1K_0201_1% 2 FFS@
CL47 GSPI GPP_C12/UART1_RXD/ISH_UART1_RXD DW 24 DBC_PANEL_EN DBC_PANEL_EN [38] ISH_I2C_1_SCL 1K_0201_1% 2 FFS@ 1 RC113
CK47 GPP_B20/GSPI1_CLK GPP_C13/UART1_TXD/ISH_UART1_TXD DV24 ISH_ACC1_INT# 10K_0201_5% 2 FFS@ 1 RC304
CK46 GPP_B22/GSPI1_MOSI GPP_C14/UART1_RTS#/ISH_UART1_RTS# DU24 ISH_ACC2_INT# 10K_0201_5% 2 FFS@ 1 RC305
CH45 GPP_B21/GSPI1_MISO GPP_C15/UART1_CTS#/ISH_UART1_CTS#
GPP_B23 Strap Pin CL48 GPP_B19/GSPI1_CS0# CN43
GPP_B23/SML1ALERT#/PCHHOT#/GSPI1_CS1# GPP_B5/ISH_I2C0_SDA CN42 N3V3 ISH_ACC1_INT# 10K_0201_5% 2 @ 1 RC300
DP21 GPP_B6/ISH_I2C0_SCL ISH_ACC2_INT# 10K_0201_5% 2 @ 1 RC301
DK21 GPP_C8/UART0_RXD CN41 ISH_I2C_1_SDA TABLE_MODE#_EC 10K_0201_5% 2 @ 1 RC302
ISH_I2C_1_SDA[67]
D +3VS
For TS lid openrequest [6,38] BKLT_IN_EDP 2 @1
RC88 0_0201_5%
ENBKL_TS DL21 GPP_C9/UART0_TXD
DJ22 GPP_C10/UART0_RTS#
I2C/ISH GPP_B7/ISH_I2C1_SDA CL43
GPP_B8/ISH_I2C1_SCL
ISH_I2C_1_SCL ISH_I2C_1_SCL[67]
D

[38] LCD_CBL_DET# GPP_C11/UART0_CTS#

RC89 2 @ 1 49.9K_0201_1% UART2_RXD CL41 I2C TOUCH DETECT#
RC90 2 @ 1 49.9K_0201_1%UART2_TXD UART2_RXD DT22 UART GPP_B9/I2C5_SDA/ISH_I2C2_SDA CJ39
RC91 2 @ 1 49.9K_0201_1%UART2_RTS# UART2_TXD DW 22 GPP_C20/UART2_RXD GPP_B10/I2C5_SCL/ISH_I2C2_SCL DU36 ISH_ACC1_INT# +3VALW_PCH
RC92 2 @ 1 49.9K_0201_1%UART2_CTS# UART2_RTS# GPP_D0/ISH_GP0 DV36 ISH_ACC2_INT# ISH_ACC1_INT# [67]
DV22 GPP_C21/UART2_TXD
UART2_CTS# DU22 GPP_C22/UART2_RTS# GPP_D1/ISH_GP1 DW 36 ISH_ACC2_INT# [67] SIO_EXT_WAKE# 10K_0201_5%2 1 RC94
GPP_C23/UART2_CTS# GPP_D2/ISH_GP2 DT36
DT24 ISH GPP_D3/ISH_GP3 DU34 TABLE_MODE#_EC TABLE_MODE#_EC 10K_0201_5%2 1 RC303
[63] I2C_0_SDA DT23 GPP_C16/I2C0_SDA TABLE_MODE#_EC [58]
TP [63] I2C_0_SCL GPP_C17/I2C0_SCL GPP_D17/ISH_GP4 DW 34
GPP_D18/ISH_GP5 DT14
TABLE@

I2C_1_SDA DW 23 GPP_E15/ISH_GP6 DU14

GPP_E16/ISH_GP7
Tpye-C PD/BB I2C_1_SCL DU23 GPP_C18/I2C1_SDA
GPP_C19/I2C1_SCL
+3VS I2C_2_LCD_SDA 0_0201_5% 1 @ 2 RC98 I2C_2_SDA DU41 I2C
[38] I2C_2_LCD_SDA DV41 GPP_H4/I2C2_SDA
Reserved for I2C Touch Panel [38] I2C_2_LCD_SCL I2C_2_LCD_SCL 0_0201_5% 1 @ 2 RC99 I2C_2_SCL GPP_H5/I2C2_SCL
DW 41
RC280 1 @ 2 2.2K_0201_5% I2C_1_SDA DT41 GPP_H6/I2C3_SDA
RC281 1 @ 2 2.2K_0201_5% I 2 C_ 1 _ SCL GPP_H7/I2C3_SCL
RC282 1 @ 2 2.2K_0201_5% I2C_2_SDA CPU_ID DT40
RC283 1 @ 2 2.2K_0201_5% I 2 C_ 2 _ SCL TYPEC DW 40 GPP_H8/I2C4_SDA/CNV_MFUART2_RXD
GPP_H9/I2C4_SCL/CNV_MFUART2_TXD 6 of19
ICL-U_BGA1526
@

+3VALW_PCH

N3V3 10K_0201_5% 1 N3@ 2RC3952

RC107 2 @ 1 100K_0201_5%HDA_BIT_CLK N3V3 10K_0201_5% 1 2 RC3953
V3@

Pin Name I2C TOUCH DETECT#

TPM LOW V3@
C fTPM HIGH N3@ C

TPM/fTPM
NO REBOOT CPUNSSC CLOCK FREQ TOP SWAP OVERRIDE +3VALW_PCH

+3VALW_PCH
+3VALW_PCH

RC108 1 P R E M@ 2 100K_0201_5%CPU_ID
GPP_B23 (Internal 20 K PullDown) GPP_B14 / SPKR (Internal 20 K Pull Down) RC109 1 2 100K_0201_5%TYPEC NOI2CTCH@ SKUID 10K_0402_5% 2 DIS@ 1 RC102
GPP_B18/GSPI0_MOS (Internal 20 K Pull Down) TY PE C@ I2C TOUCH DETECT# 10K_0201_5% 1 2 RC295
SKUID
1 2 RC294 10K_0402_5% 1 UMA@ 2 RC105
0 = 38.4 MHz clock (direct from crystal) (default) 0 = Disable "Top Swap" mode. (Default) RC110 1 B AS E @ 2 100K_0201_5%CPU_ID I2C TOUCH DETECT# 10K_0201_5%
I2CTCH@
0 = REBOOTENABLED RC111 1
NTY P E C@
2 100K_0201_5%TYPEC

1 = 19.2 MHz clock (from internaldivider) 1 = Enable "Top Swap"mode.

1 = NO REBOOT +3VALW _PCH
+3VALW _PCH +3VALW _PCH
Pin Name CPU_ID TYPEC Pin Name I2C TOUCHDETECT# Pin Name SKUID
LOW Base-U Non-TYPEC NTYPEC@ I2C TOUCH LOW I2CTCH@ LOW UMA UMA@
NRB_ BIT RC1141 @ 2 4.7K_0201_5% GPP_B23 RC115 1 @ 2 4.7K_0201_5% SPKR RC116 1 @ 2 8.2K_0201_5% HIGH Premium-U TYPECTYPEC@ USB TOUCH HIGH NOI2CTCH@ HIGH DSC DIS@

I2C TOUCH DETECT# Strap Pin

UC1G
CE46 KB_LED_BL_DET
HDA_BIT_CLK GPP_G6/SD_CLK CC48 KB_LED_BL_DET[63]
CY46 TP@
HDA_SYNC CV49 GPP_R0/HDA_BCLK/I2S0_SCLK GPP_G1/SD_DATA0 CC49 TBT_CIO_PLUG_EVENT# 1
HDA_SDOUT CY47 GPP_R1/HDA_SYNC/I2S0_SFRM GPP_G2/SD_DATA1 CC47 TP7 PAD~D
HDA_SDIN0 CV45 GPP_R2/HDA_SDO/I2S0_TXD GPP_G3/SD_DATA2 CF45
[56] HDA_SDIN0 GPP_G4/SD_DATA3 CC45
DA47 GPP_R3/HDA_SDI0/I2S0_RXD
GPP_R4/HDA_RST# GPP_G0/SD_CMD CF49
B SD3.0 B
DP33 GPP_G7/SD_WP CE47
GPP_D19/I2S_MCLK GPP_G5/SD_CD#
@ 0_0201_5% 2 @ 1 RC117 GPP_A23 DC45 DK38 GPP_H0 1
GPP_R5 GPP_A23/I2S1_SCLK GPP_H0/CNV_BT_I2S_SDO DG38 TP8 TP@ PAD~D
1 RC40332 DA49 GPP_H1 1 TP9 TP@ PAD~D
100K_0201_5% DA45 GPP_R5/HDA_SDI1/I2S1_SFRM GPP_H1/SD_PW R_EN_N/CNV_BT_I2S_SDO
Reservedfordebug CJ43 SD3_RCOMP
DA48 GPP_R6/I2S1_TXD
75K_0201_5% 2 1 RC118 CNV_RF_RESET# CT49 GPP_R7/I2S1_RXD SD3_RCOMP
CNV_RF_RESET# CT48 GPP_A7/I2S2_SCLK
10K_0201_5% 2 @ 1 RC119 CLKREQ_CNV#
[52] CNV_RF_RESET# CV47 GPP_A8/I2S2_SFRM/CNV_RF_RESET# DG36
SPCE p.30 PU or PD100K-180K CLKREQ_CNV# CT47 GPP_A10/I2S2_RXD GPP_S6/SNDW4_CLK/DMIC_CLK0 DG34
PDG define only JFP need to PD 10K. [52] CLKREQ_CNV# GPP_A9/I2S2_TXD/MODEM_CLKREQ GPP_S7/SNDW4_DATA/DMIC_DATA0
CY39 CV38 SNDW_RCOMP
CY38 GPP_S0/SNDW 1_CLK SNDW _RCOMP
GPP_S1/SNDW1_DATA
AUDIO
DB39
DD38 GPP_S2/SNDW2_CLK
GPP_S3/SNDW2_DATA SD3_RCOMP RC1201 2 200_0201_1%
0_0201_5% 2 @ 1 RC121 GPP_S4 DF38 SNDW _RCOMP
RC1221 2 200_0201_1%
GPP_S5 DD39 GPP_S4/SNDW3_CLK/DMIC_CLK1
GPP_S5/SNDW3_DATA/DMIC_DATA1
Reservedfordebug 7 of19

ICL-U_BGA1526
Intel DMIC for WOV reserved
@

HDA forAUDIO FLASH DESCRIPTOR SECURITY OVERRIDE RF Request. Place near CPU side
EVT2_09
GPP_R2/HDA_SDO (Internal 20 K Pull Down)
RC123 1 2 33_0201_1% HDA_BIT_CLK
[56] HDA_BIT_CLK_R
[56] HDA_SYNC_R
RC124 1 2 33_0201_1% HDA_SYNC 0 = ENABLE(DEFAULT)
RC1251 2 33_0201_1% HDA_SDOUT @R F @
[56] HDA_SDOUT_R HDA_SDIN0
1 1 1 1 = DISABLE (ME canupdate) CC17 1 2 2.2P_0201_50V8B
56P_0201_25V8J

56P_0201_25V8J

22P_0201_50V8J
CC15

CC16

CC18

2 2 2@

A 1 @ 2 ME_FWP_PCH 1 2 HDA_SDOUT A
[58] ME_FWP
RC126 0_0201_5% RC127 1K_0201_1%

@RF @ @RF @

SecuriiityClllassiiifiiicatiiion Compal SecretData Compal Electronics, Inc.

Issued Date 2018/04/01 Deciiiphered Date 2019/04/01 Titlelti

THIS S HE ET O F ENGIIINEERING DRAW IIING IIISTHE P R O P RI ETARY P R O PERTY O F C O MP AL ELECTRONICS,,, IIINC. AND CONTAIIINS CONFIIIDENTIIIAL Siize
WHL-U(4/12)HDA,EMMC,SD
DocumentttNumberrr Rev
AND TR AD E S E C RET IIINFORMATIIION. THIS S HE E T MAY NO T B E TR ANS F E RED F R O M THE C US TO D Y O F THE C O MP E TENT DIVIIISIIION O F R & D
D E P ARTME NT E X C E PT AS AUTHO R I Z E D B Y C O MP AL ELECTRONICS,,, IIINC. NEIIITHER THIS S HE E T NO R THE IIINFORMATIIION IIIT CONTAIIINS MAY
BE US E D BY OR D I S CLO SED TO ANY THIRD P AR TY WIIITHOUT P RI O R W RI TTEN C O NS E NT OF CO MP AL ELECTRONICS,,, IIINC.
Custttom
LA-K033P 0.2

Dattte:::Tuesday,,, Jullly30,,,2019 Sheettt10 offf101

5 4 3 2 1
 5 4 3 2 1

Main Function: CPU(6/13) AC_PRESENT 2

@
1 DV14 HW _ACAV_IN
RB751S40T1G_SOD523-2
UC1K
Microchip suggest 100K onRH575 DV14 and RC130co-lay
SIO _SLP_ SUS# DM49 CY42 SIO_PWRBTN#_R RC128 1 @ 2 0_0201_5%
PCH_DPWROK [78] SIO_SLP_SUS# SIO_ SLP_ S5 # DF45 SLP_SUS# GPD3/PW RBTN# DE46 AC_PRESENT RC1301 @ 2 0_0201_5% HW _ACAV_IN SIO_PWRBTN# [58]
2@1 HW _ACAV_IN [58,63,82,84,96]
[84] SIO_SLP_S5# SIO _ SLP_ S4# DC48 GPD10/SLP_S5# GPD1/ACPRESENT DH48 PCH_BATLOW#
1M_0201_1% RC129
2 [78,86] SIO_SLP_S4# SIO _ SLP_ S3# DF47 GPD5/SLP_S4#
1 GPD0/BATLOW #
3V SELECT STRAP 0.01U_0402_16V7 K @ CC19 [78] SIO_SLP_S3# SIO_ SLP_ A# DH47 GPD4/SLP_S3# CL39 GPP_B11 RC131 1 2 0_0201_5% TBT_I2C_INT#
SIO_SLP_S0# CL45 GPD6/SLP_A# GPP_B11/PMCALERT# DU40 CPU_C10_GATE#_R RC132 1 STG@ 2 0_0201_5%
GPP_B12/SLP_S0# CPU_C10_GATE# [78]
GPP_H18/CPU_C10_GATE# DG40 GPP_H3 1
SIO_SLP_W LAN# GPP_H3/SX_EXIT_HOLDOFF_N/CNV_BT_I2S_SDO TP10 PAD~D TP@
DE49
INPUT3VSEL DN48 GPD9/SPL_WLAN#
SLP_LAN# W AKE#
DL45 PCH_PCIE_WAKE# RC133 1 @ 2 0_0201_5%
PCIE_W AKE# [51,52,58,68]
+3VALW_PCH PCH_ RSMRST#_ Q DG49 DE47 LAN_WAKE#_R RC135 1 @ 2 0_0201_5% LANW AKE#
0 = 3.3V +/-5% [63,78,79] PCH_RSMRST#_Q SYS_ RESET# DK19 RSMRST# GPD2/LAN_W AKE# DF48 LANW AKE#[58]
PCH_ PLTRST# CM49 SYS_RESET# GPD11/LANPHYPC/DSWLDO_MON

D 1 =3.0V +/-5% +3VALW_DSW 10K_0201_5%

1 2 RC137 SYS_RESET# GPP_B13/PLTRST# CE4 VCCST_OVERRIDE
VCCST_OVERRIDE CF2 VCCST_PW RGD_CPU RC1381 2 60.4_0201_1% VCCST_PWRGD D
VCCST_PWRGD [78]
PCH_ RSMR ST#_ Q 0_0201_5% 2 @ 1 RC139 PCH_DPWROK_CPU DR48 VCCST_PW RGD CE3 VCCSTPWRGOOD_TCSS
PCH_PWROK DN47 DSW _PWROK VCCSTPW RGOOD_TCSS CF1 CPUPWRGD 1 @ 2 CPUPWRGD_R 1
0_0201_5% 2 1 RC141 SYS_PW ROK_R TP11 PAD~D TP@
DP19 PCH_PW ROK PROCPW RGD RC140 1K_0201_5%
RC134 1 @2 4.7K_0201_5% [58] SYS_PWROK DC47
SYS_PW ROK
INPUT3VSEL DN49 GPD7
INPUT3VSEL RC136 1 2 100K_0201_5% INTRUDER# Strap PinDR47 INPUT3VSEL
INTRUDER# +3VALW_PCH

PCH GLITCH ISSUE MITIGATION(PDGv1.36 p.321) ICL-U_BGA1526

11 of 19

@ PCH_RSMRST#_Q RC142 1 @ 2 10K_0201_5% RC143 1

TBT_I2C_INT# 2 10K_0201_5%
RC144 1 2 100K_0201_5% SIO_SLP_S3#
STRAP FOR SPI 1.8V/3.3V SEL CC20 1 @ 2 0.33U_0201_6.3V6M [78] PCH_DPWROK
PCH_DPWROK 2 1 PCH_DPWROK_CPU PCH_RSMRST#_Q RC145 1 2 100K_0201_5%
0_0201_5% RC4029 AC_PRESENT RC146 1 @ 2 10K_0201_5%

INTRUDER# RC147 1 2 100K_0201_5% SIO_SLP_S4#

CC21 1 @ 2 0.33U_0201_6.3V6M
0 = SPI voltage is3.3V
RC150 1 @ 2 100K_0201_5% SIO_SLP_A# ES D @ +3VALW_DSW
1 = SPI voltage is1.8V CC24 1 @ 2 0.33U_0201_6.3V6M
VCCST_PW RGD CC231 2 100P_0201_50V8J

ES D @ ES D @ LANW AKE# RC151 1 2 10K_0201_5%

+RTC_SOC RC152 1 @ 2 100K_0201_5% SIO_SLP_W LAN# H_PROCHOT# CC945 1 2 0.1U_0201_10V6K CPUPW RGD CC25 1 2 100P_0201_50V8J PCH_BATLOW # RC153 1 2 100K_0201_5%
AC_PRESENT RC154 1 2 10K_0201_5%
1M_0201_1% 2 @ 1 RC148 INTRUDER# CC26 1 @ 2 0.33U_0201_6.3V6M ES D @ 2 1K_0201_5%
@E S D @ PCIE_WAKE# RC155 1
10K_0201_1% 2 1 RC149 H_PROCHOT# CC944 1 2 0.1U_0201_10V6K SYS_RESET# CC27 1 2 0.1U_0201_10V6K
0.1U_0201_10V6K 2 @ 1 CC22 RC156 1 2 100K_0201_5% SIO_SLP_SUS#
MOW17
CC28 1 @ 2 0.33U_0201_6.3V6M After Checked MOW17, ESD Request : CC944 place near to RC172 ESD Request:placenear CPU side
Keep original net name and Setting, CC945 place near to D10
No change any circuit and layout. +3VS
RC157 1 @ 2 100K_0201_5% SIO_SLP_S0#

2
RC159 1 2 100K_0201_5% PCH_PLTRST# @
RC275
@E MI @ 100K_0201_5%
H_THERMTRIP# CC29 1 2 0.1U_0201_25V6K RC160 1 @ 2 100K_0201_5% SIO_SLP_S5#
C C

1
@E MI @ CC31 1 @ 2 0.33U_0201_6.3V6M
H_PROCHOT#_R CC30 1 2 0.1U_0201_25V6K RC161 1 @ 20_0201_5%

+3VS

EMI request,Place near CPUside. UC7 @

5
MC74VHC1G08DFT2G_SC70-5
1
[88] VR_READY B PCH_ P W RO K
4
O

GP
VCCST_OVERRIDE_R 0_0201_5%2 1 RC162 VCCST_OVERRIDE 2
[78,79] VCCST_OVERRIDE_R [78] IMVP_VR_ON_P A
0_0201_5%2 1 RC163 VCCSTPWRGOOD_TCSS

3
RC286 1 2 0_0201_5% RESET_OUT# RESET_OUT# [58]

+1.05V_VCCST
UC1D
RC164 2 1 1K_0201_1%H_THERMTRIP#
H_CATERR# J4 P3 SOC_XDP_TCK0
PECI_EC CD5 CATERR# PROC_TCK K5 SOC_XDP_TDI SOC_XDP_TCK0 [79]
RC165 2 1 49.9_0201_1% H_CATERR# [58] PECI_EC
H_PROCHOT# RC1661 2 499_0201_1%H_PROCHOT#_R C3 PECI PROC_TDI K3 SOC_XDP_TDO SOC_XDP_TDI [79]
1 1K_0201_5%VCCST_PWRGD [16,58,82,84,88] H_PROCHOT# H_THERMTRIP# E3 PROCHOT# PROC_TDO P4 SOC_XDP_TMS SOC_XDP_TDO [79]
RC168 2 THRMTRIP# PROC_TMS N1
PLACE 'RA' CLOSE TO MCP - WITHIN 1.5 INCH CRB P.35 SOC_XDP_TRST# SOC_XDP_TMS [79]
RC1672 1 49.9_0201_1% CPU_POPI_RCOMP
CJ41 PROC_TRST# SOC_XDP_TRST# [79] +3VALW_PCH
+1.05V_VCCSTG RC169 2 1 49.9_0201_1% PCH_OPI_RCOMPDU3 PROC_POPIRCOMP N5 SOC_XDP_TRST#
A14 PCH_OPIRCOMP JTAG PCH_TRST# R5 PCH_JTAG_TCK1
RC170 2 @ 1 49.9_0201_1%EDRAM_OPIO_RCOMP 2
B14 RSVD_25 PCH_TCK K1 SOC_XDP_TDI PCH_JTAG_TCK1[79]
RC171 2 @ 1 49.9_0201_1% CPU_EOPIO_RCOMP
RC1722 1 1K_0201_5% H_PROCHOT# RSVD_26 PCH_TDI K2 SOC_XDP_TDO PCH_TDO +3VALW_PCH CC32
DBG_PMODE StrapPin DL15 N3 SOC_XDP_TMS 0.1U_0201_10V6K
DBG_PMODE PCH_TMS N2 SOC_XDP_TCK0 1
PCH_JTAGX

5
I2CTCH@ MEM_INTERLEAVED DV11 UC8
TOUCH_SCREEN_INT#_LCD 1 2 TOUCH_SCREEN_INT# DT11 GPP_E3/CPU_GP0 P6 XDP_PRDY# PCH_PLTRST# 1
[38] TOUCH_SCREEN_INT#_LCD CR38 GPP_E7/CPU_GP1 PROC_PRDY# M6 XDP_PRDY# [79] B
RC292 0_0201_5% TOUCH_PAD_INT# XDP_PREQ# 4
CR39 GPP_B3/CPU_GP2 PROC_PREQ# XDP_PREQ# [79] O PLTRST# [51,52,58,66,68]

G P
TOUCH_SCREEN_PD# 1@2 TOUCH_PANEL_PD# 2
[38] TOUCH_SCREEN_PD# GPP_B4/CPU_GP3 A

1
RC279 0_0201_5% @

0.1U_0201_6.3V6K
1
GPP_E6 Strap Pin DT12 MC74VHC1G08EDFT2G SC705P

CC91 ESD@
GPP_E6 RC173

3
GPP_H2 Strap Pin DJ38
+3VALW_PCH DL38 GPP_H2/CNV_BT_I2S_SDO 100K_0201_5%
GPP_H19/TIME_SYNC04 of19 2

2
ICL-U_BGA1526
RC174 1 2 100K_0201_5%SIO_SLP_S0# +VCC1.05_OUT_FET @

B B
DBG_PMODE RC273 1 2 1K_0201_5%

RC274 1 @ 2 1K_0201_5%
+3VS

I2CTCH@
1 2 TOUCH_SCREEN_INT#
RC291 10K_0402_5%
1 2 TOUCH_PAD_INT# DZ7
RC3956 10K_0402_5% RB751S40T1G_SOD523-2
1 2 TOUCH_PAD_INT#
[58,63] TP_WAKE_KBC#

JTAG ODT DISABLE +3VALW _PCH

MAF/SAF STRAP(eSPI Flash Sharing Mode) RC175 1 @ 2 10K_0201_5%

GPP_E6 GPP_H2/CNV_BT_I2S_SDI(INTERNAL PD 20K) MEM_INTERLEAVED RC176 1 @ 2 10K_0201_5%

0 = JTAGODT DISABLED 0 = MAF (Master Attached Flash)

1 = JTAG ODT ENABLED 1 = SAF (Slave AttachedFlash)

DIMM TYPE
+3VALW _PCH +3VALW _PCH
A A
RC177 1 2 100K_0201_5% RC178 1 @ 2 2.2K_0201_5%GPP_H2
HIGH Interleave
GPP_E6 RC179 1 @ 2 4.7K_0201_5% RC180 1 @ 2 20K_0201_5%
LOW Non-Interleave
EVT2_33

SecuriiityClllassiiifiiicatiiion Compal SecretData Compal Electronics, Inc.

Issued Date 2018/04/01 Deciiiphered Date 2019/04/01 Titlelti

THIS S HE ET O F ENGIIINEERING DRAW IIING IIISTHE P R O P RI ETARY P R O PERTY O F C O MP AL ELECTRONICS,,, IIINC. AND CONTAIIINS CONFIIIDENTIIIAL Siize
WHL-R(5/12)CLK,GPIO
DocumentttNumberrr Rev
AND TR AD E S E C RET IIINFORMATIIION. THIS S HE E T MAY NO T B E TR ANS F E RED F R O M THE C US TO D Y O F THE C O MP E TENT DIVIIISIIION O F R & D
D E P ARTME NT E X C E PT AS AUTHO R I Z E D B Y C O MP AL ELECTRONICS,,, IIINC. NEIIITHER THIS S HE E T NO R THE IIINFORMATIIION IIIT CONTAIIINS MAY
BE US E D BY OR D I S CLO SED TO ANY THIRD P AR TY WIIITHOUT P RI O R W RI TTEN C O NS E NT OF CO MP AL ELECTRONICS,,, IIINC.
Custttom
LA-K033P 0..2

Dattte:::Monday,,, Jullly29,,,2019 Sheettt11 offf101

5 4 3 2 1
 5 4 3 2 1

Main Function: CPU(7/13)

D D

UC1H

CV7 DJ8
CV6 PCIE7_RXN PCIE1_RXN/USB31_1_RXN DJ6 USB3_CRX_DTX_N1 [71]
PCIE7_RXP PCIE1_RXP/USB31_1_RXP USB3_CRX_DTX_P1 [71]
DD3 DJ2
DD5 PCIE7_TXN PCIE1_TXN/USB31_1_TXN DJ1 USB3_CTX_DRX_N1 [71] ---> USB3.0(MB)(Type-A)
PCIE7_T XP PCIE1_TXP/USB31_1_TXP USB3_CTX_DRX_P1 [71]
CT6 DG9
CT7 PCIE8_RXN PCIE2_RXN/USB31_2_RXN DG7 USB3_CRX_DTX_N2 [71]
PCIE8_RXP PCIE2_RXP/USB31_2_RXP USB3_CRX_DTX_P2 [71]
DA3 DJ3
DA5 PCIE8_TXN PCIE2_TXN/USB31_2_TXN DJ5 USB3_CTX_DRX_N2 [71] ---> USB3.0(MB)(Type-A)
PCIE8_T XP PCIE2_TXP/USB31_2_TXP USB3_CTX_DRX_P2 [71]
CP7 PCIe DE7
[51] PCIE_CRX_DTX_N9 CP6 PCIE9_RXN PCIE3_RXN/USB31_3_RXN DE9 USB3_CRX_DTX_N3 [43]
[51] PCIE_CRX_DTX_P9 DA2 PCIE9_RXP PCIE3_RXP/USB31_3_RXP DF3 USB3_CRX_DTX_P3 [43]
LOM---> [51] PCIE_CTX_DRX_N9 DA1
PCIE9_T XN PCIE3_TXN/USB31_3_TXN
DF5
USB3_CTX_DRX_N3 [43] ---> USB3.0(Type-C)
[51] PCIE_CTX_DRX_P9 PCIE9_T XP PCIE3_TXP/USB31_3_TXP USB3_CTX_DRX_P3 [43]
CM7 PCIe/USB3.1 DC7
[52] PCIE_CRX_DTX_N10 CM6 PCIE10_RXN PCIE4_RXN/USB31_4_RXN DC9 USB3_CRX_DTX_N4 [43]
[52] PCIE_CRX_DTX_P10 CY3 PCIE10_RXP PCIE4_RXP/USB31_4_RXP DF2 USB3_CRX_DTX_P4 [43]
WLAN---> [52] PCIE_CTX_DRX_N10 CY4
PCIE10_T XN PCIE4_TXN/USB31_4_TXN
DF1
USB3_CTX_DRX_N4 [43] ---> USB3.0(Type-C)
[52] PCIE_CTX_DRX_P10 PCIE10_T XP PCIE4_TXP/USB31_4_TXP USB3_CTX_DRX_P4 [43]
CK7 DA6
[67] SATA_CRX_DTX_N0
CK6 PCIE11_RXN/SATA0_RXN PCIE5_RXN/USB31_5_RXN DA7
SATA HDD---> [67] SATA_CRX_DTX_P0
[67] SATA_CTX_DRX_N0
CW 2 PCIE11_RXP/SATA0_RXP PCIE5_RXP/USB31_5_RXP DE4
CW 1 PCIE11_TXN/SATA0_TXN PCIE5_TXN/USB31_5_TXN DE3
[67] SATA_CTX_DRX_P0 CJ6 PCIE11_TXP/SATA0_TXP PCIE5_TXP/USB31_5_TXP
[67] SATA_CRX_DTX_NA1 PCIE12_RXN/SATA1A_RXN PCIe/ SATA CY7
CJ7 PCIE6_RXN/USB31_6_RXN CY6
[67] SATA_CRX_DTX_PA1 CW 5 PCIE12_RXP/SATA1A_RXP PCIE6_RXP/USB31_6_RXP DD1
SATA ODD---> [67] SATA_CTX_DRX_NA1 PCIE12_TXN/SATA1A_TXN PCIE6_TXN/USB31_6_TXN DD2
CW 3 PCIE6_TXP/USB31_6_TXP
[67] SATA_CTX_DRX_PA1 CG7 PCIE12_TXP/SATA1A_TXP DN8
[68] PCIE_CRX_DTX_N13 USB20_N1 [71]
C CG6 PCIE13_RXN USB2N_1 DP8 C
[68] PCIE_CRX_DTX_P13
[68] PCIE_CTX_DRX_N13
CT3 PCIE13_RXP USB2P_1 USB20_P1 [71] -----> USB2.0(MB)
[68] PCIE_CTX_DRX_P13 CT5 PCIE13_TXN DK11
PCIE13_T XP USB2N_2 DJ11 USB20_N2 [71]

[68] PCIE_CRX_DTX_N14 CE6 PCIe USB2P_2 USB20_P2 [71] ----->USB2.0(M/B)

CE7 PCIE14_RXN DP13
[68] PCIE_CRX_DTX_P14 USB20_N3 [73]
CT2 PCIE14_RXP USB2N_3 DN13
[68] PCIE_CTX_DRX_N14
[68] PCIE_CTX_DRX_P14 CT1 PCIE14_TXN USB2P_3 USB20_P3 [73] ----->USB2.0(IO/B)
PCIE14_T XP DK10 USB20_N10 [38]
PCIE SSD---> USB2N_4 DJ10
[68] PCIE_CRX_DTX_N15
[68] PCIE_CRX_DTX_P15
CC5
CC6 PCIE15_RXN/SATA1B_RXN
CR3 PCIE15_RXP/SATA1B_RXP
USB2P_4 USB20_P10 [38] ----->TouchScreen
[68] PCIE_CTX_DRX_N15 DL5 USB20_N5 [66]
CR4 PCIE15_TXN/SATA1B_TXN USB2N_5 DL3
[68] PCIE_CTX_DRX_P15 PCIE15_TXP/SATA1B_TXP PCIe / SATA USB2P_5 USB20_P5 [66] ----->Finger Printer
CA6 DP11
[68] PCIE_CRX_DTX_N16 CA5 PCIE16_RXN/SATA2_RXN USB2N_6 DN11 USB20_N6 [38]
[68] PCIE_CRX_DTX_P16
[68] PCIE_CTX_DRX_N16
CP1 PCIE16_RXP/SATA2_RXP USB2.0 USB2P_6 USB20_P6 [38] -----> CCD
CP2 PCIE16_TXN/SATA2_TXN DK13
[68] PCIE_CTX_DRX_P16 USB20_N7 [73]
PCIE16_TXP/SATA2_TXP USB2N_7 DJ13
DW 12
USB2P_7 USB20_P7 [73] -----> Card Reader(IO/B)
SATA_ODD_PRSNT# CR42 GPP_E0/SATAXPCIE0/SATAGP0 DN6
+3VALW _PCH
67 SATA_ODD_PRSNT#
68 M2_SSD_PEDET
M2_SSD_PEDET CR43 GPP_A12/SATAXPCIE1/SATAGP1
GPP_A13/SATAXPCIE2/SATAGP2
USB2N_8
USB2P_8
DP6
USB20_N8
USB20_P8
[43]
[43] ---->Type-C
USB_OC0# DW 14 DL2
[71] USB_OC0# GPP_E9/USB_OC0# USB2N_9
USB_OC3# CT 43 DL1
10K_0201_5% 2 1 RC181 USB_OC0# GPP_A16/USB_OC3# USB2P_9
10K_0201_5% 2 1 RC182 USB_OC3# DU12 DP10
[67] HDD_DEVSLP GPP_E4/DEVSLP0 USB2N_10 USB20_N4 [52]
DU11 DN10
CV48 GPP_E5/DEVSLP1 USB2P_10 USB20_P4 [52] ----->BT
[68] SSD_DEVSLP GPP_A11/SATA_DEVSLP2 DL6 USB2_ID RC1831 2 10K_0201_5%
USB_ID
GPIO DEVICE CONTROL DT 38
DW 38 GPP_H12/M2_SKT2_CFG0 DL11 USB2_VBUSSENSE RC1841 DN5 2 10K_0201_5%
USB_OC0# USB Port (MB) DV38 GPP_H13/M2_SKT2_CFG1 USB_VBUSSENSE
DU38 GPP_H14/M2_SKT2_CFG2 USB2_COMP RC1851 2 113_0201_1%
GPP_H15/M2_SKT2_CFG3 USB2_COMP
USB_OC1# USB Port (DB)
B 100_0201_1% 2 1 RC186 PCIE_RCOMPN DN1 CD3 B
PCIE_RCOMPP DN3 PCIE_RCOMPN RSVD_81
USB_OC2# Type-C PCIE_RCOMPP
USB_OC3# NA 8of19
ICL-U_BGA1526
DEVSLP0 HDD @

DEVSLP1 NA
DEVSLP2 M.2 SSD

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2018/04/01 DecipheredDate 2019/04/01 Tiiitttlle

THIIIS S HE E T OF ENGIIINEERIIING DRAW IIING IIIS THE PROPRIIIETARY P ROP E RTY OF COM P A L ELECTRONIIICS,,, IIINC...A ND CONTAIIINS CONFIDE NTIA L Siiize Documenttt Number
WHL-U(6/12)GPIO
A ND TRA DE S E CRE T IIINFORMATION... THIIIS S HE ET M A Y NOT B E TRA NS FE RED FROM THE CUS TODY OF THE COM P E TE NT DIIIVIIISIIION OF R& D Rev
DE P A RTM E NT E X CE PT AS AUTHORIIIZED B Y COM P A L ELECTRONIIICS,,, IIINC... NEIIITHER THIIIS S HE ET NOR THE IIINFORMATION IIIT CONTAIIINS M A Y Custttom
BE US E D BY OR DIIISCLOSED TO A NY THIIIRD P A RTY WIIITHOUT PRIIIOR W RIIITTEN CONS E NT OF COM P A L ELECTRONIIICS,,, IIINC... LA-K033P 0..2

Dattte::: Monday,,, Jullly29,,, 2019 Sheettt 12 offf101

5 4 3 2 1
 5 4 3 2 1

Main Function: CPU(8/13)

UC1I

D12 DP27
C12 CSI_E_CLK_N GPP_F8/EMMC_DATA0 DU30
B12 CSI_E_CLK_P GPP_F9/EMMC_DATA1 DT30
D A12 CSI_E_DN_0 D
GPP_F10/EMMC_DATA2 DT29
G13 CSI_E_DP_0 GPP_F11/EMMC_DATA3 DV30
F13 CSI_E_DN_1 GPP_F12/EMMC_DATA4 DU29
CSI_E_DP_1 GPP_F13/EMMC_DATA5 DW 30
K10 eMMC GPP_F14/EMMC_DATA6 DW 29
L10 CSI_F_CLK_N
GPP_F15/EMMC_DATA7 DV28
L8 CSI_F_CLK_P
GPP_F7/EMMC_CMD DW 28
M8 CSI_F_DN_0 GPP_F16/EMMC_RCLK DN27
M11 CSI_F_DP_0 GPP_F17/EMMC_CLK DT28
L11 CSI_F_DN_1 GPP_F18/EMMC_RESET# DU28EMMC_RCOMP RC3954 2 1 200_0402_1%
CSI_F_DP_1 EMMC_RCOMP
D9
C9 CSI_D_CLK_N DV45
A7 CSI_D_CLK_P CNV_W T_D0N DU45 CNV_CTX_DRX_N0 [52]
B7 CSI_D_DN_0 B9 CNV_W T_D0P DU44 CNV_CTX_DRX_P0 [52]
CSI_D_DP_0 CNV_W T_D1N DT44 CNV_CTX_DRX_N1 [52]
CNV_W T_D1P DL42 CNV_CTX_DRX_P1 [52]
A9 CSI_D_DN_1 CNV_W T_CLKN DK42 CLK_CNV_CTX_DRX_N[52]
D7 CSI_D_DP_1 CNV_W T_CLKP CLK_CNV_CTX_DRX_P [52]
C7 CSI_D_DN_2/CSI_C_DN_0
DC8CCSSI_I_DD__DDNP__32/CCSSI__CC__CDLPK__0N CSI2 CNV_W R_D0N
DP44
DN44
CNV_CRX_DTX_N0 [52]
CNVi
CSI_D_DP_3/CSI_C_CLK_P CNV_CRX_DTX_P0 [52]
CNV_W R_D0P DG42
CNV_CRX_DTX_N1[52]
G11 CNV_W R_D1N DG44
J11 CSI_H_CLK_N CNV_W R_D1P DK44 CNV_CRX_DTX_P1 [52]
CNV_W R_CLKN DJ44 CLK_CNV_CRX_DTX_N[52]
F6 CSI_H_CLK_P CNVi CLK_CNV_CRX_DTX_P [52]
G6 CSI_H_DN_0 CNV_W R_CLKP
G10 CSI_H_DP_0 DT45 CNV_WT_RCOMP RC187 1 2 150_0201_1%
F10 CSI_H_DN_1 CNV_W T_RCOMP
G8 CSI_H_DP_1 DL29 CNV_BRI_CRX_DTX
J8 CSI_H_DN_2/CSI_G_DN_0 K6 GPP_F1/CNV_BRI_RSP/UART0_RXD DP31Sttrap Piin CNV_RGI_CTX_DRX CNV_BRI_CRX_DTX [52]
CSI_H_DP_2/CSI_G_DP_0 GPP_F2/CNV_RGI_DT/UART0_TXD DL31Sttrap Piin CNV_BRI_CTX_DRX CNV_RGI_CTX_DRX [52]
L6 CSI_H_DN_3/CSI_G_CLK_N GPP_F0/CNV_BRI_DT/UART0_RTS# DN29 CNV_RGI_CRX_DTX CNV_BRI_CTX_DRX [52]
CSI_H_DP_3/CSI_G_CLK_P GPP_F3/CNV_RGI_RSP/UART0_CTS# CNV_RGI_CRX_DTX [52]
100_0201_1%2 1 RC188 CSI_RCOMP B4 DJ29 GPP_F4 2 @ 1
TP@ CSI_RCOMP GPP_F4/CNV_RF_RESET# DP29 0_0201_5% RC189
1 DT34 GPP_F6/CNV_PA_BLANKING DL27 GPP_F19
PAD~D TP182 GPP_F19/A4WP_PRESENT DK29
DP38 GPP_D4/IMGCLKOUT0 GPP_F5
DK36 GPP_H20/IMGCLKOUT1 GPP_F5/MODEM_CLKREQ

WHL有 有
DL36 GPP_H21/IMGCLKOUT2 +1.8V_PRIM
DN38 GPP_H22/IMGCLKOUT3
GPP_H23/IMGCLKOUT4

C CNV_BRI_CRX_DTX RC190 C
1 @ 2 20K_0201_5%
9 of19 CNV_RGI_CRX_DTX RC191 1 @ 2 20K_0201_5%
ICL-U_BGA1526
@

GPP_F19 RC3955 2 1 75K_0201_1%

CNV_RGI_CTX_DRX CNV_BRI_CTX_DRX
GPP_F19 Pull down 75K pop
Follow Intel MOWWW03 M.2 CNVIMODES XTALSEL
0 = Integrated CNVienable. 0 = 38.4/19.2MHZ(DEFAULT)
1 = Integrated CNVidisable. 1 = 24MHZ(25 MHZ WHEN XTAL FREQ DIVIDERNON ZERO)
NO INTERNALPU/PD WEAK INTERNAL PD20K
+1.8V_PRIM +1.8V_PRIM

CNV_RGI_CTX_DRX RC373 1 2 100K_0402_5% CNV_BRI_CTX_DRX RC3950 1 @ 2 4.7K_0402_5%

RC374 1 @ 2 4.7K_0402_5% RC3951 1 @ 2 20K_0402_5%

B B

A A

SecuriiityClllassiiifiiicatiiion Compal SecretData Compal Electronics, Inc.

Issued Date 2018/04/01 Deciiiphered Date 2019/04/01 Tiitttlle

THIS S HE ET O F ENGIIINEERING DRAW IIING IIISTHE P R O P RI ETARY P R O PERTY O F C O MP AL ELECTRONICS,,, IIINC. AND CONTAIIINS CONFIIIDENTIIIAL S izeDocumentttNumberrr
WHL-U(7/12)POWER
AND TR AD E S E C RET IIINFORMATIIION. THIS S HE E T MAY NO T B E TR ANS F E RED F R O M THE C US TO D Y O F THE C O MP E TENT DIVIIISIIION O F R & D
Rev
D E P ARTME NT E X C E PT AS AUTHO R I Z E D B Y C O MP AL ELECTRONICS,,, IIINC. NEIIITHER THIS S HE E T NO R THE IIINFORMATIIION IIIT CONTAIIINS MAY
BE US E D BY OR D I S CLO SED TO ANY THIRD P AR TY WIIITHOUT P R I O R W RI TTEN C O NS E NT OF C O MP AL ELECTRONICS,,, IIINC.
Custttom
LA-K033P 0.2

Dattte:::Monday,,,Jullly29,,, 2019 Sheettt13 offf101

5 4 3 2 1
 5 4 3 2 1

Main Function: CPU(9/13)

+VCCIN 1.The total Length of Data and Clock (from CPU to each VR) must be equal (±0.1 inch).
D
2.Route the Alert signal between the Clock and the Data signals. D
CAD Note: Place the PU resistors close to CPU
Max1.89V/62A(Processor EDS 572795 rev 1.2)
UC1L +1.05V_VCCST

A19 CPU POWER 1 OF3 CJ35

AC12 VCCIN_1 VCCIN_52 CK10
V13 VCCIN_2 VCCIN_53 J32

1
W12 VCCIN_3 VCCIN_54 CL34 SVID DATA RC192
Y13 VCCIN_4 VCCIN_55 CL35
100_0201_1%
K29 VCCIN_5 VCCIN_56 CN34 +VCCIN
K31 VCCIN_6 VCCIN_57 CN35
VCCIN_7 VCCIN_58 CP33

2
B19
B23 VCCIN_8 VCCIN_59 CR34
B27 VCCIN_9 VCCIN_60 A29 SOC_SVID_DAT 2@ 1
B29 VCCIN_10 VCCIN_61 CR35 VR_SVID_DATA [88]
VCCIN_11 VCCIN_62 CT33 2 2 2 2 2 2 0_0201_5% RC193
BN10
VCCIN_12 VCCIN_63
CT34

RF@
CC930

RF@
CC931

RF@
CC932

RF@
CC933

RF@
CC934

RF@
CC935
BP11 VCCIN_13 VCCIN_64 CT35
BP9 VCCIN_14 VCCIN_65
BR10 CU33 1 1 1 1 1 1
VCCIN_15 VCCIN_66
BT11 VCCIN_16 VCCIN_67 D19 +1.05V_VCCST
A21 VCCIN_17

10P_0201_25V8

10P_0201_25V8

10P_0201_25V8

10P_0201_25V8

10P_0201_25V8

10P_0201_25V8
VCCIN_68 D21
BT9 VCCIN_18 VCCIN_69 D23
BU10 VCCIN_19 VCCIN_70 D24
C C

1
BV36 VCCIN_20 VCCIN_71 D27
BV9 VCCIN_21
VCCIN_22
VCCIN_72 AA12 SVID ALERT# RC194
BW 10 VCCIN_73 D29 56_0201_5%
BW 36 VCCIN_23 VCCIN_74 F19
BW 9 VCCIN_24 VCCIN_75 F21

2
BY10 VCCIN_25 VCCIN_76 F23
C19 VCCIN_26 VCCIN_77 F24
C23 VCCIN_27 VCCIN_78 F27 SOC_SVID_ALERT# 2@ 1
A23
VCCIN_28
VCCIN_29
VCCIN_79 F29
VCCIN_80 G1
RF Request 0_0201_5% RC195
VR_SVID_ALERT# [88]
C27 VCCIN_30 VCCIN_81 G19
C29 VCCIN_31 VCCIN_82 G23
CA36 VCCIN_32 VCCIN_83
CA9 AB1
VCCIN_33 VCCIN_84 G27
CB10 VCCIN_34 VCCIN_85 +1.05V_VCCST
CC11 VCCIN_35 VCCIN_86 G29
CC36 VCCIN_36 VCCIN_87 H19
CC9 VCCIN_37 VCCIN_88 H23

1
CD10 VCCIN_38 VCCIN_89 H27
CE11 VCCIN_39 VCCIN_90 H29 SVID CLK
A24 VCCIN_40 VCCIN_91 J18 RC196@
CE34 VCCIN_41 VCCIN_92 J20 100_0201_5%
CE35 VCCIN_42 VCCIN_93 J22

2
CF10 VCCIN_43 VCCIN_94 J23
B CF33 VCCIN_44 VCCIN_95 AB13 B
CG11 VCCIN_45 VCCIN_96 J26 SOC_SVID_CLK 2@ 1
VCCIN_46 VCCIN_97 J28 VR_SVID_CLK [88]
CG34 0_0201_5% RC197
CG35 VCCIN_47 VCCIN_98 K17
CH10 VCCIN_48 VCCIN_99 K19
1
VCCIN_49 VCCIN_100 K21
J30 VCCIN_50 VCCIN_101 K23
CJ11 CC90 @ R F @
A27 VCCIN_51 VCCIN_102 K24 33P_0201_50V8J
12 of 19 VCCIN_103 2
CJ34 K27
VCCIN_104 M1 Trace LengthMatch<25 mils
U1 Must be routedas differential pair to VR
SOC_SVID_ALERT# H1
SOC_SVID_CLK H2 VIDALERT# F17 VCCIN_SENSE_R RC198 1 @ 2 0_0201_5%
SOC_SVID_DAT H3 VIDSCK VCCIN_SENSE G17
VSSIN_SENSE_R RC1991 @ 2 0_0201_5% VCC_SENSE_VCCIN [88]
VIDSOUT VSSIN_SENSE VSS_SENSE_VCCIN [88]
ICL-U_BGA1526
@

A A

SecurityClassification Compal Secret Data Compal Electronics,Inc.

Issued Date 2018/04/01 Deciphered Date 2019/04/01 Title

T HIS SHEET OF ENG INEERING DRAW ING IS T H E PRO PRIET ARY P R O P E R T Y OF C O M P A L ELECT RO NICS, INC. A N D CO NT AINS CO NFIDENT IAL
WHL-U(8/12)POWER
A N D T R A D E SECRET INFO RMAT IO N. T HIS SHEET M A Y N O T BE T R A N S F E R ED F R O M T H E C U S T O D Y OF T H E C O M P E T E N T DIVISION OF R & D Size Document Number Rev
D E P A R T M E N T EXCEPT AS AUT HO RIZED B Y C O M P A L ELECT RO NICS, INC. NEIT HER T HIS SHEET N O R T H E INFO RMAT IO N IT CO NT AINS B
M A Y BE U S E D BY OR DISCLO SED TO A N Y T HIRD P A R T Y W IT HO UT PRIO R W RIT T EN C O N S E N T OF C O M P A L ELECT RO NICS, INC.
LA-K033P 0.2

Date: Monday,July29,2019 Sheet 14 of 101

5 4 3 2 1
 5 4 3 2 1

Main Function: CPU(10/13)

D D

6/14 reserve for EMI request

+1.2V_DDR
+1.2V_DDR +1.2V_DDR
EMC CAPS +1.2V_DDR

PLACE <160mil FROM SOC VDDQ,

WITH EACH PAIR <470mil APART

CC952 @EMI@

CC953 @EMI@
CC33

CC34

CC35

CC36

CC37

CC38

CC39

CC40

CC41

CC42

CC43

CC44

CC45

CC46

CC47

CC48

CC49

CC50

CC51

CC52

CC53

CC54

CC55

CC56

CC57
111111111 1 111 1 1 1 1 1 1 1 1 1 1 1 1 1 1

22222222 2 2 222 2 2 2 2 2 2 2 2 2 2 2 2 2 2
@ @ @

@[email protected]_0201_25V8C

@[email protected]_0201_25V8C

@[email protected]_0201_25V8C
EMI@12P_0201_25V8J

EMI@12P_0201_25V8J

EMI@12P_0201_25V8J

0.1U_0402_10V7K

0.1U_0402_10V7K
@EMI@12P_0201_25V8J

@EMI@12P_0201_25V8J

@EMI@12P_0201_25V8J
[email protected]_0201_25V8C

[email protected]_0201_25V8C

[email protected]_0201_25V8C
10U_0402_10V6M

10U_0402_10V6M

10U_0402_10V6M

10U_0402_10V6M

10U_0402_10V6M

22U_0603_6.3V6M

22U_0603_6.3V6M
1U_0201_6.3V6K

1U_0201_6.3V6K

1U_0201_6.3V6K

1U_0201_6.3V6K

1U_0201_6.3V6K

1U_0201_6.3V6K
Primary side cap
C
Follow PDG rev1.1 P.545 C

+1.2V_DDR

1.1V/3.5A(Processor EDS 572795 rev 1.2)

UC1M

AA37 CPUPOWER 2 OF 3 BP39

AG36 VDDQ_1 VDDQ_31 BR37
AJ36 VDDQ_2 VDDQ_32 BT38
AL36 VDDQ_3 VDDQ_33 AC35
AL49 VDDQ_4 VDDQ_34 BU37
+VCCST_CPU +VCCSTG_CPU AN36 VDDQ_5 VDDQ_35 BU49
AP37 VDDQ_6 VDDQ_36 CA39
AR36 VDDQ_7 VDDQ_37 CB49
AR37 VDDQ_8 VDDQ_38 L38
AT36 VDDQ_9
VDDQ_39 L49
1 1 1 1 AT49 VDDQ_10
VDDQ_40 N36
AA49 VDDQ_11 VDDQ_41 T49
CC58 @ CC59 CC60 @ CC61 AV36 VDDQ_12
1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M VDDQ_42 AC37
2 AW 37 VDDQ_13
2 2 2 VDDQ_43 AD35
AY36 VDDQ_14 VDDQ_44 AD36
BA37 VDDQ_15
VDDQ_465AAFE4936
BA49 VDDQ_16 VDDQ_47
BB36 VDDQ_17 C33
BD36 VDDQ_18 RSVD_78 C33,A33,B33 is RSVD
BE37 VDDQ_19 A33 Intel recommended NC VCC1P8A shape from VR to VCC1P8A pins should have:
BF36 VDDQ_20 RSVD_2 B33 +1.8V_PRIM a. total length L of < 22mm between VR and BGA.
RSVD_3
+VCCST_CPU +1.05V_VCCST BF37 VDDQ_21 b. Average width W of 1.8mm.
BG9 +1.8V_PRIM
AB36 VDDQ_22 VCC1P8A_1 BJ9
BF49 VDDQ_23 1.8V/0.7A
VCC1P8A_2 BM9
1 @2 BG36 VDDQ_24 VCC1P8A_3 BW 1
RC200 0_0603_5%
BJ36 VDDQ_25 VCC1P8A_4 BW 2
VDDQ_26 +VCCSTG_OUT
BL37 VCC1P8A_5
BBMP4398 VVDDDDQQ__2297 1 1 1
+VCCST_CPU R35
BN37 VVDDDDQQ__2380 VCCSTG_OUT_3 V34
+VCCSTG_OUT_LGC +1.05V_VCCSTG CC62 CC63 @ CC64 @
+VCCSTG_CPU CB1
VCCST
VCCSTG_OUT_4 T34 DVT1.2_12 10U_0402_10V6M 22U_0603_6.3V6M 10U_0402_10V6M
1.05V/0.8A VCCSTG_OUT_5 U35 2 2 2
1 @2 BY1 VCCSTG_OUT_6 AB34
B VCCSTG_OUT_7 W 35 RSVD_W 35 1 B
VCCSTG
RC201 0_0603_5% 1.05V/0.15A TP13TP@ PAD~D
+VCCSTG_OUT RSVD_74 AA35 RSVD_AA351
RSVD_75 Y34 RSVD_Y341 TP14TP@ PAD~D
RSVD_76 TP15TP@ PAD~D +VCC1P05_OUTPUT_PLL
F33
+VCCSTG_OUT_LGC G33 VCCSTG_OUT_1 +VCCPLL_OC
VCCSTG_OUT_2 CD2 +VCCPLL_OC
+VCCSTG_OUT E5 VCCPLL 1.05V/0.09A
VCCSTG_OUT_LGC CG38
VCCPLL_OC_1 CG41 1.2V/0.16A
VCCPLL_OC_2 CG42 1 1 1
VCCPLL_OC_3 CG49 +VCCIO_OUT
VCCPLL_OC_4 @
1 CC65 CC66 CC67 @
AD7 1U_0201_6.3V6M 1U_0201_6.3V6M 1U_0201_6.3V6M
CC68 13 of19 VCCIO_OUT 2 2 2
1U_0201_6.3V6M ICL-U_BGA1526
2
@
@

+VCC1P05_OUTPUT_PLL

1 1
CC69 CC70 @
1U_0201_6.3V6M 1U_0201_6.3V6M
2 2

A A

SecuriiityClllassiiifiiicatiiion Compal SecretData Compal Electronics, Inc.

Issued Date 2018/04/01 Deciiiphered Date 2019/04/01 Tiitttlle

THIS S HE ET O F ENGIIINEERING DRAW IIING IIISTHE P R O P RI ETARY P R O PERTY O F C O MP AL ELECTRONICS,,, IIINC. AND CONTAIIINS CONFIIIDENTIIIAL S izeDocumentttNumberrr
WHL-U(9/12)Power
AND TR AD E S E CRET IIINFORMATIIION. THIS S HE E T MAY NO T B E TR ANS F E RED F R O M THE CUS TO D Y O F THE C O MP E TENT DIVIIISIIION O F R& D
Rev
DE P ARTME NT E X CE PT AS AUTHO R I Z E D B Y C O MP AL ELECTRONICS,,, IIINC. NEIIITHER THIS S HE E T NO R THE IIINFORMATIIION IIIT CONTAIIINS Custttom LA-K033P 0.2
MAY BE US E D BY OR DI S CLO SED TO ANY THIRD PAR TY WIIITHOUT P R I O R W R I TTEN CO NS E NT OF C O MP AL ELECTRONICS,,, IIINC.
Dattte:::Monday,,,Jullly29,,, 2019 Sheettt15 offf101
5 4 3 2 1
 5 4 3 2 1

Main Function: CPU(11/13)

+VCCIN_AUX

D
2 2 2 2 2 2
1.8V/27 A(PCH EDS 572631 rev 1.0) +1.05V_VCCDSW +3VALW_PCH D
+VCCIN_AUX
+3VALW_PCH
RF@
CC936 10P_0201_25V8

RF@
CC937 10P_0201_25V8

RF@
CC938 10P_0201_25V8

RF@
CC939 10P_0201_25V8

RF@
CC940 10P_0201_25V8

RF@
CC941 10P_0201_25V8
UC1N breakout with a 3.8mm width plane
1 1 1 1 1 1
AH1 CPU POWER 3 OF 3 DF23
DG26 1 1 1
AW 10 VCCIN_AUX_1 VCCPRIM_3P3_2 3.3V/0.202A
VCCIN_AUX_2 VCCPRIM_3P3_3 DG28
AY11 CC71 CC72 @ CC73 @
AY9 V CCIN_AUX_3 VCCPRIM_3P3_4 1U_0201_6.3V6M PLACE NEAR DF23 1U_0201_6.3V6M 0.1U_0201_10V6K
BA10 V CCIN_AUX_4 +VCCPRIM_1P8 2 PLACE NEAR DD34 2 2 PLACE NEAR DG26
BB9 VCCIN_AUX_5
DF15
CH1 V CCIN_AUX_6 VCCPRIM_1P8_2 DF17
CK11 VCCIN_AUX_7 1.8V/1.3A
CL10 VCCIN_AUX_8 VCCPRIM_1P8_3 DF18
+VCCIN_AUX CM11 VCCIN_AUX_9 VCCPRIM_1P8_4 DF20
CN1 VCCIN_AUX_10 VCCPRIM_1P8_5 DG17 +VCCDPHY_1P24
VCCIN_AUX_11 VCCPRIM_1P8_6 DG18 +VCCPRIM_1P8 +1.8V_PRIM
AJ1 VCCIN_AUX_12
CN10 VCCPRIM_1P8_7 DG20
VCCIN_AUX_13 VCCPRIM_1P8_8 DF34 breakout with a 5mm width plane
CP11 VCCPRIM_1P8_9
VCCIN_AUX_14 1 @2
2 2 2 2 2 2 CR10
1 RC202 0_0603_5%
CT11 VCCIN_AUX_15
RF@
CC94610P_0201_25V8

RF@
CC94710P_0201_25V8

RF@
CC94810P_0201_25V8

RF@
CC94910P_0201_25V8

RF@
CC95010P_0201_25V8

RF@
CC95110P_0201_25V8
1 1 1
CU10 VCCIN_AUX_16 +VCCLDOSTD_OUT_0P85 CC74
1 1 1 1 1 1 CV1 VCCIN_AUX_17 4.7U_0402_6.3V6M CC75 @ CC76 @ CC77 @
CV11 VCCIN_AUX_18 +VCCA_CLKLDO_1P8 2 PLACE NEAR DW32
DW 37 1U_0201_6.3V6M 1U_0201_6.3V6M1U_0201_6.3V6M
CW 10 VCCIN_AUX_19 VCCLDOSTD_0P85 0.85V/TBDA WITHIN 3MM FROM PLACE NEAR DG20 2 2 2
CY11 VCCIN_AUX_20 DW 15 +VCCDPHY_1P24 PACKAGE
VCCIN_AUX_21 VCCA_CLKLDO_1P8 1.8V/0.165A
DC1
AL1 VCCIN_AUX_22 DW 32 +1.05V_VCCDSW
P13 VCCIN_AUX_23 VCCDPHY_1P24 1.24V/TBDA
VCCIN_AUX_24 DD34 +VCC1.05_OUT_FET
R12 VCCDSW_1P05
1.05V/TBDA PDG p.545 use XFL4012-601ME
T13 VCCIN_AUX_25
BY2
U12 VCCIN_AUX_26 VCC1P05_1 CB2 1.05V/TBDA SDS p.23 use UHP252012 , now use
DC11 VCCIN_AUX_27 VCC1P05_2 CC1 +VCC1P05_OUTPUT_PLL
DE12 VCCIN_AUX_28 VCC1P05_3 CRB p.62 use 0.6UH/5A
+VCCLDOSTD_OUT_0P85
RFRequest DF12 VCCIN_AUX_29
VCCPLL
CD1
+VCCA_CLKLDO_1P8
GND shield around the VCC trace routing
+1.8V_PRIM
AM1 VCCIN_AUX_30 1.05V/0.09A
AN1 VCCIN_AUX_31 DG31
AT11 VCCIN_AUX_32 VCCPRIM_1P05_1 0.68UH_UHP252012NF-R68M_3A_20% 1 @ 2 LC1
Trace Length Match<25 mils AT9 VCCVICNC_AINU_XA_U3X5_33 DG29 1 1 PLACE NEAR DW15
V C CII N__AAUUXX__3346 VCCPRIM_1P05_2 TP174 0.8mm width plane
C Must be routed as differential pair to VR AU10 V C C N C
RC203 1 @ 2 0_0201_5% VCC_SENSE_AUX_R BF9 DF29 +VCC1.05_OUT_PCH CC78 CC79 1 @2
[91] VCC_SENSE_AUX BD9 VCCIN_AUX_VCCSENSE VCCPRIM_1P05_3

1
RC205 1 @ 2 0_0201_5% VSS_SENSE_AUX_R 1U_0201_6.3V6K 1U_0201_6.3V6K RC204 0_0603_5%
[91] VSS_SENSE_AUX VCCIN_AUX_VSSSENSE DF31 +VCCPRTC_3P3 2 PLACE NEAR DW37
2 1
+V1.05A_BYPASS VCCPRIM_1P05_4 1.05V/TBDA WITHIN 3MM FROM
PACKAGE RC206
DG33 +3VALW_DSW CC80 @ 0.1_0402_1%
+VNN_BYPASS DJ15 VCCRTC 3.3V/0.002A 1U_0201_6.3V6M
1.05V/0.2A VCC_V1P05EXT_1P05

2
DE31 +3V_1.8V_HDA 2
1
+VCCPFUSE_3P3 CY34 VCCDSW _3P3 3.3V/0.004 A
1.05V/0.2A VCC_VNNEXT_1P05 DF26 CC81
+VCCPRIM_1P8 DC33 VCCPGPPR 3.3V,1.8V,1.5V/0.005A 47U_0603_6.3V6M
VCCPRIM_3P3_1 CL38 AUX_VID0_R RC207 1 @ 2 0_0201_5%AUX_VID0 2
DD35 GPP_B0/CORE_VID0 CJ38 AUX_VID1_R AUX_VID0 [78,91]
+V3.3A_1.8A_PCH_SPI VCCPRIM_1P8_1 RC208 1 @ 2 0_0201_5% AUX_VID1 RC2091 @ 2
GPP_B1/CORE_VID1 CN38 VRALERT# AUX_VID1 [78,91]
GPP_B2/VRALERT# 0_0201_5%VRALERT#_R
DB34 +VCCPRTC_3P3 +RTC_SOC
VCCSPI
3.3V/0.003A
14 of19 2.6mm width plane RC210
ICL-U_BGA1526 1@ 2 +3VALW_DSW +3VALW_PCH
@
0_0402_5% breakout with a 1.4mm width plane
1 1 1@2
RC284 0_0402_5%
CC82 CC83 1
0.1U_0201_10V6K 1U_0201_6.3V6M
PLACE NEAR DG33 2 2 CC84 @
1U_0201_6.3V6M
1uF cap should place after the 0.1uF cap. 2 PLACE NEAR DE31

0.1uF cap should place before the 1uF cap.

Power reserved
+3VALW_PCH
For volume segment platform this rail is disabled. +1.8V_PRIM
Keep the pin floating (do not short this pin to ground).

2
+3VALW_PCH +V3.3A_1.8A_PCH_SPI
RC211 +3VALW
+V1.05A_BYPASS RC214 20K_0201_5%
B 0_0402_5% AUX_VID0 @ RC2122 1 10K_0201_5% B
RC213 1 @ 2 100K_0201_5% 1@2

1
+VNN_BYPASS D10 @ RC2152 1 10K_0201_5%
VRALERT#_R 1 2 AUX_VID0 RC216 2 @ 1 10K_0201_5%
1 H_PROCHOT# [11,58,82,84,88]
RC217 1 @ 2 100K_0201_5% +1.8V_PRIM RC220 CC85 @ AUX_VID1 RC218 2 @ 1 10K_0201_5% AUX_VID1 @ RC2192 1 10K_0201_5%
0_0402_5% 0.1U_0201_10V6K RB751S40T1G_SOD523-2
1@2 @ RC2212 1 10K_0201_5%
2

Follow #575759 p.32

+3VALW_PCH RC222 LC2 +3V_1.8V_HDA

+3VALW_PCH 0_0402_5% BLM18EG221TN1D_2P~D
1 @ 2 +3V_1.8V_HDA_R1 2
Close toRC164
1
+1.8V_PRIM RC223
2
RF@
2
RF@ 1 Refer
@CC86
10P_0201_25V8
0_0402_5%
1 @2
CC87
2.2P_0201_25V
CC88
2.2P_0201_25V
CC89
0.1U_0201_10V6K
575034_ICL_U42_DDR4_T3_6L_Core_Schematics_Rev0p7.pdf
2 1 1
2
Place on CPU Side Place on opposite of CPU Side
22uF* 2 + 22uF* 1 (Reserved) 1uF* 8
EVT2_35 10uF* 2
+3VALW_PCH +VCCPFUSE_3P3 +1.2V_DDR +1.2V_DDR +1.2V_DDR

RC224
0_0402_5%
1@ 2

1U_0201_10V6M

1U_0201_10V6M

1U_0201_10V6M

1U_0201_10V6M

1U_0201_10V6M

1U_0201_10V6M
1U_0201_10V6

1U_0201_10V6
22U_0603_6.3V6M

22U_0603_6.3V6M

10U_0402_6.3V6M

CC290

CC291

CC292

CC293

CC294

CC295

CC296

CC297
1 1 1 1 1 1 1 1 1 1 1 1 1
22U_0603_6.3V6K

10U_0402_6.3V6M
CC190

CC191

CC236
CC189

CC235
A @ A

M
2 2 2 2 2 2 2 2 2 2 2 2 2

SecuriiityClllassiiifiiicatiiion Compal SecretData Compal Electronics,Inc.

Issued Date 2018/04/01 Deciiiphered Date 2019/04/01 Tiitttlle

THIS S HE ET O F ENGIIINEERING DRAW IIING IIISTHE P R O P RI ETARY P R O PERTY O F C O MP AL ELECTRONICS,,, IIINC. AND CONTAIIINS CONFIIIDENTIIIAL S izeDocumentttNumberrr
W HL-R(10/12)POWER,SVID
AND TR AD E S E CRET IIINFORMATIIION. THIS S HE E T MAY NO T B E TR ANS F E RED F RO M THE C US TO D Y O F THE C O MP E TENT DIVIIISIIION O F R& D D
Rev
E P ARTME NT E X C EPT AS AUTHO R I Z E D B Y C O MP AL ELECTRONICS,,, IIINC. NEIIITHER THIS S HE ET NO R THE IIINFORMATIIION IIIT CONTAIIINS
MAY BE US E D BY OR DI S CLO SED TO ANY THIRD PAR TY WIIITHOUT P R I O R W R I TTEN CO NS E NT OF C O MP AL ELECTRONICS,,, IIINC.
LA-K033P 0.2

Dattte:::Monday,,,Jullly29,,, 2019 Sheettt16 offf101

5 4 3 2 1
 5 4 3 2 1

Main Function: CPU(12/13)

UC1O UC1P UC1Q
GND 1 OF 3 GND 2 OF 3 DJ33 GND 3 OF 3 F11
A11 AF45 BT3 CR37 DJ36 VSS_297 VSS_362 F31
A46 VSS_1 VSS_75 AF47 BT39 VSS_149 VSS_223 CR45 DJ42 VSS_298 VSS_363 F45
BA45 VSS_2 VSS_76 AG1 BT41 VSS_150 VSS_224 CR49 DK3 VSS_299 VSS_364 F47
VSS_3 VSS_77 BT42 VSS_151 VSS_225 CT37
BA47 AG11 DK4 VSS_300 VSS_365 F8
BB11 VSS_4 VSS_78 AG3 BT43 VSS_152 VSS_226 CT39 DK49 VSS_301 VSS_366 G21
BB3 VSS_5 VSS_79 AG38 BT7 VSS_153 VSS_227 CT42 DK6 VSS_302 VSS_367 G24
VSS_6 VSS_80
D BB7 VSS_81 AG39 BU45 VSS_154 VSS_228 CT9 DK8 VSS_303 VSS_368 G3 D
BC37 VSS_7
VSS_8 VSS_82 AG41 BU47 VSS_155 VSS_229 CU45 DL10 VSS_304 VSS_369 G31
BD3 VSS_9 VSS_83 A31 BV1 VSS_156 VSS_230 CU47 DL13 VSS_305 VSS_370 G36
BD38 VSS_10 VSS_84 AG42 BV11 VSS_157 VSS_231 CU49 DL44 VSS_306 VSS_371 G49
BD39 VSS_11 VSS_85 AG43 BV2 VSS_158 VSS_232 CV3 DL47 VSS_307 VSS_372 G5
BD41 VSS_12 VSS_86 AG5 BV3 VSS_159 VSS_233 CV34 DM47 VSS_308 VSS_373 H17
A48 VSS_13 VSS_87 AG9 BV7 VSS_160 VSS_234 CV35 DN15 VSS_309 VSS_374 H21
BD42 VSS_14 VSS_88 AH2 VSS_161 VSS_235 DN19 VSS_310 VSS_375 H24
BW3 CV5
BD43 VSS_15 VSS_89 AH37 BW37 VSS_162 VSS_236 CV9 DN24 VSS_311 VSS_376 H31
BD45 VSS_16 VSS_90 AH45 BW 5 VSS_163 VSS_237 CY41 DN31 VSS_312 VSS_377 H33
BD49 VSS_17 VSS_91 AH49 BW6 VSS_164 VSS_238 CY45 DN36 VSS_313 VSS_378 H36
BD5 VSS_18 VSS_92 AJ2 BW7 VSS_165 VSS_239 CY49 DN42 VSS_314 VSS_379 H45
BD6 VSS_19 VSS_93 AJ3 BY37 VSS_166 VSS_240 CY9 DP45 VSS_315 VSS_380 H49
BD7 VSS_20 VSS_94 A34 BY45 VSS_167 VSS_241 D13 DR49 VSS_316 VSS_381 J10
BE1 VSS_21 VSS_95 AK37 BY49 VSS_168 VSS_242 D17 DT1 VSS_317 VSS_382 J13
BE2 VSS_22 VSS_96 AL2 C11 VSS_169 VSS_243 D31 DT10 VSS_318 VSS_383 J16
BF3 VSS_23 VSS_97 AL45 C13 VSS_170 VSS_244 D44 DT15 VSS_319 VSS_384 J36
A49 VSS_24 VSS_98 AL47 C14 VSS_171 VSS_245 D49 DT20 VSS_320 VSS_385 J6
VSS_25 VSS_99 C17 VSS_172 VSS_246 DA10
BF45 AL6 DT27 VSS_321 VSS_386 K11
BF47 VSS_26
VSS_27
VSS_100
VSS_101 AM2 C21 VSS_173 VSS_247 DA33 DT3 VSS_322 VSS_387 K33
BF7 VSS_28 VSS_102 AM37 C24 VSS_174 VSS_248 DA9 DT32 VSS_323 VSS_388 K8
BG3 AN2 C31 VSS_175 VSS_249 DB32 DT37 VSS_324 VSS_389 L36
VSS_29 VSS_103
BG41 VSS_30 VSS_104 AN38 C34 VSS_176 VSS_250 DB35 DT42 VSS_325 VSS_390 L39
BG7 VSS_31 VSS_105 AN39 C39 VSS_177 VSS_251 DB38 DT49 VSS_326 VSS_391 L41
C
BH37 VSS_32 VSS_106 A36 C48 VSS_178 VSS_252 DB45 DT6 VSS_327 VSS_392 L42 C
VSS_179 VSS_253 DT7 VSS_328 VSS_393 L43
BJ1 VSS_33 VSS_107 AN41 C49 VSS_180
BJ2 VSS_34 C6 VSS_254 DB47
DB49 DT8 VSS_329 VSS_394 L45
VSS_108 AN42 VSS_181 VSS_255
BJ3 VSS_35 VSS_109 AN43 CA3 VSS_182 DU1 VSS_330 VSS_395 L47
VSS_256 DC3
AA45 VSS_36 VSS_110 AN45 CA38 VSS_257 DC49 DU10 VSS_331 VSS_396 M10
BJ41 VSS_37 VSS_111 AN49 CA41 VSS_183 DC5 DU15 VSS_332 VSS_397 M3
BJ43 VSS_38 VSS_112 AN6 CA42 VSS_184 VSS_258 DC6 DU2 VSS_333 VSS_398 M36
BJ45 VSS_39 VSS_113 AR1 CA43 VSS_185 VSS_259 DD37 DU20 VSS_334 VSS_399 M5
BJ49 VSS_40 VSS_114 AR11 CA7 VSS_186 VSS_260 DD42 DU27 VSS_335 VSS_400 N45
BJ7 VSS_41 VSS_115 AR2 CB37 VSS_187 VSS_261 DE10 DU32 VSS_336 VSS_401 N49
BM11 VSS_42 VSS_116 AR3 CB45 VSS_188 VSS_262 DE13 DU37 VSS_337 VSS_402 P11
BM3 VSS_43 VSS_117 A39 CB47 VSS_189 VSS_263 DE17 DU48 VSS_338 VSS_403 P41
BM45 VSS_44 VSS_118 AR7 CC3 VSS_190 VSS_264 DE18 DU49 VSS_339 VSS_404 P8
BM47 VSS_45 VSS_119 AR9 CC7 VSS_191 VSS_265 DE20 DU7 VSS_340 VSS_405 R3
VSS_46 VSS_120
BM5 VSS_47 VSS_121 AT3 CE37 VSS_192 VSS_266 DE22 DV2 VSS_341 VSS_406 R37
AA47 VSS_48 VSS_122 AT45 CE45 VSS_193 VSS_267 DE23 DV44 VSS_342 VSS_407 T11
BM6 VSS_49 VSS_123 AT47 CE49 VSS_194 VSS_268 DE26 DV48 VSS_343 VSS_408 T36
BM7 VSS_50 VSS_124 AT5 CE9 VSS_195 VSS_269 DE28 DV8 VSS_344 VSS_409 T41
BP1 VSS_51 VSS_125 AT6 CG37 VSS_196 VSS_270 DE29 DW1 VSS_345 VSS_410 T43
BP2 VSS_52 VSS_126 AT7 CG39 VSS_197 VSS_271 DE33 DW10 VSS_346 VSS_411 T45
BP3 VSS_53 VSS_127 AU37 CG43 VSS_198 VSS_272 DE45 DW2 VSS_347 VSS_412 T47
CG45 VSS_199 VSS_273 DE6 DW20 VSS_348 VSS_413 U3
BP43 VSS_54 VSS_128 AV11
BP7 VSS_55 VSS_129 A42 CG47 VSS_200 VSS_274 DF13 DW27 VSS_349 VSS_414 U37
BR45 VSS_56 VSS_130 AV3 VSS_201 VSS_275 VSS_350 VSS_415
B CG9 VSS_202 VSS_276 DF22 DW44 U5 B
BR49 VSS_57 VSS_131 AV38 CH3 DF28 DW46 VSS_351 VSS_416 V11
AB11 VSS_58 VSS_132 AV39 CH5 VSS_203 VSS_277 DF33 DW 48 VSS_352 VSS_417 V36
AB3 VSS_59 VSS_133 AV41 CJ37 VSS_204 VSS_278 DF35 DW49 VSS_353 VSS_418 V45
AB38 VSS_60 VSS_134 AV42 CJ42 VSS_205 VSS_279 DF39 DW7 VSS_354 VSS_419 V49
AB39 VSS_61 VSS_135 AV43 CJ9 VSS_206 VSS_280 DG10 E11 VSS_355 VSS_420 V9
AB41 VSS_62 VSS_136 AV45 CK45 VSS_207 VSS_281 DG12 E34 VSS_356 VSS_421 W37
A17 VSS_63 VSS_137 AV49 CK49 VSS_208 VSS_282 DG13 E36 VSS_357 VSS_422 Y36
AB42 VSS_64 VSS_138 AV7 CK9 VSS_209 VSS_283 DG15 E39 VSS_358 VSS_423 Y38
AB43 VSS_65 VSS_139 AY3 CL37 VSS_210 VSS_284 DG22 E42 VSS_359 VSS_424 Y43
VSS_66 VSS_140 VSS_211 VSS_285
AB5 VSS_67 VSS_141 A44 CL42 DG23 E6 VSS_360 VSS_425 Y9
AB6 VSS_68 VSS_142 AY7 CL49 VSS_212 VSS_286 DG47 VSS_361 VSS_426 DE15
AC45 B17 CM45 VSS_213 VSS_287 DG6 VSS_427
VSS_69 VSS_143 VSS_214 VSS_288
AC49 VSS_70 VSS_144 B2 CM47 VSS_215 VSS_289 DH1
17 of 19
AD10 VSS_71 VSS_145 B21 CM9 DH3 ICL-U_BGA1526
VSS_216 VSS_290
AD11 VSS_72 VSS_146 B24 CN3 VSS_217 VSS_291 DH45 @
AD34 VSS_73 VSS_147 B3 CN37 VSS_218 VSS_292 DH5
AD37 VSS_74 VSS_148 B31 CN39 DJ19
VSS_219 VSS_293
A3 B48 CN5 VSS_220
AE6
15 of 19
BA1 VSS_294 DJ21
CP9 DJ27
VSS_221 VSS_295
AF37 BA2 CR32 VSS_222 VSS_296 DJ31
16 of 19

ICL-U_BGA1526 ICL-U_BGA1526
A @ @ A

SecurityClassification Compal Secret Data Compal Electronics, Inc.

Issued Date 2018/04/01 Deciphered Date 2019/04/01 Title

T HIS SHEET OF ENG INEERING DRAW ING IS T H E PRO PRIET ARY P R O P E R T Y OF C O M P A L ELECT RO NICS, INC. A N D CO NT AINS CO NFIDENT IAL
WHL-U(11/12)GND
A N D T R A D E SECRET INFO RMAT IO N. T HIS SHEET M A Y N O T BE T R A N S F E R ED F R O M T H E C U S T O D Y OF T H E C O M P E T E N T DIVISION OF R & D Size Document Number Rev
D E P A R T M E N T EXCEPT AS AUT HO RIZED BY C O M P A L ELECT RO NICS, INC. NEIT HER T HIS SHEET N O R T H E INFO RMAT IO N IT CO NT AINS
M A Y BE U S E D BY OR DISCLO SED TO A N Y T HIRD P A R T Y W IT HO UT PRIO R W RIT T EN C O N S E N T OF C O M P A L ELECT RO NICS, INC. LA-K033P 0.2

Date: Monday,July29,2019 Sheet 17 of 101

5 4 3 2 1
 5 4 3 2 1

Main Function: CPU(13/13) UC1S

CFG0 AG6 RESERVEDSIGNALS A47 TP_A47 1

1 AE7 CFG_0 RSVD_TP_1 B47 TP_B47 1 TP16TP@PAD~D
TP161 CFG1
TP17TP@PAD~D
CFG3 CMC@TP@ CFG2 AG7 CFG_1 RSVD_TP_2
[79]CFG3 1 CFG3 AD9 CFG_2 C1 TP_C1 1
CMC@TP@
TP162
CFG4 AE9 CFG_3 RSVD_57 E1 TP_E1 1 TP18TP@PAD~D
CFG5 AB9 CFG_4 RSVD_58 TP19TP@PAD~D
CFG6 AJ6 CFG_5 TP_CT32 1
CT32
CFG7 AB7 CFG_6 RSVD_TP_10 CV32 TP_CV32 1 TP20TP@ PAD~D
6/24 Intel release BOOT 1 CFG8 V10 CFG_7 RSVD_TP_11 TP21TP@ PAD~D
TP163 1 AJ5 CFG_8 TP_G15 1
failures sighting alert CMC@TP@
TP164
CFG9
Y10 CFG_9
G15
RSVD_79 F15 TP22TP@PAD~D
1@ 2 CFG2 CMC@TP@ 1 CFG10 TP_F15 1
RC290 1K_0402_1% CFG0 CMC@TP@
TP165 1 CFG11 AJ7 CFG_10 RSVD_80 TP23TP@ PAD~D
D D
CFG1 CMC@TP@
TP166 1 CFG12 AB10 CFG_11 TP_BW11 1
BW 11
CFG8 CMC@TP@
TP167 1 CFG13 AL7 CFG_12 RSVD_TP_5 CA11 TP_CA11 1 TP24TP@PAD~D
CFG9 CMC@TP@
TP168 1 CFG14 AL9 CFG_13 RSVD_TP_6 TP25TP@PAD~D
1@ 2 CFG7 CFG10 CMC@TP@
TP169 1 CFG15 AJ9 CFG_14
TP170 CFG_15 C16
RC289 1K_0402_1% CFG12 CMC@TP@ VSS_428 A16
CFG13 VSS_429
CFG16 V6
1 CFG17 V7 CFG_16
TP171 CFG_17 C2
CMC@TP@ RSVD_55 A4
RSVD_56
1@ 2 CFG6 CFG18 Y6
RC287 1K_0402_1% 1 CFG19 Y7 CFG_18
TP172 CFG_19 DP5
1@ 2 CFG5 CMC@TP@ RSVD_65 DR5
RSVD_66
RC288 1K_0402_1% 2 1 CFG_RCOMP AD6
RC225 49.9_0402_1% CFG_RCOMP D14
T9 RSVD_59 E16
6/24 Intel release BOOT [79] XDP_ITP_PMODE 1 BPM#1 T7 BPM#0 RSVD_60
T1 TP@ T10 BPM#1
failures sighting alert 1 BPM#2 DV6 TP_DV6 1
T2 TP@ T6 BPM#2 RSVD_TP_13 DW6 TP26TP@PAD~D
+VCCIO_OUT 1 BPM#3 TP_DW 6 1
T3 TP@ BPM#3 RSVD_TP_14 TP27TP@PAD~D
RC268 BJ11 DP2 TP_DP2 1
1 2 100_0201_5% CFG0 BL10 RSVD_62 RSVD_TP_24 DP1 TP28TP@PAD~D
TP_DP1 1
RC226 1 2 1K_0402_5% CFG4 RVP To MIPI60 RSVD_63 RSVD_TP_25 TP29TP@PAD~D
1 AV1 DW 4 TP_DW 4 1
T4 TP@ RSVD_TP_17 RSVD_TP_15 DV4 TP_DV4 1 TP30TP@ PAD~D
RC227 1 2 51_0402_1% CFG16
1 AT2 RSVD_TP_16 TP31TP@ PAD~D
T5 TP@ AT1 RSVD_TP_18 CM33
RC228 T6 TP@ 1 TP_CM33 1
1 2 51_0402_1% CFG18 AU1 RSVD_TP_20 TP_3 DB10 TP_DB10 TP32TP@
T7 TP@ 1 1 PAD~D
1 AU2 RSVD_TP_19 TP_4 TP33TP@ PAD~D
T8 TP@ RSVD_TP_21 R1 TP_R1 1
C CFG4 1 AV2 RSVD_TP_12 TP34TP@ PAD~D C
T9 TP@ RSVD_TP_22
Display port presence strap DW 3 TP_DW 3 1
TP35TP@
DP3 RSVD_TP_7 DV3 PAD~D
1 : Enable DT2 RSVD_67 RSVD_TP_8
TP_DV3 1
TP36TP@ PAD~D
An external display port device is connected to RSVD_68 DH49 TP_DH49 1
the embedded displayport AR10 RSVD_TP_9 TP37TP@ PAD~D
1 : Disable AP10 RSVD_69 DL8 TP_DL8 1 TP38TP@ PAD~D
No physical display port attached to embedded display port BP36 RSVD_71 RSVD_TP_23
BM36 RSVD_70 DW 47 TP_DW 47 1
RSVD_72 TP_1 DV47 TP39TP@ PAD~D
TP_DV47 1
TP_2 DU47 TP40TP@ PAD~D
J15
K15 VSS_430 VSS_432
+VCCIO_OUT VSS_431 TP_P10 1
P10 TP41TP@ PAD~D
1SKTOCC# RSVD_TP_26
T10 TP@ C5
1PROC_SELECT# D4 SKTOCC#
T11 TP@ A5 RSVD_77
RC723 1 @ 2 10K_0201_5%BPM#2
RSVD_64
RC724 1 @ 2 10K_0201_5%BPM#3 19 of19
ICL-U_BGA1526
@

UC1R
1 TP_N34 N34 DA11 TP_DA11 1
PAD~DTP@ TP42 1 TP_AK10 AK10 RSVD_TP_28 RESERVEDSIGNALS RSVD_TP_35 CL32 TP_CL32 1 TP43 TP@ PAD~D
PAD~DTP@TP44 BT36 RSVD_TP_29 RSVD_TP_36 CN32 TP_CN32 1 TP48 TP@ PAD~D
TP49 TP@ PAD~D
1 TP_AH10 AH10 RSVD_7 RSVD_TP_37 CY35
PAD~D TP@ TP45 1 TP_BC10 BC10 RSVD_TP_30 RSVD_32 DB37
PAD~D TP@ TP46 1 TP_CH33 CH33 RSVD_TP_31 RSVD_33 DF37
PAD~DTP@ TP47 RSVD_TP_32 RSVD_34
B IST_TP_0 1 B
CJ32 BF11
1 TP_AM10 AM10 RSVD_12 IST_TP_0 BD11 IST_TP_1 1 TP50 TP@ PAD~D
PAD~D TP@ TP126 1 TP_BH10 BH10 RSVD_TP_33 IST_TP_1 BE10
IST_TRIG_0 1 TP128TP@ PAD~D
PAD~D TP@ TP127 1 TP_J34 J34 RSVD_TP_34 IST_TRIG_0 BF10
IST_TRIG_1 1 TP129TP@ PAD~D
PAD~D TP@TP55 RSVD_TP_27 IST_TRIG_1 TP56 TP@ PAD~D
Y11 CW 33 PCH_IST_TP_0 1
1 RSVD_L34 L34 RSVD_9 PCH_IST_TP_0 CY32 PCH_IST_TP_1 1 TP57 TP@PAD~D
PAD~D TP@TP58 RSVD_10 PCH_IST_TP_1 TP59 TP@PAD~D
AJ11 CY37
CG32 RSVD_17 RSVD_27 CV37
RSVD_21 RSVD_28

CK33
BP41 RSVD_22 G34
AL11 RSVD_20 RSVD_35 H34
BG11 RSVD_23 RSVD_46 DJ34
AN11 RSVD_24 RSVD_48 DK31
M13 RSVD_16 RSVD_49 DK15
1 RSVD_M34 M34 RSVD_18 RSVD_50 CP3
PAD~D TP@TP60 RSVD_19 RSVD_51 CP5
RSVD_52 AN9
RSVD_53 AN7
RSVD_54 AF10
DU42 RSVD_36 AE11
DW42 RSVD_42 RSVD_37 H5
D33 RSVD_43 RSVD_38 D1
L13 RSVD_44 RSVD_39 DJ40
K13 RSVD_45 RSVD_40 DK40
RSVD_47 RSVD_41
A A

ICL-U_BGA1526
@

SecurityClassification Compal Secret Data Compal Electronics, Inc.

Issued Date 2018/04/01 DecipheredDate 2019/04/01 Tiiitllle

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Siiize Document Number
WHL-U(12/12)RSVD
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-K033P 0.2

Date: Monday, Jullly29,2019 Sheet 18 of 101

5 4 3 2 1
 5 4 3 2 1
Main Function: Memory(1/2)

REVERSE TYPE (5.2 mm)

JDIMM2A
DDR_M0_CLK0 137 RVS 8 DDR_M0_D61
[7] DDR_M0_CLK0 139 CK0(T) DQ0 7
[7] DDR_M0_CLK#0 DDR_M0_CLK#0 DDR_M0_D58

Non-Interleaved Memory
138 CK0#(C) DQ1 20 DDR_M0_D56
[7] DDR_M0_CLK1 DDR_M0_CLK1

CHANNEL-M0
[7] DDR_M0_CLK#1 DDR_M0_CLK#1 140 CK1(T) DQ2 21 DDR_M0_D59
CK1#(C) DQ3 4
DDR_M0_D60
DDR_M0_CKE0 109 DQ4 3 DDR_M0_D62
[7] DDR_M0_CKE0 110 CKE0 DQ5 16 DDR_M0_D63
DDR_M0_CKE1
[7] DDR_M0_CKE1 CKE1 DQ6 17
[7] DDR_M0_D[0..15] DDR_M0_D57
DDR_M0_CS#0 149 DQ7 13 DDR_M0_DQS7
[7] DDR_M0_CS#0 DDR_M0_CS#1 157 S0# DQS0(T) 11 DDR_M0_DQS#7 DDR_M0_DQS7 [7]
[7] DDR_M0_D[16..31] [7] DDR_M0_CS#1 DDR_M0_CS1 162 S1# DQS0#(C) DDR_M0_DQS#7 [7]

D
BOT: DIMM1(JDIMM2 CONN)Non-ECC DIMM [7] DDR_M0_D[32..47]
[7] DDR_M0_CS1
[7] DDR_M0_CS0
DDR_M0_CS0
DDR_M0_ODT0
165 S2#/C0

155
S3#/C1
28 DDR_M0_D44
DQ8 29 DDR_M0_D42
DQ9 41 DDR_M0_D45 D
[7] DDR_M0_D[48..63] [7] DDR_M0_ODT0 DDR_M0_ODT1 DQ10 42 DDR_M0_D47
161 ODT0
[7] DDR_M0_ODT1 ODT1 DQ11 24 DDR_M0_D41
+3VS +3VS +3VS JDIMM2B DDR_M0_BG0 115 DQ12 25 DDR_M0_D40
RVS [7] DDR_M0_BG0
DDR_M0_BG1 113 BG0 DQ13 38 DDR_M0_D46
141 [7] DDR_M0_BG1 DDR_M0_BA0 150 BG1 DQ14 37 DDR_M0_D43
+1.2V_DDR 111 VDD11 +1.2V_DDR DQ15 34
112 VDD1 142 DDR_M0_BA1 145 BA0
1

1
[7] DDR_M0_BA0 DDR_M0_DQS5
117 VDD2 VDD12 147 [7] DDR_M0_BA1 BA1 DQS1(T) 32 DDR_M0_DQS#5 DDR_M0_DQS5 [7]
RD1 RD2 RD3
118 VDD3 VDD13 148 DDR_M0_MA0 144 DQS1#(C) DDR_M0_DQS#5 [7]
@ 0_0402_5% @ 0_0402_5% @ 0_0402_5% [7] DDR_M0_MA0
123 VDD4 VDD14 153 DDR_M0_MA1 133 A0 50 DDR_M0_D54
124 VDD5 VDD15 154 [7] DDR_M0_MA1 DDR_M0_MA2 132 A1 DQ16 49 DDR_M0_D53
DDR_M0_MA3 DQ17 62
2

2
SA0_CHA_DIM1 SA1_CHA_DIM1 SA2_CHA_DIM1 129 VDD6 VDD16 159 [7] DDR_M0_MA2 131 A2 DDR_M0_D50
130 VDD7 VDD17 160 [7] DDR_M0_MA3 DDR_M0_MA4 128 A3 DQ18 63 DDR_M0_D48
135 VDD8 VDD18 163 [7] DDR_M0_MA4 DDR_M0_MA5 126 A4 DQ19 46 DDR_M0_D55
136 VDD9 VDD19 DQ20 45
1

1
+3VS
VDD10
[7] DDR_M0_MA5 DDR_M0_MA6 127A6A5 DDR_M0_D51
RD4 RD5 RD6 [7] DDR_M0_MA6 DDR_M0_MA7 122 DQ21 58 DDR_M0_D52
[7] DDR_M0_MA7 DQ22 59 DDR_M0_D49
0_0402_5% 0_0402_5% 0_0402_5% 255 258
+0.6V_DDR_VTT
DDR_M0_MA8 125 A7
VDDSPD VTT DDR_M0_MA9 121 A8 DQ23 55 DDR_M0_DQS6
[7] DDR_M0_MA8 DDR_M0_DQS6 [7]
DQS2(T) 53 DDR_M0_DQS#6
164 257 DDR_M0_MA10 146 A9

2.2U_0201_6.3V6M
+0.6V_DDRA_VREFCA [7] DDR_M0_MA9

0.1U_0201_10V6K
VREFCA +2.5V_MEM DQS2#(C) DDR_M0_DQS#6 [7]
2

VPP1 259 DDR_M0_MA11 120 A10_AP

2 2 [7] DDR_M0_MA10
VPP2 [7] DDR_M0_MA11 DDR_M0_MA12 119 A11 DQ24 70 DDR_M0_D38DDR_M0_D33
1 99 [7] DDR_M0_MA12 DDR_M0_MA13 158 A12 71

CD1
CD2
2 VSS VSS 102 DDR_M0_MA14_WE# 151 A13 DQ25 83 DDR_M0_D35
PLACE ALL THE BELOW RESISTORS CLOSE TO SODIMM 1 1 5 VSS VSS 103
[7] DDR_M0_MA13
DDR_M0_MA15_CAS# 156 A14_WE# DQ26 84 DDR_M0_D32
6 VSS VSS 106 [7] DDR_M0_MA14_WE#
DDR_M0_MA16_RAS# 152 A15_CAS# DQ27 66 DDR_M0_D39
+1.2V_DDR 9 VSS VSS 107 [7] DDR_M0_MA15_CAS# A16_RAS# DQ28 67 DDR_M0_D37
10 VSS VSS 167 [7] DDR_M0_MA16_RAS# DDR_M0_ACT# 114 DQ29 79 DDR_M0_D34
PLACE NEAR TO PIN 14 VSS VSS 168 +1.2V_DDR [7] DDR_M0_ACT#
ACT# DQ30 80 DDR_M0_D36

SPD ADDRESS FOR CHANNEL A : 15 VSS VSS 171

[7] DDR_M0_PAR
DDR_M0_PAR 143 DQ31 76
DQS3(T) 74
DDR_M0_DQS4
DDR_M0_DQS4 [7]

1
18 VSS VSS 172
[7] DDR_M0_ALERT#
DDR_M0_ALERT# 116 PARITY DDR_M0_DQS#4
DDR_M0_DQS#4 [7]
SA0 = 0; SA1 = 0; SA2 = 0. RD30 19 VSS VSS 175 RD7 2 1 DIMM1_M0_EVENT# 134 ALERT# DQS3#(C)
470_0402_1% 22 VSS VSS 176
240_0402_1% [24] DDR_DRAMRST#_R DDR_DRAMRST#_R 108 EVENT# 174
23 VSS VSS 180 RESET# 173 DDR_M0_D23 9D1_0M_
D
R
VSS VSS 181 DQ33 187 D DDR_M0_D18
26 DQ32

2
27 VSS VSS 184 PCH_SMBDATA 254 DQ34 186 DDR_M0_D17
VSS VSS 185 [9,24] PCH_SMBDATA 253 SDA DQ35 170 DDR_M0_D21
30 [9,24] PCH_SMBCLK PCH_SMBCLK
DDR_DRAMRST#_R 1 R- Short 2 31 VSS VSS 188 SCL DQ36 169 DDR_M0_D22
RD29 0_0201_5%
DDR_DRAMRST# [7]
35 VSS VSS 189 To SOC SA2_CHA_DIM1 166 DQ37 183 DDR_M0_D16
DQ38 182 DDR_M0_D20
36 VSS VSS 192 SA1_CHA_DIM1 260 SA2
39 VSS VSS 193 SA0_CHA_DIM1 256 SA1 DQ39 179 DDR_M0_DQS2
40 VSS VSS 196 SA0 DQS4(T) 177 DDR_M0_DQS#2 DDR_M0_DQS2 [7]
VSS VSS 197 DQS4#(C) DDR_M0_DQS#2 [7]
43
C VSS VSS 201 C
44 92 195 DDR_M0_D5
47 VSS VSS 202 91 CB0_NC DQ40 194 DDR_M0_D6
48 VSS VSS 205 101 CB1_NC DQ41 207 DDR_M0_D1
51 VSS VSS 206 105 CB2_NC DQ42 208 DDR_M0_D0
+1.2V_DDR 52 VSS VSS 209 CB3_NC DQ43 191 DDR_M0_D7
88
56 VSS VSS 210 +1.2V_DDR 87 CB4_NC DQ44 190 DDR_M0_D3
57 VSS VSS 213 100 CB5_NC DQ45 203 DDR_M0_D2

DIMM Side CPU Side 60

61
64
VSS
VSS
VSS
VSS 214
VSS 217
VSS 218
RD25 2 @ 1 240_0402_1%
RD26 2 @ 1 240_0402_1%
104 CB6_NC
97 CB7_NC
95 DQS8(T)
DQ46 204 DDR_M0_D4
DQ47 200 DDR_M0_DQS0
DQS5(T) 198 DDR_M0_DQS#0 DDR_M0_DQS0 [7]
DQS8#(C) DQS5#(C) DDR_M0_DQS#0 [7]
2

65 VSS VSS 222

RD9 +0.6V_DDRA_VREFCA +V_DDR_REFA_R 68 VSS VSS 223 216 DDR_M0_D26
1K_0402_1% 69 VSS VSS 226 12 DQ48 215 DDR_M0_D28
VSS VSS 227
+1.2V_DDR 33 DM0#/DBI0# DQ49 228 DDR_M0_D29
72
73 VSS VSS 230 54 DM1#/DBI1# DQ50 229 DDR_M0_D31
DM2#/DBI2# DQ51 211
1

77 VSS VSS 231 75 DDR_M0_D25

DM3#/DBI3# DQ52 212
1 RD10 2
VREF traces should be at least 20 mils 78
81
VSS
VSS
VSS 234
VSS 235
178
199 DM4#/DBI4# DQ53 224
DDR_M0_D24
DDR_M0_D27
2_0402_1% wide with 20 mils spacing to other 82 VSS
VSS
VSS 238
VSS 239
DDR_DRAMRST#_R 220
241
DM5#/DBI5#
DM6#/DBI6#
DQ54 225 DDR_M0_D30
DQ55 221 DDR_M0_DQS3
85
1
signals 86 VSS VSS 243 96 DM7#/DBI7# DQS6(T) 219 DDR_M0_DQS#3
DM8#/DBI8# DQS6#(C)
DDR_M0_DQS3 [7]
DDR_M0_DQS#3 [7]
2

CD5 89 VSS VSS 244 2

RD11 0.022U_0201_25V6K 90 VSS VSS 247 CD3
1K_0402_1% 2 93 VSS VSS 248 0.1U_0201_10V6K
94 VSS VSS 251 237 DDR_M0_D12
@ESD@
VSS VSS 252 DQ56
2

98 1 236 DDR_M0_D10
VSS VSS
1

RD12 Follow 573129_ICL_U_DDR4_SODIMM_HW_SCH_Rev1P0 DQ57 249 DDR_M0_D14

24.9_0402_1% 262 261 DQ58 250 DDR_M0_D13
GND GND DQ59 232 DDR_M0_D8
DQ60 233 DDR_M0_D9
DQ61 245
1

DEREN_40-42271-26001RHF DDR_M0_D15
CONN@
PLACE NEAR TO SODIMM DQ62 246 DDR_M0_D11
DQ63 242 DDR_M0_DQS1
DQS7(T) 240 DDR_M0_DQS#1 DDR_M0_DQS1 [7]
DQS7#(C) DDR_M0_DQS#1 [7]

DEREN_40-42271-26001RHF
CONN@
+1.2V_DDR
B
Decopling Cap._Channel A Part Number:SP07001CY0L B

Part description:S SOCKET LOTES ADDR0206-P001A02 DDR4 A31

@EMI@ CD43

@EMI@ CD44

@EMI@ CD46
Layout Note: Layout Note: Layout Note:

@EMI@ CD45
0.1U_0201_10V6K

0.1U_0201_10V6K

0.1U_0201_10V6K
2 2 2 2

K
0.1U_0201_10V6
Place near JDIMM2.257,259 Place near JDIMM2.258 PLACE THE CAP near JDIMM2. 164
C107 place near JDIMM2
1 1 1 1
+0.6V_DDR_VTT
2.2uF *1
+2.5V_MEM 10uF *1 +0.6V_DDR_VTT 10uF *1+1uF *2 +0.6V_DDRA_VREFCA
0.1uF *1
1uF *1
1 Follow Intel RVP
10P_0201_25V8
C107
@
@RF

2 2
10U_0402_6.3V6M

1U_0201_6.3V6M

10U_0402_6.3V6M

1U_0201_6.3V6M

1U_0201_6.3V6M

1 1 1 1 1
CD24 @CD25
2.2U_0201_6.3V6M 2
CD47

CD48

CD49

CD51

CD52

0.1U_0201_10V6K
1 1
2 2 2 2 2

EMC CAPS-PLACE
< 4mm from SO-DIMM VDDQ
with each pair < 12mm Apart
12pF* 5 (EMI@)
2.2pF* 5 (EMI@)
Layout Note: +1.2V_DDR +1.2V_DDR +1.2V_DDR +1.2V_DDR +1.2V_DDR
Place near JDIMM2

1 1 1 1 1 1 1 1 1 1
follow RVP 1p0 12P_0201_50V8J

12P_0201_50V8J

12P_0201_50V8J

12P_0201_50V8J
2.2P_0201_50V8C

2.2P_0201_50V8C

2.2P_0201_50V8C

2.2P_0201_50V8C
12P_0201_50V8J
2.2P_0201_50V8C
10uF*8 EMI@CD3854

EMI@CD3852

EMI@CD3846

EMI@CD3848

EMI@CD3850
EMI@CD3853

EMI@CD3851

EMI@CD3845

EMI@CD3847

EMI@CD3849
A
+1.2V_DDR
1uF*8 +1.2V_DDR 2 2 2 2 2 2 2 2 2 2
A

@330uF*1

1
@
10U_0402_6.3V6M

1U_0201_6.3V6M
10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

1U_0201_6.3V6M

1U_0201_6.3V6M

1U_0201_6.3V6M

1U_0201_6.3V6M

1U_0201_6.3V6M

1U_0201_6.3V6M

1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
10U_0402_6.3V6M

M
1U_0201_6.3V6

+ CD3856
330U_D2_2V_Y
CD58

CD70
CD57

CD59

CD60

CD62

CD63

CD64

CD65

CD66

CD67

CD68

CD71

CD72
CD61

CD69

2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2

SecuriiityClllassiiifiiicatiiion Compal SecretData Compal Electronics, Inc.

Issued Date 2018/12/24 Deciiiphered Date 2018/12/31 Tiitttlle

THIS S HE ET O F ENGIIINEERING DRAW IIING IIISTHE P R O P RI ETARY P R O PERTY O F C O MP AL ELECTRONICS,,, IIINC. AND CONTAIIINS CONFIIIDENTIIIAL S izeDocumentttNumberrr
DDR4_CHM0:DIMM0
AND TR AD E S E CRET IIINFORMATIIION. THIS S HE E T MAY NO T B E TR ANS F E RED F RO M THE C US TO D Y O F THE C O MP E TENT DIVIIISIIION O F R& D D
Rev
E P ARTME NT E X C E PT AS AUTHO R I Z E D B Y C O MP AL ELECTRONICS,,, IIINC. NEIIITHER THIS S HE E T NO R THE IIINFORMATIIION IIIT CONTAIIINS MAY BE
US E D BY OR DI S CLO SED TO ANY THIRD P AR TY WIIITHOUT P RI O R W RI TTEN C O NS E NT OF CO MP AL ELECTRONICS,,, IIINC.
LA-K033P 0..4

Dattte:::Monday,,,Jullly29,,, 2019 Sheettt 23offf 101

5 4 3 2 1
 5 4 3 2 1
Main Function: Memory(2/2)
STD (5.2 mm)
Non-Interleaved Memory [8] DDR_M1_CLK0
DDR_M1_CLK0
DDR_M1_CLK#0
137
JDIMM1A

139 CK0(T)
STD
DQ0
8 DDR_M1_D60
7 DDR_M1_D56

CHANNEL-M1
[8] DDR_M1_CLK#0
[8] DDR_M1_D[0..15] [8] DDR_M1_CLK1
DDR_M1_CLK1 138 CK0#(C) DQ1 20 DDR_M1_D62
DDR_M1_CLK#1 140 CK1(T) DQ2 21 DDR_M1_D57
[8] DDR_M1_CLK#1 CK1#(C) DQ3 4 DDR_M1_D59
[8] DDR_M1_D[16..31] DQ4
DDR_M1_CKE0 109 3 DDR_M1_D58
[8] DDR_M1_CKE0 110 CKE0 DQ5 DDR_M1_D61
DDR_M1_CKE1 16
[8] DDR_M1_D[32..47] [8] DDR_M1_CKE1 CKE1 DQ6 17 DDR_M1_D63
DDR_M1_CS#0 149 DQ7 13 DDR_M1_DQS7
[8] DDR_M1_D[48..63] [8] DDR_M1_CS#0 DDR_M1_DQS7 [8]
DDR_M1_CS#1 157 S0# DQS0(T) 11 DDR_M1_DQS#7
[8] DDR_M1_CS#1 DQS0#(C) DDR_M1_DQS#7 [8]
JDIMM1B DDR_M1_CS1 162 S1#

BOT: DIMM2(JDIMM1 CONN) Non-ECC DIMM STD [8] DDR_M1_CS1

D DDR_M1_CS0 165 S2#/C0 28 DDR_M1_D55 D
[8] DDR_M1_CS0 S3#/C1 DQ8 29 DDR_M1_D51
111 141
+1.2V_DDR 112 VDD1 VDD11 142 +1.2V_DDR DDR_M1_ODT0 155 DQ9 41 DDR_M1_D53
[8] DDR_M1_ODT0 161 ODT0 DQ10 42
117 VDD2 VDD12 147 DDR_M1_ODT1 DDR_M1_D48
118 VDD3 VDD13 148 [8] DDR_M1_ODT1 ODT1 DQ11 24 DDR_M1_D49
+3VS +3VS +3VS 123 VDD4 VDD14 153 DDR_M1_BG0 115 DQ12 25 DDR_M1_D54
[8] DDR_M1_BG0 DQ13 38
124 VDD5 VDD15 154 DDR_M1_BG1 113 BG0 DDR_M1_D50
[8] DDR_M1_BG1 DQ14 37
129 VDD6 VDD16 159 DDR_M1_BA0 150 BG1 DDR_M1_D52
[8] DDR_M1_BA0 DQ15 34 DDR_M1_DQS6
145 BA0
1

1
130 VDD7 VDD17 160
[8] DDR_M1_BA1 DDR_M1_BA1
RD14 BA1 DQS1(T) 32 DDR_M1_DQS#6 DDR_M1_DQS6 [8]
RD13 RD15 135 VDD8 VDD18 163
+3VS VDD19 DDR_M1_MA0 DQS1#(C) DDR_M1_DQS#6 [8]
0_0402_5% @ 0_0402_5% 136 VDD9 [8] DDR_M1_MA0 144
@ 0_0402_5% VDD10 DDR_M1_MA1 133 A0 50 DDR_M1_D42
[8] DDR_M1_MA1
DQ16 49 DDR_M1_D46
255 258
+0.6V_DDR_VTT [8] DDR_M1_MA2 DDR_M1_MA2 132 A1
SA0_CHB_DIM2 SA1_CHB_DIM2 SA2_CHB_DIM2 VDDSPD VTT DDR_M1_MA3 131 A2 DQ17 62 DDR_M1_D45
[8] DDR_M1_MA3
DQ18 63 DDR_M1_D44
164 257 [8] DDR_M1_MA4 DDR_M1_MA4 128 A3

0.1U_0201_10V6K

2.2U_0201_6.3V6M
12

+0.6V_DDRB_VREFCA VREFCA +2.5V_MEM

VPP1 259 126 A4 DQ19 46 DDR_M1_D41
12

12 [8] DDR_M1_MA5 DDR_M1_MA5

2 2 DQ20 45 DDR_M1_D43
RD16
RD17
RD18
VPP2 [8] DDR_M1_MA6 DDR_M1_MA6 127A6A5 DQ21 58
1 99 DDR_M1_MA7 122 DDR_M1_D47

CD7

CD8
@ 0_0402_5% VSS VSS 102 [8] DDR_M1_MA7 DQ22 59
0_0402_5% 0_0402_5% 2 [8] DDR_M1_MA8 DDR_M1_MA8 125 A7 DDR_M1_D40
1 1 5 VSS VSS 103 [8] DDR_M1_MA9 DDR_M1_MA9 121 A8 DQ23 55 DDR_M1_DQS5
DDR_M1_DQS5 [8]
2

6 VSS VSS 106 DDR_M1_MA10 DQS2(T) 53

[8] DDR_M1_MA10 146 A9 DDR_M1_DQS#5
DDR_M1_MA11 120 A10_AP DQS2#(C) DDR_M1_DQS#5 [8]
2

9 VSS VSS 107 [8] DDR_M1_MA11

10 VSS VSS 167 [8] DDR_M1_MA12 DDR_M1_MA12 119 A11 70 DDR_M1_D38
PLACE NEAR TO PIN 14 VSS VSS 168 [8] DDR_M1_MA13 DDR_M1_MA13 158 A12 DQ24 71 DDR_M1_D37
15 VSS VSS 171 [8] DDR_M1_MA14_WE# DDR_M1_MA14_WE# 151 A13 DQ25 83 DDR_M1_D32
18 VSS VSS 172 [8] DDR_M1_MA15_CAS# DDR_M1_MA15_CAS# 156 A14_WE# DQ26 84 DDR_M1_D34
19 VSS VSS 175 [8] DDR_M1_MA16_RAS# DDR_M1_MA16_RAS# 152 A15_CAS# DQ27 66 DDR_M1_D35
PLACE ALL THE BELOW RESISTORS CLOSE TO SODIMM 22
23
VSS
VSS
VSS 176
VSS 180
[8] DDR_M1_ACT#
DDR_M1_ACT#
A16_RAS# DQ28 67 DDR_M1_D39
DQ29 79 DDR_M1_D33
114
26 VSS VSS 181 +1.2V_DDR ACT# DQ30 80 DDR_M1_D36
27 VSS VSS 184 DDR_M1_PAR 143 DQ31 76 DDR_M1_DQS4
[8] DDR_M1_PAR RD19 DDR_M1_ALERT# 116 PARITY DDR_M1_DQS4 [8]
30 VSS DQS3(T) 74 DDR_M1_DQS#4
SPD ADDRESS FOR CHANNEL B : 31 VSS
35 VSS
VSS 185
VSS 188
VSS 189
2 [8] DDR1_M1_ALERT# DIMM2_M2_EVENT# 134 ALERT# DQS3#(C) DDR_M1_DQS#4 [8]

SA0 = 0; SA1 = 1; SA2 = 0. 36 VSS

39 VSS
VSS 192
VSS 193
240_0402_1%
[23] DDR_DRAMRST#_R
DDR_DRAMRST#_R 108 EVENT#
RESET#
174 DDR_M1_D17
DQ32 173 DDR_M1_D16
VSS VSS DQ33 187 DDR_M1_D18
40 VSS DQ34 186 DDR_M1_D19
VSS 196 [9,23] PCH_SMBDATA
PCH_SMBDATA 254
43 VSS VSS 197 PCH_SMBCLK 253 SDA DQ35 170 DDR_M1_D22
[9,23] PCH_SMBCLK SCL DQ36 169 DDR_M1_D21
44 201
VSS
47 VSS
VSS
VSS 202 To SOC SA2_CHB_DIM2 166 DQ37 183 DDR_M1_D23
DQ38 182 DDR_M1_D20
48 205 SA1_CHB_DIM2 260 SA2
VSS VSS
+1.2V_DDR 51 VSS VSS 206 SA0_CHB_DIM2 256 SA1 DQ39 179 DDR_M1_DQS2
C
52 209 SA0 DQS4(T) 177 DDR_M1_DQS#2 DDR_M1_DQS2 [8] C
VSS VSS DQS4#(C) DDR_M1_DQS#2 [8]
56 VSS VSS 210
57 VSS VSS 213 92 195 DDR_M1_D3
60 VSS
61 VSS 217
214 91 CB0_NC DQ40 194 DDR_M1_D6
VSS 101 CB1_NC DQ41 DDR_M1_D1
VSS 207
64 VSS VSS 218 105 CB2_NC DQ42 208 DDR_M1_D2
65 VSS VSS 222 88 CB3_NC DQ43 191 DDR_M1_D5

DIMM Side CPU Side

68 VSS
69 VSS
VSS 223
VSS 226
+1.2V_DDR 87
100
CB4_NC
CB5_NC
DQ44
DQ45
DQ46
190 DDR_M1_D7
203 DDR_M1_D0
2

72 VSS VSS 227 CB6_NC 204 DDR_M1_D4

RD21 73 VSS 104
97 CB7_NC DQ47
VSS 230 RD27 2 @ 1 240_0402_1% 200 DDR_M1_DQS0
DDR_M1_DQS0 [8]
1K_0402_1% 77 VSS VSS 231 RD28 2 @ 1 240_0402_1% 95 DQS8(T) DQS5(T) 198 DDR_M1_DQS#0
+0.6V_DDRB_VREFCA +V_DDR_REFB_R 78 234 DQS8#(C) DQS5#(C) DDR_M1_DQS#0 [8]
81 VSS VSS 235
VSS VSS 216 DDR_M1_D25
DQ48 215 DDR_M1_D29
1

82 VSS VSS 238 12

85 VSS 239 +1.2V_DDR 33 DM0#/DBI0# DQ49 228 DDR_M1_D28
86 VSS 243
1 RD22 2 54 DM1#/DBI1# DQ50 229 DDR_M1_D31
89 VSS VSS 244 DM2#/DBI2# DQ51 211 DDR_M1_D30
2_0402_1% VREF traces should be at least 20 mils VSS
90 VSS
VSS
VSS 247
75
178 DM3#/DBI3# DQ52 212 DDR_M1_D24
wide with 20 mils spacing to other 93 VSS VSS 248 DDR_DRAMRST#_R 199 DM4#/DBI4#
DM5#/DBI5#
DQ53 224 DDR_M1_D26
DQ54 225 DDR_M1_D27
2

94 VSS 251 220

RD23
1
signals 98 VSS
VSS
VSS 252 241 DM6#/DBI6# DQ55 221 DDR_M1_DQS3
DDR_M1_DQS3 [8]
1K_0402_1% CD12 2 96 DM7#/DBI7# DQS6(T) 219 DDR_M1_DQS#3
0.022U_0201_25V6K 262 261 DM8#/DBI8# DQS6#(C) DDR_M1_DQS#3 [8]
CD9
2 GND GND
0.1U_0201_10V6K
1

@ESD@
1
2

DEREN_40-42261-26001RHF 237 DDR_M1_D10

RD24 DQ56 236 DDR_M1_D15
CONN@ Follow 573129_ICL_U_DDR4_SODIMM_HW_SCH_Rev1P0
24.9_0402_1% DQ57 249 DDR_M1_D11
DQ58 250 DDR_M1_D12
DQ59 232 DDR_M1_D13
1

DQ60 233 DDR_M1_D8

PLACE NEAR TO SODIMM DQ61 245
DQ62 246
DDR_M1_D14
DDR_M1_D9
DQ63 242 DDR_M1_DQS1
DQS7(T) 240 DDR_M1_DQS#1 DDR_M1_DQS1 [8]
DQS7#(C) DDR_M1_DQS#1 [8]

DEREN_40-42261-26001RHF

B
Decopling Cap._Channel B CONN@
B

Part Number:SP07001HW0L
Part Description:S SOCKET LOTES ADDR0205-P001A02 DDR4 A31
Layout Note:
Layout Note: Layout Note:
PLACE THE CAP WITHIN 200 MILS
Place near JDIMM1.257,259 Place near JDIMM1.258 FROM THE JDIMM1 08/30
Update Table 4-26 for DDR4 SO-DIMM Decoupling Caps
572907_ICL_UY_PDG_Rev0p7 Page.99

+2.5V_MEM 10uF *1 +0.6V_DDR_VTT 10uF *1+1uF *2 +0.6V_DDRB_VREFCA 2.2uF *1

1uF *1 0.1uF *1
2 2
10U_0402_6.3V6M

1U_0201_6.3V6M

1 1 1 1 1
M
1U_0201_6.3V6

M
1U_0201_6.3V6

CD55 @ CD56
10U_0402_6.3V6M

0.1U_0201_10V6K 2.2U_0201_6.3V6M
CD14

CD18

CD20
CD16

CD21

1 1
2 2 2 2 2

+1.2V_DDR

@EMI@@EMI@
C108 place near JDIMM1

10U_0402_6.3V6M

10U_0402_6.3V6M
1 1

CD3858

CD3857
+0.6V_DDR_VTT
2 2

Layout Note:
Place near JDIMM1 1
10P_0201_25V8
C108
@
@RF

2
follow RVP 1p0
A 10uF*8 A

+1.2V_DDR 1uF*8 +1.2V_DDR

@330uF*1
10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

1U_0201_6.3V6M

1U_0201_6.3V6M

1U_0201_6.3V6M

1U_0201_6.3V6M

1U_0201_6.3V6M

1U_0201_6.3V6M

1U_0201_6.3V6M

1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
10U_0402_6.3V6M

M
1U_0201_6.3V6
CD26

CD27

CD28

CD30

CD31

CD32

CD33

CD34

CD35

CD36

CD38

CD39

CD40

CD41
CD29

CD37

2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2

SecuriiityClllassiiifiiicatiiion Compal SecretData Compal Electronics, Inc.

2018/12/24 2018/12/31 Tiitttlle
Issued Date Deciiiphered Date
THIS S HE ET O F ENGIIINEERING DRAW IIING IIISTHE P R O P RI ETARY P R O PERTY O F C O MP AL ELECTRONICS,,, IIINC. AND CONTAIIINS CONFIIIDENTIIIAL Siize
DDR4_CHM1:DIMM1
DocumentttNumberrr Rev
AND TR AD E S E CRET IIINFORMATIIION. THIS S HE E T MAY NO T B E TR ANS F E RED F RO M THE C US TO D Y O F THE C O MP E TENT DIVIIISIIION O F R& D D
E P ARTME NT E X C E PT AS AUTHO R I Z E D B Y C O MP AL ELECTRONICS,,, IIINC. NEIIITHER THIS S HE E T NO R THE IIINFORMATIIION IIIT CONTAIIINS MAY BE
US E D BY OR DI S CLO SED TO ANY THIRD P AR TY WIIITHOUT P RI O R W RI TTEN C O NS E NT OF CO MP AL ELECTRONICS,,, IIINC.
LA-K033P 0.4

Dattte:::Monday,,,Jullly29,,, 2019 Sheettt24 offf101

5 4 3 2 1
 Main Func = LCD Main Func = CAM&MIC, TS
5 4 3 2 1

+3VS

Pin 5,6,9 Cable side NC 1@ 2 LCD_CBL_DET#

INVERTER POWER TCH@ -->TouchScreen
@RF@ --> RF
R90 10K_0402_5%
Pin 4 for 17" CAMERA +3VS +3VS_CAM

USBTCH@ --> USB Touch Screen

JEDP1 CONN@ +19VB +DCBAT_LCD F4
1
+DCBAT_LCD
60 mils DMIC_CLK_EDP 1 2
41 1 2 F1
42 G1
G2
2 3
3 4
1 2 DMIC_DATA_EDP
I2CTCH@ --> I2C Touch Screen 1A_65V_T0603FF1000TM
4 5 +LCDVDD_LCD 1.5A_24V_SMD1812P150TF-24 1 1

8
10P_0201_25V
C105
F @
@R
5 6 R96 close JEDP! @ 08/15 C5 C6 +MIC_VCC +3VS_CAM
6 7 60 mils +3VS_CAM

@
7 8

2
21
RF@

K
0.1U_0402_50V7

K
1000P_0402_50V7
8 9 2 2 2@ 1
C105 place nearJEDP1

2
1 1

1
9 10 LCD_TST_C +TS_VDD_IN +TS_VDD R83 0_0402_5%

1U 6.3V M X5R 0201

8J
V
10P_0402_50
K
7
0.1U_0402_16V
D 1 D
10 11 DBC_PANEL_EN_R USBTCH@

C8
@RF@

C9
1 1

C7
11 12 EDP_HPD 1 2 C102
EDP_HPD [6] +5VS

2
12 13 2 2 R81 0_0603_5% TCH@ C39 @ C36 10P_0201_25V8
13 14 LCD_CBL_DET# 2
14 15 EDP_AUXP_C LCD_CBL_DET# [10] +LCDVDD_LCD 2 1 F5 2 1U_0201_6V3M 2 0.1U_0402_10V7K

1
+LCDVDD +3VS 1 2
15 16 EDP_AUXN_C @ESD@ R82 0_0603_5%

1
16 17 ED4 I2CTCH@ 1A_65V_T0603FF1000TM
17 18 EDP_TXN0_C 1 2 L03ESDL5V0CG3-2_SOT-523-3
18 19 EDP_TXP0_C R8 0_0603_5% C36: colse to JEDP1.29 C102: colse to JEDP1
19 20
20 21 EDP_TXN1_C
21 22 EDP_TXP1_C EE note: Never change R8 to short pad after MP
22 23
23 24 [11]
TOUCH_SCREEN_INT#_LCD
24 25 [6]
TOUCH_SCREEN_RST_LCD 1 2 BKLT_CTRL
25 26
LCD_BRIGHTNESS +MIC_VCC R75 1 %0
2
_
5
K
41
0
2
26 27
27 28 BLON_OUT_C R76 100K_0402_5% BLON_OUT_D9
28 29 +3VS_CAM 1 @ 2
29 30 DMIC_DATA_EDP DMIC_DATA_EDP [56] R11 0_0201_5%
30 31 DMIC_CLK_EDP DMIC_CLK_EDP [56]
31 32 D2 Brightness
USB20_N6_R 2
32 33 EDP_BKLT_CTRL [6]
USB20_P6_R
33 34 BKLT_CTRL
LCD_BRIGHTNESS 1 2 1
34 35
USB20_N10_R LCD_TST_C R79 1 2 100_0402_5% LCD_TST
35 36 3 LCD_TST
USB20_P10_R R80 100_0402_5%
36 37 LCD_TST [58]
37 38 TS_EN BAT54C_SOT23-3~D
38 39
39 40 +TS_VDD
ACES_515404-0 001-P01 1 @ 2
SP010029F00 R790 0_0201_5% D3
1 2 RB551V-30_SOD323-2
D9 Backlight [58,77] LID_CL_SIO#
2
PANEL_BKEN_EC [58] R14
BLON_OUT_C 1 2 BLON_OUT_D9 1 1 2
C
R78 100_0402_5% TOUCH_SCREEN TS_EN 1 33_0402_5%
TOUCH_SCREEN_PD# [11] C

1@ 2 DBC_PANEL_EN_R 3 @
[10] DBC_PANEL_EN BKLT_IN_EDP [6,10]
R13 0_0201_5% C18
BAT54C_SOT23-3~D
2 10P_0402_50V8J
C12 1 2 0.1U_0402_16V7K EDP_TXN0_C
[6] EDP_TXN0 C13 1 2 0.1U_0402_16V7K EDP_TXP0_C
[6] EDP_TXP0
+3VS +LCDVDD
I2C Touch Screen (Reserved)
C14 1 2 0.1U_0402_16V7K EDP_TXN1_C U1
[6] EDP_TXN1 C15 1 2 0.1U_0402_16V7K EDP_TXP1_C C16 2 1 5 1 40mil Close to JEDP1
[6] EDP_TXP1 IN OUT +3VS
D4
2 1U_0201_6.3V6M 2
[6] EDP_VDD_EN GND R15 I2C_2_LCD_SDA 1 2 USB20_N10_R
EDP_AUXN_C 1 LCDVDD_EN 4 3 2 1 [10] I2C_2_LCD_SDA
[6] EDP_AUXN C17 1 2 0.1U_0402_16V7K R84 I2CTCH@ 0_0201_5%
C19 1 2 0.1U_0402_16V7K EDP_AUXP_C EN OC 10K_0402_5% I2C_2_LCD_SCL USB20_P10_R
[6] EDP_AUXP [10] I2C_2_LCD_SCL 1 2
3 SY6288C20AAC_SOT23-5 R85 I2CTCH@ 0_0201_5%
[58] LCD_VCC_TEST_EN
EC (BIST MODE) BAT54C_SOT23-3~D
1
R17
High Active
100K_0402_5% +3VS

1 2 I2C_2_LCD_SDA
2

R86 I2CTCH@ 4.7K_0402_5%

1 2 I2C_2_LCD_SCL
R87 I2CTCH@ 4.7K_0402_5%
+19VB 1 2 TOUCH_SCREEN_RST_LCD
For BL_PWR_SRC & LCDVDDmonitor +LCDVDD
R88 I2CTCH@ 10K_0402_5%
E
3

LBITS@
2
B QV18
LBITS@
1

LBITS@ LMBT3906N3T5G_SOT883-3
1

+DCBAT_LCD
C

R658
1

B R621 USB20_N10_R B
100K_0201_5%
10K_0201_5%
DVT1_24 USB20_P10_R
2
2

21 PANEL_PWRGD R651 2 1 0_0201_5% 1 USBTCH@2

5
47K_0201_
%

PANEL_MONITOR [58]
R18 0_0201_5%
R627

2
DV16 LBITS@ LBITS@
7K
V
2200P_0402_50
6K
V
0.1U_0201_25

6 K
0.1U_0201_10V

RB751S40T1G_SOD523-2 L4
1

2
%
5
200K_0201_

2 1
1

1 USB20_P10_R
1

LBITS@
%
5
1M_0201_

USB20_P10 [12]
CV633
R624

C 2 1
1
C419

C418

LBITS@
R677

LBITS@ LBITS@ BL_PWR_MONITOR 2 LBITS@

2

B 3 4
2

LBITS@ USB20_N10_R
2 USB20_N10 [12]
LBITS@ E 3 4
2

1
QV19 DLM0NSN900HY2D_4P
LMBT3904N3T5G_SOT883-3 ED2 @EMI@

1
L03ESDL5V0CG3-2_SOT-523-3
@ESD@ 1 USBTCH@2
DVT1_25 R19 0_0201_5%

+3VALW

R652 2 LBITS@ 1 0_0201_5%

USB20_P6_R 1 @EMI@ 2
R10 0_0201_5%
USB20_N6_R
E
3

LBITS@
2 L3
B QV20
USB20_P6_R 2 1
2 1 USB20_P6 [12]
LBITS@ LMBT3906N3T5G_SOT883-3
1

+LCDVDD

2
C
1

R622 USB20_N6_R 3 4
USB20_N6 [12]

2
10K_0201_5% 3 4
DVT1_24 DLM0NSN900HY2D_4P
EMI@
2

2%

21 1 @EMI@ 2
5
47K_0201_

0_0201_5%

1
A R12 A
R628

DV15 LBITS@ ED3

7K
V
2200P_0402_50

1
6K
V
0.1U_0201_25

RB751S40T1G_SOD523-2 L03ESDL5V0CG3-2_SOT-523-3
1

1%
5
200K_0201_

LBITS@ @ESD@
1

LBITS@
CV651
R623
C420

C
1

LBITS@ LCDVDD_MONITOR 2
2

LBITS@ B LBITS@
E
2

QV21
LMBT3904N3T5G_SOT883-3

DVT1_25
Securiiity Clllassiiifiiicatiiion
2018/04/01
CompalSecret Data
2019/04/01 Tittlelti
Compal Electronics,Inc.
Issued Date Deciiiphered Date
THIIIS SHEET OF ENGIIINEERIIING DRAWIIING IIIS THE PROPRIIIETARY PROPERTY OF COMPAL ELECTRONIIICS,,, IIINC... AND CONTAIIINS CONFIIIDENTIIIAL AND
SiiizeDocumenttt Number
LCD/Cam/MIC/T.Panel
TRADE SECRET IIINFORMATIIION... THIIIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIIIVIIISIIION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIIIZED BY COMPAL ELECTRONIIICS,,, IIINC... NEIIITHER THIIIS SHEET NOR THE IIINFORMATIIION IIIT CONTAIIINS MAY
BE USED BY OR DIIISCLOSED TO ANY THIIIRD PARTY WIIITHOUT PRIIIOR WRIIITTEN CONSENT OF COMPAL ELECTRONIIICS,,, IIINC... LA-K033P 0..2

Dattte::: Tuesday,,, Jullly30,,, 2019 Sheettt 38 offf101

5 4 3 2 1
 5 4 3 2 1

Main Func = HDMI RI1 EMI@ RI2 EMI@

HDMI_CLKP 1 2 HDMI_L_CLKP HDMI_TX_N0 1 2 HDMI_L_TX_N0

5.6_0402_1% 5.6_0402_1%

CI1 1 2 0.1U_0402_10V7K HDMI_CLKN HCM1012GH900BP_4P HCM1012GH900BP_4P

[6] CPU_DP1_N3

1
CI2 1 2 0.1U_0402_10V7K HDMI_CLKP 2 1 3 4
[6] CPU_DP1_P3 RI3 EMI@
CI3 1 2 0.1U_0402_10V7K HDMI_TX_N0 150_0402_5% RI4 EMI@
[6] CPU_DP1_N2 CI4 1 2 HDMI_TX_P0 3 4 2 1 150_0402_5%
0.1U_0402_10V7K
[6] CPU_DP1_P2
D D

2
LI1 @EMI@ LI2 @EMI@

CI5 1 2 0.1U_0402_10V7K HDMI_TX_N1

[6] CPU_DP1_N1 CI6 1 2 0.1U_0402_10V7K HDMI_TX_P1
[6] CPU_DP1_P1 RI5 EMI@ RI6 EMI@
CI7 1 2 0.1U_0402_10V7K HDMI_TX_N2 HDMI_CLKN 1 2 HDMI_L_CLKN HDMI_TX_P0 1 2 HDMI_L_TX_P0
[6] CPU_DP1_N0 CI8 1 2 HDMI_TX_P2
0.1U_0402_10V7K
[6] CPU_DP1_P0
5.6_0402_1% 5.6_0402_1%

7
RI1
8
RI1
9
RI1
0
RI2
1
RI2
2
RI2
3
RI2
4
RI2
RI7 EMI@ RI8 EMI@

1
1
1

1
1
1
1
HDMI_TX_P2 1 2 HDMI_L_TX_P2 HDMI_TX_P1 1 2 HDMI_L_TX_P1

1
5.6_0402_1% 5.6_0402_1%

2
2
2
2

2
2
2
2
HCM1012GH900BP_4P HCM1012GH900BP_4P

2
HDMI_PLL_GND 2 1 2 1

470_0402_5%
470_0402_5%
470_0402_5%
470_0402_5%

470_0402_5%
470_0402_5%
470_0402_5%
470_0402_5%
RI9 EMI@ RI10 EMI@
150_0402_5% 150_0402_5%
3 4 3 4
+5VS

1
1

LI3 @EMI@ LI4 @EMI@

D QI1
2 2N7002K_SOT23-3
G
C C
S +5VS
RI11 EMI@ RI12 EMI@
3

HDMI_TX_N2 1 2 HDMI_L_TX_N2 HDMI_TX_N1 1 2 HDMI_L_TX_N1

1
5.6_0402_1% 5.6_0402_1%

DI1
BAW 56W _SOT323-3 ZZZ @

2
+5VS +5V_HDMI RO0000002HM
2

2
+3VS
RI14 RI15
W=20mils
2.2K_0402_5% 2.2K_0402_5% 2 1 ROYALTY HDMI W /LOGO
2

FI1 1
1

1
1.5A_6V_1206L150PR~D
G

1 6 HDMI_CTRL_CLK CI9
[6] CPU_DP1_CTRL_CLK QI3B 0.1U_0402_10V7K
S

2
5

L2N7002DW 1T1G_SC88-6
G

4 3 HDMI_CTRL_DAT
[6] CPU_DP1_CTRL_DATA
QI3A JHDMI1 CONN@
S

L2N7002DW 1T1G_SC88-6 19
18 HP_DET
17 +5V
HDMI_CTRL_DAT 16 DDC/CEC_GND
B B
HDMI_CTRL_CLK 15 SDA
14 SCL
13 Reserved
HDMI_L_CLKN 12 CEC
+3VS 11 CK-
HDMI_L_CLKP 10 CK_shield
HDMI_L_TX_N0 9 CK+
8 D0-
HDMI_L_TX_P0 7 D0_shield
6 D0+

1
HDMI_L_TX_N1

%
1M_0402_5
5 D1-
HDMI_L_TX_P1 4 D1_shield 20

RI13
HDMI_L_TX_N2 3 D1+ GND 21
2 D2- GND 22
1 D2_shield GND 23

2
HDMI_L_TX_P2

G
D2+ GND
[6] CPU_DP1_HPD
3 1 HDMI_HPD CONCR_099AKAC19NBLCNF

D
DC021702131

1
%
20K_0402_5
QI2
2N7002KW _SOT323-3

RI16
2
A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2018/04/01 Deciphered Date 2019/04/01 Tiitlle

T HIS SH EET OF EN G IN EER IN G D R AW IN G IS T H E PR O PR IET AR Y PR O PER T Y OF C O MP A L EL EC T R O N IC S, INC. A N D C O N T AIN S C O N F ID EN T IAL

HDMIL.Shifter/Conn
A N D T R AD E SEC R ET IN F O R MAT IO N . T HIS SH EET MA Y N O T BE T R AN SF ER ED F R O M T H E C U S T O D Y O F T H E C O MPET EN T DIVISION O F R & D
Siiize Document Number Rev

LA-K033P
D EPAR T MEN T EXC EPT AS AU T H O R IZ ED BY C O MP A L EL EC T R O N IC S, INC. N EIT H ER T HIS SH EET N O R T H E IN F O R MAT IO N IT C O N T AIN S MA Y 0.2
BE U S E D BY OR D ISC L O S ED T O AN Y T H IR D PAR T Y W IT H O U T PR IO R W R IT T EN C O N S E N T OF C O MP A L EL EC T R O N IC S, INC.
Date: Monday, Julyl 29, 2019 Sheet 40 of 101
5 4 3 2 1
 5 4 3 2 1

Main Function: TYPE-C_Power Switch

5V@3A
D D

QT3 TYPEC@ +CCG_VBUS

AONR21357 1P DFN3X3-8
SB00001MT00
1
2
5 3

1
1 1

%
100K_0402_5
TYPEC@
RT85

K
0.22U_0603_50V7
CT23 TYPEC@

1M_0402_5%
TYPEC@
RT86

7 K
0.1U_0402_50V
CT24 TYPEC@
+5VALW

4
TYPEC@ Close to Pin2,3,4 2 2

10U_0603_10V6M
TYPEC@

2
1 RT1 2
0_0603_5%

CT21
21
10U_0603_10V6M
TYPEC@

0.1U_0402_10V7K
TYPEC@

1 1
22U_0603_6.3V6M
TYPEC@

47U_0603_6.3V6M
TYPEC@
1

1
CT13

CT20
CT14

CT1
2

2 2
UT1 TYPEC@ W=120 mils 2
DT2TYPEC@
1
+5VALW_25810 2 14 TPS25810_OUT RB751S40T1G_SOD523-2
3 IN1 OUT 15
4 IN1 OUT
IN2
USB_OC2# [6] +3VALW
5
High Active AUX D

1
1 RT5 1 TYPEC@20_0201_5% TYPEC@
FAULTb 20 RT6 1 2 100K_0402_5% +5VALW_25810 1 RT88 2 2 QT4
LD_DETb

2
6 TYPEC@ 0_0603_5% G L2N7002WT1G_SC-70-3
[58] TPS25810_EN EN
S TYPEC@

RT87 TYPEC@
100K_0402_5%

3
TYPEC@
7 11 20mils
1

C RT2 1 2 10K_0402_5% TYPEC_CC1 [43] C

TYPEC@ RT9 RT3 1 2 100K_0402_1% 8 CHG CC1 13
CHG_HI CC2 TYPEC_CC2 [43]

1
100K_0402_5% TYPEC@ TPS25810_UFP#

16
RT7 1 TYPEC@2 100K_0402_5% 1
2

RT4 1 2 100K_0402_1% 10 DEBUGb 17

RT8 1 TYPEC@2100K_0402_5%

K
0.01U_0201_10V6
CT26 TYPEC@
TYPEC@ REF AUDIOb 18 TPS25810_POL#
POLb TPS25810_UFP# TPS25810_POL# [58]TPS25810_POL#(for Ti TPS25810)
19 TPS25810_UFP# [58]
9 UFPb TPS25810_UFP#(for Ti TPS25810) 2
12 GND1
GND2 21
powerpad

TPS25810RVCR_QFN20_4X3
+3VALW

TPS25810_POL# 1 TYPEC@2
RT10 100K_0402_5%
TPS25810_UFP# 1 @ RT11 2
100K_0402_5%

B B

A A

Securiiity Clllassiiifiiicatiiion
2018/04/01
CompalSecret Data
2019/04/01 Tiitttlle
Compal Electronics,Inc.
Issued Date Deciiiphered Date
THIIIS SHEET OF ENGIIINEERIIING DRAWIIING IIIS THE PROPRIIIETARY PROPERTY OF COMPAL ELECTRONIIICS,,, IIINC... AND CONTAIIINS CONFIIIDENTIIIAL AND
TYPE-C_Port0 (1/2)
TRADE SECRET IIINFORMATIIION... THIIIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIIIVIIISIIION OF R&D DEPARTMENT SiiizeDocumenttt Number Rev
EXCEPT AS AUTHORIIIZED BY COMPAL ELECTRONIIICS,,, IIINC... NEIIITHER THIIIS SHEET NOR THE IIINFORMATIIION IIIT CONTAIIINS
MAY BE USED BY OR DIIISCLOSED TO ANY THIIIRD PARTY WIIITHOUT PRIIIOR WRIIITTEN CONSENT OF COMPAL ELECTRONIIICS,,, IIINC... LA-K033P 0..2

Dattte::: Monday,,, Jullly29,,,2019 Sheettt 42 offf101

5 4 3 2 1
 Main Func = Type-C
5 4 3 2 1

+CCG_VBUS

+CCG_VBUS

2
EU7 @ESD@

TYPEC@ CT12
1 L30ESD24VC3-2_SOT23-3

6 M
10U_0603_25V
2

D D

1
+CCG_VBUS +CCG_VBUS

JUSBC1
A1 B12
GND1 GND3
USB3_CTX_L_DRX_P3 A2 B11 USB3_CRX_L_DTX_P3
USB3_CTX_L_DRX_N3 A3 SST XP1 SSRXP1 B10 USB3_CRX_L_DTX_N3
SST XN1 SSRXN1
CT15 2 1 A4 B9 1 2 CT17
0.47U_0402_50V6K TYPEC@ VBUS1 VBUS3 TYPEC@ 0.47U_0402_50V6K
TYPEC_CC1 A5 B8
[42] TYPEC_CC1 CC1 SUB2
USB20_P8_R A6 B7 USB20_N8_R
USB20_N8_R A7 DP1 DN2 B6 USB20_P8_R
DN1 DP2
A8 B5 TYPEC_CC2
TYPEC_CC2 [42]

Bottom
SUB1 CC2
CT16 2 1 A9 B4 1 2 CT18

TOP
0.47U_0402_50V6K TYPEC@ VBUS2 VBUS4 [email protected]_0402_50V6K
C USB3_CRX_L_DTX_N4 A10 B3 USB3_CTX_L_DRX_N4 C
USB3_CRX_L_DTX_P4 A11 SSRXN2 SST XN2 B2 USB3_CTX_L_DRX_P4
SSRXP2 SST XP2
A12 B1
GND2 GND4

1 4
2 GND5 GND8 5
3 GND6 GND9 6
GND7 GND10

JAE_DX07S024JJ2R1300~D
CONN@

USB20_P8_R TYPEC_CC1

TYPEC@ USB20_N8_R TYPEC_CC2

1 2 USB3_CTX_C_DRX_P3 2 TYPEC@E1MI@ USB3_CTX_L_DRX_P3 2 TYPEC@E1MI@ USB3_CRX_L_DTX_P3
[12] USB3_CTX_DRX_P3 [12] USB3_CRX_DTX_P3
CU19 0.1U_0402_10V7K RT17 0_0402_5% RT20 0_0402_5% 1 @EMI@ 2
RT21 0_0201_5%

2
LT10@EMI@ LT9 @EMI@ EU10 EU11

2
2 1 2 1 LT1 TYPEC@EMI@
3 4 AZC199-02SPR7G_SOT23-3 AZC199-02SPR7G_SOT23-3
USB20_N8_R TYPEC@ESD@ TYPEC@ESD@
[12] USB20_N8 3 4

1
3 4 3 4

1
2 1 USB20_P8_R
[12] USB20_P8 2 1
HCM1012GH900BP_4P HCM1012GH900BP_4P
B B
DLM0NSN900HY2D_4P
TYPEC@
1 2 USB3_CTX_C_DRX_N3 2 TYPEC@E1MI@ USB3_CTX_L_DRX_N3 2 TYPEC@E1MI@ USB3_CRX_L_DTX_N3 1 @EMI@ 2
[12] USB3_CTX_DRX_N3 [12] USB3_CRX_DTX_N3
CU18 0.1U_0402_10V7K RT19 0_0402_5% RT18 0_0402_5% RT22 0_0201_5%

EU8 EU9
USB3_CTX_L_DRX_P3 1 1 10 9 USB3_CTX_L_DRX_P3 USB3_CTX_L_DRX_P4 1 1 10 9 USB3_CTX_L_DRX_P4

TYPEC@ USB3_CTX_L_DRX_N3 2 2 9 8 USB3_CTX_L_DRX_N3 USB3_CTX_L_DRX_N4 2 2 9 8 USB3_CTX_L_DRX_N4

1 2 USB3_CTX_C_DRX_P4 2 TYPEC@E1MI@ USB3_CTX_L_DRX_P4 2 TYPEC@E1MI@ USB3_CRX_L_DTX_P4
[12] USB3_CTX_DRX_P4 [12] USB3_CRX_DTX_P4 USB3_CRX_L_DTX_P3 4 USB3_CRX_L_DTX_P3 USB3_CRX_L_DTX_P4 4 USB3_CRX_L_DTX_P4
CU21 0.1U_0402_10V7K RT81 0_0402_5% RT84 0_0402_5% 4 7 7 4 7 7

USB3_CRX_L_DTX_N3 5 5 66 USB3_CRX_L_DTX_N3 USB3_CRX_L_DTX_N4 5 5 66 USB3_CRX_L_DTX_N4

HCM1012GH900BP_4P HCM1012GH900BP_4P
3 4 3 4 3 3 3 3

8 8
2 1 2 1
S DIO(BR) AZ1045-04F.R7G DFN2510P10E ESD S DIO(BR) AZ1045-04F.R7G DFN2510P10E ESD
LT12@EMI@ LT11@EMI@ TYPEC@ESD@ TYPEC@ESD@

TYPEC@
1 2 USB3_CTX_C_DRX_N4 2 TYPEC@E1MI@ USB3_CTX_L_DRX_N4 2 TYPEC@E1MI@ USB3_CRX_L_DTX_N4
[12] USB3_CTX_DRX_N4 [12] USB3_CRX_DTX_N4
CU20 0.1U_0402_10V7K RT83 0_0402_5% RT82 0_0402_5%

A A

Securiiity Clllassiiifiiicatiiion
2018/04/01
CompalSecret Data
2019/04/01 Tiitttlle
Compal Electronics,Inc.
Issued Date Deciiiphered Date
THIIIS SHEET OF ENGIIINEERIIING DRAWIIING IIIS THE PROPRIIIETARY PROPERTY OF COMPAL ELECTRONIIICS,,, IIINC... AND CONTAIIINS CONFIIIDENTIIIAL AND
TYPE-C
TRADE SECRET IIINFORMATIIION... THIIIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIIIVIIISIIION OF R&D DEPARTMENT SiiizeDocumenttt Number Rev
EXCEPT AS AUTHORIIIZED BY COMPAL ELECTRONIIICS,,, IIINC... NEIIITHER THIIIS SHEET NOR THE IIINFORMATIIION IIIT CONTAIIINS
MAY BE USED BY OR DIIISCLOSED TO ANY THIIIRD PARTY WIIITHOUT PRIIIOR WRIIITTEN CONSENT OF COMPAL ELECTRONIIICS,,, IIINC... LA-K033P 0..2

Dattte::: Monday,,, Jullly29,,,2019 Sheettt 43 offf101

5 4 3 2 1
 5 4 3 2 1

Main Func = LAN

Layout:
For RTL8111H-CG CL3: close to Pin8
*Place CL3,CL4,CL5,CL6 close to each VDD10 pin 8, 30, 3, 22 CL4: close toPin30
For RTL8106E CL5: close to Pin3
CL2,RL1: * Place CL3,CL4 close to each VDD10 pin 8, 30 CL6: close toPin22
Only for
RTL8111 LDO mode. 1000@
REGOUT RL1 1 2 0_0603_5% VDD10
40mils
CL 1
CL2

CL3

CL4

CL5

CL6
D
1 1 1 1 1
LAN CHIP 10/100/1000 UL1 1000@ 21

12P_0402_50V8J
1
LANXIN_R 1 EMI@ 2 LANXIN

YL1
RL 2

2
33_0402_5%
D

0 . 1 U_ 0402 _ 10V7 K

0 . 1 U_ 0402 _ 10V7 K
0 . 1 U_ 0402 _ 10V7 K

0 . 1 U_ 0402 _ 10V7 K

0 . 1 U_ 0402 _ 10V7 K
2 2 2 2 2 XTAL0 GND0
3 4
1 0 00@

1 0 00@

1 0 00@
XTAL1 GND1
RTL8111H-CG_QFN32_4X4
RTL8111H-CG RTL8106E-CG CL7 25MHZ_10PF_7V25000014
SA000080P00 LANXOUT_R 1 EMI@ 2 LANXOUT RL3
21
33_0402_5%
SA000080P00 SA000065Y00 UL1 1 0 0 @ 12P_0402_50V8J

LDO mode LDO mode

+3VS
Layout:
For RTL8111H-CG 10/100/1000M 10/100M
*Place CL10 and CL11 and CL12 close to each VDD33 pin 11, 23 , 32 RTL8106E-CG_QFN32_4X4
For RTL8106E SA000065Y00

1
* Place CL11 and CL12 close to each VDD33 pin 23, 32 RL8
1K_0402_5%
VDDREG
+LAN_VDD33 CL8, CL9 close to UL1 Pin 17, 18
CL13, CL14 close to UL1 Pin 13, 14

2
UL 1 @
40mils 1@2 ISOLATE#
RL4 0_0603_5% LAN_MDIP0 1 17 PCIE_CRX_C_DTX_P9 CL 8 2 1 0.1U_0402_10V7K
LAN_MDIP1 4 MDIP0 PCIE_CRX_DTX_P9 [12]
HSOP 18 PCIE_CRX_C_DTX_N9
2 MDIP1 CL 9 2 1 0.1U_0402_10V7K
CL10

CL11

CL12
PCIE_CRX_DTX_N9 [12]

1
LAN_MDIN0 HSON
1 1 1
RL9 LAN_MDIN1 5 MDIN0
CL12: close to Pin23 15K_0402_1% MDIN1 13 PCIE_CTX_C_DRX_P9 CL13 2 1 0.1U_0402_10V7K CL14 2 1
CL10: close to Pin11 HSIP 14 PCIE_CTX_C_DRX_N9 PCIE_CTX_DRX_P9 [12]
0.1U_0402_10V7K
0 . 1 U_ 0402 _ 10V7 K

0 . 1 U_ 0402 _ 10V7 K
0 . 1 U_ 0402 _ 10V7 K

HSIN PCIE_CTX_DRX_N9 [12]

2 2 CL11: close toPin32 2 VDD10 8

2
VDD10 30 AVDD10
1 0 00@

+LAN_VDD33 32 AVDD10 19
PLTRST# [11,52,58,66,68]
VDDREG 23 AVDD33 PERSTB
DVDD33 20 ISOLATE#
15 ISOLATEB "PCIE_WAKE#" PU 1k on CPU side
[9] CLK_PCIE_P2 16 REFCLK_P 21 PCIE_W AKE# [11,52,58,68]
[9] CLK_PCIE_N2 REFCLK_N LANWAKEB
C C
RL5 1 @ 2 0_0201_5% CLKREQ_PCIE#2_R 12 26 LED1 RL 6 2 @ 1 10K_0402_5%
[9] CLKREQ_PCIE#2 GPO +LAN_VDD33
LANXIN 28 CLKREQB
LANXO UT 29 CKXTAL1
CKXTAL2 3 VDD10
+LAN_VDD33 TP53 27 NC 6 LAN_MDIP2
TP54 25 LED0 NC 7 LAN_MDIN2
LED1 NC 9 LAN_MDIP3
2.49K_0402_1%~D 1 2 RL 7 31 NC 10 LAN_MDIN3
RSET NC 11 +LAN_VDD33
1 1 NC 22
CL15
4.7U_0402_6.3V6M
CL17
4.7U_0402_6.3V6M +LAN_VDD33 Rising time (10%~90%) need 33
GND NC 24
VDD10
REGOUT
CL16 1 2 1U_0201_6V3M
MCT3
@ @ NC
2 2 >0.5mS and <100mS. RTL8106E-CG_QFN32_4X4
CL18 1 2 0.1U_0402_10V7K MCT2
MCT1
RTL8106E-CG_QFN32_4X4-S MCT0

Layout: JP5

1 0 0 0 @ RL 14

1 0 0 0 @ RL 15
CL15: close toPin32
CL17: close toPin11 Always Open

2
RL12

RL13
+3VALW +LAN_VDD33

CL20
JP5

LAN TransFormer 10/100M x2

7 5 _ 06 03_5%

7 5 _ 06 03_5%

7 5 _ 06 03_5%

7 5 _ 06 03_5%
Main Func = LAN

1
2 1 SE00000UO00
2MM
W=40mils W=40mils 100EMI@

MCT 1
JP@
10P 2KV J NPO 1206 H1.25
CL20 1
TL2 1000@ SE00001OW00 CL20 @
+3VALW +LAN_VDD33 LAN_MDIN3 16 1 RJ45_MDIN3 33P 2 KV J NPO 1206 H1
LAN_MDIP3 15 RX+ RD+ 2
14 RX- RD- 3 MCT3
RJ45_MDIP3
TL1 TOP, TL2 BOT 1000EMI@ 2
B
UL2 13 RCT2 RCT1 4 B

12 NC4 NC1 5
33P 2KV J U2J 1206 H1
CL19 2 1 5 1
IN OUT +3VALW 11 NC3 NC2 6
MCT2
2 RJ45_MDIN2
1U_0201_6.3V6M LAN_MDIN2 10 TCT2 TCT1 7
GND LAN_MDIP 2 9 TX+ TD+ 8 RJ45_MDIP2
4 3 2 RL10 1 TX- TD-
[58] AUX_ ON EN OC 10K_0402_5% NS681611HLAN
SY6288C20AAC_SOT23-5
High Active JLAN1 CONN@
12
2

GND
RL11 11
100K_0402_5% GND 10
TL1 GND 9
LAN_MDIP0 16 1 RJ45_MDIP0 RJ45_MDIP0 1 GND
PR1+
1

LAN_MDIN0 15 RX+ RD+ 2 RJ45_MDIN0

14 RX- RD- 3 MCT0 RJ45_MDIN0 2
13 RCT2 RCT1 4 PR1-
12 NC4 NC1 5 RJ45_MDIP1 3
11 NC3 NC2 6 MCT1 PR2+
LAN_MDIP1 RJ45_MDIP1 RJ45_MDIP2 4
TCT2
10 TX+ TCT1 7
LAN_MDIN1 TD+ 8 RJ45_MDIN1 PR3+
LOM_TCT

9
TX- TD- RJ45_MDIN2 5
NS681611HLAN PR3-
RJ45_MDIN1 6
Layout note: PR2-
RJ45_MDIP3 7
30 mil spacing between MDI differential pairs.
1.0V Source RL1 CL2 CL5 CL6 CL10 CL12 PR4+
Layout note: RJ45_MDIN3 8
PR4-
1 30 mil spacing between MDI differential pairs.
CL21
0.01U_0402_16V7K SANTA_130460-N
2 DC021702130

RTL8111H-CG
RTL8111G-CGT LDO O O O O O X Follow Reference Schematic 0.01uF~0.4uF
Main :
SP050006 H00 , S X' FORM_ NS 0014 LF LA N
A (71.08111.U03) 2n d: A

SP050006 W 00 , S X' FORM_ HD- 245 10/100 PC CA RD LA N

RTL8106E-CG
LDO
X X X X X O
(071.08106.0003)
SecuriiitttyClllassiiifffiiicatttiiion Compalll Secret Data Compal Electronics, Inc.
Issued Date 2018/0// 40/// 1 Deciiiphered Daettt 2019///04///01 Titttiile

THIS SHE E T O F ENGIIINEERING DRAW IIING IIISTHE P R O P RI ETARY P RO P ERTY O F C O MP AL ELECTRONICS,,, IIINC. AND CONTAIIINS CONFIIIDENSSTiIIIzAeLDoc menttt Numberrr
LAN RTL8111/RTL8106 Rev
AND TR AD E S E CR ET IIINFORMATIIION. THIS S HE E T MAY NO T BE TR ANS F ERED F RO M THE CUS TO D Y OF THE C O MP E TE NT DIVIIISIIION OF R & D
LA-K033P
DE P ARTME NT E X CE PT AS AUTHO RI Z E D B Y C O MP AL ELECTRONICS,,, IIINC. NEIIITHER THIS S HE E T NO R THE IIINFORMATIIION IIIT CONTAIIINS Custttom 0.. 2
MAY BE US E D BY OR DI S CLO SED TO ANY THIRD P AR TY WIIITHOUT P R I O R W R I TTEN CO NS E NT OF C O MP AL ELECTRONICS,,, IIINC.
Dattte:::Monday,,, Jully 29,,,2019 Sheettt 51 offf 101
5 4 3 2 1
 5 4 3 2 1

Main Func = WLAN E Key CONN

+3VS +3VALW _PCH +3.3V_WLAN

1 2 +3.3V_WLAN
RW 1 0_0603_5%
D 1A D
1@ 2
RW 2 0_0603_5%

M
10U_0402_6.3V6

K
0.1U_0402_10V7

K
0.1U_0402_10V7

J
10P_0402_50V8
1 1 1 1

CW 1

CW 2

CW 3

CW 4 RF@
2 2 2 2

+3.3V_WLAN

JW LAN1
1 2
[12] USB20_P4 3 GND1 3.3V1 4
5 USB_D+ 3.3V2 6
C C
[12] USB20_N4 TP51
7 USB_D- LED1# 8
9 GND2 PCM_CLK/I2S_SCK 10
[13]
[13]
CNV_CRX_DTX_N1
CNV_CRX_DTX_P1
11 SDIO_CLK
13 SDIO_CMD
PCM_SYNC/I2S_WS 12
PCM_IN/I2S_SD_IN 14
CNV_RF_RESET# [10]
1.8V
15 SDIO_DAT0 PCM_OUT/I2S_SD_OUT 16 CLKREQ_CNV# [10]
[13] CNV_CRX_DTX_N0 17 SDIO_DAT1 LED2# 18 TP52
[13] CNV_CRX_DTX_P0 19 SDIO_DAT2 GND3 20
21 SDIO_DAT3 UART_WAKE# 22 CNV_BRI_CRX_DTX_R RW 3 1 CNV@ 2 22_0402_5%
[13] CLK_CNV_CRX_DTX_N
23 SDIO_WAKE# UART_RXD CNV_BRI_CRX_DTX [13]
[13] CLK_CNV_CRX_DTX_P SDIO_RESET#
RW 4 1 @ 2 0_0402_5%
HOST_DEBUG_TX [58]
32 CNV_RGI_CTX_DRX_R RW 5 1 CNV@ 2 75_0402_5%
33 UART_TXD 34 CNV_RGI_CRX_DTX_R CNV_RGI_CTX_DRX [13]
RW 6 1 CNV@ 2 22_0402_5%
0.1U_0402_10V7K CW 5 1 2 PCIE_CTX_C_DRX_P10 35 GND4 UART_CTS 36 CNV_BRI_CTX_DRX_R RW 7 1 CNV@ 2 75_0402_5%
CNV_RGI_CRX_DTX [13]
[12] PCIE_CTX_DRX_P10 37 PETp0 UART_RTS 38 CNV_BRI_CTX_DRX [13]
0.1U_0402_10V7K CW 6 1 2 PCIE_CTX_C_DRX_N10
[12] PCIE_CTX_DRX_N10
39 PETn0 VENDER_DEFINED1 40

[12] PCIE_CRX_DTX_P10
41 GND5
43 PERp0
VENDOR_DEFINED2 42
VENDOR_DEFINED3 44
RW5,RW7 close to CPU
[12] PCIE_CRX_DTX_N10 45 PERn0 COEX3 46
47 GND6 COEX2 48
[9] CLK_PCIE_P1 COEX1 50
49 REFCLKP0 W LAN_SUSCLK RW 24 1 2 0_0402_5% SUSCLK_R
[9] CLK_PCIE_N1 SUSCLK(32kHz) 52
B
51 REFCLKN0 SUSCLK_R [9,68]
B
1@ 2 CLKREQ_PCIE#1_R 53 GND7 PERST0# 54 PLTRST# [11,51,58,66,68]
[9] CLKREQ_PCIE#1 55 CLKREQ0# W_DISABLE2# 56
RW 8 1 @ 2 0_0201_5% PCIE_WAKE#_R
[11,51,58,68] PCIE_WAKE# 57 PEWAKE0# W_DISABLE1# 58
RW 10 0_0201_5%
59 GND8 I2C_DATA 60
[13] CNV_CTX_DRX_N1 I2C_CLK 62
61 RESERVED/PETp1
[13] CNV_CTX_DRX_P1 ALERT# 64
63 RESERVED/PETn1
65 GND9 RESERVED 66 TP125
[13] CNV_CTX_DRX_N0 67 RESERVED/PERp1 UIM_SWP/PERST1# 68
[13] CNV_CTX_DRX_P0 +3.3V_WLAN
69 RESERVED/PERn1UIM_POWER_SNK/CLKREQ1# 70
71 GND10 UIM_POWER_SRC/GPIO1/PEWAKE1#72
[13] CLK_CNV_CTX_DRX_N
73 RESERVED/REFCLKP1 3.3V3 74
[13] CLK_CNV_CTX_DRX_P
75 RESERVED/REFCLKN1 3.3V4
GND11 76
GND12 77
GND13
CONN@ LOTES_APCI0136-P001A

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2018/04/01 Deciphered Date 2019/04/01 Tiitle

T HIS SH EET OF EN G IN EER IN G D R AW IN G IS T H E PR O PR IET AR Y PR O PER T Y OF C O MP A L EL EC T R O N IC S, INC. A N D C O N T AIN S C O N F ID EN T IAL

NGFF_WLANCONN
A N D T R AD E SEC R ET IN F O R MAT IO N . T HIS SH EET MA Y N O T BE T R AN SF ER ED F R O M T H E C U S T O D Y O F T H E C O MPET EN T DIVISION O F R & D
Siiize Document Number Rev
D EPAR T MEN T EXC EPT AS AU T H O R IZ ED BY C O MP A L EL EC T R O N IC S, INC. N EIT H ER T HIS SH EET N O R T H E IN F O R MAT IO N IT C O N T AIN S MA Y
BE U S E D BY OR D ISC L O S ED T O AN Y T H IR D PAR T Y W IT H O U T PR IO R W R IT T EN C O N S E N T OF C O MP A L EL EC T R O N IC S, INC. LA-K033P 0.2

Date: Monday, Julyl 29, 2019 Sheet 52 of 101

5 4 3 2 1
 Main Func = Audio
5 4 3 2 1

EMI@, RF@, @EMI@, @ESD@, @RF@

moat
moat
+1.8V_PRIM +1.8V_AVDD
+5VS 2A +5V_PVDD +5V_AVDD +5VS QA1
LN2306LT1G_SOT23-3

RA1 1 @ 2 0_0805_5% 2 1 1 3 1 @2

S
RA4 1 2 33_0402_5% DMIC_DATA RA3@ 0_0603_5% RA2 0_0402_5%
CA4 1 CA5 CA6 1 CA7 [38] DMIC_DATA_EDP
1 2
EMI@ CA1 CA2

G
2
LA5 1 2 BLM15PX221SN1D_2P DMIC_CLK CA3

.1U_0402_16V7K

.1U_0402_16V7K
10U_0603_10V6M

10U_0603_10V6M
[38] DMIC_CLK_EDP Place close to Pin 20

21

21

21
+3VS 10U_0402_6.3V6M
2 2 2 1

10U_0603_10V6M
CA4,LA5 place colseto UA1.3 Close pin33

.1U_0402_16V7K
1 1
CA8 CA9
10P_0402_50V8J 6.8P_0402_50V AUD_AGND
@RF@ @RF@
D 2 2 D
+1.8V_CPVDD
Layout Note: Layout Note: AUD_AGND
Close pin39 Close pin34
1 @2
RA5 0_0402_5%
2 1 CA11

+3VS CA10

.1U_0402_16V7K
25mA +3V_DVDD 10U_0402_6.3V6M
1 2

1 @2 Close pin29
RA6 0_0402_5%
2 1
CA12 CA13
+3V_DVDD +5V_PVDD+5V_AVDD
2 Close pin8
10U_0402_6.3V6M

.1U_0402_16V7K

1
+1.8V_AVDD
1 1 +1.8V_CPVDD
CA14
CA15
10U_0402_6.3V6M .1U_0402_16V7K

34

39

20

33

29
1

8
2 2 UA1

DVDD

PVDD1

PVDD2

CPVDD
DVDD-IO

AVDD1

AVDD2
+LINE1_VREFO_L

24 +MIC2-VREFO
HDA_BIT_CLK_R LINE1-VREFO-L
9 23
[10] HDA_SYNC_R 5 SYNC MIC2-VREFO 22 AUD_VREF 1 2
[10] HDA_BIT_CLK_R AUD_AGND
4 BIT-CLK VREF 28 CBN CA16 2.2U_0402_6.3V6M +3VALW +RTC_CELL
[10] HDA_SDOUT_R 7 SDATA-OUT CBN 30
mo at
2

1 2 HDA_SDIN0_R CBP 1 2
[10] HDA_SDIN0 RA7 33_0402_5% SDATA-IN CBP CA17 1U_0603_16V7 RA9 1 @ 20_0402_5%
22_0402_5%
RA8
@EMI@

1@2 10 16 V3D3_STB 1 2
RA10 0_0402_5% DMIC_DATA 2 DC_DET VD33STB
10 mils RA11 0_0402_5% 10mils
1 @2 DMIC_CLK 3 GPIO0/DMIC-DATA12 27 CPVEE 1 2
+3V_DVDD CPVEE
40 GPIO1/DMIC-CLK
1

RA12 100K_0402_5% CA18 1U_0603_16V7

[58] EC_MUTE# 1 PDB
2 Layout Note:
RA13 100K_0402_5% Width>40mil, to improv e Headpohone Crosstalk noise
CA19 1 2 10U_0402_6.3V6MLDO1_CAP 21
1

Change it to sharp will be better.

10P_0402_50V8J

AUD_AGND CA21 1 32 LDO1-CAP 13

2 10U_0402_6.3V6MLDO2_CAP RING2 Add 2 v ias (>0.5A) when trace layer change.
CA20
@EMI@

CA22 1 2 10U_0402_6.3V6MLDO3_CAP 6 LDO2-CAP MIC2-L/RING214

LDO3-CAP SLEEVE
MIC2-R/SLEEVE 15
2

MIC_CAP 12
AUD_AGND
MIC2-CAP CA23 10U_0402_6.3V6M
C AUD_SPK_L+ 35 C
Layout Note: AUD_SPK_L- 36 SPK-OUT-LP 18 LINE1_L
Speaker trace width >40mil @ 2W4ohm speaker power
AUD_SPK_R- 37 SPK-OUT-LN LINE1-L 17 LINE1_R
RA8,CA20: close to UA1.5 AUD_SPK_R+ 38 SPK-OUT-RN
SPK-OUT-RP
LINE1-R 11
PCBEEP 25
AUD_PC_BEEP
AUD_HP1_JACK_L
moat
1 2 AUD_SENSE_A 12 HP-OUT-L 26 AUD_HP1_JACK_R
[56] JACK_PLUG RA14 200K_0402_1% HP/LINE1_JD1 HP-OUT-R
19
+3V_DVDD RA15 2 1 100K_0402_5% AUD_SENSE_A Layout Note: Place close to Pin 12 AVSS1 31 1 1 2
AVSS2 RA16 1 20_0402_5%

330P_0402_50V7K

330P_0402_50V7K
41 1

@EMI@CA41

@EMI@CA42
1 THERMAL_PAD RA17 1 20_0402_5%
RA18 0_0402_5%
moat @ CA24
.1U_0402_16V7K ALC3204-CG_MQFN40_5X5
2
2
CA25 1 2 0.1U_0402_10V7K
2 EMI@
AUD_AGND CA43 1 2 0.1U_0402_10V7K

AUD_AGND AUD_AGND AUD_AGND @EMI@

CA41,CA42 place near UA1 AUD_AGND Layout Note:
Tied at point only under
Codec or near the Codec

Place on the moat between GND & GNDA.

Layout Note: DA3

Speaker [10] SPKR 2

Speaker trace width >40mil @ 2W4ohm speaker power
1 AUD_PC_BEEP_C1 2 12 AUD_PC_BEEP

JSPK1
CONN Pin Net name RA23 1K_0402_5% CA32 0.1U_0402_16V7K
1 3
AUD_SPK_R+ AUD_SPK_R+_C [58] BEEP
RA19 1 EMI@ 2 BLM15PD800SN1D_2P
2
1 Pin1 SPK_R+

1
AUD_SPK_R- RA20 1 EMI@ 2 BLM15PD800SN1D_2P AUD_SPK_R-_C BAT54C_SOT23-3~D
AUD_SPK_L+ RA21 1 EMI@ 2 BLM15PD800SN1D_2P AUD_SPK_L+_C 32 Pin2 SPK_R-
AUD_SPK_L- RA22 1 EMI@ 2 BLM15PD800 SN1D_2P AUD_SPK_L-_C 43 RA24
4
5 Pin3 SPK_L+ 10K_0402_5%
6 G1
G2

2
Pin4 SPK_L-
ACES_50224-00401-001
3

CONN@ SP02000GC10
1000P_0402_50V7K

1000P_0402_50V7K

1000P_0402_50V7K

1000P_0402_50V7K

1 1 1 1
EMI@ CA29
EMI@ CA31

EMI@ CA28

EMI@ CA30

L03ESDL5V0CC3-2_SOT23-3

L03ESDL5V0CC3-2_SOT23-3

B B
DA1

DA2

2 2 2 2

CLOSE TO JHP1
@

@
1

1
@ESD

@ESD

HPOUT_R
HPOUT_L

JACK_PLUG
JACK_PLUG_DET

Universal Jack
(Global Headset Jack + mic phone in + line in support)
3

JHP1 CONN@
DA6

DA7
@ESD@
L03ESDL5V0CC3-2_SOT23-3
ESD@
L03ESDL5V0CC3-2_SOT23-3

SLEEVE_R 3
HPOUT_L 1 G/M
Main Func = Audio Jack Universal Jack
L/R

JACK_PLUG 5
[56] JACK_PLUG 5
(Global Headset Jack + mic phone in + line in support) JACK_PLUG_DET 6
6
1

HPOUT_R 2
R/L
RING2_R 4
7 M/G
GND

+MIC2-VREFO RA25 1 2 2.2K_0402_5% YUQIU_PJ753-F07J1BE-B

2
DC021512140

10K_0402_5%
RA33

10K_0402_5%
RA34
1 1 1 1 1 1
RA26 1 2 2.2K_0402_5% JACK_PLUG_DET AUD_AGND

100P_0402_50V8J
CA35 EMI@

100P_0402_50V8J
CA36 EMI@

680P_0402_50V8J
CA37 ESD@

680P_0402_50V8J
CA38 ESD@

ESD@
AZ5123-02S.R7G_SOT23-3

DA5

J
680P_0402_50V8
CA40 @ESD@
J
680P_0402_50V8
CA39 @ESD@
RING2 LA1 1 ESD@ 2 BLM15PX330SN1D_2P RING2_R
10 mils @ @

AUD_HP1_JACK_L RA27 1 2 10_0402_1% AUD_HP1_JACK_L1 LA2 1 EMI@ 2 BLM15PX330SN1D_2PHPOUT_L

1 2 2 2 2 2 2

2
DA4 LINE1_L 1 2 LINE1-L_C RA28 1 2 1K_0402_5% RA35
2 CA3310U_0603_10V6M RA29 1 2 4.7K_0402_5% @ 0_0201_5%

1 AUD_HP1_JACK_R RA30 1 2 10_0402_1% AUD_HP1_JACK_R1 LA3 1 EMI@ 2 BLM15PX330SN1D_2P HPOUT_R LA4 1 ESD@ 2
+LINE1_VREFO_L
2

1
LINE1_R 1 2 LINE1-L_R RA31 1 CA34 2 1K_0402_5% BLM15PX330SN1D_2P SLEEVE_R
3 10U_0603_10V6M RA32 1 2 4.7K_0402_5%

BAT54ATB_SOT-523-3 SLEEVE
AUD_AGND
AUD_AGND AUD_AGND AUD_AGND AUD_AGND
A A

Layout Note:
Close to UA1

Securitty Classifficatttion Compalll Secret Data CompalElectronics,Inc.

2018///04///01 2019///04///01 Tiittle
IIIssued Dattte Deciphered Dattte
THIIIS SHEET OF ENGIIINEERIIING DRAWIIING IIISTHE PROPRIIIETARY PROPE RTY OF C OMP A L ELECTRONIIICS,,, IIINC...AND CONTAIIINS CONFIIIDENTIIIAL SiiizeDocumenttt Numberrr
Audio Codec ALC3204
A ND TRADE S E C RE T IIINFORMATIIION... THIIIS SHEET MA Y NOT BE TRANSF E RED F ROM THE CUSTOD Y OF THE C OMP E TE NT DIIIVIIISIIIONOF R& D
Rev
DEPARTME N T EXCEPT AS AUTHORIIIZED BY C OMP A L ELECTRONIIICS,,, IIINC...NEIIITHER THIIIS SHEET NOR THE IIINFORMATIIION IIITCONTAIIINS MA Y BE US E D BY
OR DIIISCLOSED TO A NY THIIIRD PARTY WIIITHOUT PRIIIOR WRIIITTEN C ONS E NT OF C OMP A L ELECTRONIIICS,,,IIINC... LA-K033P 0..2

Dattte:::Monday,,, Jully 29,,,2019 Sheettt56 offf101

5 4 3 2 1
 5 4 3 2 1

+3VALW_EC +3VALW_EC
Main Func = EC ‧
1.8V or 3.3V I/O Pins
GPI O061/ LPCPD#/ ESPI _ RESET#
VT R_33_18
UE1 EC@ RE1 EC@
SD034100280 10K_0402_1%
Model ID Board ID
SD034178280 17.8K_0402_1%
EC Chip CPN

1
GPI O063/ SER_I RQ/ ESPI _ ALERT# SD034270280 27K_0402_1%
GPI O064/ L RESET# SD034374280 37.4K_0402_1% RE3 RE1
GPI O034/ PCI _ CL K/ ESPI _ CL K SD034499280 49.9K_0402_1% Ra 100K_0402_1% Ra 100K_0402_1%
+3VALW_EC GPI O044/ LF RAME#/ ESPI _ CS#
GPI O040/ LAD0/ ESPI _I O0 MEC1416-NU-D0_VTQFP128_14X14 49.9K_0402_1% SD034649280 64.9K_0402_1% @
GPI O041/ LAD1/ ESPI _I O1 SD000002780 82.5K_0402_1%
MODEL_ID BOARD_ID

2
GPI O042/ LAD2/ ESPI _I O2 SA0000A8L00 SD034499280 SD034107380 107K_0402_1%
+3VALW 1 @ 2 SD034154380 154K_0402_1%
+3VALW GPI O043/ LAD3/ ESPI _I O3
RE5 0_0603_5% GPI O067/ CL KRUN# SD034200380 200K_0402_1% 1 1

2
10U_0402_6.3V6M

0.1U_0402_10V7K

1000P_0402_50V7K
@ CE3

1000P_0402_50V7K
@ CE4

0.1U_0402_10V7K

0.1U_0402_10V7K

0.1U_0402_10V7K

0.1U_0402_10V7K

0.1U_0402_10V7K

0.1U_0402_10V7K
CE10

0.1U_0402_10V7K
CE11
1 1 2 2 1 1 1 1 1
1 2 KSI0 Rb RE4 Rb
RE66 1 2 10K_0201_5% KSI1 100K_0402_1% RE2

CE1

CE2

CE5

CE6

CE7

CE8

CE9
RE67 1 2 10K_0201_5% KSI2 2 @ 2 100K_0402_1%
2 2 1 1 2 2 2 2 2
For
RE68 1 2 10K_0201_5% KSI3 Board ID Select

1
RE69 10K_0201_5%
EVT 10K
DVT1 17.8K
D D
1 2 KSI7 DVT2 27K
RE70 1 2 10K_0201_5% KSI6 Pilot 49.9K EC_AGND EC_AGND
RE71 1 2 10K_0201_5% KSI5
RE72 1 2 10K_0201_5% KSI4
RE73 10K_0201_5%
+3VALW_EC +1.8V_PRIM +1.8VALW_EC +3VALW_EC

1 2 KSO0 1 @ 2 +RTC_CELL_VBAT 1 2
RE74 1 2 100K_0201_5% KSO1 +RTC_CELL RE6 0_0603_5% RE7 0_0603_5% PBAT_CHG_SMBDAT 1 2
1
RE75 1 2 100K_0201_5% KSO2 RE8 4.7K_0402_5%
RE76 1 2 100K_0201_5% KSO3 CE12 PBAT_CHG_SMBCLK 1 2
RE77 100K_0201_5% 0.1U_0402_10V7K CPU_TPM_SMBDATA RE9 4.7K_0402_5%
2 1 @ 2

122

103
RE10 2.2K_0402_5%

43
82

19
65
1 2 CPU_TPM_SMBCLK

5
KSO4 UE1 CE13 1 @ 2
RE78 1 2 100K_0201_5% KSO5 54 1 2 RE11 2.2K_0402_5%
VTR_33_18

VBAT

VTR
VTR
VTR
VTR
VTR
VTR
RE79 1 2 100K_0201_5% KSO6 TP_WAKE_KBC# 1 2
RE80 1 2 100K_0201_5% KSO7 0.1U_0402_10V7K RE12 @ 100K_0402_5%
RE81 100K_0201_5% KSO0 2 SSD_SCP# 1 2
KSO1 14 GPIO027/KSO00/PVT_IO1 8 PBAT_CHG_SMBDAT RE60 100K_0402_5%
GPIO015/KSO01/PVT_CS# GPIO007/SMB01_DATA/SMB01_DATA18 PBAT_CHG_SMBCLK PBAT_CHG_SMBDAT [83,84] CLK_TP_SIO_I2C_DAT 1 @ 2
KSO2 15 9
1 2 16 GPIO016/KSO02/PVT_SCLK GPIO010/SMB01_CLK/SMB01_CLK18 11 SML1_SMBDATA PBAT_CHG_SMBCLK [83,84] RE490 2.2K_0402_5%
KSO10 KSO3 @
GPIO017/KSO03/PVT_IO0 GPIO012/SMB02_DATA/SMB02_DATA18 SML1_SMBCLK SML1_SMBDATA [8,28,66] DAT_TP_SIO_I2C_DAT 1 2
RE82 1 2 100K_0201_5% KSO11 KSO4 37 12
GPIO045/BCM_INT1#/KSO04 GPIO013/SMB02_CLK/SMB02_CLK18 SML1_SMBCLK [8,28,66] RE498 2.2K_0402_5%
RE83 1 2 100K_0201_5% KSO12 KSO5 38 89 TPS25810_EN
GPIO046/BCM_DAT1/KSO05 GPIO130/SMB03_DATA/SMB03_DATA18 TPS25810_EN
RE84 1 2 100K_0201_5% KSO13
[63] KSI[0..7]
KSO6 39 91 TPS25810_POL#
50 GPIO047/BCM_CLK1/KSO06 GPIO131/SMB03_CLK/SMB03_CLK18 96 TPS25810_POL# PECI_EC
RE85 100K_0201_5% KSO7 CLK_TP_SIO_I2C_DAT
CLK_TP_SIO_I2C_DAT PECI_EC [6]
KSO8 46 GPIO025/KSO07/PVT_IO2 GPIO141/SMB04_DATA/SMB04_DATA18 97 DAT_TP_SIO_I2C_DAT
[63] KSO[0..16] GPIO055/PWM2/KSO08/PVT_IO3 GPIO142/SMB04_CLK/SMB04_CLK18 DAT_TP_SIO_I2C_DAT

1
KSO9 68
1 2 KSO8 KSO10 72 GPIO102/KSO09[CR_STRAP] 40 FAN1_TACH +3VS
GPIO106/KSO10 GPIO050/TACH0 FAN1_TACH [77]
RE86 1 2 100K_0201_5% KSO15 KSO11 74 41
GPIO110/KSO11 GPIO051/TACH1 [51] DE1
RE87 1 2 100K_0201_5% KSO14 KSO12 75
RE88 1 2 100K_0201_5% KSO16 KSO13 76 GPIO111/KSO12 44 AZ5125-01H.R7G_SOD523-2 FAN1_TACH 1 2
RE89 100K_0201_5% KSO14 77 GPIO112/PS2_CLK1A/KSO13 MEC1416 GPIO053/PWM0 45 KB_LED_PWM [63]
+RTC_CELL @ RE16 10K_0402_5%
KSO15 86 GPIO113/PS2_DAT1A/KSO14 GPIO054/PWM1 BEEP [56] FAN1_PWM 1 2
2 1 KSO9 KSO16 92 GPIO125/KSO15 47 FAN1_PWM RE17 10K_0402_5%
GPIO132/KSO16 GPIO056/PWM3 FAN1_PWM [77]

2
93 34

1
RE18 100K_0402_5%

100K_0402_5%
2 1 USB_EN# [63] CAP_LED# GPIO140/KSO17 GPIO030/BCM_INT0#/PWM4 35

RE20
98 GPIO031/BCM_DAT0/PWM5 36 LANWAKE# [10]
RE19 100K_0402_5% KSI0
2 1 BAT1_LED# KSI1 99 GPIO143/KSI0/DTR# GPIO032/BCM_CLK0/PWM6 4 PCIE_WAKE# PS_ID [82]
6 GPIO144/KSI1/DCD# GPIO002/PWM7 PCIE_WAKE# [10,51,52,68] SYS_PWROK 1 2
C RE21 100K_0402_5% KSI2 C
BAT2_LED# GPIO005/SMB00_DATA/SMB00_DATA18/KSI2 BAT2_LED#

2
2 1 KSI3 7 1 RE22 10K_0402_5%
104 GPIO006/SMB00_CLK/SMB00_CLK18/KSI3 GPIO157/LED0/TST_CLK_OUT 106 BAT1_LED# BAT2_LED# [63] POWER_SW_IN# 1 2 RESET_OUT# 1 2
RE23 100K_0402_5% KSI4
1 2 VCCDSW_EN 105 GPIO147/KSI4/DSR# GPIO156/LED1 70 BAT1_LED# [63] POWER_SW#_MB [77]
KSI5 RE25 100_0402_5% RE24 10K_0402_5%
RE58 100K_0402_5% KSI6 107 GPIO150/KSI5/RI# GPIO104/LED2 PCH_RSMRST# 1 2
KSI7 108 GPIO151/KSI6/RTS# 80 RE26 10K_0402_5%

2.2U_0402_6.3V6M
GPIO152/KSI7/CTS# GPIO116/TFDP_DATA/UART_RX 81 HOST_DEBUG_TX ME_FWP [9]
GPIO117/TFDP_CLK/UART_TX HOST_DEBUG_TX [52] 1
78

CE14
[63] CLK_TP_SIO 79 GPIO114/PS2_CLK0 90
[63] DAT_TP_SIO 52 GPIO115/PS2_DAT0 GPIO035/SB-TSI_CLK 94 H_PECI PTP_DIS#
1 2 [63] PECI_EC
[10] SIO_PWRBTN# VCCDSW_EN 88 GPIO026/PS2_CLK1B GPIO033/PECI_DAT/SB_TSI_DAT 2
RE27 43_0402_1%
[78] VCCDSW_EN GPIO127/PS2_DAT1B 95 VREF_CPU
ESPI_IO0_R VREF_CPU +1.05V_VCCST
59 2
[8] ESPI_IO0_R ESPI_IO1_R 60 GPIO040/LAD0/ESPI_IO0 101 ICSP_CLK CE15 0.1U_0402_10V7K
[8] ESPI_IO1_R ESPI_IO2_R 61 GPIO041/LAD1/ESPI_IO1 GPIO145(ICSP_CLOCK) 102 ICSP_DAT
+3VALW
[8] ESPI_IO2_R ESPI_IO3_R 62 GPIO042/LAD2/ESPI_IO2 GPIO146(ICSP_DATA) 87 ICSP_CLR
[8] ESPI_IO3_R ESPI_CS# GPIO043/LAD3/ESPI_IO3 ICSP_MCLR +3VALW_EC
58
[8] ESPI_CS# GPIO044/LFRAME#/ESPI_CS# NB_MUTE#
1

56 119 RE29 1 @ 2 0_0201_5%

100K_0402_5%

[63] MASK_SATA_LED# 57 GPIO064/LRESET# BGPO/GPIO004 120 SYSPWR_PRES EC_MUTE# [56] 1 2

1
[8] ESPI_CLK_R GPIO034/PCI_CLK/ESPI_CLK SYSPWR_PRES/GPIO003 +3VLP
63 121 RE30 1K_0402_5%
RE28

GPIO067/CLKRUN# VCI_OUT/GPIO036 VCI_IN1# ALWON [85] 1 RE36

RE95 2 @ 1 0_0402_5% SYS_LED_MASK# 55 126 2
+RTC_CELL 100K_0402_5%
[63] MASK_BASE_LEDS# 10 GPIO063/SER_IRQ/ESPI_ALERT# VCI_IN1#/GPIO162 127 POWER_SW_IN# RE31 100K_0402_5%
GPIO011/nSMI/nEMI_INT VCI_IN0#/GPIO163 HW_ACAV_IN
2

49 128

1
100K_0402_5%
LID_CL_SIO# [63] TP_EN# 53 GPIO060/KBRST VCI_OVRD_IN/GPIO164 HW_ACAV_IN [82,84]
CMP_VIN0 2 CMP_VOUT0

2
[8] ESPI_RST# LID_CL_SIO# GPIO061/LPCPD#/ESPI_RESET# 1 @
66 23 +3VALW_EC

RE32
[38,77] LID_CL_SIO# GPIO100/nEC_SCI GPIO160/DAC_0 [27] RE38 100K_0402_5%
24
0.047U_0402_16V4Z

32 GPIO161/DAC_1 22
[50] TPS25810_UFP# GPIO126/SHD_SCLK DAC_VREF

2
+3VALW_EC
1

28
CE16

0.1U_0402_10V7K
[10] SYS_PWROK GPIO133/SHD_IO0 CMP_VOUT0 1
@ 29 85
[82,83,84] PBAT_PRES# 30 GPIO134/SHD_IO1 GPIO124/CMP_VOUT0 20 CMP_VIN0 1 CMP_VOUT0
2 [85]
@

CE17
1 [87] PRIM_PWRGD GPIO135/SHD_IO2 GPIO020/CMP_VIN0 VCIN0_PH [66]
2

31 25

1
VCREF0 RE34 0_0201_5%
CE18 [66] RTCRST_ON PCH_RSMRST# 27 GPIO136/SHD_IO3 GPIO165/CMP_VREF0 2 RE35
[10] PCH_RSMRST# GPIO123/SHD_CS#[BSS_STRAP] 83
100P_0402_50V8J PROCHOT 10K_0402_1%
2 67 GPIO120/CMP_VOUT1 21 SSD_SCP#
[6] BKLT_IN_EC GPIO101/SPI_CLK GPIO021/CMP_VIN1 SSD_SCP# [67,68]
69 26
ESPI_CLK_R [84] AC_DIS GPIO103/SPI_IO0 GPIO166/CMP_VREF1/UART_CLK LCD_TST [38]

2
71 VCREF0
42 GPIO105/SPI_IO1 118 CMP_STRAP0 RE94 1 2 10K_0402_5%

0.1U_0402_10V7K
[66] FPR_SCAN# TP_WAKE_KBC# GPIO052/SPI_IO2 GPIO024/ADC7 +3VALW_EC
33 117

1
[6,63] TP_WAKE_KBC# GPIO062/SPI_IO3 GPIO023/ADC6/A20M PANEL_BKEN_EC [38] 1
3 116 RE40
[51] AUX_ON GPIO001/SPI_CS#/32KHZ_OUT GPIO022/ADC5 MODEL_ID SIO_EXT_WAKE# [11]
2

109
33_0402_5%

CE19
B USB_EN# GPIO153/ADC4 I_ADP 10K_0402_1% B
13 110
RE39
@EMI@

[71,73] USB_EN# nRESET_IN/GPIO014 GPIO154/ADC3 BOARD_ID 2

[78] ALL_SYS_PWRGD RE41 1 @ 2 0_0201_5% RUNPWROK 48 111
RESET_OUT# GPIO057/VCC_PWRGD GPIO155/ADC2

2
73 113
VSS_VBAT

[10] RESET_OUT# GPIO107/nRESET_OUT GPIO122/ADC1 114 I_BATT LCD_VCC_TEST_EN [38]

VR_CAP

MEC_XTAL2 GPIO121/ADC0
ESD Request : CE31 place near to UE1
1

125 115
AVSS

MEC_XTAL1_R XTAL2 ADC_VREF +3VALW_EC

VSS
VSS
VSS
VSS
VSS

123
33P_0402_50V8J

XTAL1

0.1U_0402_10V7K
2

@
CE20
@EMI@

1 @
124

84
51
17
64
100
EC_AGND 112

18

MEC1416-NU-D0_VTQFP128_14X14
+3VS ALW_ON 2 1

CE21
1

CE31 0.1U_0201_10V6K
2
1
CE22
Close to UE1.57 0.1U_0402_10V7K 32 KHz Clock VR_CAP 1 2
PCH_DPWROC_EC_R 1 2 PCH_DPWROC_EC
PCH_DPWROC_EC
2 1 @ 2 EC_AGND RE500 0_0402_5%
YE1 RE44 0_0603_5% CE23 1U_0402_16V6K
MEC_XTAL1 1 MEC_XTAL2
5

UE2 2 @
VCC
Close UE1 TABLE_MODE# 1 2 CMP_VOUT0
4 OUT Y 2 PROCHOT
ESR <100m ohms CMP_VOUT0
INA 32.768KHZ_9PF_X1A000141000200
[6,82,84,88] H_PROCHOT# RE497 0_0402_5%
1 20ppm / 9pF 1 Close UE1
NL17SZ06DFT2G_SC70-5 NC GND
2

ESR <50kohm (MAX) EC_AGND

I_ADP 1 RE46 2 PANEL_MONITOR @ @
1 RE45 CE25 CE27
I_ADP_R [84] 1 2 CMP_VIN0 1 2
1

100K_0402_5% 12P_0402_50V8J 12P_0402_50V8J 300_0402_5% VCIN0_PH

2 2 1
CE24 RE496 0_0402_5% RE34 0_0402_5%
47P_0402_50V8J CE26
2 @
1

M_BIST 1 2
2200P_0402_25V7K
2
RE495 0_0402_5% @
FAN1_TACH 1 2
EC_AGND CE28 220P_0402_50V8J
+3VALW
+3VALW_EC

1
+3VALW_EC
I_BATT RE438
Debug Connector
1

1 RE47 2
10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

I_BATT_R [84] @ 100K_0201_5%

RE48 300_0402_5% @
+3VALW_EC Pull High with PWR Side RESET_OUT# 1 2
RE90

RE91

RE92

RE93

49.9_0402_1% 1
1

CE30 1000P_0402_50V7K
10K_0402_5%

100K_0402_5%

10K_0402_5%

10K_0402_5%

2
A 1 2 A
JDEG1 CONN@ CE31 PG_VCCIN_AUX
@ RE50

@ RE52

0_0201_5% HW_ACAV_IN
2

JESPI1 CONN@ 1 RE481 2 1

RE49

RE51

1 2 JTAG_TDI ICSP_CLK 2200P_0402_25V7K

1 RE53 1 @ 2 0_0201_5% 2 CE32 100P_0402_50V8J
1 2 2 3 JTAG_TMS RE54 1 @ 2 0_0201_5% ICSP_CLR PRIM_PWRGD @
2 3 3 4 1 2
ESPI_IO0_R JTAG_CLK 1.8V_PRIM_PG
2

3 4 ESPI_IO1_R 4 5 JTAG_TDO 1 2 0_0201_5% ICSP_DAT RE245 0_0201_5% Close to UE1 each pin
RE55 @ EC_AGND
4 5 ESPI_IO2_R 5 6 1.8V_PRIM_PWRGD
MSCLK
5 6 ESPI_IO3_R 6 7 MSDATA
6 7 ESPI_CS# 7 8 HOST_DEBUG_TX
7 8 2 @ 1 11 8 9
11 8 9 PLTRST# [10,27,51,52,66,68] 12 GND 9 10
RE65 0_0201_5%
12 GND 9 10 ESPI_CLK_R GND 10 Security Classification Compal Secret Data Compal Electronics, Inc.
1

Pin8 5085_TXD for EC Debug

GND 10 JXT_FP241AH-010GAAM RE57 2018/04/01 2019/04/01
Vinafix.com
pin9 5048_TXD for SBIOS
Issued Date Title
JXT_FP241AH-010GAAM
debug Deciphered Date
SP010021O00 10K_0402_5%
SP010021O00 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
EC MEC1416
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
LA-K033P
2

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS A00
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, June 31, 2019 Sheet 58 of 101
5 4 3 2 1
 Main Func = KB Main Func = TPAD
5 4 3 2 1

[58] KSI[0..7]
Keyboard Backlight (N3 only)
+TP_VDD +3VS
KB Backlight Power Consumption: 285mA max.
[58] KSO[0..16] +5VS F3 KBBL@ +5V_KB_BL

%
4.7K_0402_5

%
4.7K_0402_5

%
4.7K_0402_5

%
4.7K_0402_5
2 1

1
JKB1 CONN@ +3VALW +TP_VDD
1

R34

R35

R36

R37
[6] KB_DET#
1
1
0.5A_13.2V_MF-NSMF050-2 KBBL@ +TP_VDD Discharge
KSI7 2 C22 Q5
3 2 .1U_0402_16V7K
KSI6

2
KSI4 4 3 2 LP2301ALT1G_SOT23-3 +TP_VDD
KSI2 5 4 DAT_TP_SIO
[58] DAT_TP_SIO
EC/PS2
KSI5 6 5 3 1 2 1

D
KSI1 7 6 KBBL@ JKBBL1 CLK_TP_SIO R39
[58] CLK_TP_SIO 1
KSI3 8 7 R38 1 100_0402_5%
9 1 2 KB_LED_DET_C 1 I2C_0_SDA C23
KSI0 8 2 [10] I2C_0_SDA
PCH/I2C

G
[10] KB_LED_BL_DET

2
2

1
D KSO5 10 51K_0402_5% 3 5 .1U_0402_16V7K D
9 2

1
KSO4 11 KB_BL_CTRL# 4 3 G1 6 I2C_0_SCL D Q6
10 [10] I2C_0_SCL
KSO7 12 11 4 G2 1 2 2 2N7002K_SOT23-3
ACES_51575-00401-001 [58] TP_EN#
R40 R41 20K_0402_5% G

@ESD@ C24

@ESD@ C25
KSO6 13 12
KSO8 14 CONN@ S

10P_0402_50V8J

10P_0402_50V8J
13 100K_0402_5%
KSO3 15
14

3
KSO1 16
17 15
KSO2 16

2 1

2 1
KSO0 18
17
KSO12 19 18 D Q7

1
KSO16 20 +TP_VDD +TP_VDD
KSO15 19 2 KBBL@
21
22 20 [58] KB_LED_PWM G
KSO13 21

1
KSO14 23 S
22

3
KSO9 24 LN2306LT1G_SOT23-3 R42
23
KSO11 25 ESD depop location 10K_0402_5%
KSO10 24
26 25

2
CAP_LED 27

G
26

2
28
27 +TP_VDD INT_TP#
29 31 1 3
28 [11,58] TP_WAKE_KBC#
32

S
30 29GND31
H3E0FGENND_3A2FB02-S30F1A-HF Q8 LN2306LT1G_SOT23-3
SP021707030 +3VS

1
R43
2.2K_0402_5%

2
Q10B +TP_VDD

G
I2C_0_SCL 16 I2C_0_SCL_R
CONN@
L2N7002DW1T1G_SC88-6

D
SP01001A900

1
21
R45 0.1U_0402_16V7K C26 ACES_51524-0080N-001
2.2K_0402_5% +TP_VDD

5
Q10A 8
1 2 I2C_0_SDA_R 8 10
7

2
I2C_0_SDA 4 3 I2C_0_SDA_R R46 100K_0402_5% I2C_0_SCL_R 6 7 G2 9
+3VS L2N7002DW1T1G_SC88-6 5 6 G1

D
D5 INT_TP# 4 5
1 2 TP_LOCK# 3 4
[58] PTP_DIS# 3
C DAT_TP_SIO_R 2 C
+5VS RB551V-30_SOD323-2 CLK_TP_SIO_R 1 2
1
1

R47 JTP1
CAP LED Control 100K_0402_5% Co-Lay Two I2C Touchpad
CLK_TP_SIO_I2C_DAT RC7292 I2CPAD@1 0_0201_5% DAT_TP_SIO_R RC7312
3

LOW actived from KBC GPIO [58] CLK_TP_SIO_I2C_DAT DAT_TP_SIO_I2C_CLK RC7302 I2CPAD@1 10_0201_5% DAT_TP_SIO
2

0_0201_5%CLK_TP_SIO_RRC7322
+3VALW_EC [58]
2

10_0201_5% CLK_TP_SIO
G

R2 DAT_TP_SIO_I2C_CLK

[58] CAP_LED#
3 1 CAP_LED_R# 2 Q12 +3VALW
DDTA144VCA-7-F_SOT23-3
S

R1

Q9
LN2306LT1G_SOT23-3
1

R48
CAP_LED_Q 1 2 CAP_LED

1K_0402_5%

Main Func = Battery LED BJT

R1:47K +3VALW
Low actived from KBC GPIO R2: 10K
1

+5VALW
R89
100K_0402_5%
2

LED1
1 2 1 2
+1.8V_PRIM
3

B R26 @ 10K_0402_5% RC158 10K_0402_5% W HITE_LED_BAT 2 1 2 1 B

W
2

R27 200_0402_5%
R2
1 6 CHG_AMBER_LED_R# 2 Q2 AMBER_LED_BAT 2 1 4 3
[58] BAT1_LED# Y
DDTA144VCA-7-F_SOT23-3 R28 200_0402_5%
[58] MASK_SATA_LED#
Q15A R1
L2N7002DW1T1G_SC88-6 LTW-295DSKS-5A_YEL-WHITE~D
2 G

BATT_W HITE_LED_R# [58] MASK_BASE_LEDS#

1

SATA_LED# 2 @ 1 SATA_LED#_R 3 1
3

R791 0_0201_5%
S

AMBER_LED_BAT
R2
Q3 W HITE_LED_BAT
4 3 BATT_W HITE_LED_R# 2 Q4 1 2
LN2306LT1G_SOT23-3 [58] BAT2_LED#
DDTA144VCA-7-F_SOT23-3 C21 1U_0402_10V6K
Q15B R1
L2N7002DW1T1G_SC88-6

DVT1_58
1

W HITE_LED_BAT +3VALW
+3VS
1

1
MB I TS @
R30 R283
100K_0402_5% 1M_0201_5% BAT1_LED#
+3VS
D481@
2

2
RB751V40_SC76-2
1

3
SATA_LED#_R 1 2 R1=10K;R2=10K
R31 [11,58,82,84,96] HW_ACAV_IN
QZ20
100K_0402_5% R2
LMUN5111T1G_SC70-3

M_BITS_R
3

R273 1 MB I TS @ 2 0_0201_5% BAT1_LED#_Q 2

[58] M_BIST
Q16B MB ITS @
2

R1
L2N7002DW1T1G_SC88-6
5 R272 1 @ 2 330K_0201_1%
[11,78,79] PCH_RSMRST#_Q
C DVT1.2_15

1
4

1
6

2 1 2
Q16A C92 2.2U_0201_6.3V6M B
A MB I TS @ E MB ITS @ 1 2 A
L2N7002DW1T1G_SC88-6

3
2 QE25 R789 150_0201_1%
[9,68] SATA_LED#
LMBT3904WT1G_SC70-3
MB I TS @
DVT1.2_07
1

[58] POWER_SW_IN#

SecuriiityClllassiiifiiicatiiion Compal SecretData Compal Electronics,Inc.

Issued Date 2018/04/01 Deciiiphered Date 2019/04/01 Tiitttlle

THIS S HE E T O F ENGIIINEERING DRAW IIING IIISTHE P R O P RI ETARY P RO P ERTY O F C O MP AL ELECTRONICS,,, IIINC. AND CONTAIIINS CONFIIIDENTIIIAL SiizeDocumentttNumberrr
Keyboard/Touch Pad/Thermal/FAN
AND TR AD E S E CRET IIINFORMATIIION. THIS S HE E T MAY NO T B E TR ANS F E RED F RO M THE C US TO D Y O F THE C O MP E TENT DIVIIISIIION O F R& D D
Rev
E P ARTME NT E X C E PT AS AUTHO R I Z E D B Y C O MP AL ELECTRONICS,,, IIINC. NEIIITHER THIS S HE E T NO R THE IIINFORMATIIION IIIT CONTAIIINS MAY BE
US E D BY OR DI S CLO SED TO ANY THIRD P AR TY WIIITHOUT P RI O R W RI TTEN C O NS E NT OF CO MP AL ELECTRONICS,,, IIINC.
LA-G711P 0..2

Dattte:::Monday,,,Jullly29,,, 2019 Sheettt63 offf101

5 4 3 2 1
 5 4 3 2 1

Main Func = FPR RX19 1 CTPM@ 2 0_0402_5%

+3VS

+3VS Main Func = TPM RX18 1 TPM@ 2 0_0402_5%

+3VALW

0.1U_0402_10V7K

10U_0402_6.3V6M
1 1

1
R5

CX1 TPM@

CX2 TPM@
@ 0_0402_5%
Main Func = OTP +3VS
2 2
CX1, CX2: close toPin1
D D

2
1 TPM@ 2 TPM_SPI_IRQ#
12 +FP_VCC RX1 10K_0402_5%
C4 0.1U_0402_16V7K
8
JFP1 Close to KBC
7 8 10 UX1 TPM@ +3VS
7 G2
[12] USB20_N5
6
5
6 G1
9
Put below CPU CMP_VIN0 for system thermal sensor 29 VSB
1 RX10 1 @ 2 0_0402_5%
[12] USB20_P5 5
4 30 SDA/ GPIO0 8 RX12 1 2 750_CTPM@ 0_0402_5%
4 GPIO 1/SCL VHIO
3 +3VALW _EC 22 RX15 1 TPM@ 2 0_0402_5% +3VS
3 VHIO
2 6

0.1U_0402_10V7K

10U_0402_6.3V6M
[58] FPR_SCAN# 2 TP80 GPIO 3 1 1
3

2
1 2

0.1U_0402_10V7K

0.1U_0402_10V7K

10U_0402_6.3V6M
1 1 1 1
NC

1
RX5 1 TPM@ 2 49.9_0402_1% SPI_D1_TPM 24 3 1@2

CX3 TPM@

CX4 TPM@
[9] CPU_SPI_D1 +3VALW _PCH
3

ACES_51522-00801-001 R52 RX6 1 TPM@ 2 49.9_0402_1% SPI_D0_TPM 21 MISO NC 5 RX16

CX5 @

CX6 TPM@

CX7 @
RX11 0_0402_5%
[9] CPU_SPI_D0 NC 2 2
TPM_SPI_IRQ# 18 MOSI/ GPIO7 7

2
CONN@ 6.49K_0402_1% 0_0402_5%
EU5 ESD@ L03ESDL5V0CG3- [9] TPM_SPI_IRQ# SPI_IRQ#/GPIO2 NC 9 TP81 2 2 2

2
SP01001AE00

ST_CTPM@
2_SOT-523-3 NC 10

2
RX9 1 TPM@ 2 49.9_0402_1% SPI_CLK_TPM 19 NC 11 CX5, CX6, CX7: colse toPin22

RX21 0_0402_5%
[9] CPU_SPI_CLK SCLK NC 12

2
20
1

CTPM@
[9] CPU_SPI_0_CS#2 NC

1
EU6 @ESD@ L03ESDL5V0CG3- 17 SCS#/GPIO5 14 1@2
[11,51,52,58,68] PLTRST# +3VALW _PCH
1

2_SOT-523-3 VCIN0_PH [58] 27 RESET# NC 15 RX17 0_0402_5%

13 NC NC 26
GPIO4/SINT# NC
1 CTPM@ 2 +3VS CX3, CX4: colse toPin8

1
25

1
1 1 RX20 0_0402_5%
NC

1
RH1 @ 28

1
100K_0402_1%_B25/50 4250K C31 C32 4 NC 31
0.1U_0402_16V7K PP/GPIO 6 NC 32 RX22 2 CTPM@ 1 0_0402_5%
100P_0402_50V8J
2 2 NC
16 RX13 1

2
2 750_CTPM@ 0_0402_5%
C
VD_IN1_C R53 1 @ 2 0_0402_5% HW TPM:TPM@ GND
23 RX14 1 2 750_CTPM@ 0_0402_5%
C

SWTPM:fTPM@ GND 33
PG ND
UX1

+3VS ChinaTPM:CTPM S IC NPCT750JABYX QFN 32P TPM FW 7.2.1.0 SA0000AQ270

SA0000AQ270 @
FPR_SCAN# 2 1
R6 10K_0402_5% S IC NPCT750JABYX QFN 32P TPM FW 7.2.1.0
UX1 place colse to UC3

Main Func = Thermal

+3VS
Main Func = RTC
+3VS RTC power gatingcircuit
+3VS
R54 1 2 18.7K_0402_1% ALERT# +RTC_SOC +RTC_CELL

1
Q17
R55 1 2 2K_0402_1% T_CRIT# R49 LP2301ALT1G_SOT23-3
2.2K_0402_5% +RTC_VCC +3VLP
1 @ 2 CMP_VOUT0 R376 +RTC_CELL 1 3

S
B CMP_VOUT0 [58,85] B

2
+3VS 0_0201_5% D1

2
Q11B R1 2

G
anode

1
61 THM_SML1_DATA 1K_0402_5% 1

10K_0402_5%

G
[9,58] GPU_THM_SMBDAT

2
L2N7002DW1T1G_SC88-6 2 1 +RTC_PWR 3 cathode

R63
1U_0201_6.3V6M
anode 1

1
1 1
R50 BAS40C_SOT23-3

C3
C28 2.2K_0402_5% C1 @
2

2
5
0.1U_0402_16V7K Q11A 0.47U_0402_6.3V6K
2 2 D8

2
3 4 THM_SML1_CLK RB751S40T1G_SOD523-2
[9,58] GPU_THM_SMBCLK

1
L2N7002DW1T1G_SC88-6 2 1

S
R2
10M_0402_5%
D

1
NCT7718_DXP R64

2N7002KW 1NSOT323-3
2
Q13 U3 2 RTCRST_ON_R 1 2 RTCRST_ON
RTCRST_ON [58]

2
1 8 THM_SML1_CLK G

G
1 1 1M_0402_5%
C
1

@ VDD SCL S

Q18
3
C29
LMBT3904LT1G_SOT23-3

2 C30 2 3 1

100K_0402_5%
THM_SML1_DATA

0.1U_0402_10V7K
7 RTC_DET# [6]
B

2
470P_0603_50V8J 2200P_0402_25V7K D+ SDA

22P_0402_50V8J

@
1

D
E 2 2 3 6 ALERT#

R65
D- ALERT#
3

NCT7718_DXN

C2

C33
Q1
T_CRIT# 4 5

21
DIMM CPU Core T_CRIT# GND 2N7002K_SOT23-3 2

1
NCT7718W _MSOP8

LayoutNote:
A
LayoutNote: C30 close U3
A

DXN and DXP routing width and spacing is 10 mil / 10

mil.
Securiiittty Clllassiifffiicatttiiion
2018///04///01
Compalll Secret Data
2019///04///01 Tiittle
Compal Electronics,Inc.
IIIssued Dattte Deciiiphered Dattte
THIIIS SHEET OF ENGIIINEERIIING DRAWIIING IIISTHE PROPRIIIETARY PROPERTY OF COMPAL ELECTRONIIICS,,, IIINC...ANDCONTAIIINS CONFIIIDENTIIIAL Siiize DocumentttNumberrr
TPM/RTC/Screwhole Rev
AND TRADE SECRET IIINFORMATIIION... THIIIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIIIVIIISIIION OF R&D
LA-K033P
0..2
DEPARTMENT EXCEPT AS AUTHORIIIZED BY COMPAL ELECTRONIIICS,,, IIINC... NEIIITHER THIIIS SHEET NOR THE IIINFORMATIIION IIITCONTAIIINS MAY BE USED
BY OR DIIISCLOSED TO ANY THIIIRD PARTY WIIITHOUT PRIIIOR WRIIITTEN CONSENT OF COMPAL ELECTRONIIICS,,, IIINC...
Dattte::: Monday,,, Jully 29,,, 2019 Sheettt 66 offf 101
5 4 3 2 1
Main Func = HDD&FFS
+5VS +5V_HDD JHDD1
1
1
[12] SATA_CTX_DRX_P0
CS15 1
CS16 1
2 0.01U_0402_16V7K
2 0.01U_0402_16V7K
SATA_CTX_C_DRX_P0
SATA_CTX_C_DRX_N0
2
3
2 CONN FFC
80mils 1 2 80mils [12] SATA_CTX_DRX_N0
4
3
4
RS32 0_1206_5%
[12] SATA_CRX_DTX_N0
CS17 1
CS18 1
2 0.01U_0402_16V7K
2 0.01U_0402_16V7K
SATA_CRX_C_DTX_N0
SATA_CRX_C_DTX_P0
5
6 5 GND S1 1

K
0.1U_0402_10V7
K
1000P_0402_50V7

M
10U_0603_10V6
[12] SATA_CRX_DTX_P0 7 6

10P_0201_25V8
C104
@RF@
1 1 1 1 7
[12] HDD_DEVSLP
1 2 HDD_DEVSLP_R
FFS_INT2_Q
8
9 8 A+ S2 2

CS30
RS28 0_0201_5%

CS29

CS31
1@2 10 9
2 2 2 2 [9] HDD_DET# +5V_HDD 10
RS33 0_0201_5% 11
12 11 A- S3 3
12
13
14 GND GND S4 4
C104 place near JHDD1 GND
ACES_51625-01201-001
CONN@
B- S5 5
+3V_FFS +3VS B+ S6 6
0_0201_5% 2 FFS@1 RS13 GND S7 7

K
0.1U_0402_10V7

M
10U_0603_10V6
DEVSLP P3 8

CS32 FFS@

CS33
1 1
US2 FFS@ +5V_HDD
LNG2DM
2
@
5V P7 10

1
2 10 5
9 VDD_IO RES +3VS RS31 FFS@
VDD
SA0 3 INT 1 11
12 ISH_ACC1_INT#
ISH_ACC2_INT#
ISH_ACC1_INT# [10]
100K_0402_5% 5V P8 11
4 SDO/SA0 INT2 ISH_ACC2_INT# [10]

1
FFS_SDA
FFS_SCL 1 SDA/SDI/SDO 6 FFS@ RS30 FFS_INT2_Q
5V P9 12
SCL/SPC GND 7

32
100K_0402_5%
2 GND 8
CS GND QS1B FFS@
GND P10

2
+3V_FFS L2N7002DW 1T1G_SC88-6
LNG2DMTR_LGA12_2X2 5 Device
1@2 SA0
Activity P11 9
RS41 0_0201_5% SA000089W00

4
6
QS1A FFS@
L2N7002DW 1T1G_SC88-6
[58,68] SSD_SCP# 1 @ 2 ISH_ACC2_INT# 2
DVT 1.0 RS29 0_0201_5%
Change US2.1 and US2.4(SCL/SDA) connect

1
from PCH_SMBCLK/PCH_SMBDATA to
ISH_I2C_0_SCL/ISH_I2C_0_SDA.
DVT 1.0
ISH_I2C_1_SDA FFS_SDA
Change US2.3 (SA0) connect from +3V_FFS to GND.
1FFS@ 2
[10] ISH_I2C_1_SDA ISH_I2C_1_SCL FFS_SCL 1 FFS@ 2
RS381FFS@ 20_0201_5% SA0
[10] ISH_I2C_1_SCL
RS39 0_0201_5% RS40 0_0201_5%

Main Func = ODD

CONN FFC
GND S1 1
A+ S2 2
A- S3 3
JODD1
+5VS +5V_ODD GND S4 4
JP7 SATA_CTX_C_DRX_P1
1
3 1 24
2
SATA_CTX_C_DRX_P1 CO4 1 2 0.01U_0402_16V7K SATA_CTX_DRX_PA1 [12]
Always Short SATA_CTX_C_DRX_N1 5 3 46 SATA_CTX_C_DRX_N1 CO5 1 2 0.01U_0402_16V7K
7 5 68 SATA_CTX_DRX_NA1 [12] B- S5 5
JP7 JUMP@ SATA_CRX_C_DTX_N1 97 8 10 SATA_CRX_C_DTX_N1 CO6 1 2 0.01U_0402_16V7K
60mils 1 2 60mils SATA_CRX_C_DTX_P1 11 9 10 12 SATA_CRX_C_DTX_P1 CO7 1 2 0.01U_0402_16V7K
SATA_CRX_DTX_NA1 [12]
12 13 11 12 14
SATA_CRX_DTX_PA1 [12] B+ S6 6
SATA_ODD_PRSNT# 15 13 14 16 SATA_ODD_PRSNT#
K
1000P_0402_50V7

K
0.1U_0402_10V7

JUMP_43X79
M
10U_0603_10V6

17 15 16 18 SATA_ODD_PRSNT# [12]
1 1 1 +5V_ODD
19 17 18 20 +5V_ODD GND S7 7
21 19 20 22 1 2
CO1

CO2

CO3

+3VS
SATA_ODD_DA# 23 21 22 24 SATA_ODD_DA# TP176 RO1 100K_0402_5%
2 2 2 23 24 PRSNT P1 8
25 26
GNDGND
5V P2 9
ACES_50673-0120N-P01
SP01002HK00
10
5V P3 11
CONN@

Attention P4 12
GND P5
GND P6

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2018/04/01 Deciphered Date 2019/04/01 Tiitle

T HIS SH EET OF EN G IN EER IN G D R AW IN G IS T H E PR O PR IET AR Y PR O PER T Y OF C O MP A L EL EC T R O N IC S, INC. A N D C O N T AIN S C O N F ID EN T IAL

HDD/FFS/ODD
A N D T R AD E SEC R ET IN F O R MAT IO N . T HIS SH EET MA Y N O T BE T R AN SF ER ED F R O M T H E C U S T O D Y O F T H E C O MPET EN T DIVISION O F R & D
Siiize Document Number Rev

LA-G711P
D EPAR T MEN T EXC EPT AS AU T H O R IZ ED BY C O M P A L EL EC T R O N IC S, INC. N EIT H ER T HIS SH EET N O R T H E IN F O R MAT IO N IT C O N T AIN S Custom 0.2
MA Y BE U S E D BY OR D ISC L O SED T O AN Y T H IR D PAR T Y W IT H O U T PR IO R W R IT T EN C O N S E N T OF C O MP A L EL EC T R O N IC S, INC.
Date: Monday, Jullly 29, 2019 Sheet 67 of 101
 5 4 3 2 1

Main Func = SSD M Key CONN

+3VS_SSD +3VS

80mils JUMP@ JPC3

1 2
D 1 2 D

JUMP_43X79

10U_0603_10V6M

0.1U_0402_10V7K

7 K
1000P_0402_50V

6 M
22U_0603_6.3V
@ 1 1 1 1

10P_0201_25V8
C103
@
@RF
CS1

CS3

CS5
CS4
2 1
NGFF Key M 2 2 2 2

+3VS_SSD

JSSD1
1 2
GND1 3.3VAUX1 4
3 3.3VAUX2
5 GND2 N/C1 6
[12] PCIE_CRX_DTX_N13 PETn3 RS2 1
7 N/C2 8 2 0_0201_5% SSD_SCP# [58,67]
[12] PCIE_CRX_DTX_P13 9 PETp3 DAS/DSS# 10 RS34 1 @ 2 0_0201_5%
CS7 1 2 0.22U_0402_16V7K PCIE_CTX_C_DRX_N13 GND3 SATA_LED# [9,63]
[12] PCIE_CTX_DRX_N13
11 3.3VAUX3 12
CS8 1 2 0.22U_0402_16V7K PCIE_CTX_C_DRX_P13 13 PERn3 3.3VAUX4 14
[12] PCIE_CTX_DRX_P13 PERp3 16
15 3.3VAUX5
17 GND4 3.3VAUX6 18
[12] PCIE_CRX_DTX_N14 PETn2
19 N/C3 20
21 PETp2
C [12] PCIE_CRX_DTX_P14 C
GND5 N/C4 22
CS9 1 2 0.22U_0402_16V7K PCIE_CTX_C_DRX_N14 23 24
[12] PCIE_CTX_DRX_N14 N/C5 26
CS10 1 2 0.22U_0402_16V7K PCIE_CTX_C_DRX_P14 25 PERn2 N/C6
[12] PCIE_CTX_DRX_P14 PERp2
27
GND6 N/C7 2830
29 N/C8 32
[12] PCIE_CRX_DTX_N15 31 PETn1 N/C9 34
[12] PCIE_CRX_DTX_P15 33 PETp1 N/C10 36
CS11 1 2 0.22U_0402_16V7K PCIE_CTX_C_DRX_N15 35 GND7 N/C11 38
[12] PCIE_CTX_DRX_N15 CS12 1 37 PERn1
2 0.22U_0402_16V7K PCIE_CTX_C_DRX_P15 DEVSLP
[12] PCIE_CTX_DRX_P15 39 PERp1 SSD_DEVSLP [12]
41 GND8 N/C12 40
N/C13 42
[12] PCIE_CRX_DTX_P16 43 PETn0/SATA-B+
[12] PCIE_CRX_DTX_N16 45 PETp0/SATA-B- N/C14 44
46
N/C15
PCIE_CTX_C_DRX_N16 47 GND9
CS13 1 2 0.22U_0402_16V7K N/C16 48
[12] PCIE_CTX_DRX_N16
CS14 1 2 0.22U_0402_16V7K PCIE_CTX_C_DRX_P16 49 PERn0/SATA-A- 50
PERST#
[12] PCIE_CTX_DRX_P16 51 PERp0/SATA-A+ PLTRST# [11,51,52,58,66]
CLKREQ# 52
53 GND10 CLKREQ_PCIE#4 [9]
PEWake# 54
[9] CLK_PCIE_N4 55 REFCLKN PCIE_WAKE# [11,51,52,58]
N/C17 56
[9] CLK_PCIE_P4 57 REFCLKP
GND11 N/C18 58
+3VS_SSD 1 RS1 2

10K_0402_5% Key M
B 67 68 SSD_SUSCLK RS35 1 2 0_0402_5% SUSCLK_R SUSCLK_R [9,52] B
N/C19 SUSCLK(32kHz)(O)(0/3.3V)
69 70
[12] M2_SSD_PEDET 71 PEDET(OC-PCIe/GND-SATA) 3.3VAUX7 72
GND13 3.3VAUX8 74
73 GND15 3.3VAUX9
75
GND17

PEDET Module Type 77

PTH2 PTH1
76

LCN_DAN05-67306-0103
0 SATA CONN@

1 PCIE

A A

SecurityClassification Compal Secret Data Compal Electronics,Inc.

Issued Date 2018/04/01 Deciphered Date 2019/04/01 Title

T HIS SHEET OF ENG INEERING DRAW ING IS T H E PRO PRIET ARY P R O P E R T Y OF C O M P A L ELECT RO NICS, INC. A N D CO NT AINS CO NFIDENT IAL
NVMESSD
A N D T R A D E SECRET INFO RMAT IO N. T HIS SHEET M A Y N O T BE T R A N S F E R ED F R O M T H E C U S T O D Y OF T H E C O M P E T E N T DIVISION OF R & D Size Document Number Rev
D E P A R T M E N T EXCEPT AS AUT HO RIZED BY C O M P A L ELECT RO NICS, INC. NEIT HER T HIS SHEET N O R T H E INFO RMAT IO N IT CO NT AINS
M A Y BE U S E D BY OR DISCLO SED TO A N Y T HIRD P A R T Y W IT HO UT PRIO R W RIT T EN C O N S E N T OF C O M P A L ELECT RO NICS, INC. LA-K033P 0.2

Date: Monday,July29,2019 Sheet 68 of 101

5 4 3 2 1
 5 4 3 2 1

Main Func = USB3.0 Port1

W=80mils
EU1 USB3.0 Port1
USB3_CRX_L_DTX_N1 1 1 10 9 USB3_CRX_L_DTX_N1 +USB3_VCC

USB3_CRX_L_DTX_P1 2 2 9 8 USB3_CRX_L_DTX_P1 JUSB1

1 @EMI@ 2 USB3_CTX_L_DRX_P1 9
STDA_SS TX+
RU1 0_0201_5% USB3_CTX_L_DRX_N1 4 4 7 7 USB3_CTX_L_DRX_N1 1
VBUS
Layout Note: Close JUSB1
USB3_CTX_L_DRX_N1 8 +USB3_VCC
USB3_CTX_L_DRX_P1 5 USB20_P1_R 3 STDA_SS TX-
5 6 6 USB3_CTX_L_DRX_P1
DLM0NSN900HY2D_4P 4 D+
3 4 USB20_N1_R 3 3
USB20_N1_R 2 GND_1 100mils
[12] USB20_N1 3 4 USB3_CRX_L_DTX_P1 D-
6
1
8 7 STDA_SSRX+
D 1 1 1 1 D
2 1 USB20_P1_R USB3_CRX_L_DTX_N1 5 GND_2 + @RF@

4.7U_0402_6.3V

22U_0603_6.3V6M

100U_A_6.3VM_R70M
22U_0603_6.3V6M
[12] USB20_P1 2 1

2
S DIO(BR) AZ1045-04F.R7G DFN2510P10E ESD STDA_SSRX- C100

CU4

CU6

CU7
CU5
LU1 EMI@ ESD@ ESD@ 10 10P_0201_25V8

2
EU2 11 G ND1 2 2 2 2 2
AZC199-02SPR7G_SOT23-3 12 G ND2
13 G ND3

1
1 @EMI@ 2
RU2 0_0201_5% G ND4

1
ACON_TARAN-9R1391
CONN@

1 2 USB3_CTX_C_DRX_P1 2 EMI@ 1 0.1U_0402_10V7K USB3_CTX_L_DRX_P1 2 EMI@ 1 USB3_CRX_L_DTX_P1

[12] USB3_CTX_DRX_P1 [12] USB3_CRX_DTX_P1
CU1 RU3 0_0402_5% RU4 0_0402_5%

HCM1012GH900BP_4P HCM1012GH900BP_4P
3 4 3 4

2 1 2 1

LU2 @EMI@ LU3 @EMI@

1 2 USB3_CTX_C_DRX_N1 2 EMI@ 1 USB3_CTX_L_DRX_N1 2 EMI@ 1 USB3_CRX_L_DTX_N1

[12] USB3_CTX_DRX_N1 [12] USB3_CRX_DTX_N1
CU2 0.1U_0402_10V7K RU5 0_0402_5% RU6 0_0402_5%

C C

Maximum Output
Current 2A

+5VALW +USB3_VCC

UU1
1
5 O UT
IN 2
4 G ND
[58,73] USB_EN# EN
1 3
O CB USB_OC0# [12]
CU13
1U_0201_6V3M SY6288D20AAC_SOT23-5

Main Func = USB3.0 Port2

B USB3.0 Port2 B

+USB3_VCC

JUSB2
1 @EMI@ 2 USB3_CTX_L_DRX_P2 9
STDA_SS TX+
RU7 0_0201_5% EU3 1
VBUS
Layout Note: Close JUSB2
USB3_CRX_L_DTX_N2 1 1 10 9 USB3_CRX_L_DTX_N2 USB3_CTX_L_DRX_N2 8 +USB3_VCC
USB20_P2_R 3 STDA_SS TX-
DLM0NSN900HY2D_4P USB3_CRX_L_DTX_P2 2 2 8 USB3_CRX_L_DTX_P2 4 D+
3 4 USB20_P2_R
9
USB20_N2_R 2 GND_1 100mils
[12] USB20_P2 3 4 USB3_CRX_L_DTX_P2
USB3_CTX_L_DRX_N2 4 4 7 7 USB3_CTX_L_DRX_N2 6 D- 1
7 STDA_SS RX+ 1 1 1 @ 1
2 1 USB20_N2_R USB3_CTX_L_DRX_P2 5 5 6 USB3_CTX_L_DRX_P2 USB3_CRX_L_DTX_N2 5 GND_2 + @RF@

4.7U_0402_6.3V

22U_0603_6.3V6M

100U_A_6.3VM_R70M
22U_0603_6.3V6M
[12] USB20_N2 6
2 1 STDA_SSRX- C101

CU9

CU11

CU12
CU10
2

3
LU4 EMI@ 3 3 10 10P_0201_25V8
11 G ND1 2 2 2 2 2
2

3
8 ESD@
12 G ND2
1 @EMI@ 2 AZC199-02SPR7G_SOT23-3 13 G ND3
1

RU8 0_0201_5% S DIO(BR) AZ1045-04F.R7G DFN2510P10E ESD EU4 G ND4

ESD@ ACON_TARAN-9R1391
1

CONN@

1 2 USB3_CTX_C_DRX_P2 2 EMI@ 1 USB3_CTX_L_DRX_P2 2 EMI@ 1 USB3_CRX_L_DTX_P2

[12] USB3_CTX_DRX_P2 [12] USB3_CRX_DTX_P2
CU14 0.1U_0402_10V7K RU9 0_0402_5% RU10 0_0402_5%

HCM1012GH900BP_4P HCM1012GH900BP_4P
3 4 3 4

2 1 2 1
A A
LU5 @EMI@ LU6 @EMI@

1 2 USB3_CTX_C_DRX_N2 2 EMI@ 1 USB3_CTX_L_DRX_N2 2 EMI@ 1 USB3_CRX_L_DTX_N2

[12] USB3_CTX_DRX_N2 [12] USB3_CRX_DTX_N2
CU15 0.1U_0402_10V7K RU11 0_0402_5% RU12 0_0402_5%

Securiiity Cllassiiifiicatiiion Compal Secret Data CompalElectronics,Inc.

Issued Date 2018/04/01 Decipheredii Date 2019/04/01 Tiiitttllle

THIIIS S HE E T O F ENGIIINEERIIING DRAW I I ING IIIS T H E PROPRIIIETARY P R O P E R T Y O F C O M P A L ELECTRONIIICS,,, IIINC... A N D CONTAIIINS CONFIIIDENTIII AL
USB3.0 Rev
A ND T R A D E S E C R E T IIINFORMATIIION... THIIIS S H E E T M A Y N O T B E T R AN S F E R E D F R O M T HE C US T O D Y O F T H E C O M P E T E N T DIIIVIIISIIION O F R&SDiiizeDocumentttNumber

LA-K033P
D E P A R T M E N T E X C E P T A S AUTHORII IZED BY C O M P A L ELECTRONIIICS,,, IIINC... NEIIITHER THIIIS S H E E T N O R T H E IIINFORMATI IION IIIT CONTAIIINS M A 0.2
Y BE US E D BY O R DIIISCLOSED T O A NY THIIIRD P A R T Y W I I ITHOUT PRIIIOR W RIIITTEN C O N S E NT O F C O M P A L ELECTRONIIICS,,, IIINC...
Dattte:::Monday,,,Jullly29,,,2019 Sheettt71 off 101
5 4 3 2 1
 5 4 3 2 1

D
Main Func = USB2.0 Port3 + Card Reader on IO/B D

+5VALW +USB2_VCC 1 @EMI@ 2

USB2.0/Card Reader connector
RU13 0_0201_5%
JIOB1 CONN@
UU2 1
1 LU7 EMI@ 2 1
OUT USB20_P7_R 2
5

4
IN
GND
2
[12] USB20_P7 2
2 1
1
CardReader USB20_P7_R
USB20_N7_R
3
4
5
3
4
[58,71] USB_EN# EN USB20_N7_R 5
1
OCB
3

SY6288D20AAC_SOT23-5
USB_OC1# [6] [12] USB20_N7
3
3
DLM0NSN900HY2D_4P
4
4
USB2.0Port USB20_P3_R
USB20_N3_R
6

8
7 6
7
CU16
1U_0201_6V3M 9 8
10 9
2 +USB2_VCC 1 @EMI@ 2 11 10
+RTC_VCC
RU14 0_0201_5% 12 11
+3VS
13 12
+USB2_VCC
1 1 @EMI@ 2 14 13
RU15 0_0201_5% 15 14
CU17
22U_0603_6.3V6M
80mils 16 15
16
2@ DLM0NSN900HY2D_4P 17
2 1 USB20_P3_R 18 GND
[12] USB20_P3 2 1
GND
ACES_51524-0160N-001
C
3 4 USB20_N3_R C
[12] USB20_N3 3 4
LU8 EMI@

1 @EMI@ 2
RU16 0_0201_5%

B B

A A

Securiiity Clllassiiifiiicatiiion
2018/04/01
CompalSecret Data
2019/04/01 Tittlelti
Compal Electronics,Inc.
Issued Date Deciiiphered Date
THIIIS SHEET OF ENGIIINEERIIING DRAWIIING IIIS THE PROPRIIIETARY PROPERTY OF COMPAL ELECTRONIIICS,,, IIINC... AND CONTAIIINS CONFIIIDENTIIIAL AND
SiiizeDocumenttt Number
Finger Print & I/OCONN
TRADE SECRET IIINFORMATIIION... THIIIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIIIVIIISIIION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIIIZED BY COMPAL ELECTRONIIICS,,, IIINC... NEIIITHER THIIIS SHEET NOR THE IIINFORMATIIION IIIT CONTAIIINS MAY
BE USED BY OR DIIISCLOSED TO ANY THIIIRD PARTY WIIITHOUT PRIIIOR WRIIITTEN CONSENT OF COMPAL ELECTRONIIICS,,, IIINC... LA-K033P 0..2

Dattte::: Monday,,, Jullly29,,,2019 Sheett 73 offf101

5 4 3 2 1
 5 4 3 2 1

Main Func = Power BTN Low actived from KBC GPIO

JPW R1 CONN@
1
POW ER_SW #_MB 21
2
LID_CLOSE# 3
3
4
+3VALW 4
D 5 D
R25 1 2 100_0402_5% LID_CLOSE# 6 GND1
[38,58] LID_CL_SIO# GND2
[58] POW ER_SW#_MB JXT_FP226H-004S1AM
SP01002BJ00
1 @ESD@

2
1000P_0402_50V7
1

K EC1
2

SW 1
@ ED1

TST71-N-220-T 170-
L03ESDL5V0CC3-2_SOT23-3
@ESD@

2
S017_2P

1
For EMI Reserved
@ESD@
LID_CLOSE# EC2 1 2 0.1U_0402_10V7K

Screw hole/FD FAN PCB PN

C C

+5VS

H1 H2 H3 H4 H5 H6 H7
HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA 1
PCB R1 PCB R3

22U_0603_6.3V6
ZZZ

M C27
1

2 DA600273100
PCB_SBDR@ ZZZ ZZZ
H_3P0-G H_3P0 H_5P0-G H_3P0-G H_3P0-G H_3P0-G H_3P0-G
PCB 2RH LA-K033P REV0 M/B 5 S DAZ2S400101 DAZ2RI00101
H8 H12 H13 H14 JFAN1
HOLEA HOLEA HOLEA HOLEA 1 PCB_SBDR_R3_G@ PCB_NBDR_R3_G@
2 1 ZZZ
[58] FAN1_PW M 3 2 PCB FDI56 LA-K033P LS-F112 GOLDA31 ! PCB FDI45 LA-K033P LS-G718P GOLD A31 !
[58] FAN1_TACH 3
4 DA600273000
4
1

5
H_5P6N PU 10k on EC side 6 G1 PCB_NBDR@
G2 ZZZ ZZZ
H_3P3-G H_3P2-G H_3P0X4P0 ACES_50224-00401-001 PCB 2RH LA-K033P REV0 M/B 1 S
CONN@ DAZ2S400102 DAZ2RI00102
SP02000GC10
PCB_SBDR_R3_T@ PCB_NBDR_R3_T@

B
HCPU1 HCPU2 HCPU3 HCPU4 HOLEA ZZZ PCB FDI56 LA-K033P LS-F112 TRIPOD A31 ! PCB FDI45 LA-K033P LS-G718P TRIPOD A 3 1 B!
HOLEA HOLEA HOLEA
DAZ2S400100
ZZZ ZZZ
PCB_SBDR_R1@
1

DAZ2S400103 DAZ2RI00103
PCB FDI56 LA-K033P LS-F112/F114/G711
PCB_SBDR_R3_H@ PCB_NBDR_R3_H@
H_3P9-G H_3P9-G H_3P9-G H_3P9-G
PCB FDI56 LA-K033P LS-F112 HANN A31 ! PCB FDI45 LA-K033P LS-G718P HANNS A31 !
CPU ZZZ

DAZ2RI00100 ZZZ ZZZ

PCB_NBDR_R1@ DAZ2S400104 DAZ2RI00104

FD1 FD2 FD3 FD4
PCB FDI45 LA-K033P LS-G718P PCB_SBDR_R3_TMT@ PCB_NBDR_R3_TMT@

PCB FDI56 LA-K033P LS-F112 T-MAC A31 ! PCB FDI45 LA-K033P LS-G718P T-MACA3 1!
1

@ @
CLIP1 CLIP2
1 1
1 1
A A
EMIST_SQ-55G_1P EMIST_SQ-55G_1P

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2018/04/01 Deciphered Date 2019/04/01 Tiitle

T HIS SH EET OF EN G IN EER IN G D R AW IN G IS T H E PR O PR IET AR Y PR O PER T Y OF C O MP A L EL EC T R O N IC S, INC. A N D C O N T AIN S C O N F ID EN T IAL

PWRBTN/PCBPN//SCREW/FAN
A N D T R AD E SEC R ET IN F O R MAT IO N . T HIS SH EET MA Y N O T BE T R AN SF ER ED F R O M T H E C U S T O D Y O F T H E C O MPET EN T DIVISION O F R & D
Siiize Document Number Rev

LA-K033P
D EPAR T MEN T EXC EPT AS AU T H O R IZ ED BY C O MP A L EL EC T R O N IC S, INC. N EIT H ER T HIS SH EET N O R T H E IN F O R MAT IO N IT C O N T AIN S MA Y 0.2
BE U S E D BY OR D ISC L O S ED T O AN Y T H IR D PAR T Y W IT H O U T PR IO R W R IT T EN C O N S E N T OF C O MP A L EL EC T R O N IC S, INC.
Date: Monday, Julyl 29, 2019 Sheet 77 of 101
5 4 3 2 1
 5 4 3 2 1

Main Func = DC/DC

Sequence Logic
+5VS / +3VS for System +5VALW +5VS

RZ3 1 2 0_0201_5% PCH_PRIM_EN_R 1 2

[11,78,86] SIO_SLP_S4#
1
DZ1
2
+2.5V_PG[86]
[11] SIO_SLP_SUS# PCH_PRIM_EN[87]
UZ2 RB751S40T1G_SOD523-2
CZ3 2 1 1 14 12 0_0402_5%
2 VIN1 VOUT1 13 VCCDSW_EN_Q_R

1
CZ2 0.1U_0402_10V7K RZ4 1@2
VIN1 VOUT1 RZ1 0_0201_5%

1M_0201_5
1U_0201_6V3M

0.1U_0402_25V6
3 12 12

@ CZ9
@ RZ5
ON1 CT1

2 1
CZ4 470P_0402_50V7K
4 11
VBIAS GND

%
2
5 10
ON2 CT2 12
[11,78] SIO_SLP_S3#
CZ7 470P_0402_50V7K
1 6 9

0.1U_0201_6.3V6K
+3VALW +3VS
7 VIN2 VOUT2 8

@ESD@
VIN2 VOUT2 VCCDSW _EN_ GPI O

CZ8
15
1 GPAD 1
D 07/4 ESD require 2 CZ10 DZ3 D
1U_0201_6.3V6M EM5209VF_DFN14_3X2 CZ11 RZ7 1 2 0_0201_5% 2 1 VCCDSW_EN_Q RZ29 1 @ 2 0_0201_5%VCCDSW_EN_Q_R
[58] VCCDSW_EN
2 2 0.1U_0402_10V7K
RB751S40T1G_SOD523-2

DZ4
1 2
[78,82,85] POK
RB751S40T1G_SOD523-2

+3VALW

+3VALW TO +3VALW_PCH R375 1 @ 2 100K_0201_5%

R374 1 @ 2 100K_0201_5% VCCDSW _EN_ GPI O

JP8
Always Short +3VALW_PCH
CZ15 2 1
UZ4 DVT1 +3VALW_PCH
1U_0201_6.3V6M JP1 JUMP@
+3VALW 1
2 VIN VOUT
7 +3VALW_PCH_OUT 1
8 1 2
2
+3VALW +3VALW_PCH
VIN VOUT

1
3 6 JUMP_43X79 CZ38
VCCDSW _EN_ GPI O RZ8 1 2 0_0402_5% ON CT 1 RZ32 1 2 0.1U_0402_16V7K

1
CZ16
0.1U_0402_10V7K 100K_0402_5% RZ33
1 4 1
@ +5VALW VBIAS 100K_0402_5%
5

2
2

5
CZ18 1 GND 9 CZ19
0.1U_0402_10V7K CZ20 GND 2 1000P_0402_50V7K PCH_DPWROK_EC 1
[58] PCH_DPWROK_EC IN1

2
2 1U_0201_6V3M 4 PCH_DPWROK
POK 2 O PCH_DPWROK[11]

G P
1 IN2 1
2 TPS22967DSGR_SON8_2X2
IMVP_VR_ON&VCCST_PWRGD CZ40 UZ14 CZ39

3
0.22U_0402_16V7K MC74VHC1G08EDFT2G SC70 5P @ 100P_0402_50V8J
2 2

+3VS

1
RZ9
10K_0402_5%

2
RZ10 1 2 0_0201_5% ALL_SYS_PWRGD
[86] 1.2V_VTT_PWRGD ALL_SYS_PWRGD[58]

C PCH_PRIM_EN RSMRST circuit 2

1
0_0201_5%
2 IMVP_VR_ON_EN
RZ11
IMVP_VR_ON_EN [88] Buffer with Open Drain Output For ALL_SYS_PWRGD
C

0.1U_0402_10V7K
+3VALW

CZ21
@ESD@
+3VALW 07/4 ESD require CZ1

1
+3VS @ CZ17 DZ2 0.1U_0402_16V7K 2 1
1 2 1 CZ26 12
0.1U_0402_25V6 UZ1

2
5

0.1U_0402_10V7K RB751S40T1G_SOD523-2 1 5
PCH_PRIM_EN_R @ NC VCC
1
IN1
5

4 PCH_PRIM_EN SIO_SLP_S3# 1 RZ2 2 2

O A ALL_SYS_PWRGD
G P

2 1 10K_0402_1% 1 4
IN2 [58] PCH_RSMRST# IN1 Y
1

UC10 4 PCH_RSMRST#_Q 3 1
O PCH_RSMRST#_Q [11,63,79] GND
G P

SN74AHC1G08DCKR_SC70-5 RC285 POK2 CZ5

[78,82,85] POK IN2
3

@ @ 100K_0402_5% 74AUP1G07GW_TSSOP5 CZ6

UZ5 MC74VHC1G08EDFT2G 2 0.22U_0402_16V7K @ 100P_0402_50V8J
3

SC70 5P 2
2

Buffer with Open Drain Output For H_VCCST_PWRGD

IMVP_VR_ON_EN 1 @2 IMVP_VR_ON_P
IMVP_VR_ON_P[11] +3VALW +1.05V_VCCST
RZ15 0_0201_5%
3.3VS
0.1U_0402_16V7K 2 1 CZ12

1
@
UZ3 RZ6
3.3Valw 1 5 100K_0402_5%
NC VCC
ALL_SYS_PWRGD 2 A 1.05V

2
4 1
Y VCCST_PWRGD [11]
3
GND
2 CZ13

0.1U_0402_10V7K
STG@ 74AUP1G07GW_TSSOP5 @ 100P_0402_50V8J

CZ14
@ESD@
VCCSTG +3VS
2 1
RZ34 0_0402_1%+3VALW_PCH
+VCC1.05_OUT_FET 1
2

1
+3VALW_PCH @
07/4 ESD require
1

CZ22 1
100K_0201_5% 0.1U_0201_10V6K STG@
STG@ 2 CZ24
RZ12 @ 1U_0201_6.3V6M
UZ6 2
2

MC74VHC1G08DFT2G_SC70-5
1
B

VCCST
[11] CPU_C10_GATE# 4
O
VCCSTG_EN_R DVT1_17 +3VALW_PCH +3VALW_PCH
2 RUN_ON_R 2
G P

1
[11,78] SIO_SLP_S3# A
RZ13 @ 0_0402_1% +3VALW_PCH 1
+VCC1.05_OUT_FET +3VALW_PCH +3VALW_PCH
3

1 UZ8 1 CZ27 +3VALW_PCH

0.1U_0402_10V7K

1
1 +VCCSTG_CPU +3VALW_PCH 0.1U_0201_10V6K 1
CZ37

B @ 2 VIN1 CZ28 RZ20 2 B

2 1 VIN2 STG@ 0.1U_0201_10V6K 100K_0201_5% CZ29
2 2

1
RZ14 0_0402_1% +5VALW 7 6 +VCCSTG_R 1 2 0.1U_0201_10V6K
VIN thermal VOUT 2

5
@ 0_0603_5% RZ17 RZ21 UZ10
3

2
1

5
VBIAS 100K_0201_5% [11,78,86] SIO_SLP_S4# UZ11

P
INB 4 SLP_VCCS T_ OV RD 1
VCCSTG_ EN 3.3_VCCST_OVERRIDE O INB VCCST_EN_R
4 5 2 4
ON GND INA O

G P
+VCCSTG_CPU VCCI N_ AUX _C ORE_ VI D 2
MC74VHC1G32EDFT2G SC705P INA
D

3
6
AOZ1334DI-01_DFN8-7_3X3 SA0000C8300 MC74VHC1G32EDFT2G SC705P

3
RZ19 STG@ STG@ 1 2 QM1A SA0000C8300
VCCSTG_EN_R 1 2 VC C STG_ EN STG@ QM1B G L2N7002DW1T1G_SC88-6

3
0_0402_1% CZ25 L2N7002DW1T1G_SC88-6D
0.1U_0201_10V6K S 1 2 +VCCSTG_CPU
[11,79] VCCST_OVERRIDE_R 5

1
1 2 2 G RZ30 @ 0_0402_5%

1
@ DZ5 RB751S40T1G_SOD523-2 RZ22 S 1@2

4
100K_0201_5% RZ31 0_0603_5%

+VCC1.05_OUT_FET

+1.2V_VDDQ TO +1.2V_VCCPLL_OC
2
UZ12
1 +VCCST_CPU
2 VIN1
VIN2
+5VALW 7 6 +VCCST_R 1 2
VINthermal VOUT RZ23 0_0603_5%
3
+3VALW_PCH VBIAS
+3VALW_PCH VCCST_EN_R RZ24 1 20_0402_1% VCCST_EN 4 5 +VCCST_CPU
1 ON GND

CZ30 1 2 1
AOZ1334DI-01_DFN8-7_3X3
0.1U_0201_10V6K
+1.2V_DDR 2 @ DZ6 CZ31
5
+1.2V_DDR_JP UC9 RB751S40T1G_SOD523-2 0.1U_0201_10V6K
1 2
JPC1 [16,91] AUX_VID0 INB
1 12 2 41 2 VCCIN_AUX_CORE_VID +VCC1.05_OUT_FET
+1.2V_DDR 2 O RZ25
G P

[16,91] AUX_VID1 INA 0_0201_5%

1
Imax : 0.152 AJUMP_43X79 1
1U_0201_6.3V6

@JUMP@ RZ26 1 2 0_0402_5% MC74VHC1G32EDFT2G SC705P RZ27 @ 1

M CZ32

For Power consumption UZ13 SA0000C8300 100K_0201_5%

Measurement @ 1 For NON-S0IX CZ33
2 2 VIN1 +VCCPLL_OC 1U_0201_6.3V6M 2
VIN2

2
+5VALW JUMP@ JPC2
CZ34 0.1U_0201_16V6K 7 6 +1.2V_VCCPLL_OC_P 1 2
2 @1 VINthermal VOUT 12 DVT1_17
3
VBIAS 1 JUMP_43X79Imax : 0.16A SN74AUP1G97DRLR truth table
4 5 CZ35
VCCSTG_EN 1 @ 2 VCCPLL_OC_EN_LS_R ON GND 0.1U_0201_10V6K
RZ28 0_0402_5%
A 2@ A
1
1U_0201_6.3V6

EM5201V_DFN8_3X3
M CZ36

@
@
2 I (Max) : 0.152 A(+1.2V_VCCPLL_OC)
RDS(Typ) : 3.5 mohm
V drop : 0.0005V

SecuriiitttyClllassiiifffiiicatttiiion Compalll Secret Data

Tiittle
CompalElectronics,Inc.
IssuedII Datett 2018///04///01 Deciiiphered Dattte 2019///04///01

THIIIS SHEET OF ENGIIINEERIIING DRAWIIING IIISTHE PROPRIIIETARY PROPE RTY OF C OMP A L ELECTRONIIICS,,, IIINC...AND CONTAIIINS CONFIIIDENTIIIAL SiiizeDocumentttNumberrr
DC/DC
A ND TRADE S E C RE T IIINFORMATIIION... THIIIS SHEET MA Y NOT BE TRANSF E RED F ROM THE CUSTOD Y OF THE C OMP E TE NT DIIIVIIISIIIONOF R& D Rev
DEPARTME N T EXCEPT AS AUTHORIIIZED BY C OMP A L ELECTRONIIICS,,, IIINC...NEIIITHER THIIIS SHEET NOR THE IIINFORMATIIION IIITCONTAIIINS MA Y BE US E D BY
OR DIIISCLOSED TO A NY THIIIRD PARTY WIIITHOUT PRIIIOR WRIIITTEN C ONS E NT OF C OMP A L ELECTRONIIICS,,,IIINC...
LA-K033P 0..2

Dattte:::Tuesday,,, Jully 30,,,2019 Sheettt78 offf101

5 4 3 2 1
 5 4 3 2 1

Main Func = Power Monitor

XDP_ITP_PMODE
DFX TEST MODE
INTERNAL PD20K
+1.05V_VCCSTG +VCC1.05_OUT_FETHIGH: DFX TEST MODE DISABLED(DEFAULT)
LOW: DFX TES TMODE ENABLED
RC241 2 CMC@ 1 51_0402_5% SOC_XDP_TMS
SOC_XDP_TRST# RC234 2 @ 1 0_0402_5% XDP_TRST# 1 RC2541 CMC@ 2 1K_0402_5% XDP_ITP_PMODE
[11] SOC_XDP_TRST# TP140
RC242 2 CMC@ 1 51_0402_5% SOC_XDP_TDI SOC_XDP_TDI RC231 2 @ 1 0_0402_5% XDP_TDI 1 CMC@TP@
D [11] SOC_XDP_TDI XDP_TMS TP141 D
[11] SOC_XDP_TMS SOC_XDP_TMS RC232 2 @ 1 0_0402_5% 1 CMC@TP@ RC2551 @ 2 1K_0402_5%
XDP_TCK0 TP142
RC248 2 CMC@ 1 100_0402_5% SOC_XDP_TDO [11] SOC_XDP_TCK0 SOC_XDP_TCK0 RC233 2 @ 10_0402_5% 1 CMC@TP@
PCH_JTAG_TCK1 RC2352 @ TP143
[11] PCH_JTAG_TCK1 1 0_0402_5% XDP_TCK1 1 CMC@TP@
TP144
[11] SOC_XDP_TDO SOC_XDP_TDO RC230 2 @ 1 0_0402_5% XDP_TDO 1 CMC@TP@ RC259 2 CMC@ 1 51_0402_1% SOC_XDP_TCK0
TP145
CMC@TP@
RC250 2@ 1 51_0402_5% XDP_PREQ# 1
XDP_PRDY# 1 TP146 CMC@TP@
TP147 CMC@TP[@11,63,78] PCH_RSMRST#_Q PCH_RSMRST#_Q RC2391 @ 2 1K_0402_5% XDP_HOOK0 1
XDP_SPI_SI XDP_HOOK3 TP148
[9] XDP_SPI_SI RC237 2 @ 1 0_0402_5% 1 CMC@TP@
XDP_ITP_PMODE RC238 2 @ XDP_HOOK6 TP149 1 51_0402_5% PCH_JTAG_TCK1
[18] XDP_ITP_PMODE 1 0_0402_5% 1
TP150
CMC@TP@ RC262 2 @
CMC@TP@
RC265 2 @ 1 51_0402_5% SOC_XDP_TRST#
XDP_SPI_IO2 RC236 2 @ 1 0_0402_5% XDP_PRSENT_PCH 1
[9] XDP_SPI_IO2 TP151
CMC@TP@
@DV13
VCCST_OVERRIDE_R 2 1 XDP_PRSENT_CPU 1
[11,78] VCCST_OVERRIDE_R TP152
CMC@TP@
RB751S40T1G_SOD523-2
XDP_PREQ#
XDP_PREQ# [11]
Place to CPU side
XDP_PRDY# XDP_PRDY# [11]
XDP_PRSENT_CPU 2 @ 1 CFG3 CFG3 [18]
RC261 0_0402_5%
C C

B B

A A

SecurityClassification Compal Secret Data Compal Electronics,Inc.

Issued Date 2018/04/01 Deciphered Date 2019/04/01 Title

T HIS SHEET OF ENG INEERING DRAW ING IS T H E PRO PRIET ARY P R O P E R T Y OF C O M P A L ELECT RO NICS, INC. A N D CO NT AINS CO NFIDENT IAL
Power Monitor
A N D T R A D E SECRET INFO RMAT IO N. T HIS SHEET M A Y N O T BE T R A N S F E R ED F R O M T H E C U S T O D Y OF T H E C O M P E T E N T DIVISION OF R & D Size Document Number Rev
D E P A R T M E N T EXCEPT AS AUT HO RIZED BY C O M P A L ELECT RO NICS, INC. NEIT HER T HIS SHEET N O R T H E INFO RMAT IO N IT CO NT AINS
M A Y BE U S E D BY OR DISCLO SED TO A N Y T HIRD P A R T Y W IT HO UT PRIO R W RIT T EN C O N S E N T OF C O M P A L ELECT RO NICS, INC. LA-K033P 0.2

Date: Tuesday, July 30,2019 Sheet 79 of 101

5 4 3 2 1
 A B C D

Main Func = DCIN CONN 1

@PJP1
1 2
2
PSID@ PQ1
JUMP_43X79 +19V_VIN FDV301N-G_SOT23-3
PSID@ PR1
@PJPDC1 EMI@ PL1 1 3 33_0402_5%

S
D
5A Z150 20M1210_2P PSID-2 PSID-3 1 2 PS_ID [58]
8 +19V_ADPIN 1 2
GND 7
GND

1
1000P_0402_50V7
6 PSID@ PR4

2
10P_0402_25V8J
6

1
5 10K_0402_1% PR5 PSID@

1000P_0402_50V7

2200P_0402_50V7
100P_0402_25V
2200P_0402_50V

TVNST52302AB0_SOT523-
5 4 2 1

100K_0402_
2.2K_0402_5%

100P_0402_25V

PSID@ PR3
4

@ESD@ PC6
+5VALW

3
3

EMI@ PC2
EMI@ PC1

EMI@ PC3

EMI@ PC4
@ESD@ PC5
3

@RF@ PC15

2 1

2 1

2 1
21

21

21
2

21
2

2
1 1 2

@ESD@ PD1
1
+3VALW

MMST3904-7-F_SOT323-
%2
C

1
@EMI@ PL2

8 K

1
1 1

K
7 K
5A Z150 20M1210_2P PSID-1 2

8 K
K

K
ACES_50458-00601-001 B

PSID@ PQ2
1
@PJP2 E @ PR7
+5VALW

3
1 2 3
100_0402_5%

PR6 PSID@
15K_0402_1%
1 2 1
1 2
JUMP_43X79 EMI@ PL3 2

3
BLM15AG102SN1D_2P
PSID 1 2 @ PD2

1
BAV99W _SC70-3

1
@PD3
BAV99W_SC70-3

3
+5VALW

Battery Bot Side

PIN1 GND
PIN2 GND
2
PIN3 GND 2
PIN4SYS_PRES
PIN5 BATT_PRS
PIN6 DAT_SMB
PIN7 CLK_SMB
PIN8 Batt+
PIN9 Batt+
PIN10 Batt+
SP021412220

ACES_50458-01001-P01_10P-T

3 3

Adapter protection: Battery protection:

if battery removed, adaptor only, asserts H_PROCHOT# when adaptor is Erp lot6 Circuit +19V_VIN
then trigger the H_PROCHOT#, unplugged, keep low for 10ms
keep @ in BOM since battery can not till SW PROCHOT# is issued by EC @PR31
be removed by end user

1
[11,58,63,84,96] HW_ACAV_IN 0_0402_5%

1
1 2

2N7002KDW _SOT363-6 3.3K_1206_5%

H_PROCHOT#
+3VALW

@ PR32
[11,16,58,84,88] H_PROCHOT# +19V_VIN @ PR34

1
1M_0402_1%

10K_0402_

32
PR33
@ PR35

2
3
PC13 0_0402_5%

L2N7002DW 1T1G SC88-6

.1U_0402_16V7K 1 2

PQ12B
%

@PQ13B
1
2
PR36 12 5 POK [78,85] 5

6
@PC14 1M_0402_1%

1
.1U_0402_16V7K
D

4
1

1
L2N7002DW 1T1G SC88-6

@ PQ13A
2
[58,83,84 PBAT_PRES# 12 2 @PQ11 PR40 2

PQ12A
@ PR38
G 2N7002KW_SOT323-3 2 100K_0402_1% 1M_0402_1%

1
S
3

1
1

2
2N7002KDW
@PR45
100K_0402_

_SOT363-
PR43

PR44 1M_0402_1%
4 1M_0402_1% 4
@

6
%

1
2

DELL CONFIDENTIAL/PROPRIETARY
Securiiity Clllassiiifiiicatiiion CompalSecret Data Compal Electronics,Inc.
Issued Date 2018/04/01 2019/04/01 Tiiitttlle
Deciphered Date
THIIIS S HE E T OF ENGIIINEERIIING DRAW IIING IIIS THE PROPRIIIETARY P ROP E RTY OF COM P A L ELECTRONIIICS,,, IIINC... A ND CONTAIIINS CONFIDENTIASLiiize
PWR_DCINCONN
A ND TRA DE S E CRE T IIINFORMATION... THIIIS S HE ET M A Y NO T B E TRA NS FE RED FROM THE CUS TODY OF THE COM P E TE NT DIIIVIIISIIION OF R& D DocumentttNumber Rev
DE P A RTM E NT E X CE PT AS AUTHORIIIZED B Y COM P A L ELECTRONIIICS,,, IIINC... NEIIITHER THIIIS S HE ET NOR THE IIINFORMATION IIIT CONTAIIINS M A Y 0..1
BE US E D BY OR DIIISCLOSED TO A NY THIIIRD P A RTY WIIITHOUT PRIIIOR W RIIITTEN CONS E NT OF COM P A L ELECTRONIIICS,,, IIINC...
Dattte::: Monday,,, Jullly29,,, 2019 Sheettt 82 offf100
A B C D
 A B C D

Main Func = BATT CONN

1 1

+17.4V_BATT+
1
@PJP3
2
+17.4V_BATT++
1 2
JUMP_43X79

EMI@ PL4
5A Z150 20M1210_2P
1 2
Battery Bot Side

1
10P_0402_25V

@ESD@ PD5 @ESD@ PD6

0.01U_0402_25V7

1000P_0402_50V
@RF@ PC16

EMI@ PC11

EMI@ PC12 L03ESDL5V0CG3-2 SOT523 L03ESDL5V0CG3-2 SOT523

PIN1 GND
21

21
21

PIN2 GND
8 J

PIN3 GND

3
2 2
7 K

PBAT_PRES# [58,82,84]
PIN4SYS_PRES
K

PIN5 BATT_PRS
PIN6 DAT_SMB @PBATT1
1
PIN7 CLK_SMB 1
2
2
PR41
PIN8 Batt+ 3
3
4 SYS_PRES PR37
PR39
200_0402_5% 10K_0402_1% +3VALW
PIN9 Batt+ 4
5
5 PBAT_PRES#_R 100_0402_5% 1 2 1 2
DAT_SMB
PIN10 Batt+ 6
6
7 CLK_SMB
1
1
2
2
SP021412220 7
8
8
9 PR42
9 10 100_0402_5%
10 11
ACES_50458-01001-P01_10P-T GND 12 PBAT_CHG_SMBCLK [58,84]
GND

ACES_50458-01001-P01_10P-T
PBAT_CHG_SMBDAT [58,84]
99.9

3 3

4 4

DELL CONFIDENTIAL/PROPRIETARY
Security Classification CompalSecret Data Compal Electronics,Inc.
Issued Date 2018/04/01 2019/04/01 Tiiitttlle
Deciphered Date
THIIIS S HE E T OF ENGIIINEERIIING DRAW IIING IIIS THE PROPRIIIETARY P ROP E RTY OF COM P A L ELECTRONIIICS,,, IIINC... A ND CONTAIIINS CONFIDENTIASLiiize
PWR_BATTCONN
A ND TRA DE S E CRE T IIINFORMATION... THIIIS S HE ET M A Y NO T B E TRA NS FE RED FROM THE CUS TODY OF THE COM P E TE NT DIIIVIIISIIION OF R& D DocumentttNumber Rev
DE P A RTM E NT E X CE PT AS AUTHORIIIZED B Y COM P A L ELECTRONIIICS,,, IIINC... NEIIITHER THIIIS S HE ET NOR THE IIINFORMATION IIIT CONTAIIINS M A Y 0..1
BE US E D BY OR DIIISCLOSED TO A NY THIIIRD P A RTY WIIITHOUT PRIIIOR W RIIITTEN CONS E NT OF COM P A L ELECTRONIIICS,,, IIINC...
Dattte::: Monday,,, Jullly29,,, 2019 Sheettt 83 offf100
A B C D
 A B C D

Main Func = CHARGER

1M_0402_1%
2
PRB04
PRB02
PQB11 PQB12 0.01_1206_1% +19VB

2N7002KW_SOT323-3
EMB04N03H_EDFN5X6-8-5 EMB04N03H_EDFN5X6-8-5

1
1 1 1 4 EMI@ PLB02

1
2 D 2 5A_Z80_0805_2P
+CHARGER_SRC
+19V_VIN

PQB30
5 3 2 3 5 2 3 1 2

2200P_0402_25V7K
G

1000P_0402_25V8J
1000P_0402_25V8J
0.1U_0402_25V7K
@ PJPB01

10U_0603_25V6M

10U_0603_25V6M

10U_0603_25V6M
15U_B2_25VM_R100M

10U_0603_25V6M
S

3
1 PRB03 2
1 2

3M_0402_5%
1

4
@ 1 2
PRB06

1
+

PCB20

PCB22

PCB23

EMI@ PCB25

@EMI@ PCB27
PCB70

PCB21

EMI@ PCB24

@EMI@ PCB26
JUMP_43X118
2 1
1 1

2
@ 2
0_0402_5%
@ @

0.1U_0402_25V6
PCB01 @

1
2

3
PRB11 PRB12
1_0402_1% 2_0402_5% @ESD@ PDB13
AZ4024-02S_SOT23

5
CSIP_CHG

CSIN_CHG
PQB13
EMB04N03H_EDFN5X6-8-5 PD14

1
PCB03
0.1U_0402_25V6 3
1 2 BGATE_CHG 4 1
1

1
PRB07 PRB08 @
4.02K_0402_1% 4.02K_0402_1% +19V_VIN PCB04 PCB05 AZ4024-02S_SOT23

0.47U_0402_25V6K

3
2
1
1
0.033U_0402_25V7K 1U_0402_25V6K @ESD@
2

2
PCB28
ASGATE_CHG

CMSRC_CHG

0.1U_0402_25V7K

2
1
@

2
PCB06
PRB09
374K_0402_1%
LRB715FT1G_SOT323-3

1
PDB01
2

2
BA_PWR 3

100K_0402_5%
@
ACIN_CHG

1
1 PRB14

1
2 2
2

PRB13
0.01UF_0402_25V7K

0_0603_5% @PD814
1

+19V_VIN
PCB02

PRB10
2N7002KW_SOT323-3
1

D
52.3K_0402_1% RB751V-40_SOD323-2

1
PQB31

2
[25] AC_DIS

2
G

2
2

5
BOOT1_CHG
S
3

2
1

PRB45

ACIN_CHG

NTC_CHG

UG1_CHG

LX1_CHG

LG1_CHG

AON7408L_DFN8-5
1

100K_0402_1% PRB39
4.7_0402_5%
2 VDD_CHG

PQB26
PRB15 1
UG1_CHG 4
10_0805_1%
2

PCB07 PUB01
16

15

14

13

12

11

10

33
2

9
1U_0402_25V6K ISL95522HRZ-T_TQFN32_4X4
2 1 DCIN_CHG ACIN +17.4V_BATT+_R

CSIN

NTC

GND
BOOT
CSIP

UGATE

PHASE

LGATE
PCB19 Vmax=5.8V

3
2
1
PRB16
2 1 75K_0402_1% 17 8 VDDP_CHG 1 2 PRB01
PCB08 DCIN VDDP PLB01
0.01_1206_1%
1 2 VDD_CHG 18 7 ASGATE_CHG 4.7UH_5.5A_20%_7X7X3_M
PRB17
150K_0402_1% VDD ASGATE 2.2U_0402_6.3V6K LX1_CHG 1 2 1 4
1

1 2 PROG_CHG 19 6 QPCN_CHG
2.2U_0402_6.3V6K PROG QPCN
2
PRB18 200K_0402_1%
1 ACLIN_CHG 20 5 CMSRC_CHG
2 3 +17.4V_BATT+
PRB25 PCB18
ACLIM CMSRC

1
499K_0402_1% @ PRB19 0_0402_5% 0.47U_0402_25V6K

4.7_1206_5%
5
1 2 21 4 QPCP_CHG 1 2

@EMI@ PRB40

10U_0603_25V6M

10U_0603_25V6M
10U_0603_25V6M

10U_0603_25V6M

10U_0603_25V6M

0.1U_0402_25V7K
AON7506_DFN33-8-5
2

[25,55] PBAT_CHG_SMBDAT @ PRB20 0_0402_5% SDA QPCP

[25,55] HW_ACAV_IN 1 2 22 3 FSET_CHG 1 2
SCL FSET

1
[25,55] PBAT_CHG_SMBCLK

PCB31

PCB32
PCB30

PCB33

PCB34

PCB35
1SNUB1_CHG 2
1

CSOP_CHG

PQB25
1@ PRB21 2 0_0402_5% 23 2
768K_0402_1%

PRB38
[6,25,55,61] H_PROCHOT# PROCHOT# CSOP LG1_CHG 4
PRB26

22.6K_0402_1%

2
24 1 CSON_CHG
BATGONE

PROH
ACOK CSON

680P_0603_50V7K
BGATE
CCLIM

@
BMON

AMON
COMP

1 ACOK_CHG
PSYS

2
VBAT
2

@ PRB22 0_0402_5%

3
2
1

@EMI@ PCB29
@ PRB23 PCB09
25

26

27

28

29

30

31

32

3 100K_0402_1% 10P_0402_50V8J 3

2
PRB24 1 2 1 2
100K_0402_1%
BGATE_CHG
COMP_CHG

BATGONE_CHG
VBAT_CHG

2 1
[25,55] PBAT_PRES#
PRB31 1K_0402_1%

PRB27 200K_0402_1%
1

VDD_CHG 1 2 PQB28

3
LMUN5113T1G_SOT323-3

0_0603_5%
PRB28 100K_0402_1%
1 2

PRB41
2
2

@ PRB29 0_0402_5% @ PCB17

1 2 1U_0402_25V6K @
[25] I_BATT_R

2
1 2
PQB29
2200P_0402_25V7K

1
100_0402_5%

LTC015EUBFS8TL_UMT3F

1
1

0_0402_5%

PRB36 2_0402_5%
10.5K_0402_1%
1
PCB10

PRB30

1 2
PRB33

0.1U_0402_25V6
0.1U_0402_25V6
560P_0402_50V7K

1
1

1
PRB34

PCB15

2
PCB13

[10]
2

BA_PWR
PCB12

@ PRB32 @ @ PRB37 0_0402_5%

2

SIO_SLP_S5#
2

0_0402_5% @ 1 2
0.033U_0402_25V7K

2
1

3
PCB11

Delay adaptor OC H_PROCHOT#

2

@ PCB16
2

2ms while hybrid power

I_ADP_R

1 2

transit i on 0.22U_0402_25V6K
+17.4V_BATT+
+3VALW [61] 2 1
VDD_CHG I_SYS
PRB35
H_PROCHOT# 100_0402_5%
1

PRB42
1

10K_0402_5% PRB43 I_ADP_R [25]

160K_0402_1%
1

PRB44 D
4 4
2

10K_0402_5% 1 2 2 PQB32
G Close to EC ADP_I pin
0.047U_0402_25V7K

RUM002N02GT2L_VMT3
2

1
RUM002N02GT2L_VMT3
1

@ PCB14
PCB36

D S
3
PQB33

PROH 2 0.1U_0402_25V6
2

G
2

S
3

Security Classification Compal Secret Data Compal Electronics, Inc.

Vinafix.com LA-F611PR01_0531B.DSN Issued Date 2016/01/06 Deciphered Date 2017/01/06 Title
I_SYS change to TSENSE_PSYS(P.72 PUZ01.24) PWR_CHARGER
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

LA-K033P
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, Jully 29, 2019 Sheet 84 of 100
A B C D
 A B C D E

Main Func = 3.3VALWP/5VALWP

1 1

@EMI@ PL311
5A_Z120_25M_0805_2P PR302
1 2 499K_0402_1%
ENLDO_3V5V 1 2 +19VB
@ PR301 PC307
@PJP301 0_0603_5% 0.1U_0402_10V7K

1
1 2 +19VB_3V BST_3V 1 2 BST_3V_R1 2
+19VB

1
150K_0402_1
PR303
JUMP_43X39 PC317
PU301 1U_0402_25V6K

2
1000P_0402_25V8
1000P_0402_25V8

1
2200P_0402_50V7

0.1U_0402_25V
10U_0603_25V6

10U_0603_25V6
SY8286BRAC_QFN20_3X3

2
10P_0402_25V8

BS
IN

IN

IN

IN

%
1
1

1
PC303

PC304

PC306
EMI@ PC302

EMI@ PC305
@RF@ PC318

@EMI@ PC301
LX_3V 6 20 PL301
LX LX

21

21

21
21
1.5UH_9A_20%_7X7X3_M

2
2

2
@ 7 19 LX_3V 1 2

EMI@
+3VALWP

6
GND LX

M
K

J
J

8 18
GND GND

@EMI@ PR305
4.7_1206_5%
9
PG LDO
17 +3VLP

1
1

1
22U_0603_6.3V6

22U_0603_6.3V6

22U_0603_6.3V6

22U_0603_6.3V6

22U_0603_6.3V6

22U_0603_6.3V6
10 16

PC310

PC311

PC312

PC313

PC314

PC316
NC NC
3VALWP

OUT

2
EN2

EN1
21

4.7U_0402_6.3V6
NC
FF
GND
TDC 6 A

1
@ @ @

PC308

1SN_3V 2
PR304
Peak Current 8.5 A

11

12

13

14

15

M
10K_0402_1%

680P_0603_50V7K
2
1 2 OCP Current 10A

@EMI@ PC309
+3VALWP

1
2 2

M
ENLDO_3V5V

2
[78,82] POK
3

@ESD@ @PJP302
3

PC315 PR306 11 2 2
PD301
L03ESDL5V0CG3-2_SOT-523-3-X 1000P_0402_25V8J 1K_0402_5%
+3VALWP +3VALW
EN_3V FB_3V 1 2 FB_3V_R 1 2 JUMP_43X118
1

@EMI@ PL511
5A Z150 20M 1210_2P
1

1 2
@PJP502
@ PR501 11 2 2
@PJP501 0_0603_5% PC507 +5VALWP +5VALW
1 2 +19VB_5V BST_5V BST_5V_1R 2
1 2 JUMP_43X79
+19VB 12
JUMP_43X79 0.1U_0402_10V7K @PJP503
112 2
PU501
1000P_0402_25V8

1000P_0402_25V8
2200P_0402_50V7
10P_0402_25V8

1
0.1U_0402_25V
10U_0603_25V6

10U_0603_25V6

S IC SY8288CRAC QFN_3X3 JUMP_43X79

1

1
1
PC503

PC504
EMI@ PC502

EMI@ PC505
PC506
@EMI@ PC501
@RF@ PC522

IN

IN

IN

IN

BS
2 1

2 1

2 1

2 1

LX_5V 6 20 PL501
LX
2

2
2

@ LX
EMI@

1.5UH_9A_20%_7X7X3_M
7 19 LX_5V 1 2
+5VALWP
6
K

GND LX
J
J

8 18

4.7_1206_5%
GND GND

1
3 3
9 17 12

@EMI@
PR505
PG VCC

1
1

1
1

1
22U_0603_6.3V6

22U_0603_6.3V6

22U_0603_6.3V6

22U_0603_6.3V6

22U_0603_6.3V6

22U_0603_6.3V6

22U_0603_6.3V6

22U_0603_6.3V6
10 16 PC508

PC510

PC511

PC514

PC512

PC519

PC513

PC520

PC521
@ PR502 NC NC
4.7U_0402_6.3V6M
OUT

1SN_5V 2

2
2

2
LDO
EN2

EN1

0_0402_5% 21
FF

EN_3V GND @ @ @
1 2

680P_0603_50V7K
11

12

13

14

15

M
@PR504
VL

@EMI@
PC509
10K_0402_1%
EN_5V 1 2 +3VALWP 1 2
ENLDO_3V5V
1

2
@ PR503
4.7U_0402_6.3V6
1

0_0402_5%
EN_5V

POK
4.7U_0402_6.3V6

PC515
PC2506

PR506
2

2.2K_0402_5% 5VALWP
2

1 2
@
[58] ALWON TDC=6 A
Peak Current 8 A
M

PD501
M

[58,66] CMP_VOUT0
1 2 1 2 OCP current 10 A
@ PR507
RB751V-40_SOD323-2
1

0_0402_5%
4.7U_0402_6.3V6
1

PR508 PR509
PC516

PC517
1M_0402_5% 1000P_0402_25V8J 1K_0402_5%
FB_5V 1 2 FB_5V_R 1 2
2

2
M

4 4

SecurityClassification Compal SecretData Compal Electronics,Inc.

Issued Date 2018/04/01 DecipheredDate 2019/04/01 Tiitlle

THIS SHEET OF ENGINEERING DRAW ING IS T HE PROPRIET ARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONT AINS CONFIDENT IA L
PWR_3.3VALWP/5VALWP
AND T RADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE T RANSFERED FROM T HE CUST ODY OF T HE COMPET ENT DIVISION OF R& D S iize Document Number Rev
DEPART MENT EXCEPT AS AUT HORIZED BY COMPAL ELECT RONICS, INC. NEIT HER THIS SHEET NOR T HE INFORMAT ION IT CONT AINS 0.1
MAY BE USED BY OR DISCLOSED T O ANY T HIRD PART Y W IT HOUT PRIOR W RIT T EN CONSENT OF COMPAL ELECT RONICS, INC.
Date: Monday, Julyl 29, 2019 Sheet 85 of 100
A B C D E
 A B C D

Main Func = +1.2V_DDR/+0.6V_DDR_VTT/ +2.5VP

PRM02
2.2_0603_5%
BST_1.2V_R 2 1 BST_1.2V

+19VB_1.2V 0.6Volt +/- 5%

TDC 1.2A

1
@EMI@ PLM11
5A_Z120_25M_0805_2P PCM12 +1.2VP Peak Current1.5A
1 2 0.1U_0402_10V7K

2
1 1
+19VB @PJPM01
1 2 +19VB_1.2V UG_1.2V
+0.6VSP
JUMP_43X39

10P_0402_25V8
0.1U_0402_25V
1000P_0402_50V7

1000P_0402_50V7

2200P_0402_50V7

10U_0603_25V6

10U_0603_25V6
1

1
LX_1.2V

22U_0603_6.3V6
@RF@ PCM24
PCM03

PCM04

1
@EMI@ PCM22

EMI@ PCM23

EMI@ PCM01

EMI@ PCM02

PCM20
16

17

18

19

20
2
2

2
@ PUM01

2
J

BOOT

VTT
VLDOIN
UGATE
6

PHASE
M

M
21
PAD
K

M
LG_1.2V 15 1
LGATE VTTGND
PRM03
9.76K_0402_1% 14 2
PGND VTTSNS

1
2 1
PQM01

G1
D1

D1

D1
AONH36334_DFN3X3A8-10 CS_1.2V 13 3
CS
PCM13 RT8207PGQW_WQFN20_3X3 GND
10 9 2.2U_0402_6.3V6M
D1 D2/S1 VDDP_1.2V VTTREF_1.2V
2 1 12 4
PRM04 VDDP VTTREF
5.1_0603_5%

G2
S2

S2

S2
1 2 VDD_1.2V 11 5
VDD VDDQ +1.2VP

1
PGOOD
5

8
2 1 PCM19
+5VALW

TON
2 0.033U_0402_16V7K 2

FB
S5

S3
1
1
@PDM01 PRM05

2
9

6
10
PCM14 RB751V-40_SOD323-2 2.2_0603_5%
2.2U_0402_6.3V6M

2
@ PCM17

EN_0.6VSP
EN_1.2V

FB_1.2V
2

TON_1.2V
220P_0402_25V8J
+5VALW 1 2

PLM01
1UH_11A_20%_7X7X3_M [78] 1.2V_VTT_PWRGD PRM10
1 2 6.04K_0402_1%
+1.2VP @ PRM06 PRM07 1 2
+1.2VP
10K_0402_1% +19VB_1.2V 1 2

+3VALW
1 2 453K_0402_1% +1.2V_DDR

1
TDC 5.5 A

1
1 @ PCM18
22U_0603_6.3V6

22U_0603_6.3V6

22U_0603_6.3V6

22U_0603_6.3V6

22U_0603_6.3V6

22U_0603_6.3V6

@ PRM08 PRM11
.1U_0402_16V7K Peak Current 7.8 A
1

@EMI@ PRM01 0_0402_5% 10K_0402_1%

PCM05

PCM06

PCM07

PCM08

PCM09

PCM10

2
4.7_1206_5% 1 2 OCP Current 9.4 A

2
[78,86] +2.5V_PG
2
2

1
@ @ PCM15
M

0.1U_0402_10V7K
1 SN_1.2V

2
@ PRM09
0_0402_5%
1 2
@EMI@PCM11 [7] 0.6V_DDR_VTT_ON

1
3 680P_0402_50V7K 3
@ PCM16
2

0.1U_0402_10V7K
@PJPM02

2
1 2 +5VALW_VDD 1 2
+5VALW +1.2VP 1 2 +1.2V_DDR
PR2504 JUMP_43X118
1

2.2_0402_1% PC2504
2.2U_0402_6.3V6M
9
2

4 5
GND

@PJP2501 VDD NC @PJPM03

+3VALW 1 2 +3VALW_2.5V 3 6 +2.5VP 1 2
VIN VOUT +0.6VSP +0.6V_DDR_VTT
JUMP_43X39 2 7 ADJ_2.5V JUMP_43X39
EN ADJ
22U_0603_6.3V6

22U_0603_6.3V6
1
1

1
1 8
PC2501

PC2502
PGOOD GND PR2502 @PC2505
21.5K_0402_1% 0.01U_0402_25V7K
2

2
2

PU2501
2

RT9059GSP_SO8 @PJP2502
1 2 +2.5V
M

M
+2.5VP +2.5V_MEM
2
PR2501
1 EN_2.5V
+2.5V_PG[78,86] Vref=0.8V JUMP_43X39 TDC 0.32A
Peak Current 0.45A
1

[11,78] SIO_SLP_S4#
2

22K_0402_1% PR2505 PR2503

10K_0402_1% 10K_0402_1%
1

0.1U_0402_10V6
PC2503

4 4
2
1
2

+3VALW
K

Security Classification Compal Secret Data Compal Electronics,Inc.

Tiiitllle
Issued Date 2018/04/01 Deciphered Date 2019/04/01
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Siiize Document Number
PWR_+1.2V_MEN/+0.6V/+2.5VP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE Custom 0.1
USED BY OR DISCLOSED TO ANY THIRD PARTY W ITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Monday, Jullly 29, 2019 Sheet 86 of 100
A B C D
 A B C D

Main Func = +1.8VALWP / +1.05VALWP

@ PL1811 @PJP1802
5A_Z120_25M_0805_2P JUMP_43X79
1 2 1 2
1
PU1801 +1.8VALWP 12 +1.8V_PRIM 1

11
10 TP 1 PL1801
PVIN NC
@PJP1801 1UH_6.6A_20%_5X5X3_M
1 2 +3VALW_1.8V 9 2 LX_1.8V 1 2
+3VALW PVIN LX +1.8VALWP
JUMP_43X39 8 3
SVIN LX
7 4

22U_0603_6.3V
NC PGOOD 1.8V_PRIM_PG [58,91]

1
PC1807

22U_0603_6.3V

22U_0603_6.3V

22U_0603_6.3V
PC1801

2
5
6 +1.8V_PRIM

PC1802

PC1803

PC1804
EN

21

21
21 FB

21
PR1803 @EMI@ PR1804 22P_0402_50V8J
TDC 1.6 A

21
100K_0402_5% 4.7_1206_5%
RT8061AZQW_WDFN10_3X3 @
Peak Current 2.3 A

M
M

6 M

6 M
6

EN_1.8V
FB=0.6Volt

1
OCP Current 2.8A

6
2 1
@ PR1801
+3VALW
0_0402_5% PR1807
2 20K_0402_1%
[78] PCH_PRIM_EN 1

1
@EMI@ PC1806

0.1U_0402_10V7
680P_0402_50V7K PR1805

PC1805

2
1
@PR1802 10K_0402_1%
1M_0402_5%

2
2
2

K
FB_1.8V

2 2

3 3

4 4

Securiiity Clllassiiifiiicatiiion Compal SecretData Compal Electronics,Inc.

Issued Date 2018/04/01 Deciiiphered Date 2019/04/01 Tiitttlle

THIIIS SHEET OF ENGIIINEERIIING DRAWIIING IIIS THE PROPRIIIETARY PROPERTY OF COMPAL ELECTRONIIICS,,, IIINC... AND CONTAIIINS CONFIIIDENTIIIAL AND
PWR_+1.8VALWP
TRADE SECRET IIINFORMATIIION... THIIIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIIIVIIISIIION OF R&D SiiizeDocumenttt Number C Rev
DEPARTMENT EXCEPT AS AUTHORIIIZED BY COMPAL ELECTRONIIICS,,, IIINC... NEIIITHER THIIIS SHEET NOR THE IIINFORMATIIION IIIT CONTAIIINS MAY 0..1
BE USED BY OR DIIISCLOSED TO ANY THIIIRD PARTY WIIITHOUT PRIIIOR WRIIITTEN CONSENT OF COMPAL ELECTRONIIICS,,, IIINC...
Dattte::: Monday,,, Jullly29,,,2019 Sheettt 87 offf 100
A B C D
 5 4 3 2 1

D D

RT3612EBGQW-03
+5VALW PUZ1
PRZ1 +19VB_VCCIN
6.8_0603_1% PRZ2 2.2_0805_5%
1 2 VCC_RT3612 10 22 VIN_RT3612 1 2
VCC VIN
PCZ2 0.47U_0402_25V6K

2
12
PCZ1
4.7U_0402_6.3V6M

1
PRZ64
2.2_0603_1% 23 VRON_RT 3612
@ PRZ4 0_0402_5%
1 2
[78] IMVP_VR_ON_EN High: > 0.7V
1 2 PVCC_RT3612 29
PVCC
VRON @ PCZ3 0.1U_0402_25V6
1 2 Low: < 0.3V

2
Pull High in HW site. PCZ17
4.7U_0402_6.3V6M
25
BOOT1 BST_VCCIN1 [89]

1
[11,16,58,82,84] H_PROCHOT# PRZ5
75_0402_5% 26
UGAT E1 UG_VCCIN1 [89]
1 2 VRHOT _RT3612 2 VR_HOT
VREF06_RT3612 0.6V 27
PRZV3REF06_RT3612
PHASE1 LX_VCCIN1 [89]
3.9_0402_1%
1 2 12 28
VREF06 LGATE1 LG_VCCIN1 [89]

1
PCZ4
1

19.1K_0402_1%
33.2K_040 2_1

0.47U_0402_6.3V6K
73.2K_0402_

11.8K_0402_
PRZ9

PRZ10

PRZ11

PRZ12

2
C C

VR_HOT# 100 degreeC 1

2

12

12

BST_VCCIN2 [89]
%
%

BOOT2
2

ALERT# 97 degreeC
32
1

PRZ23 110K_0402_1%
1 442_0402_1

UGATE2 UG_VCCIN2 [89]

1

1 2
PRZ22
0_0402_

698_0402_
1.21K_0402_
PRZ19

PRZ20

PRZ21

Close to Phase1 MOS 31

PHASE2 LX_VCCIN2 [89]
TSEN_RT3612 21
%%
%

PHZ1
5

T SEN
2

TSEN_RT3612_R 1 2
2

1
12

30
%

LGAT E2 LG_VCCIN2 [89]

100K_0402_1%_B25/50 4250K
SET1_RT3612 8 PRZ13 2.26K_0603_1% PRZ14 2K_0603_1%
SET 1 20 ISENSE1P_VCCIN_RR 1 2 ISENSE1P_VCCIN_1R 2
ISEN1P ISENSE1P_VCCIN [89]
SET2_RT3612 7
SET 2

1
1

PRZ17
1

SET3_RT3612
316_0402_1% 21.5K_0402_1%

6 PCZ5
SET 3 3.01K_0402_1%
PRZ27

+1.05V_VCCST
243_0402_1% 10.5K_0402_1%
1

0.1U_0402_25V6
PRZ29

2
1

14K_0402_1

19 ISENSE1N_VCCIN_R1
PRZ3

2
1 2 PRZ31

ISEN1N ISENSE1N_VCCIN [89]

2
PCZ6 0.1U_0402_25V6
PRZ18 680_0402_1%
1 2
1 2

1 2

%
12

0 287_0402_1%
28.7K_0402_1%

PRZ24 2.26K_0603_1% PRZ25 2K_0603_1%

17 ISENSE2P_VCCIN_RR 1 2 ISENSE2P_VCCIN_R 1 2
PRZ33

PRZ34

ISEN2P ISENSE2P_VCCIN [89]

PRZ35

1
1

261_0402_1

PCZ9
2PRZ36
100_0402_

45.3_0402_

0.1U_0402_25V6
PRZ37

PCZ7
PRZ38

PRZ26
2

2
21

21
0.1U_0402_25V6
2

3.01K_0402_1%
18 ISENSE2N_VCCIN_R1
%

2
2%
1

ISENSE2N_VCCIN [89]
1

ISEN2N

2
2

PRZ28 680_0402_1% PCZ8 0.1U_0402_25V6

@PRZ41 0_0402_5% 1 2 +VCCIN
1 2 SVID_CLK_PWR_VCCIN 5
[14] VR_SVID_CLK VCLK

2
B B
@PRZ42 0_0402_5%
1 2 SVID_DAT_PWR_VCCIN 4 debug only @ PRZ44
100_0402_1% Local sense in HW site.
[14] VR_SVID_DATA VDIO

1
@PRZ45 0_0402_5% @ PRZ46 0_0402_5%
1 2 SVID_ALERT#_PWR_VCCIN 3 14 VSEN_VCCIN 1 2
[14] VR_SVID_ALERT# ALERT VSEN VCC_SENSE_VCCIN [14]
PCZ10 82P_0402_50V8J 1 PCZ11 220P_0402_50V8J @ PCZ12
+3VALW COMP
15 COMP_VCCIN 2 1 2 12
PRZ4710K_0402_1%

0.082U_0402_16V
1 2 24 PRZ66 200_0402_1% PRZ49 12.1K_0402_1% 330P_0402_50V7K
VR_READY
PRZ48 1 2 1 2 1 2

@ PCZ13
37.4K_0402_1%
LL=2m

2 1
[11] VR_READY @ PCZ14
0.47U_0402_6.3V6K 16 FB_VCCIN
FB
12 @PCZ15

7 K
12
PRZ50
11.8K_0402_1% 0.01UF_0402_25V7K
Close to Phase1 Inductor 1 2 I_SYS 9 @ PRZ51 0_0402_5%
PSYS 13 RGND_VCCIN 1 2
RGND VSS_SENSE_VCCIN [14]
VREF06_RT3612 LL/IMON Compesation [84] I_SYS
PHZ2

1
PRZ52 PRZ53
5.49K_0402_1% 100K_0402_1%_B25/50 4250K 14.7K_0402_1% @ PRZ54
1 2 VCCIN_NTC1P 1 2 VCCIN_NTC1N 1 2 1 2IMON_VCCIN11 33 100_0402_1%
IMON GND
@ PRZ65 debug only

2
0_0402_5%
RT3612EBGQW -03_WQFN32_4X4
PRZ55
15.4K_0402_1%
1 2

A A

Security Classification Compal Secret Data Compal Electronics,Inc.

Issued Date 2018/04/01 DecipheredDate 2019/04/01 Tiiitttlle

THIIIS S HE E T OF ENGIIINEERIIING DRAW IIING IIIS THE PROPRIIIETARY P ROP E RTY OF COM P A L ELECTRONIIICS,,, IIINC... A ND CONTAIIINS CONFIDE NTIA L Siiize Documenttt Number
PWR_VCCIN
A ND TRA DE S E CRE T IIINFORMATION... THIIIS S HE ET M A Y NO T B E TRA NS FE RED FROM THE CUS TODY OF THE COM P E TE NT DIIIVIIISIIION OF R& D Rev
DE P A RTM E NT E X CE PT AS AUTHORIIIZED B Y COM P A L ELECTRONIIICS,,, IIINC... NEIIITHER THIIIS S HE ET NOR THE IIINFORMATION IIIT CONTAIIINS M A Y 0..1
BE US E D BY OR DIIISCLOSED TO A NY THIIIRD P A RTY WIIITHOUT PRIIIOR W RIIITTEN CONS E NT OF COM P A L ELECTRONIIICS,,, IIINC...
Dattte::: Monday,,, Jullly29,,, 2019 Sheettt 88 offf 100
5 4 3 2 1
 5 4 3 2 1

OCP=91
ICCMAX=70A
TDC=39A
Frequency 600KHz
D D

EMI@ PLZ3
5A Z150 20M1210_2P
2 1
+19VB_VCCIN
@ PJZ1
[88] UG_VCCIN1 +19VB
1 2
1 2

10U_0603_25V6M

10U_0603_25V6M

33U_D2_25VM_R60M
JUMP_43X118

2200P_0402_25V7K

PCZ34

PCZ35
1 1

10P_0402_25V8J
0.1U_0402_25V6

1000P_0402_50V7K

1000P_0402_50V7K

33U_25V_M
EMI@ PCZ20

EMI@ PCZ21
5
+ +

PCZ18
PCZ22

@RF@ PCZ23
@EMI@ PCZ103

@EMI@ PCZ104

2 1
PQZ1

2 1

2 1
2 1

21

21
21
PRZ56
2.2_0603_5% PRZ57 2@ 2

AON6380_DFN5X6-8-5
1 2 BST_VCCIN1_R 0_0603_5%
[88] BST_VCCIN1 1 2 UG_VCCIN1_R 4

PCZ19
0.1U_0402_25V6
Rdc=1.19mohm
2 1

3
2
1
+VCCIN
PLZ1
1 4
[88] LX_VCCIN1
2 3
PQZ2

@EMI@PRZ59
4.7_1206_5%
5

1
0.24UH_22A_+-20%_7X7X3_M

AON6314_N_DFN56-8-5

1 SNUB_VCCIN1 2
4
[88] LG_VCCIN1

3
2
1
C C
ISENSE1N_VCCIN [88]

@EMI@PCZ49
680P_0402_50V7K
2
ISENSE1P_VCCIN [88]

+19VB_VCCIN
[88] UG_VCCIN2
10U_0603_25V6M

10U_0603_25V6M
2200P_0402_50V7K
EMI@ PCZ56

PCZ58

PCZ59
0.1U_0402_25V6

1000P_0402_50V7K

1000P_0402_50V7K
EMI@ PCZ57
5

2 1

@EMI@ PCZ105

@EMI@ PCZ106
PQZ3
2 1
2 1

2 1

2 1
2 1

PRZ60
2.2_0603_5% PRZ61
AON6380_DFN5X6-8-5

1 2 BST_VCCIN2_R
B 0_0603_5% B
[88] BST_VCCIN2 1 2 UG_VCCIN2_R 4
1

PCZ62
0.1U_0402_25V6
Rdc=1.19mohm
3
2
1
2

PLZ2 +VCCIN
1 4
[88] LX_VCCIN2 2 3

PQZ4
@EMI@PRZ63
4.7_1206_5%
5

0.24UH_22A_+-20%_7X7X3_M
AON6314_N_DFN56-8-5

1SNUB_VCCIN2 2

4
[88] LG_VCCIN2
3
2
1

ISENSE2N_VCCIN [88]
@EMI@ PCZ64
680P_0402_50V7K
2

ISENSE2P_VCCIN [88]

A A

SecuriiityClllassiiifiiicatiiion Compal SecretData Compal Electronics, Inc.

Issued Date 2018/04/01 Deciiiphered Date 2019/04/01 Tiitttlle

THIS S HE ET O F ENGIIINEERING DRAW IIING IIISTHE P R O P RI ETARY P R O PERTY O F C O MP AL ELECTRONICS,,, IIINC. AND CONTAIIINS CONFIIIDENTIIIAL S izeDocumentttNumberrr
PWR_VCCIN
AND TR AD E S E CRET IIINFORMATIIION. THIS S HE E T MAY NO T B E TR ANS F E RED F RO M THE C US TO D Y O F THE C O MP E TENT DIVIIISIIION O F R& D D
Rev
E P ARTME NT E X C E PT AS AUTHO R I Z E D B Y C O MP AL ELECTRONICS,,, IIINC. NEIIITHER THIS S HE E T NO R THE IIINFORMATIIION IIIT CONTAIIINS MAY BE 0..1
US E D BY OR DI S CLO SED TO ANY THIRD P AR TY WIIITHOUT P RI O R W RI TTEN C O NS E NT OF CO MP AL ELECTRONICS,,, IIINC.
Dattte:::Monday,,,Jullly29,,, 2019 Sheettt 89offf 100
5 4 3 2 1
 5 4 3 2 1

Main Func = VCCIN_AUX

D D

EMI@ PLG3
5A Z150 20M 1210_2P
2 1

BST_AUX_R +19VB_AUX +19VB_AUX +19VB

PJG2
ICCMAX=26A

1
PRG1 1 2
TDC=10A
2.2_0603_5% PCG2 PRG2 12
0.1U_0402_25V6 0_0805_5%
JUMP_43X118

2
DC LL=TBD

2200P_0402_50V
OCP is Lowside MOSFET Rdson sense

EMI@ PCG61
0.1U_0402_25V6
10U_0603_25V

10U_0603_25V
PCG62

PCG59

EMI@ PCG58
2

1000P_0402_50
AC LL=TBD

1
10 BST_AU 2 X

1000P_0402_50V7K
2 1
21

21

@EMI@ PCG63

@EMI@ PCG64
21

21
2
226K x1.2

6 M
0.1U_0402_2
PQG4

PCG1
255K x1.4

M
6
21

7K
PUG1

V
AON6380_DFN5X6-8-5
RT6543AGQW_WQFN20_3X3

5 V6
PRG38 0_0603_5%
PRG4 UG_AUX 1 2 UG_AUX_R 4 +VCCIN_AUX

BOOT
220K_0402_1%
20 VSYS_RT6543
Rdc=1.19mohm
1 2 CS_DSI_RT6543 1
CS_DIS VSYS
C C
+5VALW PLG2

3
2
1
0.24UH_22A_+-20%_ 7X7X3_M
@ PRG6 0_0603_5% 1
2 PVCC_RT6543 15 11 UG_AUX LX_AUX 1 4
PVCC UGAT E
21 ISENSEP_AUX 2 3 ISENSEN_AUX
PCG5 1U_0402_6.3V6K PQG3

1
PRG7 5.1_0603_5%
VCC_RT6543 16 12 LX_AUX

200_0603_1
1 2

4.7_1206_5

PRG33
VCC PH

AON6314_N_DFN56-8-5

PRG32
21

@EMI@
PCG6 1U_0402_6.3V6K PRG8 @
High > 1V

%
100K_0402_1% PG_VCCIN_AUX LG_AUX 4

1ISENSEP_AUX_R 2 %
1 2 4 13 LG_AUX
Low <0.4V +3VALW PGOOD LGATE

2 1AUX_SNU2B
[58] PG_VCCIN_AUX

1
@
PRG11

3
2
1

PRG37
0_0402_
680P_0402_50V7
1 2 EN_RT6543 19 14
[58,87] 1.8V_PRIM_PG EN PGND

@EMI@
1

%
@

5
0_0402_5%

2
17.4K_0603_1%
PCG57
PCG9
@ PRG120_0402_5%

PRG35
0.1U_0402_25V6
2

AUX_VID1 17 2 ISENSEP_RT6543 1 2 ISENSEP_RT6543_R

K
@ [16,78] AUX_VID1 VID1 ISENSEP

2
@ PRG36
@ PRG39 @ @PRG34

2
0_0402_5% 1 2 1 2
@ PRG14 0_0402_5%
+3VALW

ISENSEN_RT6543_R
AUX_VID0 18 3 SENSEN_RT6543I 1 2 ISENSEN_RT6543_R 953_0402_1% 1.27K_0402_1%
[16,78] AUX_VID0 VID0 ISENSEN

1
@ PCG11 +VCCIN_AUX @PHG2
12
@ PRG16 ISENSEN_AUX_NTC 1 2
PRG18
100K_0402_1% FSWSEL_RT6543 8 VOUT_RT6543 0.1U_0402_25V6 @ PRG17 0_0402_5% 1
1 2 9 2 1
2 10K_0402_1%_B25/50 3370K
+5VALW FSW SEL VOUT
B=3435(B25/85)

ISENSEP_RT6543_R
1

PCG12 100_0402_1%
B
@PRG21 B
100K_0402_1% 2000P_0402_50V7K PRG23 10K_0402_1% @ PCG13 390P_0402_50V7K @ PRG24 1.6K_0402_1%
1

5 COMP_RT6543 1 2 1 2 1 2 1 2 12
COMP
2

PRG25 PRG22 @PCG60

10K_0402_1% 10K_0402_1% PCG14 0.1U_0402_25V6
27P_0402_50V8J PRG26 6.2K_0402_5% 1
2

AUX_VID0
5V: 800KHz FB
6 FB_RT6543 12 2
AUX_VID1
Float: 600KHz

1
@
PRG27
GND: 400KHz 0_0402_5%
1

7 RGND_RT6543 1 2
RGND VSS_SENSE_AUX [16]
AGND

@ PRG28

2
@ PRG29 @ PRG300_0402_5%
1

10K_0402_1% 10K_0402_1%
VCC_SENSE_AUX [16]
PRG31
2

21

1
100_0402_1%
PCG16
@PCG17 0.1U_0402_25V6
2

2
12

0.082U_0402_16V7K
330P_0402_50V7K

PCG18
2 1
VCCIN_AUX VID Follow Intel PDG Rev0.71

@
@PCG29
12
VID1 VID0 +VCCIN_AUX
0.01UF_0402_25V7K
Voltage
0 0 0

0 1 1.1

1 0 1.65
A A

1 1 1.8

Securiiity Clllassiiifiiicatiiion CompalSecret Data Compal Electronics, Inc.

Issued Date 2018/04/01 2019/04/01 Tittlelti
Deciiiphered Date
THIIIS SHEET OF ENGIIINEERIIING DRAWIIING IIIS THE PROPRIIIETARY PROPERTY OF COMPAL ELECTRONIIICS,,, IIINC... AND CONTAIIINS CONFIIIDENTIIIAL AND
PWR VCCIN_AUX
TRADE SECRET IIINFORMATIIION... THIIIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIIIVIIISIIION OF R&D SiiizeDocumenttt Number Rev
DEPARTMENT EXCEPT AS AUTHORIIIZED BY COMPAL ELECTRONIIICS,,, IIINC... NEIIITHER THIIIS SHEET NOR THE IIINFORMATIIION IIIT CONTAIIINS MAY 0..1
BE USED BY OR DIIISCLOSED TO ANY THIIIRD PARTY WIIITHOUT PRIIIOR WRIIITTEN CONSENT OF COMPAL ELECTRONIIICS,,, IIINC...
Dattte::: Monday,,, Jullly29,,,2019 Sheettt 91 offf 100
5 4 3 2 1
 5 4 3 2 1

@PC902
0.01UF 25V +-10%X7R 0402
1 2
D +3VLP D

AZV3002
@ PR902 Icc=12uA_max
200K_0402_1%
1 2 Vout=3.15V@Vcc=3.3V and Io=3mA
Vth 1.80V-1.86V-1.93V @ PR903 @ PR901
300K_0402_1% 0_0402_5%
1 2 @PU900 1 2 ACIN_CHG [84]

1
AZV3002RL-7_U-FLGA8_1P65X1P65

L2N7002DW1T1G2NSC88-6
@PC901 @PD901
82P_0201_50V8J RB520SM-30T2R_EMD2-2

VCC

3
12

2
2 -

@ PQ900B
IN-1
+VCCIN @ PR904 1 NO_SMOKE_OVP 5
OUT1
C 200K_0402_1% 3
IN+1 + C
1 2

1U_0201_6.3V6M 1U_0201_6.3V6M

1U_0201_6.3V6M 1U_0201_6.3V6M

4
@ PC908

@ PC909
6

2 1

2 1

L2N7002DW1T1G2NSC88-6
@PR905

6
100K_0402_1% IN-2 7
1 2 5 IN+2 + OUT2
-

@ PQ900A
@PR906 @PC903 NO_SMOKE_UVP 2

VEE
0_0402_5% 82P_0201_50V8J

1
1 2 12

1
@ PC911
@ PC910
4

2 1
+19VB

2
3 @PR907

2
237K_0402_1%
1 1 2
@PD902
+3VLP 2 @PR908 RB520SM-30T2R_EMD2-2
43.2K_0402_1%
RB520SM

1
@PD900 1 2
BAT54CW_SOT323-3 Vf =0.29V@1mA
@ PC904
82P_0201_50V8J @PR909 Ir =1uA @Vr=10V
1 2 14.7K_0402_1%
B 1 2 HW_ACAV_IN [11,58,63,82,84] B

Vth 4.9V-5V-5.1V @PR911 3.3V+-2%

4.32K_0402_1%
1 2

@PC905
1 2
0.22U_0402_10V K

A A

SecurityClassification Compal Secret Data Compal Electronics, Inc.

Issued Date 2018/04/01 Deciphered Date 2019/04/01 Title

T HIS SHEET OF ENG INEERING DRAW ING IS T H E PRO PRIET ARY P R O P E R T Y OF C O M P A L ELECT RO NICS, INC. A N D CO NT AINS CO NFIDENT IAL
NO SMOKE
A N D T R A D E SECRET INFO RMAT IO N. T HIS SHEET M A Y N O T BE T R A N S F E R ED F R O M T H E C U S T O D Y OF T H E C O M P E T E N T DIVISION OF R & D Size Document Number Rev
D E P A R T M E N T EXCEPT AS AUT HO RIZED BY C O M P A L ELECT RO NICS, INC. NEIT HER T HIS SHEET N O R T H E INFO RMAT IO N IT CO NT AINS 0.1
M A Y BE U S E D BY OR DISCLO SED TO A N Y T HIRD P A R T Y W IT HO UT PRIO R W RIT T EN C O N S E N T OF C O M P A L ELECT RO NICS, INC.
Date: Monday,July29,2019 Sheet 96 of 100
5 4 3 2 1
 4
3
2
1
PCZ107

@
330U_D2_2.5VY_R9
M

2
1
+
PCZ97

@
330U_D2_2.5VY_R9
M

2
1
+
+VCCIN

+VCCIN

A
A

21 21
PCZ77
PCZ89 PCZ100 330U_D2_2.5VY_R9

@
47U_0603_6.3V6 22U_0603_6.3V6 M
M M
2
1
+

21 21
PCZ101 PCZ98

@
47U_0603_6.3V6 22U_0603_6.3V6

+VCCIN
M M
21 21 21

@
PCZ76 PCZ88 22 PCZ81
1U_0201_6.3V 47U_0603_6.3V6 U_0603_6.3V6
6 M M M
21 2PCZ79
1
PCZ92 21 22U_0603_6.3V6
1U_0201_6.3V M
6 M PCZ85 21
330U_R9

21 22U_0603_6.3V6 PCZ102
PCZ75 M 22U_0603_6.3V6
1U_0201_6.3V 21 M
Back side:

6 M PCZ96 21
1U_0201 *4

21 22U_0603_6.3V6 PCZ90
*1

PCZ91 M
22U_0603 *14
47U_0603 *3 @

22U_0603_6.3V6
Primary side :

1U_0201_6.3V M
Main Func = VCCIN/ VCCIN_AUX

6 M 21
21 PCZ80
PCZ94

@
22U_0603_6.3V6
1U_0201_6.3V M
6 M 21
21 PCZ84
PCZ78

@
22U_0603_6.3V6
1U_0201_6.3V M
6 M 21

22 PCZ87
U_0603_6.3V6
21 M
2PCZ86
1
PCZ99 22U_0603_6.3V6

B
B

22U_0603_6.3V6 M
M
21
PCZ93
@

22U_0603_6.3V6
M
21
PCZ95
@

22U_0603_6.3V6
M
21
PCZ83
@

22U_0603_6.3V6
M
21
PCZ82
22U_0603_6.3V6
M
2
1
+

21 21 21 PCG45
@

330U_D2_2.5VY_R9
+VCCIN_AUX
+VCCIN_AUX

PCG72 PCG81 PCG20 M

@
@
@

C
C

10U_0603_6.3V6 10U_0603_6.3V6 10U_0603_6.3V6

2
1
+

+VCCIN_AUX

M M M PCG46
2 1 2 1 2 1 330U_D2_2.5VY_R9
PCG73 PCG83 PCG25 M
@
@
@

10U_0603_6.3V6 10U_0603_6.3V6 10U_0603_6.3V6

M M M
2 1 2 1 2 1
@

PCG66 PCG76 PCG51

Issued Date
10U_0603_6.3V6 22U_0603_6.3V6 22U_0603_6.3V6
M M M

Securiiity Clllassiiifiiicatiiion
PCG74 PCG75 PCG50
@

2 1 2 1 2 1
10U_0603_6.3V6 22U_0603_6.3V6 22U_0603_6.3V6
M M M
2 1 2 1 2 1
PCG65 PCG21 PCG56
@
@

22U_0603_6.3V6 10U_0603_6.3V6 10U_0603_6.3V6

M M M
2 1 2 1
PCG22 PCG67
@
@

21 10U_0603_6.3V6 10U_0603_6.3V6
330U_R9

M M
PCG24 2 1 2 1

2018/04/01
22U_0603_6.3V6 PCG23 PCG70
@
@

M 10U_0603_6.3V6 10U_0603_6.3V6
2 1 M M
22U_0603 *9
*1

PCG71 2 1 2 1
22U_0603_6.3V6 PCG26 PCG68
@
@
10U_0603 *18 @

M 10U_0603_6.3V6 10U_0603_6.3V6
M M
2 1 2 1
@
@

PCG27 PCG69
10U_0603_6.3V6 10U_0603_6.3V6
M M
PCG28
2 1 PCG19
2 1
22U_0603_6.3V6 22U_0603_6.3V6
M M

CompalSecret Data

D
D

Deciphered Date
2019/04/01

M A Y BE US E D BY OR DIIISCLOSED TO A NY THIIIRD P A RTY WIIITHOUT PRIIIOR W RIIITTEN CONS E NT OF COM P A L ELECTRONIIICS,,, IIINC...
DE P A RTM E NT E X CE PT AS AUTHORIIIZED B Y COM P A L ELECTRONIIICS,,, IIINC... NEIIITHER THIIIS S HE ET NOR THE IIINFORMATION IIIT CONTAIIINS
A ND TRA DE S E CRET IIINFORMATION... THIIIS S HE E T M A Y NOT BE TRA NS FE RED FROM THE CUS TODY OF THE COM P E TE NT DIIIVIIISIIION OF R& D

Dattte:::
Tiiitttlle

THIIIS S HE E T OF ENGIIINEERIIING DRAW IIING IIIS THE PROPRIIIETARY P ROP E RTY OF COM P A L ELECTRONIIICS,,, IIINC... A ND CONTAIIINS CONFIDENTIASLiiize Documenttt Number

Monday,,, Jullly29,,, 2019

E
E

Sheettt 90 offf
PWR_VCCIN/VCCIN_AUX
Compal Electronics,Inc.

100
Rev
0..1
4
3
2
1
 5 4 3 2 1

tfersionChangeList ( P.I. R. List)

DVT1 EE change list

D D

DVT2 EE change list

C C

B B

A A

Scceeceuu
t urirtyyyCssalasaslscifaatccifsonioonn Compalll SecccrrretttDattta CompalElectronics,Inc.
TTTe
iltee
21810220188
/0 04004/4 011100 2191022019/90 04004/4 0110
Issssssuuueeeddd Daaateee DeeecccippphhheeereeedddDaaae
tee
EE_Changelist
THTTHH S
ISSI S HE
E
TTTE
E
EE
HHS
S O FFFOO E NG NNEERNNGG GNIRREEEENIGG NNEE DDDRRRAWNNNGGSSSIGA IA THTTHH EEEP RO
PRRE
A
TTA
A
TE
E
R
IP
PO ORRPP RRY
YY
R P ROP
E
RY
TT
Y
Y
R
TREP
O ORRP OFFFO
O CCO MMMPP
P
OOC A
L
AAEECRTTRRTCCEEL
E
E SSSizzzeee DDDu
o
m
cmmen
etnNNNum
ummbe
bre e0
v.2
LA-K033P
O ONNCCCS ,S
S
INO N
I NNCCCI. A
NDDDNNA A CCO NATTA
ATNNOOC N
INNS
CCO NFDDENTTTINNEEDIFFNNOOCSSI AL
A
AANDDDNNAATRTTRR ADE
EEDDA
A S E
CRE
TTTEE
RRCCE
E
SS N
IFO
RMA
MMA A
RRO O FFNNI TTTI OONN.NO THTTHH S
ISSI
SHEETTTE
E
EE
HHS S MMMA A
A YYYNNO TTTO ON B BBE
EETRTTRR ANS
ERE
DDDERR
EE
FFF
S
S
NNAA FRROMMMO ORFF THTTHH EEECCUS
OTTO
OTS
S
UUC DDYYY
D O FFFOO THTTHH EEECCO
MMMPPP
OO
C E
ETNNTTTNTE
ETE
E DDDVSSONNNOOISV
IVI OFFFOO RRDDD& &
&R
DDP ARMMTTME T
E
RRA
AP
E
ED NNTTTN E CCXXCXE
E EP
TTTP
PEE A A
AS
SSAUHHTTHTUUA
A ORREDDDEE
ZZZIROO BB
B
YY
YCCOMMMPPPOO
C A
L
AAE E
CRTTRRTCCE
E
L
EE OONNCCCS,SSINO N
I NNCCCI. NNTHTTHHIE
EE
N E
RRRE
E THTTHH S
ISSI S HE
ETTTE
E
EE
HHS S
NNO RRROO N THTTHH E EE
INFO
RMAMMA
ARRO O FFNNI TTTI ONNTTTN I OO CCO NATTA
A
TNNO OC N
I NNSSSI
MMMA AA YYYB BBE
EEUUEDDDE
ES
SS
U B
B
BYY
YO RRROO DDCCO OSE
DDDEE
SS
O L
CSSS
D
I TOTTO
O A
NYYYNNAA THTTHH R
I RRDDDI P
ARY
TTY
Y
TRRA AP
P WHHHTTTI O
UUTTTUOO P RO
RRROO
R
IRPP WRRRTETTTTEETI NNNCCONS
NNTTTNE
E
ES
S
NNO
OC OFFFO
O CCO
MMMP
P
PO
OCA
L
A
A
5 4 3 EECRTTRRTCCEEL
E
E OONNCCCSS ,2
SN
IO INNNCCCI. 1
 5 4 3 2 1

tfersionChangeList (P.I. R. List )

Request Issue Solution
Item Page# Title Date Owner Description Description Rev.
D
0.2(X01) D

1 P83 BATT 20190423 COMPAL RF request for RF test

Reserve PC16
CONN

2 P84 PWR 20190423 COMPAL 0.2(X01)

CHARGER "Based on Loki G issue, change to follow 1. PCB07 change to 0603
Renesas recommendation 2. Remove PCB71
"
3. PRB15 change to 1206

3 P96 NO 20190423 COMPAL 0.2(X01)

customer request
C
C

SMOKE Add page 96: reserve NO SMOKE schematic

4 P88 PWR 20190507 COMPAL 0.2(X01)

Change RC value for Intel EA test "Change RC value for Intel test:
VCCIN
PCZ77=330UF
PCZ79/80/81/82/84/85/86/87/90/96/98/99/100/102=22uF
VCCAUX Output caps 1+9
PCG46=330UF
PCG19/24/28/50/51/65/71/75/76=22uF

PRZ14/25=2.21Kohm
B
PRZ13/24=2.05kohm B

PRZ17/26=3.01Kohm
PRZ48=37.4Kohm
PRZ66=200ohm
PRZ49=12.1Kohm
PRZ53=14.7kohm
PCZ10=82pF
PCZ11=220pF
"

A A

SecurityClassification Compal SecretData Compal Electronics,Inc.

Issued Date 2018/04/01 DecipheredDate 2019/04/01 Tiitlle

THIS SHEET OF ENGINEERING DRAW ING IS T HE PROPRIET ARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONT AINS CONFIDENT IA L
Changed-List PWR History
AND T RADE SECRET INFORMAT ION. THIS SHEET MAY NOT BE T RANSFERED FROM T HE CUST ODY OF T HE COMPET ENT DIVISION OF R& D S iize Document Number Rev
DEPART MENT EXCEPT AS AUT HORIZED BY COMPAL ELECT RONICS, INC. NEIT HER THIS SHEET NOR T HE INFORMAT ION IT CONT AINS 0.1
MAY BE USED BY OR DISCLOSED T O ANY T HIRD PART Y W IT HOUT PRIOR W RIT T EN CONSENT OF COMPAL ELECT RONICS, INC.
Date: Monday, Julyl 29, 2019 Sheet 100 of 100
5 4 3 2 1