Analog & Digital Electronics

Code: ESC-301
Dr. Juin Acharjee
Assistant Professor
Department of ECE
ST. Thomas' College of Engineering and Technology
University Syllabus:

Unit Content Hrs/Unit

1 Different Classes of Amplifiers - (Class-A, B, AB and C - basic concepts, power, efficiency; 9
Recapitulation of basic concepts of Feedback and Oscillation, Phase Shift, Wein Bridge
oscillators Astable & Monostable Multivibrators; Schimtt Trigger circuits, 555 Timer.

2 Binary Number System & Boolean Algebra (recapitulation); BCD, ASCII, EBDIC, Gray codes 11
and their conversions; Signed binary number representation with 1’s and 2’s complement
methods, Binary arithmetic, Venn diagram, Boolean algebra (recapitulation); Representation in
SOP and POS forms; Minimization of logic expressions by algebraic method. Combinational
circuits - Adder and Subtractor circuits (half & full adder & subtractor); Encoder, Decoder,
Comparator, Multiplexer, DeMultiplexer and Parity Generator.

3 Sequential Circuits - Basic Flip-flop & Latch, Flip-flops -SR, JK, D, T and JK Master-slave Flip 10
Flops, Registers (SISO, SIPO, PIPO, PISO) Ring counter, Johnson counter Basic concept of
Synchronous and Asynchronous counters (detail design of circuits excluded), Design of Mod N
Counter.

4 A/D and D/A conversion techniques – Basic concepts (D/A :R-2-R only A/D: successive 6
approximation. Logic families- TTL, ECL, MOS and CMOS - basic concepts.
Reference:

1. Digital Electronics – Kharate – Oxford.

2. Electronic Devices & Circuit Theory – Boyelstad & Nashelsky - PHI.
3. Fundamentals of Digital Circuits- A. Anand Kumar-PHI
COURSE OBJECTIVE:

□ Explain the principles of analog and digital systems.

□ Compare the performance of the digital system over the analog system.
□ Prepare analog as well as digital logic circuits.
□ Creating a hardware module with some specific application.

COURSE OUTCOMES (COs)

On completion of the course students will be able to

CourseOutcomes COstatement KnowledgeLevelofrevisedBloom’sT
axonomy
ESC301.CO1 Demonstrate the concepts of digital circuits Understanding(LevelII)
ESC301.CO2 Discuss between analog and digital system. Creating(LevelVI)
ESC301.CO3 Develop the analog circuits to determine for a given outputs. Creating(LevelVI)
ESC301.CO4 Explain the different model of analog and digital logic circuits. Evaluating(LevelV)
ESC301.CO5 Analyze the outputs for given inputs for particular analog and Analysing(LevelVI)
digital circuits.
ESC301.CO6 Explain the principle of different analog and digital electronics Understanding(LevelII)
circuits.
 Introduction
• The binary number system is a numerical system that uses only two digits: 0 and 1.
• This system is crucial in representing and manipulating digital information, as it directly corresponds to the on and
off states of electronic circuits.
• Boolean algebra, named after mathematician George Boole.

• It is based on three fundamental operations: AND, OR, and NOT.

• Boolean algebra is widely used in digital circuit design, computer programming, and logical reasoning.

• Boolean algebra enables the design and optimization of complex digital circuits. By applying Boolean principles, engineers
can create circuits that perform specific logical functions, such as arithmetic operations, data storage, and decision-
making.
• Beyond computer science, they have applications in fields such as cryptography, telecommunications, control
systems, and artificial intelligence.
• They provide the building blocks for advanced topics like computer architecture, digital design, and algorithm
development.
• A good example of binary is a light (only on or off)
 Functions of digital logic

Different operations can be perfromed using logic gates and that are

• Arithmetic operation
• Encoding
• Decoding
• Multiplexing
• Comparison
• Code conversion
• counting
• Data Transmission etc.
Arithmetic operations
 Encoding

• Its a process of converting a familier number or symbol to some coded form.

Decoding

• Its an inverse operation of encoding

Multiplexing
Comparison and Code Conversion
Counting and Frequency Division
Data Transmission
 Number Systems
Decimal Number System:

• It contains 10 unique symbol: 0, 1, 2, 3, 4, 5, 6, 7, 8, and 9.

• Its base or radix is 10.

• Each symbol in the number is called digit.

• The leftmost digit is called MSD and rightmost digit is called LSD.
• For Binary number system, r=2,
(0,1)

• For Decimal number system, r=10

( 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 )

• For Octal number system, r=8

( 0, 1, 2, 3, 4, 5, 6, 7 )

• For Hexadecimal number system, r=16

( 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, A, B, C, D, E, F )

0, 1, 2, 3, 4, 5, 6, 7, 8, 9, A, B, C, D, E, F
Binary Number System:

• Its a positional weighted system.

• It contains 2 symbol: 0, and 1.

• Its base or radix is 2.

• A binary digit is called bit.

• The rightmost bit is the least significant bit (LSB), and the leftmost bit is the most significant bit (MSB).

Let’s take an example of a binary number: 1011

1 0 1 1
↑ ↑ ↑ ↑
8 4 2 1

By adding the values of the bits that are 1, we get:

1 × 8 + 0 × 4 + 1 × 2 + 1 × 1 = 11
Therefore, the binary number 1011 is equivalent to the decimal number 11.
Binary to Decimal Conversion
To convert a binary number to its decimal equivalent, follow these steps:

1. Write down the binary number.

2. Assign each bit a weight starting from the rightmost bit, with the right- most bit having a weight of 20, the
next bit to its left having a weight of 21, then 22, 23, and so on.
3. Multiply each bit by its corresponding weight.
4. Add up the products to get the decimal equivalent.

Example
Convert the binary number 1101 to its decimal equivalent.

1.Write down the binary number: 1101.

2. Assign each bit a weight: 23 22 21 20.
3. Multiply each bit by its corresponding weight: 1·23= 8 1·22 = 4 0·21 = 0 1 · 20 = 1.
4. Add up the products: 8 + 4 + 0 + 1 = 13.
• Converting to decimal from binary:
1.
Decimal to Binary Conversion:

1. Divide the decimal number by 2 repeatedly, recording the remainder at each step.
2. The binary equivalent is obtained by reading the remainders in reverse order.

Convert the decimal number 42 to binary

Step 1: 42 ÷ 2 = 21 with a remainder of 0

Step 2: 21 ÷ 2 = 10 with a remainder of 1
Step 3: 10 ÷ 2 = 5 with a remainder of 0
Step 4: 5 ÷ 2 = 2 with a remainder of 1
Step 5: 2 ÷ 2 = 1 with a remainder of 0
Step 6: 1 ÷ 2 = 0 with a remainder of 1
Reading the remainders from Step 6 to Step 1, we get the binary number 101010.
Do the subtraction:
Binary Division
Octal Number System:

• It has 8 independent symbols: 0, 1, 2, 3, 4, 5, 6, and 7.

• Base is 8.

• 8=23; therefore every 3 bit group of binary can be represented by an octal

digits.
Octal to Binary:
Octal Arithmetic
Hexadecimal Number System
Binary to Hexadecimal:
Hexadecimal to Binary:

Hexadecimal to Decimal:
Hexadecimal to Decimal:
Decimal to Hexadecimal:
Octal to Hexadecimal:
• To do this conversion first convert octal to binary and then binary to hexadecimal.
Hexadecimal to Octal :
• 9’s complement of a decimal number is obtained by subtracting each digit of that decimal number from 9.

• 10’s complement of a decimal number is obtained by adding 1 to its 9’s complement.

 9’s complement method of subtraction:
• To perform decimal subtraction using 9’s complement, obtain the 9’s complement of the subtahend and add it to the
minuend.

• If there is a carry, it indicates that it is positive number.

1. Add the carry to the LSD of this result to get the answer.

• If there is no carry, it indicates that the answer is negative.

1. The intermediate result is its 9’s complement.

1. Take the 9’s complement of the result and put a negative sign in front of the answer.
Binary Codes
Gray Code:
• It is the non-weighted code and it is not arithmetic codes.

• There are no specific weights assigned to the bit position.

• It has a very special feature that, only one bit will change each time the decimal number
is incremented.

• As only one bit changes at a time, the gray code is called as a unit distance code.
Binary to Gray Conversion:

Gray to Binary Conversion:

Binary Coded Decimal BCD code:

• In this code each decimal digit is represented by a 4-bit binary number.

• BCD is a way to express each of the decimal digits with a binary code.

• In the BCD, with four bits we can represent sixteen numbers 0000 to 1111. But in BCD code
only first ten of these are used 0000 to 1001.

• The remaining six code combinations i.e. 1010 to 1111 are invalid in BCD.
Alphanumeric codes:
• A binary digit or bit can represent only two symbols as it has only two states '0' or '1'.

• But this is not enough for communication between two computers because there we
need many more symbols for communication.

• These symbols are required to represent 26 alphabets with capital and small letters,
numbers from 0 to 9, punctuation marks and other symbols.

• The following three alphanumeric codes are very commonly used for the data
representation.

• American Standard Code for Information Interchange ASCII.

• Extended Binary Coded Decimal Interchange Code EBCDIC.

ASCII code is a 7-bit code whereas EBCDIC is an 8-bit code.

Error Detecting Code:
• One of the simple technique is to insert one extra bit, known as parity bit.
• Two types of parity are there: Even and ODD
Example:
Hamming Code:
• P1 is set to 0 or 1 so that it establishes even parity over bits 1, 3, 5, and 7.

• P2 is set to 0 or 1 so that it establishes even parity over bits 2, 3, 6, and 7.

• P4 is set to 0 or 1 so that it establishes even parity over bits 4, 5, 6, and 7

Example:
 Symbol and Truth Table of all gates

AND

XOR

OR

NOT

XNOR
NAND

NOR
NOT AND OR

XOR XNOR
NAND NOR
AND GATE
OR GATE
NOT GATE
NAND GATE
NOR GATE
INHIBITS CIRCUITS
IMPLEMENTATION OF CIRCUITS USING BASIC GATES
PROVE THAT
EX.
LAWS OF BOOLEAN ALGEBRA
EX. 1.
EX. 2.
EX. 3.
EX. 4.
Implementation of all gates using NAND gates only

EX-NOR using NAND gates only

Implementation of all gates using NOR gates only
EX-OR using NOR gates only
 THE KARNAUGH MAP

• Boolean expression can be simplified algebrically, but we can never be sure wheather the minimal
expresseion obtained are minimal or not.

• Effectiveness depends on our familarity and ability to apply boolean algebra rules, laws and theorem.

• K-MAP is a systemetic method of simplifying boolean expression.

• Its a chart or a graph, composed of an arrangement of adjucent cells.

• It can be used for any number of variables.

• It becomes tedious when five or more than variables are there.

• Any boolean expression can be expressen in a standard/ cononical/expanded Sum of Product (SOP)
form or Product of Sum (POS) form.

• Each of the product term in SOP form is called minterm and sum terms in POS is called maxterm
• For minterm the binary words are formed by representing each non complemented variables by 1
and each complemented variable by 0.

• For maxterm the binary words are formed by representing each non complemented variables by 0
and each complemented variable by 1.

Lets see.......
Two variable K-Map
Mapping of SOP Expression
The Possible Minterm Groupings
EX.
Mapping of POS Expression
EX.
Three variable K-Map
Some Possible Minterm Groupings
Some Possible Maxterm Groupings
EX.
EX.
Four variable K-Map
 Don’t Care Condition

• It offen occurs when for any input combinations output is not specified or invalid.

• The output of the circuit can take any value (0 or 1) when the inputs are in the don't care state.

• Simplification of logic functions using don't care conditions can lead to reduced power consumption
in digital circuits.

• Don't care conditions provide flexibility in circuit design. Designers can choose different logic values
for don't care inputs based on their specific design requirements.

• For example in Excess 3 code 0000, 0001, 0010 outputs are unspecified so can be taken as don’t care
condition.

• The don’t care terms are denoted by d, X .

• During the process using SOP map, each don’t care are denoted by 1 if it useful in map reduction,
otherwise it is treated as a 0 and left alone.
SOLVE IT....... Are you getting this???
SOLVE IT.......
COMBINATIONAL CIRCUIT
 Full Adder
Full adder is developed to overcome the drawback of Half Adder circuit. It can add two one-bit numbers A and B, and carry c.
The full adder is a three input and two output combinational circuit.
Half Subtractor
Half Subtractor using NAND Gate Only
Full Subtractor
 Parallel Binary Adder

The advantages of a parallel binary adder include:

Speed: Parallel binary adders can perform addition operations much faster compared to serial adders, as they process
multiple bits simultaneously.

High Throughput: Due to their ability to perform multiple operations at once, parallel adders can achieve high
throughput, making them suitable for applications that require a high rate of data processing, such as digital signal
processing and multimedia applications.
Ex. Design and Implement a 4 bit gray to binary code converter
 Decoder
• Decoder is a combinational circuit that has ‘n’ input lines and maximum of 2n output lines. One of these outputs will be
active High based on the combination of inputs present, when the decoder is enabled
3: 8 Decoder
Decoder with Enable Input
 2 to 4 Decoder

From Truth table, we can write the Boolean functions

for each output as:
Implementation of 3:8 Decoder using 2: 4 decoders
Implementation of 4:16 Decoder using 3: 8 decoders
Truth Table of 4:16 Decoder
Circuit Diagram of 4:16 Decoder
 Encoder
• An encoder is a digital circuit that converts a set of binary inputs into a unique binary code.
• Encoders are commonly used in digital systems to convert a parallel set of inputs into a serial code.
• An Encoder is a combinational circuit that performs the reverse operation of a Decoder.

Types of Encoders
There are different types of Encoders which are mentioned below.

• 4 to 2 Encoder
• Octal to Binary Encoder (8 to 3 Encoder)
• Decimal to BCD Encoder
• Priority Encoder
 4 to 2 Encoder
• The 4 to 2 Encoder consists of four inputs Y3, Y2, Y1 & Y0, and two outputs A1 & A0.
• At any time, only one of these 4 inputs can be ‘1’ in order to get the respective binary code at the output.

Implementation using OR Gate

 Octal to Binary Encoder (8 to 3 Encoder)

A2 = Y7 + Y6 + Y5 + Y4
A1 = Y7 + Y6 + Y3 + Y2
A0 = Y7 + Y5 + Y3 + Y1
Implementation using OR Gate
Decimal to BCD Encoder
From the truth table we get:
 Priority Encoder
• The priority encoder is a combinational logic circuit that contains 2^n input lines and n output lines.

• It represents the highest priority input among all the input lines.

• When multiple input lines are active high at the same time, then the input that has the highest
priority is considered first to generate the output.
 Multiplexing
• Multiplexing means sharing.

• There are two types of multiplexing: Time and Frequency multiplexing.

• A multiplexer select 1 out of N input data sources and transmits the selected data to the single
output channel
Basic 2 input Multiplexer
4 input Multiplexer
16 Input Multiplexer from Two 8 input Multiplexer
 Applications of Multiplexers

Implement the boolean expression F(A, B, C) = ∑ m(2, 3, 6, 7) using a multiplexer.

Sol. There are 3 variables in the given expression, hence 2n = 23 = 8 : 1 multiplexer. So, the mux has 8 input lines, 3 selection
lines, and one output.
 Implement the boolean expression F(A, B, C) = ∑ m(0, 1, 3, 5, 7) using a multiplexer.

Sol. There are 3 variables in the given expression, hence 2n = 23 = 8 : 1 multiplexer. So, the mux has 8 input lines, 3 selection
lines, and one output.
 Applications of Multiplexers
Implement the boolean expression F(A, B, C) = ∑ m(0, 2, 5, 6) using 4 : 1 multiplexer.

Sol.
• In the given boolean expression, there are 3 variables. We should use 23 : 1 = 8 : 1 multiplexer. But as per the
question, it is to be implemented with 4 : 1 mux.

• For 4 : 1 multiplexer, there should be 2 selection lines. So from the given 3 variables, the 2 least significant
variables(B, C) are used as selection line inputs.

• Let us derive the four inputs of 4 : 1 multiplexer using the implementation table.
EX. Implement F(A, B, C, D) = ∑ m(0, 1, 5, 6, 8, 10, 12, 15) using 8 : 1 multiplexer.

Sol.

In the given boolean expression, there are 4 variables. We should use 24 : 1 = 16 : 1 multiplexer. But as per the
question, it is to be implemented with 8 : 1 mux.

For 8 : 1 multiplexer, there should be 3 selection lines. So from the given 4 variables, the 3 least significant
variables(B, C, D) are used as selection line inputs.

The 8 inputs are derived using the implementation table shown below
From the derived input, 8 : 1 multiplexer can be drawn as below
 Solve it:
Implement the following Boolean function using 8:1 MUX
F (A, B, C, D) = Σm (0, 1, 3, 4, 8, 9, 15)

Step 1: To find number of select lines and input lines of the MUX

Step 2: Formation of Implementation Table

Step 3: Draw the circuit to implement the given Boolean Function using 8:1 MUX
 For the given multiplexer circuit, determine the logic function.

The truth table is given below.

EX. The Given Function - F(ABCD)=∑m(2,3,4,5,8,9,12)

(a) Implement it with 16:1 MUX

(b) Implementation with 8:1 MUX
From the derived input, 8:1 multiplexer can be drawn as follows:
 DEMULTIPLEXERS

Demultiplexers perform reverse operation of Multiplexer.

1:8 Line DEMULTIPLEXER
Design a Full Adder using Demultiplexer: