19-4894; Rev 4; 8/10

Serial Number iButton

General Description Features

DS1990R
The DS1990R serial number iButton® is a rugged data ♦ Upgrade of DS1990A Guarantees Presence Pulse
carrier that serves as an electronic registration number on Contact
for automatic identification. Data is transferred serially
through the 1-Wire® protocol, which requires only a sin- ♦ Can Be Read in Less Than 5ms
gle data lead and a ground return. Every DS1990R is ♦ Operating Range: 2.8V to 6.0V, -40°C to +85°C
factory lasered with a guaranteed unique 64-bit regis-
tration number that allows for absolute traceability. The Common iButton Features
durable stainless-steel iButton package is highly resis-
tant to environmental hazards such as dirt, moisture, ♦ Unique Factory-Lasered 64-Bit Registration
and shock. Its compact coin-shaped profile is self- Number Ensures Error-Free Device Selection and
aligning with mating receptacles, allowing the DS1990R Absolute Traceability Because No Two Parts are
to be used easily by human operators. Accessories Alike
enable the DS1990R iButton to be mounted on almost
any object, including containers, pallets, and bags. ♦ Built-In Multidrop Controller for 1-Wire Net
The DS1990R is a fully compatible variant of the ♦ Digital Identification by Momentary Contact
DS1990A. In applications where a presence pulse on ♦ Data Can Be Accessed While Affixed to Object
contact is critical, the DS1990R should be preferred
over the DS1990A. ♦ Economically Communicates to Bus Master with
a Single Digital Signal at 16.3kbps
Applications ♦ Button Shape is Self-Aligning with Cup-Shaped
Access Control Probes
Work-In-Progress Tracking ♦ Durable Stainless-Steel Case Engraved with
Tool Management Registration Number Withstands Harsh
Inventory Control Environments
♦ Easily Affixed with Self-Stick Adhesive Backing,
Ordering Information Latched by its Flange, or Locked with a Ring
Pressed Onto its Rim
PART TEMP RANGE PIN-PACKAGE
DS1990R-F5# -40°C to +85°C F5 iButton
♦ Presence Detector Acknowledges When Reader
First Applies Voltage
DS1990R-F3# -40°C to +85°C F3 iButton
#Denotes a RoHS-compliant device that may include lead(Pb)
that is exempt under the RoHS requirements.
Pin Configurations

F3 SIZE F5 SIZE
Examples of Accessories
3.10mm 5.89mm
PART ACCESSORY 0.51mm 0.51mm BRANDING

DS9096P Self-Stick Adhesive Pad

t o n ®. c
DS9101 Multipurpose Clip
ut 16.25mm
om
iB

DS9093RA Mounting Lock Ring

DS9093A Snap-In Fob 89 ® 01
DS9092 iButton Probe
000000FBC52B
1-Wire®
5
YY

W
#F

W R 17.35mm
ZZZ D S1990

IO IO
GND GND
iButton and 1-Wire are registered trademarks of Maxim
Integrated Products, Inc.

________________________________________________________________ Maxim Integrated Products 1

For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
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 Serial Number iButton
ABSOLUTE MAXIMUM RATINGS
DS1990R

IO Voltage Range to GND .....................................-0.5V to +6.0V Junction Temperature ......................................................+125°C

IO Sink Current....................................................................20mA Storage Temperature Range .............................-55°C to +125°C

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.

ELECTRICAL CHARACTERISTICS
(TA = -40°C to +85°C.)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

IO PIN: GENERAL DATA
1-Wire Pullup Voltage VPUP (Notes 1, 2) 2.8 6.0 V
1-Wire Pullup Resistance RPUP (Notes 3, 4) 0.6 5 k

Input Capacitance CIO (Notes 5, 6) 100 800 pF
Input Load Current IL (Note 7) 0.25 μA
Input Low Voltage VIL (Notes 1, 3, 8) 0.3 V
Input High Voltage VIH (Notes 1, 9) 2.2 V
Output Low Voltage at 4mA VOL (Note 1) 0.4 V
Operating Charge QOP (Notes 6, 10) 30 nC
Recovery Time tREC (Note 3) 1 μs
Time Slot Duration t SLOT (Note 3) 61 μs
IO PIN: 1-Wire RESET, PRESENCE-DETECT CYCLE
Reset Low Time tRSTL (Notes 3, 11) 480 μs
Reset High Time tRSTH (Notes 3, 12) 480 μs
Presence-Detect High Time t PDH 15 60 μs
Presence-Detect Low Time t PDL (Note 13) 60 240 μs
Presence-Detect Sample Time tMSP (Note 3) 60 75 μs
IO PIN: 1-Wire WRITE
Write-Zero Low Time tW0L (Notes 3, 14) 60 120 μs
Write-One Low Time tW1L (Notes 3, 14) 1 15 μs
IO PIN: 1-Wire READ
Read Low Time tRL (Notes 3, 15) 1 15 -  μs
Read Sample Time tMSR (Notes 3, 15) tRL +  15 μs
Note 1: All voltages are referenced to ground.
Note 2: External pullup voltage. See Figure 4.
Note 3: System requirement.
Note 4: Full RPUP range is guaranteed by design and simulation and not production tested. Production testing performed at a
fixed RPUP value. Maximum allowable pullup resistance is a function of the number of 1-Wire devices in the system and
1-Wire recovery times. The specified value here applies to systems with only one device and with the minimum 1-Wire
recovery times. For more heavily loaded systems, an active pullup such as that found in the DS2480B may be required.
Note 5: Capacitance on the IO pin could be 800pF when power is first applied. If a 5kΩ resistor is used to pull up the IO line to
VPUP, 5µs after power has been applied the parasite capacitance will not affect normal communications.
Note 6: Guaranteed by design, simulation only. Not production tested.
Note 7: Input load is to ground.

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 Serial Number iButton

DS1990R
Note 8: The voltage on IO must be less than or equal to VILMAX whenever the master drives the line low.
Note 9: VIH is a function of the internal supply voltage.
Note 10: 30nC per 72 time slots at 5.0V pullup voltage with a 5kΩ pullup resistor and tSLOT ≤ 120µs.
Note 11: The reset low time (tRSTL) should be restricted to a maximum of 960µs to allow interrupt signaling. A longer duration could
mask or conceal interrupt pulses if this device is used in parallel with a DS1994.
Note 12: An additional reset or communication sequence cannot begin until the reset high time has expired.
Note 13: Presence pulse after POR is guaranteed by design, not production tested.
Note 14: ε in Figure 7 represents the time required for the pullup circuitry to pull the voltage on IO up from VIL to VIH. The actual
maximum duration for the master to pull the line low is tW1LMAX + tF - ε and tW0LMAX + tF - ε, respectively.
Note 15: δ in Figure 7 represents the time required for the pullup circuitry to pull the voltage on IO up from VIL to the input-high
threshold of the bus master. The actual maximum duration for the master to pull the line low is tRLMAX + tF.

iButton CAN PHYSICAL SPECIFICATION

SIZE See the Package Information section.
WEIGHT (DS1990R) Ca. 2.5 grams

Detailed Description parasite power block. The ROM function control unit
includes the 1-Wire interface and the logic to implement
The block diagram in Figure 1 shows the major function
the ROM function commands, which access 64 bits of
blocks of the device. The DS1990R takes the energy it
lasered ROM.
needs to operate from the IO line, as indicated by the

PARASITE POWER
DS1990R

ROM 64-BIT
IO
FUNCTION CONTROL LASERED ROM

Figure 1. Block Diagram

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 Serial Number iButton
64-Bit Lasered ROM 1-Wire Bus System
DS1990R

Each DS1990R contains a unique ROM code that is 64

The 1-Wire bus is a system that has a single bus master
bits long. The first 8 bits are a 1-Wire family code. The
and one or more slaves. In all instances, the DS1990R
next 48 bits are a unique serial number. The last 8 bits
is a slave device. The bus master is typically a micro-
are a CRC of the first 56 bits. See Figure 2 for details.
controller or PC. For small configurations, the 1-Wire
The 1-Wire CRC is generated using a polynomial gen-
communication signals can be generated under soft-
erator consisting of a shift register and XOR gates as
ware control using a single port pin. Alternatively, the
shown in Figure 3. The polynomial is X8 + X5 + X4 + 1.
DS2480B 1-Wire line driver chip or serial-port adapters
Additional information about the 1-Wire Cyclic
based on this chip (DS9097U series) can be used. This
Redundancy Check (CRC) is available in Application
simplifies the hardware design and frees the micro-
Note 27: Understanding and Using Cyclic Redundancy
processor from responding in real time. The discussion
Checks with Maxim iButton Products.
of this bus system is broken down into three topics:
The shift register bits are initialized to 0. Then starting hardware configuration, transaction sequence, and
with the least significant bit of the family code, one bit 1-Wire signaling (signal types and timing). The 1-Wire
at a time is shifted in. After the 8th bit of the family code protocol defines bus transactions in terms of the bus
has been entered, the serial number is entered. After state during specific time slots that are initiated on the
the 48th bit of the serial number has been entered, the falling edge of sync pulses from the bus master. For a
shift register contains the CRC value. Shifting in the 8 more detailed protocol description, refer to Chapter 4 of
bits of CRC returns the shift register to all 0s. the Application Note 937: Book of iButton Standards.

MSB LSB

8-BIT 8-BIT FAMILY CODE

48-BIT SERIAL NUMBER
CRC CODE (01h)

MSB LSB MSB LSB MSB LSB

Figure 2. 64-Bit Lasered ROM

POLYNOMIAL = X8 + X5 + X4 + 1

1ST 2ND 3RD 4TH 5TH 6TH 7TH 8TH

STAGE STAGE STAGE STAGE STAGE STAGE STAGE STAGE

X0 X1 X2 X3 X4 X5 X6 X7 X8

INPUT DATA

Figure 3. 1-Wire CRC Generator

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 Serial Number iButton
Hardware Configuration for more than 120µs, one or more devices on the bus

DS1990R
may be reset.
The 1-Wire bus has only a single line by definition; it is
important that each device on the bus be able to drive Transaction Sequence
it at the appropriate time. To facilitate this, each device
The protocol for accessing the DS1990R through the
attached to the 1-Wire bus must have open-drain or
1-Wire port is as follows:
three-state outputs. The 1-Wire port of the DS1990R is
open drain with an internal circuit equivalent to that • Initialization
shown in Figure 4. A multidrop bus consists of a 1-Wire • ROM Function Command
bus with multiple slaves attached. At standard speed,
the 1-Wire bus has a maximum data rate of 16.3kbps. Initialization
The value of the pullup resistor primarily depends on All transactions on the 1-Wire bus begin with an initial-
the network size and load conditions. For most applica- ization sequence. The initialization sequence consists
tions, the optimal value of the pullup resistor is approxi- of a reset pulse transmitted by the bus master followed
mately 2.2kΩ. The idle state for the 1-Wire bus is high. by presence pulse(s) transmitted by the slave(s). The
If for any reason a transaction needs to be suspended, presence pulse lets the bus master know that the
the bus must be left in the idle state if the transaction is DS1990R is on the bus and is ready to operate. For
to resume. If this does not occur and the bus is left low more details, see the 1-Wire Signaling section.

VPUP

SIMPLE BUS MASTER DS1990R 1-Wire PORT

RPUP
DATA
Rx Rx

Tx Tx
Rx = RECEIVE
Tx = TRANSMIT
100Ω MOSFET
OPEN-DRAIN
PORT PIN

DS2480B BUS MASTER

+5V

VDD VPP
HOST CPU
POL 1-W TO 1-Wire DATA
SERIAL IN
SERIAL RXD N.C.
PORT SERIAL OUT
TXD GND

DS2480B

Figure 4. Hardware Configuration

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 Serial Number iButton
1-Wire ROM Function Commands
DS1990R

BUS MASTER Tx Once the bus master has detected a presence pulse, it
RESET PULSE can issue one of the ROM function commands the
DS1990R supports. All ROM function commands are
8 bits long. A list of these commands follows. (See
BUS MASTER Tx ROM DS1990R Tx Figure 5 for a flowchart.)
FUNCTION COMMAND PRESENCE PULSE
Read ROM [33h] or [0Fh]
This command allows the bus master to read the
DS1990R’s 8-bit family code, unique 48-bit serial num-
33h OR F0h
N SEARCH ROM N ber, and 8-bit CRC. This command can only be used if
0Fh READ ROM
COMMAND? COMMAND? there is a single slave device on the bus. If more than one
slave is present on the bus, a data collision occurs when
Y Y all slaves try to transmit at the same time (open drain pro-
duces a wired-AND result). The resultant family code and
DS1990R Tx DS1990R Tx BIT 0 48-bit serial number results in a mismatch of the CRC.
FAMILY CODE
DS1990R Tx BIT 0
(1 BYTE) Search ROM [F0h]
MASTER Tx BIT 0
When a system is initially brought up, the bus master
might not know the number of devices on the 1-Wire
bus or their registration numbers. By taking advantage
N of the wired-AND property of the bus, the master can
BIT 0 MATCH?
use a process of elimination to identify the registration
numbers of all slave devices. For each bit of the regis-
Y tration number, starting with the least significant bit, the
bus master issues a triplet of time slots. On the first slot,
DS1990R Tx DS1990R Tx BIT 1 each slave device participating in the search outputs
SERIAL NUMBER
DS1990R Tx BIT 1 the true value of its registration number bit. On the sec-
(6 BYTES)
MASTER Tx BIT 1 ond slot, each slave device participating in the search
outputs the complemented value of its registration num-
ber bit. On the third slot, the master writes the true
value of the bit to be selected. All slave devices that do
N
BIT 1 MATCH? not match the bit written by the master stop participat-
ing in the search. If both of the read bits are zero, the
Y master knows that slave devices exist with both states
of the bit. By choosing which state to write, the bus
master branches in the ROM code tree. After one com-
DS1990R Tx DS1990R Tx BIT 63
CRC BYTE plete pass, the bus master knows the registration num-
DS1990R Tx BIT 63
ber of a single device. Additional passes identify the
MASTER Tx BIT 63 registration numbers of the remaining devices. Refer to
Application Note 187: 1-Wire Search Algorithm for a
detailed discussion, including an example.
N Match ROM [55h]/Skip ROM [CCh]
BIT 63 MATCH?
The minimum set of 1-Wire ROM function commands
includes a Match ROM and a Skip ROM command.
Y
Because the DS1990R contains only the 64-bit ROM
without any additional data fields, Match ROM and Skip
ROM are not applicable. The DS1990R remains silent
Figure 5. ROM Functions Flowchart (inactive) upon receiving a ROM function command
that it does not support. This allows the DS1990R to
coexist on a multidrop bus with other 1-Wire devices
that do respond to Match ROM or Skip ROM.

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 Serial Number iButton
1-Wire Signaling detect a presence pulse, the master must test the logi-

DS1990R
cal state of the 1-Wire line at tMSP.
The DS1990R requires strict protocols to ensure data
integrity. The protocol consists of four types of signaling Read/Write Time Slots
on one line: reset sequence with reset pulse and pres- Data communication with the DS1990R takes place in
ence pulse, write-zero, write-one, and read-data. time slots that carry a single bit each. Write time slots
Except for the presence pulse, the bus master initiates transport data from bus master to slave. Read time
all these signals. slots transfer data from slave to master. The definitions
To get from idle to active, the voltage on the 1-Wire line of the write and read time slots are illustrated in
needs to fall from VPUP to below VILMAX. To get from Figure 7.
active to idle, the voltage needs to rise from VILMAX to All communication begins with the master pulling the
above VIHMIN. The time it takes for the voltage to make data line low. As the voltage on the 1-Wire line falls
this rise, referenced as ε in Figure 6, depends on the below VILMAX, the DS1990R starts its internal timing
value of the pullup resistor (RPUP) and capacitance of generator that determines when the data line is sam-
the 1-Wire network attached. pled during a write time slot and how long data is valid
The initialization sequence required to begin any com- during a read time slot.
munication with the DS1990R is shown in Figure 6. A
reset pulse followed by a presence pulse indicates that
Master-to-Slave
For a write-one time slot, the voltage on the data line
the DS1990R is ready to receive a ROM function com-
must have risen above VIHMIN after the write-one low
mand. If the bus master uses slew-rate control on the
time tW1LMAX is expired. For a write-zero time slot, the
falling edge, it must pull down the line for tRSTL + tF to
voltage on the data line must stay below VILMAX until
compensate for the edge.
the write-zero low time tW0LMIN is expired. For most reli-
After the bus master has released the line, it goes into able communication, the voltage on the data line
receive mode (Rx). Now the 1-Wire bus is pulled to should not exceed VILMAX during the entire tW0L win-
VPUP through the pullup resistor or, in the case of a dow. After the voltage has risen above V IHMIN, the
DS2480B driver, by active circuitry. When the VIHMIN is DS1990R needs a recovery time tREC before it is ready
crossed, the DS1990R waits for tPDH and then transmits for the next time slot.
a presence pulse by pulling the line low for tPDL. To

MASTER Tx "RESET PULSE" MASTER Rx "PRESENCE PULSE"

ε
tMSP
VPUP

VIHMIN

VILMAX
0V
tPDH
tRSTL tPDL tREC
tF
tRSTH

RESISTOR MASTER DS1990R

Figure 6. Initialization Procedure: Reset and Presence Pulses

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 Serial Number iButton
DS1990R

WRITE-ONE TIME SLOT

tW1L
VPUP
VIHMASTER
VIHMIN

VILMAX
0V
ε
tF
tSLOT

RESISTOR MASTER

WRITE-ZERO TIME SLOT

tW0L
VPUP
VIHMASTER
VIHMIN

VILMAX
0V
ε
tF tREC
tSLOT

RESISTOR MASTER

READ-DATA TIME SLOT

tMSR
tRL
VPUP
VIHMASTER
VIHMIN
MASTER
SAMPLING
WINDOW
VILMAX
0V
δ
tF tREC
tSLOT

RESISTOR MASTER DS1990R

Figure 7. Read/Write Timing Diagram

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 Serial Number iButton
Slave-to-Master The sum of tRL + δ (rise time) on one side and the inter-

DS1990R
A read-data time slot begins like a write-one time slot. nal timing generator of the DS1990R on the other side
The voltage on the data line must remain below VILMAX define the master sampling window (t MSRMIN to
until the read low time tRL is expired. During the tRL tMSRMAX) in which the master must perform a read from
window, when responding with a 0, the DS1990R starts the data line. For most reliable communication, t RL
pulling the data line low; its internal timing generator should be as short as permissible and the master should
determines when this pulldown ends and the voltage read close to but no later than tMSRMAX. After reading
starts rising again. When responding with a 1, the from the data line, the master must wait until tSLOT is
DS1990R does not hold the data line low at all, and the expired. This guarantees sufficient recovery time tREC
voltage starts rising as soon as tRL is over. for the DS1990R to get ready for the next time slot.

Package Information
For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in
the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to
the package regardless of RoHS status.
PACKAGE TYPE PACKAGE CODE OUTLINE NO. LAND PATTERN NO.
F3 iButton IB#3NB 21-0252 —
F5 iButton IB#5NB 21-0266 —

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 Serial Number iButton
Revision History
DS1990R

REVISION REVISION PAGES

DESCRIPTION
NUMBER DATE CHANGED
0 5/05 Initial release —
1 8/06 Reworded the UL#913 bullet to “Designed to meet...” 1
Updated the Ordering Information table to include RoHS-compliant packages; removed
2 8/09 1
the UL#913 bullet from the Common iButton Features section
Created newer template-style data sheet; in the Electrical Characteristics table, deleted
the Output High Voltage parameter, moved the 1-Wire Pullup voltage parameter from
3 8/10 table header to table body, changed VILMAX from 0.8V to 0.3V, added Note 14 to the tW0L 2, 3, 8
specification, changed tW1LMAX from 15μs –
to 15μs, and added more details to Notes
14 and 15; added the epsilon timing to the Write-Zero Time Slot in Figure 7

Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.

10 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600

© 2010 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.

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