2017 Devices for Integrated Circuit (DevIC), 23-24 March, 2017, Kalyani, India 131

Improvement of Transconductance and Gate Source

Capacitance of Al0.27Ga0.73N/GaN HEMT at 45nm
gate length with In0.1Ga0.9N back-barrier
Soumya Prava Nayak, Pradipta Dutta, S K Mohapatra
School of Electronics Engineering.
KIIT University, Bhubaneswar.
Odisha, India- 751031
[email protected], [email protected], [email protected]

Abstract— An Al0.27Ga0.73N/GaN HEMT is developed at LG noise margin [10]. Effects on transconductance, gm, for
=100nm gate length with In0.1Ga0.9N back-barrier. The physical different widths of InGaN has been analysed and following the
insight of In0.1Ga0.9N as back-barrier and the impact of its height series of analysis a good improvement in gm has been achieved
on transconductance are investigated to find the optimized even with shortening the gate length, Lg. The device under
dimension of the device with improved transconductance, gm, at
45nm gate length. Non-linearity like Kink Effect is also
observation is modified by shortening the source length as
identified. Some initial level of ac analysis is done to obtain the compared to drain length, but the source to drain distance is
CGS plot with varying gate lengths. With necessary simulations, kept constant to maintain the same values of parasitic
33% improvement in peak gm and 26.3% reduction in CGS are resistance and also the fringing capacitance [11].
obtained.
The device description along with the materials used is
Keywords—HEMT; back-barrier; Kink Effect; presented in section II, afterwards in section III the analysed
Transconductance results of the work are discussed in brief.

I. INTRODUCTION II. DEVICE DESCRIPTION AND MATERIALS USED

GaN-based HEMT has come out as one of the most used of The initial structure as shown in Fig 1.a is analysed with and
the Nitride group HEMTs. The use of wide bandgap materials without InGaN back-barrier. As because of the polarization
like GaN makes this device highly desirable in high effect present, this device does not require intentional doping
temperature conditions [1]. They can be used at higher voltage [12]. In order to have convenience in our analysis, we are
and current supply because of their higher breakdown voltage denoting the device geometrical specifications as: thickness of
[2]. As the name suggests, the device provides high electron GaN (hGaN) =300nm, thickness of InGaN (tbar) =5nm, thickness
velocity in 2DEG, 2-Dimensional electron gas, which is of AlGaN (hAlGaN) =25nm, the source to drain distance (LSD) =
responsible for high frequency of operations. It is the only 1.6μm, drain length (LD) =1μm, source length (LS) =1μm and
combination (AlGaN/GaN) which exhibits polarization effects gate length (LG) of 100nm are taken. To create ohmic contacts,
including spontaneous and piezoelectric effects [2] [3]. The the source and drain regions are n+ doped [1].
presence of polarisation makes the device useful even without
doping of AlGaN. The polarization in this device strongly
depends on the Al mole fraction, x in AlxGa1-xN [4] [5]. It has
been evident from the previous works that InGaN back-barrier
is used to increase the height of conduction band in the buffer
with respect to GaN layer [6] [7]. It strongly bounds carriers at
hetero-interface preventing carrier diffusion into the bulk layer
[8]. Along with the confinement of electrons the back-barrier
is responsible for increased carrier density, hence improved
drain current (ID). But sometimes the device shows
degradation of gm due to the use of back-barrier yielding large
parasitic resistance [8]. In this work, the focus is on improving
gm [9] in order to obtain high gain of the device enhancing the
noise figure and frequency of operation. In our modified
structure, the gate length is reduced to 45nm to improve the Fig. 1.a. Basic AlGaN/GaN HEMT with InGaN back-barrier.

978-1-5090-4724-6/17/$31.00 ©2017 IEEE

 2017 Devices for Integrated Circuit (DevIC), 23-24 March, 2017, Kalyani, India 132

The SiN passivation layer is used to secure the device from insertion of back-barrier is causing a significant amount of drift
contaminants and moisture. The passivation even reduces the in negative threshold voltage, which in turn decreases the on-
effect of Fermi-level pinning, and thus enhances the device resistance. The decrease in on-resistance is also justifying the
performance [13]. The polarization induced charges at larger drain current obtained on using back-barrier [17].
AlGaN/GaN interface and at passivation/AlGaN interface are
carefully obtained and placed for proper simulations [14] [15].

After analysing the results of the Fig. 1.a, the device is further
modified as structure3 as shown in Table 1 by reducing the
source length (LS) to 0.5μm, keeping LSD as 1.6μm and
increasing the drain length (LD) to 1.5μm. Further the gate
length (LG) is taken as 45nm. The shortening of gate length is
required to enhance the high frequency performance of
AlGaN/GaN HEMTs [16]. In our proposed structure we have
taken gate length, LG =45nm [13] and the inclusion of InGaN
back-barrier of tbar =2nm is balancing the consequence of gate
length shortening, i.e., the Short Channel Effects are also
reduced by the insertion of back-barrier in the structure [7] [8].

TABLE 1. Modifications to structure of Fig. 1.a for analysis

Fig. 2.b. Behavior of gm with VGS for structure1, with and without back-
barrier.
Structure LG LS LD tbar
Structure 1 100nm 1µm 1µm 5nm From simulation results, it has been extracted that ID (max) of
structure1, as mentioned in Table 1, with and without back-
Structure 2 45nm 1µm 1µm 2nm barrier is 2.2mA/um and 0.48mA/um respectively. From the
Structure 3 45nm 0.5µm 1.5µm 2nm Fig. 2.a, the device with back-barrier is showing a non-
linearity in ID at a voltage much higher than the threshold
voltage. This non-linearity is known as Kink Effect. The Kink
effect, occurring because of the change in threshold voltage, is
III. RESULTS AND ANALYSIS an increase of variation in the drain current at a given drain or
In this section, the ID, gm and CGS are obtained through DC and gate voltage [18]. The kink effect is a type of current collapse
AC analysis. From Fig. 1.a, and taking the dimensions of and performance deterioration due to the electrical stress for a
structure1 from Table 1, the input characteristic, that is the long period [18] [19]. In Fig. 2.b the influence of back-barrier
variation of drain current (ID) with respect to gate voltage on the behavior of transconductance with gate voltage is
(VGS) is plotted as shown in Fig. 2.a. In this figure we can shown. The transconductance of the device on inclusion of
observe that the ID of the device with back-barrier is saturating back-barrier is less than that of the device without the
at a higher value than that of the device without back-barrier. inclusion of back-barrier. The main reason for the discredit of
gm is the reduction of gate control over the confined carriers in
the channel and the presence of higher value of access
resistance of the device having back-barrier [20].

KINK
EFFECT

Fig. 2.a. ID-VGS characteristics of Structur1 with and without InGaN back-
barrier.

The large difference in drain current is because of the higher

Fig 2.c - ID-VDS characteristics for structure1 with and without back-barrier.
electron mobility of the charge carriers resulting from the
decrement in diffusion of bounded carriers in the channel into
the GaN layer when InGaN back-barrier is being used [6]. The
 2017 Devices for Integrated Circuit (DevIC), 23-24 March, 2017, Kalyani, India 133

Because of the polarization effect in InGaN layer, charge is As we have observed that the use of back-barrier has increased
induced, raising the height of conduction band of the the drain current, but at the same time it has degraded the
immediate GaN region [1]. This rise in height bounds the transconductance. The smaller gate length is also decreasing
electrons in the channel, which is the main cause of higher the gm but higher values of gm are responsible for better Figure
saturation drain current density in the device having back- of Merit of the device, specifically in CMOS applications [8],
barrier. This is shown through the ID-VDS plot for the device and to improve the transconductance further analysis are done.
with and without back-barrier in Fig. 2.c. In Fig. 2.d, the In Fig. 2.f, the variation of gm with VGS of the structure1,
analysis of gm with different back-barrier heights, tbar, has been structure2 as given in Table 1 are compared with our proposed
presented and it has been obtained that on increasing the back- device, structure3. From the Fig. 2.f it is evident that the gm of
barrier height the transconductance decreased. Here, tbar=2nm structure3 is showing significant improvement over the gm of
is showing the highest transconductance. On increasing the tbar structure2. The structure2 is modified into structure3 such that
of the back-barrier, the height of the quantum well increased the gm will improve considerably even when LG of 45nm is
[1] and the effect of gate voltage over the channel relatively used [13].
got decreased leading to the decrement in gm [8] [21].
Choosing an optimal value of tbar also leads to the reduction in
leakage and dynamic on-resistance collapse [22]. To improve
the device performance, the device in Fig. 1.a is modified by
reducing gate length to LG =45nm. The variation of gm withVGS
for the device with LG =45nm is shown in Fig. 2.e.

Fig. 2.f. Transconductance of structure1, 2 and 3. Structure3 is showing

improvement over Structure2.

In device structure3, the source length is decreased and the

drain length is increased keeping the source to drain length
constant. On reducing the source length and increasing the
drain length, the n+ doped ohmic contact areas are also
Fig. 2.d. Variation in gm with varying InGaN back-barrier height. changing. This change in the doping regions of contacts is
decreasing the height of the notch, leading to the increased
From the Fig. 2.e, the gm of the device with LG =45nm is less flexibility of charge carriers in 2DEG, thus increasing gate
than that of the device with LG =100nm. As the length of the control over the 2DEG channel. As a result the
gate, LG, has decreased, the gate contact area has also transconductance has also improved. In Fig. 2.g, the variation
decreased, consequently the gate lost the control over the of ID with VDS is plotted for the structures mentioned in
channel leading to the fall in gm value [8] [21]. Table1. From the Fig. 2.g it is evident that there is a rise in
drain current, ID, in the saturation region at a gate length LG
=45nm.

Fig. 2.e. Showing the effect of gate length shortening on transconductance.

Fig. 2.g. ID-VD characteristics of Structure1, 2 and 3; VGS=0.1V.
 2017 Devices for Integrated Circuit (DevIC), 23-24 March, 2017, Kalyani, India 134

The unwanted presence of current within the GaN layer ACKNOWLEDGMENT

because of lesser confinement of charge in the 2DEG and We would like to acknowledge the VLSI Design laboratory in
increase in output conductance are the reasons for the non- the School of Electronics Engineering at Kalinga Institute of
ideality in drain current with smaller gate length [23] [24]. Industrial Technology Bhubaneswar, India for furnishing us
This effect is less at 100nm gate length as shown in Fig. 2.g. the proper platform to carry out the research work.
Considering LG of the device in Fig 1.a as 45nm with tbar =2nm
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