REF02

REF
02

REF
02

SBVS003B – JANUARY 1993 – REVISED JANUARY 2005

+5V Precision
VOLTAGE REFERENCE

FEATURES DESCRIPTION
● OUTPUT VOLTAGE: +5V ±0.2% max The REF02 is a precision 5V voltage reference. The drift is
● EXCELLENT TEMPERATURE STABILITY: laser trimmed to 10ppm/°C max over the extended industrial
10ppm/°C max (–40°C to +85°C) and military temperature range. The REF02 provides a stable
● LOW NOISE: 10µVPP max (0.1Hz to 10Hz) 5V output that can be externally adjusted over a ±6% range
with minimal effect on temperature stability. The REF02
● EXCELLENT LINE REGULATION: operates from a single supply with an input range of 8V to 40V
0.01%/V max with a very low current drain of 1mA, and excellent temperature
● EXCELLENT LOAD REGULATION: stability due to an improved design. Excellent line and load
0.008%/mA max regulation, low noise, low power, and low cost make the
● LOW SUPPLY CURRENT: 1.4mA max REF02 the best choice whenever a 5V voltage reference is
● SHORT-CIRCUIT PROTECTED required. Available package options are DIP-8 and SO-8. The
REF02 is an ideal choice for portable instrumentation,
● WIDE SUPPLY RANGE: 8V to 40V temperature transducers, Analog-to-Digital (A/D) and Digital-
● INDUSTRIAL TEMPERATURE RANGE: to-Analog (D/A) converters, and digital voltmeters.
–40°C to +85°C
● PACKAGE OPTIONS: DIP-8, SO-8

APPLICATIONS 2
● PRECISION REGULATORS VIN
6
● CONSTANT CURRENT SOURCE/SINK VOUT Output

● DIGITAL VOLTMETERS
REF02
● V/F CONVERTERS 3 5
Temp Trim RPOT
● A/D AND D/A CONVERTERS 10kΩ
GND (Optional)
● PRECISION CALIBRATION STANDARD
4
● TEST EQUIPMENT

+5V Reference with Trimmed Output

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date. Copyright © 1993-2005, Texas Instruments Incorporated
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.

www.ti.com
SPECIFICATIONS
ELECTRICAL
At TA = +25°C and VIN = +15V power supply, unless otherwise noted.

REF02A REF02B
PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
OUTPUT VOLTAGE ILOAD = 0mA 4.985 5.0 5.015 4.990 ✻ 5.010 V
Change with Temperature(1, 2) (∆VOT)
–40°C to +85°C 0.05 0.19 0.05 0.13 %

OUTPUT VOLTAGE DRIFT(3)

–40°C to +85°C (TCVO) 4 15 4 10 ±ppm/°C

LONG-TERM STABILITY 2000h Test

First 1000h 100 100 ±ppm
Second 1000h 50 50 ±ppm

OUTPUT ADJUSTMENT
RANGE RPOT = 10kΩ(6) ±3 ±6 ✻ ✻ %

CHANGE IN VO TEMP
COEFFICIENT WITH
OUTPUT ADJUSTMENT
(–55°C to +125°C) RPOT = 10kΩ 0.7 ✻ ppm/%

OUTPUT VOLTAGE NOISE 0.1Hz to 10Hz(5) 4 10 ✻ ✻ µVPP

LINE REGULATION(4) VIN = 8V to 33V 0.006 0.010 ✻ ✻ %/V

–40°C to +85°C VIN = 8.5V to 33V 0.008 0.012 ✻ ✻

LOAD REGULATION(4) IL = 0mA to +10mA 0.005 0.010 ✻ 0.008 %/mA

–40°C to +85°C IL = 0mA to +10mA 0.007 0.012 ✻ 0.010

TURN-ON SETTLING TIME To ±0.1% 5 ✻ µs

of Final Value

QUIESCENT CURRENT No Load 1.0 1.4 ✻ ✻ mA

LOAD CURRENT (SOURCE) 10 21 ✻ ✻ mA

LOAD CURRENT (SINK) –0.3 –0.5 ✻ ✻ mA

SHORT-CIRCUIT CURRENT VOUT = 0 30 ✻ mA

POWER DISSIPATION No Load 15 21 ✻ ✻ mW

TEMPERATURE VOLTAGE
OUTPUT(7) 630 ✻ mV

TEMPERATURE COEFFICIENT
of Temperature Pin Voltage
–55°C to +125°C 2.1 mV/°C

TEMPERATURE RANGE
Specification
REF02A, B, C –40 +85 ✻ ✻ °C

NOTES: (1) ∆VOT is defined as the absolute difference between the maximum output and the minimum output voltage over the specified temperature range expressed
as a percentage of 5V: V − VMIN
∆VO = MAX × 100
5V
(2) ∆VOT specification applies trimmed to +5.000V or untrimmed.
(3) TCVO is defined as ∆VOT divided by the temperature range.
(4) Line and load regulation specifications include the effect of self heating.
(5) Sample tested.
(6) 10kΩ potentiometer connected between VOUT and ground with wiper connected to Trim pin. See figure on page 1.
(7) Pin 3 is insensitive to capacitive loading. The temperature voltage will be modified by 7mV for each µA of loading.

2
REF02
www.ti.com SBVS003B
ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATIONS
Input Voltage ..................................................................................... +40V Top View DIP/SO
Operating Temperature
P, U ................................................................................ –40°C to +85°C
Storage Temperature Range
P, U ................................................................................ –65°C to +125° NC 1 8 NC
Output Short Circuit Duration (to Ground or VIN) ........................ Indefinite
VIN 2 7 NC
Junction Temperature ....................................................... –65°C to +150°
θJA P ......................................................................................... 120°C/W Temp 3 6 VOUT
U ........................................................................................... 80°C/W
Lead Temperature (soldering, 60s) ............................................... +300°C GND 4 5 Trim

ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Texas Instru-
ments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric
changes could cause the device not to meet its published
specifications.

PACKAGE/ORDERING INFORMATION(1)
PACKAGE SPECIFICATION
MAX DRIFT DRAWING TEMPERATURE
PRODUCT VOUT at 25°C (ppm/°C) PACKAGE DESIGNATOR RANGE

REF02AU 5V±15mV ±15 SO-8 D –40°C to +85°C

REF02BU 5V±10mV ±10 SO-8 D –40°C to +85°C
REF02AP 5V±15mV ±15 DIP-8 P –40°C to +85°C
REF02BP 5V±10mV ±10 DIP-8 P –40°C to +85°C

NOTE: (1) For the most current package and ordering information, see the Package Option Addendum located at the end of this data sheet, or see the TI website
at www.ti.com.

REF02 3
SBVS003B www.ti.com
TYPICAL PERFORMANCE CURVES
AT TA = +25°C, unless otherwise noted.

OUTPUT WIDEBAND NOISE

vs BANDWIDTH (0.1Hz to frequency indicated) LINE REGULATION vs FREQUENCY
1k 96 0.0003
VS = 15V
86 0.001
TA = +25°C
76 0.003

Line Regulation (%/V)

Output Noise (µVPP)

Line Regulation (dB)

100 66 0.01

56 0.031

46 0.1
10 36 0.31

26 1.0
16 3.1
1 6 10.0
10 100 1k 10k 100k 1M 10 100 1k 10k 100k 1M
Frequency (Hz) Frequency (Hz)

OUTPUT CHANGE DUE TO THERMAL SHOCK MAXIMUM LOAD CURRENT vs INPUT VOLTAGE
0.035 35
Short Circuit Protection
Percent Change in Output Voltage (%)

0.03 30
Maximum Load Current (mA)

VIN = 15V
0.025 TA = TA =
25
25°C 75°C
500mW
0.02 20 Maximum
Dissipation
0.015 15

0.01 10
Device immersed TA = +25°C
0.005 in 75°C oil bath 5

0 0
–10 0 10 20 30 40 50 60 5 10 15 20 25
Time (s) Input Voltage (V)

LINE REGULATION vs SUPPLY VOLTAGE LINE REGULATION vs SUPPLY VOLTAGE

6 0.03

5 0.025
TA = 25°C
Line Regulation (%/V)

Line Regulation (%/V)

4 0.02

3 0.015
125°C
2 0.01
85°C
1 0.005
25°C
–55°C
0 0
6 6.5 7 7.5 8 8.5 9 9.5 10 5 10 15 20 25 30
Input Voltage (V) Input Voltage (V)

4
REF02
www.ti.com SBVS003B
 TYPICAL PERFORMANCE CURVES (Cont.)
At TA = +25°C, unless otherwise noted.

NORMALIZED LOAD REGULATION (∆IL = 10mA)

vs TEMPERATURE NORMALIZED LINE REGULATION vs TEMPERATURE
1.6 1.4
1.5 VIN = 15V 1.3
Load Reg (T) / Load Reg (25°C)

Line Reg (T) / Line Reg (25°C)

1.4 1.2
1.3 1.1
1.2 1.0
1.1 0.9
1.0 0.8
0.9 0.7
0.8 0.6
0.7 0.5
0.6 0.4
–60 –40 –20 0 20 40 60 80 100 120 140 –60 –40 –20 0 20 40 60 80 100 120 140
Temperature (°C) Temperature (°C)

REF02 VOUT MAXIMUM LOAD CURRENT vs TEMPERATURE

5.002 30

5.0015
25

Maximum Load Current (mA)

5.001

5.0005 20
VIN = 15V
5
Volt

15
4.9995

4.999 10

4.9985
5
4.998

4.9975 0
–60 –40 –20 0 20 40 60 80 100 120 140 –60 –40 –20 0 20 40 60 80 100 120 140
Temperature Temperature (°C)

TYPICAL TEMPERATURE VOLTAGE OUTPUT

QUIESCENT CURRENT vs TEMPERATURE vs TEMPERATURE
1.1 830
Temperature Voltage Output (mV)

780
1.08
Quiescent Current (mA)

730
1.06
680
VIN = 15V VIN = 15V
1.04 630

580
1.02
530
1.0 480

0.98 430
–60 –40 –20 0 20 40 60 80 100 120 140 –60 –40 –20 0 20 40 60 80 100 120 140
Temperature (°C) Temperature (°C)

REF02 5
SBVS003B www.ti.com
TYPICAL PERFORMANCE CURVES (Cont.)
At TA = +25°C, unless otherwise noted.

LONG-TERM STABILITY (1st 1000h) LONG-TERM STABILITY (2nd 1000h)

200 200

150 150

100 100

50 50

0 0

ppm
ppm

–50 –50

–100 –100

–150 –150

–200 –200

–250 –250

1008

1080

1176

1272

1344

1440

1536

1608

1680

1776
0

1848
24

1944
48
72
96
168
192
240
336
408
504
576
696
744
864
912
Hours 1008 Hours

LONG TERM STABILITY (2000h)

300

200

100
ppm

–100

–200

–300
0 504 1008 1944
Hours

6
REF02
www.ti.com SBVS003B
OUTPUT ADJUSTMENT TYPICAL APPLICATIONS
The REF02 trim terminal can be used to adjust the voltage
over a 5V ±150mV range. This feature allows the system
designer to trim system errors by setting the reference to a
voltage other than 5V, including 5.12V(1) for binary applica- 2
tions (see circuit on page 1). VIN
VO 6 +5V
Adjustment of the output does not significantly affect the
temperature performance of the device. The temperature 0.1µF REF02

coefficient change is approximately 0.7ppm/°C for 100mV of 3 Temp Trim 5

10kΩ
output adjustment.
GND
NOTE: (1) 20mV LSB for 8-bit applications. 10kΩ
4

+15V
+18V

2
VIN –5V
5kΩ OPA177

REF02
–15V

GND FIGURE 2. ±5V Precision Reference.

4

–18V

FIGURE 1. Burn-In Circuit.

REFERENCE STACKING
PROVIDES OUTSTANDING LINE REGULATION
By stacking two REF01s and one REF02, a systems designer
can achieve 5V, 15V, and 25V outputs. One very important
advantage of this circuit is the near-perfect line regulation at
5V and 15V outputs. This circuit can accept a 27V to 55V
change to the input with less than the noise voltage as a
change to the output voltage. RB, a load bypass resistor,
supplies current ISY for the 15V regulator.
Any number of REF01s and REF02s can be stacked in this
configuration. For example, if ten devices are stacked in this
configuration, ten 5V or five 10V outputs are achieved. The
line voltage may range from 100V to 130V. Care should be
exercised to insure that the total load currents do not exceed
the maximum usable current, which is typically 21mA.

REF02 7
SBVS003B www.ti.com
 PACKAGE OPTION ADDENDUM

www.ti.com 6-Feb-2020

PACKAGING INFORMATION

Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) (6) (3) (4/5)

REF02AP ACTIVE PDIP P 8 50 Green (RoHS NIPDAU N / A for Pkg Type REF02AP
& no Sb/Br)
REF02APG4 ACTIVE PDIP P 8 50 Green (RoHS NIPDAU N / A for Pkg Type REF02AP
& no Sb/Br)
REF02AU ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 85 REF
& no Sb/Br) 02AU
REF02AU/2K5 ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 85 REF
& no Sb/Br) 02AU
REF02AU/2K5E4 ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 85 REF
& no Sb/Br) 02AU
REF02AUE4 ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 85 REF
& no Sb/Br) 02AU
REF02AUG4 ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 85 REF
& no Sb/Br) 02AU
REF02BP ACTIVE PDIP P 8 50 Green (RoHS NIPDAU N / A for Pkg Type REF02BP
& no Sb/Br)
REF02BU ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 85 REF
& no Sb/Br) 02BU
REF02BU/2K5 ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 85 REF
& no Sb/Br) 02BU
REF02BU/2K5E4 ACTIVE SOIC D 8 2500 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 85 REF
& no Sb/Br) 02BU
REF02BUE4 ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 85 REF
& no Sb/Br) 02BU
REF02BUG4 ACTIVE SOIC D 8 75 Green (RoHS NIPDAU Level-3-260C-168 HR -40 to 85 REF
& no Sb/Br) 02BU

(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

Addendum-Page 1
 PACKAGE OPTION ADDENDUM

www.ti.com 6-Feb-2020

(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.

(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.

(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 2
 PACKAGE MATERIALS INFORMATION

www.ti.com 26-Jan-2013

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1
Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
REF02AU/2K5 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
REF02BU/2K5 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1

Pack Materials-Page 1
 PACKAGE MATERIALS INFORMATION

www.ti.com 26-Jan-2013

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
REF02AU/2K5 SOIC D 8 2500 367.0 367.0 35.0
REF02BU/2K5 SOIC D 8 2500 367.0 367.0 35.0

Pack Materials-Page 2
 PACKAGE OUTLINE
D0008A SCALE 2.800
SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT

SEATING PLANE
.228-.244 TYP
[5.80-6.19]
.004 [0.1] C
A PIN 1 ID AREA
6X .050
[1.27]
8
1

.189-.197 2X
[4.81-5.00] .150
NOTE 3 [3.81]

4X (0 -15 )

4
5
8X .012-.020
B .150-.157 [0.31-0.51]
.069 MAX
[3.81-3.98] .010 [0.25] C A B [1.75]
NOTE 4

.005-.010 TYP
[0.13-0.25]

4X (0 -15 )

SEE DETAIL A
.010
[0.25]

.004-.010
0 -8 [0.11-0.25]
.016-.050
[0.41-1.27] DETAIL A
(.041) TYPICAL
[1.04]

4214825/C 02/2019

NOTES:

1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches.
Dimensioning and tolerancing per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed .006 [0.15] per side.
4. This dimension does not include interlead flash.
5. Reference JEDEC registration MS-012, variation AA.

www.ti.com
 EXAMPLE BOARD LAYOUT
D0008A SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT

8X (.061 )
[1.55]
SYMM SEE
DETAILS
1
8

8X (.024)
[0.6] SYMM

(R.002 ) TYP
[0.05]
5
4
6X (.050 )
[1.27]
(.213)
[5.4]

LAND PATTERN EXAMPLE

EXPOSED METAL SHOWN
SCALE:8X

SOLDER MASK SOLDER MASK

METAL METAL UNDER
OPENING OPENING SOLDER MASK

EXPOSED
METAL EXPOSED
METAL
.0028 MAX .0028 MIN
[0.07] [0.07]
ALL AROUND ALL AROUND

NON SOLDER MASK SOLDER MASK

DEFINED DEFINED

SOLDER MASK DETAILS

4214825/C 02/2019

NOTES: (continued)

6. Publication IPC-7351 may have alternate designs.

7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.

www.ti.com
 EXAMPLE STENCIL DESIGN
D0008A SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT

8X (.061 )
[1.55] SYMM

1
8

8X (.024)
[0.6] SYMM

(R.002 ) TYP
5 [0.05]
4
6X (.050 )
[1.27]
(.213)
[5.4]

SOLDER PASTE EXAMPLE

BASED ON .005 INCH [0.125 MM] THICK STENCIL
SCALE:8X

4214825/C 02/2019

NOTES: (continued)

8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.

www.ti.com
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