6 F 2 S 0 7 5 8

INSTRUCTION MANUAL

DIRECTIONAL OVERCURRENT PROTECTION RELAY

GRD140

© TOSHIBA Corporation 2004

All Rights Reserved.

( Ver.0.3)
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Safety Precautions
Before using this product, please read this chapter carefully.
This chapter describes the safety precautions recommended when using the GRD140. Before
installing and using the equipment, this chapter must be thoroughly read and understood.

Explanation of symbols used

Signal words such as DANGER, WARNING, and two kinds of CAUTION, will be followed by
important safety information that must be carefully reviewed.

DANGER Indicates an imminently hazardous situation which will result in death or

serious injury if you do not follow the instructions.

WARNING Indicates a potentially hazardous situation which could result in death or

serious injury if you do not follow the instructions.
CAUTION Indicates a potentially hazardous situation which if not avoided, may result in
minor injury or moderate injury.
CAUTION Indicates a potentially hazardous situation which if not avoided, may result in
property damage.

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DANGER
• Current transformer circuit
Never allow the current transformer (CT) secondary circuit connected to this equipment to be
opened while the primary system is live. Opening the CT circuit will produce a dangerously high
voltage.

WARNING
• Exposed terminals
Do not touch the terminals of this equipment while the power is on, as the high voltage generated
is dangerous.

• Residual voltage
Hazardous voltage can be present in the DC circuit just after switching off the DC power supply. It
takes approximately 30 seconds for the voltage to discharge.

• Fiber optic
When connecting this equipment via an optical fiber, do not look directly at the optical signal.

CAUTION

• Earth
The earthing terminal of the equipment must be securely earthed.

CAUTION

• Operating environment
The equipment must only used within the range of ambient temperature, humidity and dust
detailed in the specification and in an environment free of abnormal vibration.

• Ratings
Before applying AC voltage and current or the DC power supply to the equipment, check that they
conform to the equipment ratings.

• Printed circuit board

Do not attach and remove printed circuit boards when the DC power to the equipment is on, as this
may cause the equipment to malfunction.

• External circuit
When connecting the output contacts of the equipment to an external circuit, carefully check the
supply voltage used in order to prevent the connected circuit from overheating.

• Connection cable
Carefully handle the connection cable without applying excessive force.

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• Modification

Do not modify this equipment, as this may cause the equipment to malfunction.

• Disposal
When disposing of this equipment, do so in a safe manner according to local regulations.

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Contents
Safety Precautions 1
1. Introduction 8
2. Application Notes 10
2.1 Overcurrent and Undercurrent Protection 10
2.1.1 Non-directional Overcurrent Protection 10
2.1.2 Directional Overcurrent Protection 17
2.1.3 Scheme Logic 21
2.1.4 Phase Undercurrent Protection 44
2.1.5 Thermal Overload Protection 46
2.1.7 Breaker Failure Protection 52
2.1.8 Cold Load Protection 55
2.1.9 CT Requirements 58
2.2 Overvoltage and Undervoltage Protection 60
2.2.1 Phase Overvoltage Protection 60
2.2.2 Phase Undervoltage Protection 63
2.2.3 Zero Phase Sequence Overvoltage Protection 66
2.2.4 Negative Phase Sequence Overvoltage Protection 69
2.3 Frequency Protection 71
2.4 Trip and Alarm Signal Output 73
2.5 Autoreclose 75
2.5.1 Scheme Logic 75
2.5.2 Sequence Coordination 76
2.5.3 Setting 77
3. Technical Description 78
3.1 Hardware Description 78
3.1.1 Outline of Hardware Modules 78
3.2 Input and Output Signals 82
3.2.1 AC Input Signals 82
3.2.2 Binary Input, Output Signals 82
3.2.3 Binary Output Signals 86
3.3 Automatic Supervision 87
3.3.1 Basic Concept of Supervision 87
3.3.2 Relay Monitoring 87
3.3.3 CT Failure Supervision 88
3.3.4 VT Failure Supervision 89
3.3.5 Trip Circuit Supervision 90
3.3.6 Circuit Breaker Monitoring 91
3.3.7 Failure Alarms 92
3.3.8 Trip Blocking 93
3.3.9 Setting 94
3.4 Recording Function 95

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3.4.1 Fault Recording 95

3.4.2 Event Recording 96
3.4.3 Disturbance Recording 97
3.5 Metering Function 99
3.6 Fault locator 102
3.6.1 Application 102
3.6.2 Distance to Fault Calculation 102
3.6.3 Starting Calculation 103
3.6.4 Displaying Location 103
3.6.5 Setting 104
4. User Interface 105
4.1 Outline of User Interface 105
4.1.1 Front Panel 105
4.1.2 Communication Ports 107
4.2 Operation of the User Interface 108
4.2.1 LCD and LED Displays 108
4.2.2 Relay Menu 111
4.2.3 Displaying Records 113
4.2.4 Displaying the Status 118
4.2.5 Viewing the Settings 123
4.2.6 Changing the Settings 124
4.2.7 Testing 168
4.3 Personal Computer Interface 171
4.4 Relay Setting and Monitoring System 171
4.5 IEC 60870-5-103 Interface 172
4.6 Clock Function 172
5. Installation 173
5.1 Receipt of Relays 173
5.2 Relay Mounting 173
5.3 Electrostatic Discharge 173
5.4 Handling Precautions 173
5.5 External Connections 174
6. Commissioning and Maintenance 175
6.1 Outline of Commissioning Tests 175
6.2 Cautions 176
6.2.1 Safety Precautions 176
6.2.2 Cautions on Tests 176
6.3 Preparations 177
6.4 Hardware Tests 178
6.4.1 User Interfaces 178
6.4.2 Binary Input Circuit 178
6.4.3 Binary Output Circuit 179
6.4.4 AC Input Circuits 180
6.5 Function Test 182

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6.5.1 Measuring Element 182

6.5.2 Protection Scheme 193
6.5.3 Metering and Recording 193
6.6 Conjunctive Tests 194
6.6.1 On Load Test 194
6.6.2 Tripping and Reclosing Circuit Test 195
6.7 Maintenance 196
6.7.1 Regular Testing 196
6.7.2 Failure Tracing and Repair 196
6.7.3 Replacing Failed Relay Unit 197
6.7.4 Resumption of Service 198
6.7.5 Storage 198
7. Putting Relay into Service 199

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Appendix A Programmable Reset Characteristics and Implementation of Thermal

Model to IEC60255-8 201
Appendix B Directional Earth Fault Protection and Power System Earthing 205
Appendix C Signal List 211
Appendix D Event Record Items 219
Appendix E Details of Relay Menu 223
Appendix F Case Outline 237
Appendix G External Connection 239
Appendix H Relay Setting Sheet 245
Appendix I Commissioning Test Sheet (sample) 259
Appendix J Return Repair Form 263
Appendix K Technical Data 267
Appendix L Symbols Used in Scheme Logic 275
Appendix M IEC60870-5-103: Interoperability 279
Appendix N Inverse Time Characteristics 287
Appendix O Ordering 293

„ The data given in this manual are subject to change without notice. (Ver.0.3)

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1. Introduction
GRD140 series relays provide four stage non-directional and directional overcurrent protection
for distribution networks, and back-up protection for transmission and distribution networks.

The GRD140 series has three models and provides the following protection schemes in all models.
• Directional overcurrent protection and directional zero phase sequence overcurrent
protection for earth fault with definite time or inverse time characteristics
• Instantaneous directional overcurrent protection and instantaneous directional zero phase
sequence overcurrent protection for earth fault
Model 110 provides directional earth fault protection and directional sensitive earth fault
protection.
Model 400 provides three-phase directional phase fault protection and directional earth fault
protection.
Model 420 provides three-phase directional phase fault protection, and directional earth and
sensitive earth fault protection.
All models include multiple, high accuracy, overcurrent protection elements (for phase and/or
earth fault) with inverse time and definite time delay functions. All phase, earth and sensitive earth
fault overcurrent elements can be independently subject to directional control.
In addition, GRD140 provides multi-shot, three phase auto-reclose, with independent sequences
for phase fault, and earth fault and sensitive earth fault. Auto-reclosing can also be triggered by
external protection devices.
Other protection functions are available according to model type, including thermal protection to
IEC60255-8, negative sequence overcurrent protection, under/overvoltage and
under/overfrequency protections. See Table 1.1.1 for details of the protection functions available
in each model.
All models provide continuous monitoring of internal circuits and of software. External circuits
are also monitored, by trip circuit supervision, CT and VT supervision, and CB condition
monitoring features.
A user-friendly HMI is provided through a backlit LCD, programmable LEDs, keypad and
menu-based operating system. PC access is also provided, either for local connection via a
front-mounted RS232 port, or for remote connection via a rear-mounted RS485 or fibre optic port.
The communication system allows the user to read and modify the relay settings, and to access
data gathered by the relay’s metering and recording functions.
Data available either via the relay HMI or communications ports includes the following functions.

The GRD140 series provides the following functions for all models.
• Metering
• Fault recording
• Event recording
• Disturbance recording (available via communications ports)

Table 1.1.1 shows the members of the GRD140 series and identifies the functions to be provided
by each member.

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Table 1.1.1 Series Members and Functions

Model Number GRD140 -

110 400 420
Directional Phase Fault O/C OC1 – OC4 (67/50P, 67/51P) 9 9
Directional Earth Fault O/C EF1 – EF4 (67/50N, 67/51N) 9 9 9
Directional Sensitive Earth Fault SEF1 – SEF4(67/50N, 67/51N) 9 9
Phase Undercurrent UC1, UC2 (37P) 9 9
Thermal Overload THM (49) 9 9
Directional Negative Phase Sequence Overcurrent NOC1, NOC2 (67/46) 9 9
Phase Overvoltage OV1, OV2 (59) 9 9
Phase Undervoltage UV1, UV2 (27) 9 9
Zero Phase Sequence Overvoltage ZOV1, ZOV2 (59N) 9 9 9
Negative Phase Sequence Overvoltage NOV1, NOV2 (47) 9 9
Under/Overfrequency FRQ1 – FRQ4 (81U/81O) 9 9
Broken Conductor BCD 9 9
Circuit Breaker Fail CBF (50BF) 9 9
Cold Load Protection 9 9
Auto-reclose (79) 9 9 9
Fault Locator 9 9
CT Supervision 9 9
VT Supervision 9 9
Trip circuit supervision 9 9 9
Self supervision 9 9 9
CB State Monitoring 9 9 9
Trip Counter Alarm 9 9 9
∑Iy Alarm 9 9
CB Operate Time Alarm 9 9 9
Four settings groups 9 9 9
Metering 9 9 9
Fault records 9 9 9
Event records 9 9 9
Disturbance records 9 9 9
IEC60870-5-103 Communication 9 9 9

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2. Application Notes
2.1 Overcurrent and Undercurrent Protection
2.1.1 Non-directional Overcurrent Protection

GRD140 provides distribution network protection with four-stage phase fault and earth fault
overcurrent elements OC1 to OC4, EF1 to EF4, sensitive earth fault elements SEF1 to SEF4, and
two-stage negative sequence overcurrent elements NOC1 and NOC2 which can be enabled or
disabled by scheme switch setting. The OC1, EF1 and SEF1 elements have selective inverse time
and definite time characteristics. The protection of local and downstream terminals is coordinated
with the current setting, time setting, or both.
The characteristic of overcurrent elements are as follows:

Stage 4

Stage 1
0 I

Note: NOC provides two stage overcurrent elements.

Figure 2.1.1 Characteristic of Overcurrent Elements

2.1.1.1 Inverse Time Overcurrent Protection

In a system for which the fault current is practically determined by the fault location, without
being substantially affected by changes in the power source impedance, it is advantageous to use
inverse definite minimum time (IDMT) overcurrent protection. This protection provides
reasonably fast tripping, even at a terminal close to the power source where the most severe faults
can occur.
Where ZS (the impedance between the relay and the power source) is small compared with that of
the protected section ZL, there is an appreciable difference between the current for a fault at the far
end of the section (ES/(ZS+ZL), ES: source voltage), and the current for a fault at the near end
(ES/ZS). When operating time is inversely proportional to the current, the relay operates faster for
a fault at the end of the section nearer the power source, and the operating time ratio for a fault at
the near end to the far end is ZS/(ZS + ZL).
The resultant time-distance characteristics are shown in Figure 2.1.2 for radial networks with
several feeder sections. With the same selective time coordination margin TC as the download
section, the operating time can be further reduced by using a more inverse characteristic.

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Operate time

TC
TC

A B C

Figure 2.1.2 Time-distance Characteristics of Inverse Time Protection

The inverse time overcurrent protection elements have the IDMT characteristics defined by
equation (1):
  
 k  + c 
t = TMS × 

( )
 I Is − 1 
 a

 
(1)

where:
t = operating time for constant current I (seconds),
I = energising current (amps),
Is = overcurrent setting (amps),
TMS = time multiplier setting,
k, a, c = constants defining curve.

Nine curve types are available as defined in Table 2.1.1. They are illustrated in Figure 2.1.3.
Any one curve can be selected for each IDMT element by scheme switch [M∗∗∗C].

Table 2.1.1 Specification of IDMT Curves

Curve Description k a c kr b
IEC Normal Inverse (NI) 0.14 0.02 0 - -
IEC Very Inverse (VI) 13.5 1 0 - -
IEC Extremely Inverse (EI) 80 2 0 - -
UK Long Time Inverse (LTI) 120 1 0 - -
IEEE Moderately Inverse (MI) 0.0515 0.02 0.114 4.85 2
IEEE Very Inverse (VI) 19.61 2 0.491 21.6 2
IEEE Extremely Inverse (EI) 28.2 2 0.1217 29.1 2
US CO8 Inverse 5.95 2 0.18 5.95 2
US CO2 Short Time Inverse 0.02394 0.02 0.01694 2.261 2
Note: kr, b are used to define the reset characteristic. Refer to equation (2).

In addition to above nine curve types, GRD140 can provide a user configurable IDMT curve. If
required, set the scheme switch [M∗∗∗C] to “CON” and set the curve defining constants k, a, c.

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The following table shows the setting ranges of the curve defining constants.
Curve defining constants Range Step
k 0.000 – 30.000 0.001
a 0.00 – 5.00 0.01
c 0.000 – 5.000 0.001
kr 0.000 – 30.000 0.001
b 0.00 – 5.00 0.01

IEC/UK Inverse Curves IEEE/US Inverse Curves

(Time Multiplier = 1) (Time Multiplier = 1)
1000 100

100

10
Operating Time (s)

Operating Time (s)

10
LTI

NI
1
MI
1 VI
VI
CO2
CO8
EI
EI
0.1 0.1
1 10 100 1 10 100
Current (Multiple of Setting) Current (Multiple of Setting)

Figure 2.1.3 IDMT Characteristics

Programmable Reset Characteristics

OC1, EF1 and SEF1 have a programmable reset feature: instantaneous, definite time delayed, or
dependent time delayed reset. (Refer to Appendix A for a more detailed description.)
Instantaneous resetting is normally applied in multi-shot auto-reclosing schemes, to ensure correct
grading between relays at various points in the scheme.
The inverse reset characteristic is particularly useful for providing correct coordination with an
upstream induction disc type overcurrent relay.
The definite time delayed reset characteristic may be used to provide faster clearance of
intermittent (‘pecking’ or ‘flashing’) fault conditions.

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Definite time reset

The definite time resetting characteristic is applied to the IEC/IEEE/US operating characteristics.
If definite time resetting is selected, and the delay period is set to instantaneous, then no
intentional delay is added. As soon as the energising current falls below the reset threshold, the
element returns to its reset condition.
If the delay period is set to some value in seconds, then an intentional delay is added to the reset
period. If the energising current exceeds the setting for a transient period without causing tripping,
then resetting is delayed for a user-definable period. When the energising current falls below the
reset threshold, the integral state (the point towards operation that it has travelled) of the timing
function (IDMT) is held for that period.
This does not apply following a trip operation, in which case resetting is always instantaneous.

Dependent time reset

The dependent time resetting characteristic is applied only to the IEEE/US operate characteristics,
and is defined by the following equation:

 
 kr 
t = RTMS ×  b
 (2)
 I  
1 −  I S  

where:
t = time required for the element to reset fully after complete operation (seconds),
I = energising current (amps),
Is = overcurrent setting (amps),
kr = time required to reset fully after complete operation when the energising current is zero
(see Table 2.1.1),
RTMS = reset time multiplier setting.
b = constants defining curve.

Figure 2.1.4 illustrates the dependent time reset characteristics.

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IEEE Reset Curves

(Time Multiplier = 1)
1000.00

100.00

Time (s)
EI
VI

10.00
CO8
MI

CO2

1.00
0.1 1
Current (Multiple of Setting)

Figure 2.1.4 Dependent Time Reset Characteristics

2.1.1.2 Definite Time Overcurrent Protection

In a system in which the fault current does not vary a great deal in relation to the position of the
fault, that is, the impedance between the relay and the power source is large, the advantages of the
IDMT characteristics are not fully utilised. In this case, definite time overcurrent protection is
applied. The operating time can be constant irrespective of the magnitude of the fault current.
The definite time overcurrent protection consists of instantaneous overcurrent measuring elements
and delayed pick-up timers started by the elements, and provides selective protection with graded
setting of the delayed pick-up timers. Thus, the constant time coordination with the downstream
section can be maintained as shown in Figure 2.1.5. As is clear in the figure, the nearer to the
power source a section is, the greater the delay in the tripping time of the section. This is
undesirable particularly where there are many sections in the series.
Operate time

TC

TC

A B C

Figure 2.1.5 Definite Time Overcurrent Protection

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2.1.1.3 Instantaneous Overcurrent Protection

In conjunction with inverse time overcurrent protection, additional overcurrent elements provide
instantaneous or definite time overcurrent protection.
OC1 to OC4 and EF1 to EF4 are phase fault and earth fault protection elements, respectively. Each
element is programmable for instantaneous or definite time delayed operation. (In case of
instantaneous operation, the delayed pick-up timer is set to 0.00.) The phase fault elements operate
on a phase segregated basis, although tripping is for three phase only.

Selective Instantaneous Overcurrent Protection

When they are applied to radial networks with several feeder sections where ZL (impedance of the
protected line) is large enough compared with ZS (the impedance between the relay and the power
source), and the magnitude of the fault current for a local end fault is much greater (3 times or
more, or (ZL+ZS)/ZS≧3, for example) than that for a remote end fault under the condition that ZS
is maximum, the pick-up current can be set sufficiently high so that the operating zone of the
elements do not reach the remote end of the feeder, and thus instantaneous and selective protection
can be applied.
This high-set overcurrent protection is applicable and effective particularly for feeders near the
power source where the setting is feasible, but the longest tripping times would otherwise have to
be accepted.
As long as the associated inverse time overcurrent protection is correctly coordinated, the
instantaneous protection does not require setting coordination with the downstream section.
Figure 2.1.6 shows operating times for instantaneous overcurrent protection in conjunction with
inverse time overcurrent protection. The shaded area shows the reduction in operating time by
applying the instantaneous overcurrent protection. The instantaneous protection zone decreases as
ZS increases.

Operate time

TC
TC

A B C

Figure 2.1.6 Conjunction of Inverse and Instantaneous Overcurrent Protection

The current setting is set 1.3 to 1.5 times higher than the probable maximum fault current in the
event of a fault at the remote end. The maximum fault current for elements OC1 to OC4 is
obtained in case of three-phase faults, while the maximum fault current for elements EF1 to EF4 is
obtained in the event of single phase earth faults.

2.1.1.4 Staged Definite Time Overcurrent Protection

When applying inverse time overcurrent protection for a feeder system as shown in Figure 2.1.7,
well coordinated protection with the fuses in branch circuit faults and high-speed protection for
the feeder faults can be provided by adding staged definite time overcurrent protection with
time-graded OC2 and OC3 or EF2 and EF3 elements.

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Fuse

GRD140

Figure 2.1.7 Feeder Protection Coordinated with Fuses

Configuring the inverse time element OC1 (and EF1) and time graded elements OC2 and OC3 (or
EF2 and EF3) as shown in Figure 2.1.8, the characteristic of overcurrent protection can be
improved to coordinate with the fuse characteristic.
Time (s)
OC1
OC2

OC3

Fuse

Current (amps)

Figure 2.1.8 Staged Definite Time Protection

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2.1.2 Directional Overcurrent Protection

In a system including parallel feeder circuits, ring main circuits or sources at both line terminals,
the fault current at the relay location can flow in either direction. In such a case, directional control
should be added to overcurrent elements.
GRD140 provides directional control for phase fault and earth fault overcurrent elements OC1 to
OC4, EF1 to EF4, SEF1 to SEF4, NOC1 and NOC2 which can be enabled or disabled by scheme
switch setting. The directional characteristic can be selected to “Forward” or “Reverse” or “Non”
by scheme switch setting [∗∗∗-DIR]. The OC1, EF1 and SEF1 elements have selective inverse
time and definite time characteristics.

2.1.2.1 Application of Directional Overcurrent Protection

Parallel Feeder Circuits

If non-directional protection were applied to the circuit shown in Figure 2.1.9, then a fault at F
would result in both feeders being tripped at points A and B, and total loss of supply to the load.
Directional relays can be applied to look back into the feeder, thereby ensuring that only the faulty
feeder is disconnected. The relays at A and B would normally be set to operate at 50% of the full
load current of the circuit, via their inverse time elements OC1 and EF1, with a directional
characteristic looking in the direction shown by the arrows.
The various overcurrent elements of GRD140 are independently programmable for directional
operation. Therefore, elements OC2 and EF2 could be set for non-directional operation to provide
time-delayed back-up protection for the load.

F A

Load
GRD140 GRD140
Non-directional Directional

GRD140 GRD140
Non-directional Directional

Figure 2.1.9 Application of GRD140 to Parallel Feeders

Ring Main Circuits

A ring main circuit is commonly protected by directional overcurrent relays, since current may
flow in either direction past the relaying points. The normal grading procedure is applied
separately in both the clockwise and anti-clockwise directions. Conventionally, two directional
relays would be required at each load connection point, one for each direction.
A simple system is illustrated in Figure 2.1.10 showing definite time grading, although inverse
time can also be applied. Non-directional relays are applied at the in-feeds to the ring. All other
protections are directional relays. It can be seen that a fault at F is cleared by tripping at A in 1.0s
and at B in 0.4s.
Alternatively, since GRD140 provides multiple, independent bi-directional overcurrent stages, a
scheme could be implemented in which a single relay can perform the necessary protection
functions in both directions at each load connection point. Each GRD140 overcurrent element can
be programmed with different settings for forward and reverse direction, thus allowing correct
grading to be achieved in both the clockwise and anti-clockwise directions.

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GRD140

GRD140

GRD140

GRD140
0.1s 1.0s 0.4s 0.7s

GRD140
1.3s
Non-directional

GRD140
1.3s 0.1s
GRD140

GRD140

GRD140

GRD140
Non-directional
1.0s 0.4s 0.7s

A B

Figure 2.1.10 Protection of a Ring Main Circuit

Power Systems with Sources at both Line Terminals

In power systems with sources at both line terminals as shown in Figure 2.1.11, the fault current
flows in from both terminals.

G1 G2

c 1 b 2 a 3
F2 F1

Figure 2.1.11 Protection of a power system with sources at both line terminals

The protection is performed by setting the directional element at points 1, 2 and 3 which operates
only when the fault current (F1: solid lines) flows in from source G1 and at points a, b and c which
operates only when the fault current (F2: dotted lines) flows in from source G2, with grading provided
by time delays.

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2.1.2.2 Directional Characteristics

Figure 2.1.12 illustrates the directional characteristic, with the forward operate zone shaded. The
reverse zone is simply a mirror image of the forward zone. The forward operate zone or reverse
operate zone is selectable by the scheme switch [OC-DIR], [EF-DIR], [SE-DIR] and [NC-DIR].
As shown in Figure 2.1.13, each directional characteristic is composed of forward directional
characteristic, reverse directional characteristic and overcurrent thresholds.
Boundary of Operation Boundary of Operation
(leading) +87.5° (leading)
CA + 90 CA + 90

CA + 60 CA + 60

CA + 30 CA + 30

10 x Is 10 x Is
5 x Is 5 x Is
CA - 180 CA CA - 180 CA

Reverse Forward Reverse Forward

Operate Operate Operate Operate
CA - 30 CA - 30
Zone Zone Zone Zone

CA - 60 CA - 60
CA - 90 CA - 90
Boundary of Operation Boundary of Operation
(lagging) - 87.5° (lagging)
CA: Characteristic angle CA: Characteristic angle

(a) Characteristic of OC, EF and NOC (b) Characteristic of SEF

Figure 2.1.12 Directional Operate Characteristic

Reverse
Stage Directional (Forward)
4
(0 ≤ θ setting ≤ -95) & ∗∗1-4
3
2 Forward
1
+θ: lead angle
0 −θ: lag angle Vpol Directional (Reverse)
θ ∗∗1-4
(95 ≥ θ setting > 0) &
Reverse

Overcurrent (1-4 stage)

Forward

I (Note) NOC provides stage 1 and 2 only.

θ: Characteristic angle

Figure 2.1.13 Directional element

Polarising signals of directional elements are shown in Figure 2.1.14. Polarisation for directional
phase overcurrent element OC is achieved by the 90° quadrature method, whereby each current’s
phase angle is compared with the phase to phase voltage between the other two phases. Since the
voltage inputs to the relay will normally be connected phase to neutral, the polarising phase to
phase voltages are derived internally. The polarizing negative sequence voltage is also derived
internally. The polarizing zero sequence voltage is derived from a residual voltage or internally
depending on the model. Direction is determined in each case by measuring the phase angle of the
current with respect to a suitable polarising quantity. Table 2.1.2 summarises the current inputs
and their respective polarising signals. For details of the relationship between directional earth
fault protection and power system earthing, see Appendix B.

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Vbc −V2 −Ve

Va Va Va

Ia I2 Ie

Vc Vb Vc Vb Vc Vb
Vbc∠90°
2
aVc a Vb

V2 Ve

Figure 2.1.14 Relationship between Current Input and Polarising signal

Table 2.1.2 Directional polarising signals

Directional element Current Input Polarising Signal

OC-A Ia Vbc∠90° (*)
OC-B Ib Vca∠90° (*)
OC-C Ic Vab∠90° (*)
EF Ie -Ve
SEF Ise -Ve
NOC I2 -V2
Note (*): The quadrature voltages used for polarization the phase fault elements are automatically
phase-shifted by +90°, such that they are in phase with the faulted phase voltage under
normal conditions. Therefore the faulted phase current will normally lag its polarizing
voltage under fault conditions and should be set with a negative characteristic angle. Refer to
section 2.1.3.3 for guidance on choice of settings.

In the event of a close up three phase fault, all three polarising signals will collapse below the
minimum threshold. Voltage memory provides a temporary polarising signal in these
circumstances. GRD140 maintains the polarising signal for a short period by reconstructing the
pre-fault voltages and judges the fault direction. After the voltage memory has disappeared, the
direction judgement is effective while the fault current flows as shown in Figure 2.1.15.

Phase difference calculation

|V|•|I|cos(θ−ϕ) ≥0 &
≥1 OC
NOC
Amplitude calculation F/F & EF
1 1 SEF
|l|≥OCset

Amplitude calculation
|Vpol|≥Vset

(Note) OCset: Current setting

Vset : Voltage setting. In the case of OC and NOC, Vset = 1V fixed.

Figure 2.1.15 Direction Judgement after Disappearance of Voltage Memory

To cover applications where a 2:1:1 current distribution(*) may be experienced, it is possible to

 20 
 6 F 2 S 0 7 5 8

programme the directional phase fault protection such that a trip output will only be given if two or
more phases detect fault current in the same operate zone.
Note (*): Only one-phase is in heavy load condition.

2.1.3 Scheme Logic

2.1.3.1 Phase overcurrent protection

Figures 2.1.16 to 2.1.19 show the scheme logic of the non-directional and directional phase
overcurrent protection OC1 to OC4.
The directional control characteristic can be selected to “Forward (FWD)” or “Reverse (REV)” or
“Non” by scheme switch setting [OC∗-DIR] (not shown in Figures 2.1.16 to 2.1.19).
The OC1 protection provides selective definite time or inverse time characteristic as shown in
Figure 2.1.16. The definite time protection is selected by setting [MOC1] to “DT” and trip signal
OC1 TRIP is given through the delayed pick-up timer TOC1. The inverse time protection is
selected by setting [MOC1] to any one of “IEC”, “IEEE”, “US” or “CON” and then setting
[MOC1C] according to the required IDMT characteristic, and trip signal OC1 TRIP is given.
Figure 2.1.17 to Figure 2.1.19 show the scheme logic of the definite time phase overcurrent
protection OC2 to OC4. The OC2 to OC4 give trip and alarm signals OC2 TRIP, OC3 TRIP and
OC4 ALARM through the delayed pick-up timers TOC2 to TOC4 respectively.
The trip mode of OC1 TRIP to OC4 ALARM can be selected by setting [OCTP] to “3POR”(any
one of 3 phases) or “2OUTOF3”(2 out of 3 phases) gate. When the “2OUTOF3” selected, the trip
signal is not issued during a single-phase fault. The switch [OCTP] is common for OC1 to OC4
protection.
The signal OC1-INST to OC4-INST are available to trip instantaneously for a fault such as a
reclose-on-to-a-fault. (See Section 2.5)
The OC1HS (high speed) element is used for blocked overcurrent protection. See Section 2.1.3.6.
GRD140 incorporates a VT failure supervision function (VTFS). (See Section 3.3.4.) When the
VTFS detects a VT failure, it can alarm and block the OC1 to OC4 protection by the scheme
switch [VTF OC1-BLK] to [VTF OC4-BLK] respectively.
The OC1 to OC4 protection can be disabled by the scheme switches [OC1EN] to [OC4EN] or the
binary input signals OC1 BLOCK to OC4 BLOCK respectively.
Note: For the symbols used in the scheme logic, see Appendix L.

 21 
 6 F 2 S 0 7 5 8

TOC1
A ≥1 & t 0
& ≥1 OC1-A TRIP
OC1 B
≥1 & t 0 OC1-B TRIP
C & ≥1

≥1 & t 0 OC1-C TRIP

& ≥1
0.00 - 300.00s OC1 TRIP
A &
OC1 B
(INST) & ≥1
&
C ≥1
& &
&
& ≥1 &
&
OC1-INST
≥1 &
[MOC1] &
[OCTP] "3POR" 3POR
+ OC1-EN
"IEC"
+ "ON" + 2OUTOF3
"2OUTOF3"
"IEEE"
OC1 ON
"US"

"CON"

"DT" A OC1-A HS

1 OC1HS B OC1-B HS
OC1 BLOCK by BI
&
C OC1-C HS
Non VTF
VTF OC1-BLK ≥1
+ "OFF"

Figure 2.1.16 OC1 Phase Fault Overcurrent Protection

TOC2
A t 0
& OC2-A TRIP
≥1
OC2 B t 0
& OC2-B TRIP
C ≥1
t 0 OC2-C TRIP
OC2-EN &
≥1
+ "ON" 0.00 - 300.00s OC2 TRIP
OC2 ON

OC2 BLOCK by BI 1 ≥1
& &
& ≥1
Non VTF &
VTF OC2-BLK ≥1 & ≥1
+ "OFF"
& &

& &
OC2-INST

[OCTP] "3POR" 3POR

+ 2OUTOF3
"2OUTOF3"

Figure 2.1.17 OC2 Phase Fault Overcurrent Protection

 22 
 6 F 2 S 0 7 5 8

TOC3
A t 0
& OC3-A TRIP
≥1
OC3 B t 0
& OC3-B TRIP
C ≥1
t 0 OC3-C TRIP
OC3-EN &
≥1
+ "ON" 0.00 - 300.00s OC3 TRIP
OC3 ON

OC3 BLOCK by BI 1 ≥1
& &
& ≥1
Non VTF &
VTF OC3-BLK ≥1 & ≥1
+ "OFF"
& &

& &
OC3-INST

[OCTP] "3POR" 3POR

+ 2OUTOF3
"2OUTOF3"

Figure 2.1.18 OC3 Definite Time Phase Overcurrent Protection

TOC4
A t 0
& OC4-A ALARM
≥1
OC4 B t 0
& OC4-B ALARM
C ≥1
t 0 OC4-C ALARM
OC4-EN &
≥1
+ "ON" 0.00 - 300.00s OC4 ALARM
OC4 ON

OC4 BLOCK by BI 1 ≥1
& &
& ≥1
Non VTF &
VTF OC4-BLK ≥1 & ≥1
+ "OFF"
& &

& &
OC4-INST

[OCTP] "3POR" 3POR

+ 2OUTOF3
"2OUTOF3"

Figure 2.1.19 OC4 Definite Time Phase Overcurrent Protection

2.1.3.2 Earth fault protection

Figure 2.1.20 to Figure 2.1.23 show the scheme logic of the non-directional and directional earth
fault protection EF1 to EF4.
The directional control characteristic can be selected to “FWD” or “REV” or “Non” by scheme
switch setting [EF∗-DIR] (not shown in Figures 2.1.20 to 2.1.23).

The EF1 protection provides selective definite time or inverse time characteristic as shown in
Figure 2.1.20. The definite time protection is selected by setting [MEF1] to “DT”, and the trip
signal EF1 TRIP is given through the delayed pick-up timer TEF1. The inverse time protection is
selected by setting [MEF1] to any one of “IEC”, “IEEE”, “US” or “CON” and then setting
[MEF1C] according to the required IDMT characteristic, and the trip signal EF1 TRIP is given.
Figure 2.1.21 to Figure 2.1.23 show the scheme logic of the definite time earth fault protection
EF2 to EF4. The EF2 to EF4 give trip and alarm signals EF2 TRIP, EF3 TRIP and EF4 ALARM
through the delayed pick-up timers TEF2, TEF3 and TEF4 respectively.

 23 
 6 F 2 S 0 7 5 8

The signal EF1-INST to EF4-INST are available to trip instantaneously for a fault such as a
reclose-on-to-a-fault. (See Section 2.5)
EF1HS (high speed) element is used for blocked overcurrent protection. See Section 2.1.3.6.
GRD140 incorporates a VT failure supervision function (VTFS) and a CT failure supervision
function (CTFS). When the VTFS or CTFS detects a VT failure or a CT failure, it can alarm and
block the EF1 to EF4 protection by the scheme switch [VTF EF1-BLK] to [VTF EF4-BLK] or
[CTF EF1-BLK] to [CTF EF4-BLK] respectively.
The EF1 to EF4 protection can be disabled by the scheme switches [EF1EN] to [EF4EN] or the
binary input signals EF1 BLOCK to EF4 BLOCK respectively.
EF1-REV CURREV-EF1 EF1-CR
TEF1
EF1 ≥1 t 0 &
& & EF1 TRIP
≥1 &
0.00 - 300.00s
EF1
(INST) &

&
EF1-INST
≥1
[MEF1]
+ EF2-EN
"IEC"
+ "OFF" 1
"IEEE"
EF1 ON
"US"

"CON"

"DT"

EF1 BLOCK by BI 1
& EF1 Permission by BI
Non VTF ≥1
EF1-EN
VTF EF1-BLK ≥1 + "ON"
+ "OFF"
Non CTF EF1HS EF1 HS

CTF EF1-BLK ≥1
+ "OFF"

Figure 2.1.20 EF1 Earth Fault Protection

EF2-REV CURREV-EF2 EF2-CR

TEF2
t 0 &
EF2 EF2 TRIP
& ≥1 &
0.00 - 300.00s
EF2-EN
+ "OFF" 1

EF2 ON

&
EF2-INST

EF2 BLOCK by BI 1
&
Non VTF
VTF EF2-BLK EF2 Permission by BI
≥1 ≥1
+ "OFF" EF2-EN
Non CTF + "ON"

CTF EF2-BLK ≥1
+
"OFF"

Figure 2.1.21 EF2 Earth Fault Protection

 24 
 6 F 2 S 0 7 5 8

EF3-REV CURREV-EF3 EF3-CR

TEF3
t 0 &
EF3 EF3 TRIP
& ≥1 &
0.00 - 300.00s
EF3-EN
+ "OFF" 1

EF3 ON

&
EF3-INST

EF3 BLOCK by BI 1
&
Non VTF
VTF EF3-BLK EF3 Permission by BI
≥1 ≥1
+ "OFF" EF3-EN
Non CTF + "ON"

CTF EF3-BLK ≥1
+
"OFF"

Figure 2.1.22 EF3 Definite Time Earth Fault Protection

EF4-REV CURREV-EF4 EF4-CR

TEF4
t 0 & EF4 ALARM
EF4 ≥1 &
&
0.00 - 300.00s
EF4-EN
+ "OFF" 1

EF4 ON

&
EF4-INST

EF4 BLOCK by BI 1
&
Non VTF
VTF EF4-BLK EF4 Permission by BI
≥1 ≥1
+ "OFF" EF4-EN
Non CTF + "ON"

CTF EF4-BLK ≥1
+
"OFF"

Figure 2.1.23 EF4 Definite Time Earth Fault Protection

Earth fault command protection

GRD140 can provide the command protection. These protections require two stage EF elements,
one is for tripping and the other is for blocking or for current reverse detection.
Current reverse detection logic is provided with all stages EF1 to EF4 for command protection as
shown in Figure 2.1.24. In response to power system faults on parallel lines, sequential opening of
the circuit breaker may cause a fault current reversal on healthy lines. This logic is provided to
prevent false operation in the worst case. When EF reverse zone operates and EF∗-REV outputs
for 20ms or more, then even if the EF forward zone subsequently operates, CURREV-EF∗
becomes 0 to block tripping of the local terminal relay or transmission of the trip permission
signal, for a time set by the TREBK setting.
The stage used for current reverse detection should be selected by the scheme switch [CURREV].
The selected stage should have scheme switch [EF∗-DIR] set to “REV”.

 25 
 6 F 2 S 0 7 5 8

TREBK
EF1-REV
& & t 0 0 t
≥1
≥1
EF2-REV 0.02 s 0.00 - 10.00s & 1 CURREV-EF1
& &

EF3-REV & 1 CURREV-EF2

& &

EF4-REV & 1 CURREV-EF3

& &
[EF1-DIR] "REV" [EF1-DIR] "FWD"
& 1 CURREV-EF4
+ +
[EF2-DIR] "REV" [EF2-DIR] "FWD"
+ +
[EF3-DIR] "REV" [EF3-DIR] "FWD"
+ +
"1" [EF4-DIR] "FWD"
[EF4-DIR] "REV"
"2" +
+
"3"
CURREV "4"
+

Figure 2.1.24 Current Reverse Detection

2.1.3.3 Setting for OC and EF protection

The table shows the setting elements necessary for the phase overcurrent and earth fault protection
and their setting ranges.
Element Range Step Default Remarks
OCθ −95 – 95° 1° −45° OC characteristic angle
OC1 0.1 – 25.0 A 0.1 A 5.0 A OC1 threshold setting
(0.02 – 5.00 A)(*) (0.01 A) (1.00 A)
TOC1 0.00 – 300.00 s 0.01 s 1.00 s OC1 definite time setting. Required if
[MOC1] = DT.
TOC1M 0.010 – 1.500 0.001 1.000 OC1 time multiplier setting. Required if
[MOC1] = IEC, IEEE or US.
TOC1R 0.0 – 300.0 s 0.1 s 0.0 s OC1 definite time delayed reset. Required if
[OC1R] = DEF.
TOC1RM 0.010 – 1.500 0.001 1.000 OC1 dependent time delayed reset time
multiplier. Required if [OC1R] = DEP.
OC2 0.1 – 25.0 A 0.1 A 5.0 A OC2 threshold setting
(0.02 – 5.00 A)(*) (0.01 A) (1.00 A)
TOC2 0.00 – 300.00 s 0.01 s 1.00 s OC2 definite time setting.
OC3 0.1 – 250.0 A 0.1 A 50.0 A OC3 threshold setting
(0.02 – 50.00 A)(*) (0.01 A) (10.00 A)
TOC3 0.00 – 300.0 s 0.01 s 1.00 s OC3 definite time setting
OC4 0.1 – 250.0 A 0.1 A 100.0 A OC4 threshold setting
(0.02 – 50.00 A)(*) (0.01 A) (20.00 A)
TOC4 0.0 – 300.0 s 0.01 s 1.00 s OC4 definite time setting
EFθ −95 – 95 ° 1° −45 ° EF characteristic angle
EFV 0.5 – 100.0 V 0.1 V 3.0 V EF ZPS voltage level
EF1 0.1 – 25.0 A 0.01 A 1.50 A EF1 threshold setting
(0.02 – 5.00 A) (0.01 A) (0.30 A)
TEF1 0.00 – 300.00 s 0.01 s 1.00 s EF1 definite time setting. Required if [MEF1]
= DT.

 26 
 6 F 2 S 0 7 5 8

Element Range Step Default Remarks

TEF1M 0.010 – 1.500 0.001 1.000 EF1 time multiplier setting. Required if
[MEF1] = IEC, IEEE or US.
TEF1R 0.0 – 300.0 s 0.1 s 0.0 s EF1 definite time delayed reset. Required if
[EF1R] = DEF.
TEF1RM 0.010 – 1.500 0.001 1.000 EF1 dependent time delayed reset time
multiplier. Required if [EF1R] = DEP.
EF2 0.1 – 25.0 A 0.01 A 1.50 A EF2 threshold setting
(0.02 – 5.00 A) (0.01 A) (0.30 A)
TEF2 0.00 – 300.00 s 0.01 s 1.00 s EF2 definite time setting.
EF3 0.1 – 250.0 A 0.1 A 25.0 A EF3 threshold setting
(0.02 – 50.00 A)(*) (0.01 A) (5.00 A)
TEF3 0.00 – 300.00 s 0.01 s 1.00 s EF3 definite time setting
EF4 0.1 – 250.0 A 0.1 A 50.0 A EF4 threshold setting
(0.02 – 50.00 A)(*) (0.01 A) (10.00 A)
TEF4 0.00 – 300.00 s 0.01 s 1.00 s EF4 definite time setting
TREBK 0.00 – 10.00 s 0.01 s 0.10 Current reverse blocking time
[OC1EN] Off / On On OC1 Enable
[OC1-DIR] FWD/REV/NON FWD OC1 directional characteristic
[MOC1] DT/IEC/IEEE/US/CON DT OC1 time characteristic
[MOC1C] OC1 inverse curve type.
MOC1C-IEC NI / VI / EI / LTI NI Required if [MOC1] = IEC.
MOC1C-IEEE MI / VI / EI MI Required if [MOC1] = IEEE.
MOC1C-US CO2 / CO8 CO2 Required if [MOC1] = US.
[OC1R] DEF / DEP DEF OC1 reset characteristic. Required if
[MOC1] = IEEE or US.
[VTF-OC1BLK] Off / On Off VTF block enable
[OC2EN] Off / On Off OC2 Enable
[OC2-DIR] FWD/REV/NON FWD OC2 directional characteristic
[VTF-OC2BLK] Off / On Off VTF block enable
[OC3EN] Off / On Off OC3 Enable
[OC3-DIR] FWD/REV/NON FWD OC3 directional characteristic
[VTF-OC3BLK] Off / On Off VTF block enable
[OC4EN] Off / On Off OC4 Enable
[OC4-DIR] FWD/REV/NON FWD OC4 directional characteristic
[VTF-OC4BLK] Off / On Off VTF block enable
[OCTP] 3POR / 2OUTOF3 3POR OC trip mode
[EF1EN] Off / On / POP On EF1 Enable
[EF1-DIR] FWD/REV/NON FWD EF1 directional characteristic
[MEF1] DT/IEC/IEEE/US/CON DT EF1 time characteristic
[MEF1C] EF1 inverse curve type.
MEF1C-IEC NI / VI / EI / LTI NI Required if [MEF1] = IEC.

 27 
 6 F 2 S 0 7 5 8

Element Range Step Default Remarks

MEF1C-IEEE MI / VI / EI MI Required if [MEF1] = IEEE.
MEF1C-US CO2 / CO8 CO2 Required if [MEF1] = US.
[EF1R] DEF / DEP DEF EF1 reset characteristic. Required if [MEF1]
= IEEE or US.
[VTF-EF1BLK] Off / On Off VTF block enable
[CTF-EF1BLK] Off / On Off CTF block enable
[EF2EN] Off / On / POP Off EF2 Enable
[EF2-DIR] FWD/REV/NON FWD EF2 directional characteristic
[VTF-EF2BLK] Off / On Off VTF block enable
[CTF-EF2BLK] Off / On Off CTF block enable
[EF3EN] Off / On / POP Off EF3 Enable
[EF3-DIR] FWD/REV/NON FWD EF3 directional characteristic
[VTF-EF3BLK] Off / On Off VTF block enable
[CTF-EF3BLK] Off / On Off CTF block enable
[EF4EN] Off / On / POP Off EF4 Enable
[EF4-DIR] FWD/REV/NON FWD EF4 directional characteristic
[VTF-EF4BLK] Off / On Off VTF block enable
[CTF-EF4BLK] Off / On Off CTF block enable
CURREV Off / 1 / 2 / 3 / 4 Off Current reverse detection
(*) Current values shown in the parenthesis are in the case of a 1 A rating. Other current values are in
the case of a 5 A rating.

[Setting Example of Command Protection]

The followings show a setting example of command protection when the EF1 is applied for
forward fault detection and the EF2 is applied for reverse fault detection.
(1) POP (Permissive overreach protection)
(a) Setting of EF element
EF1: ∗∗ --- depends on power system condition
TEF1: ∗∗ --- for time delay trip
EF1EN: POP
EF1-DIR: FWR
EF2: ∗∗ --- depends on power system condition
TEF2: 0.00s
EF2EN: POP
EF2-DIR: REV
CURREV: 2
(b) Setting of BO (Binary Output)
The signal “EF1-CR (No.285)” is assigned to BOn. --- carrier signal send BO
(c) Setting of BI (Binary Input)

 28 
 6 F 2 S 0 7 5 8

The “EF1 protection permission” is assigned to BIn. --- carrier signal receive BI
BIn SNS: Norm

(2) BOP (Blocking overreach protection)

(a) Setting of EF element
EF1: ∗∗ --- depends on power system condition
TEF1: ∗∗ --- for time delay trip
EF1EN: POP
EF1-DIR: FWR
EF2: ∗∗ --- depends on power system condition
TEF2: 0.30s (minimum) --- coordination time for blocking carrier signal receiving
EF2EN: POP
EF2-DIR: REV
CURREV: 2
(b) Setting of BO (Binary Output)
The signal “EF2-CR (No.286)” is assigned to BOn. --- carrier signal send BO
(c) Setting of BI (Binary Input)
The “EF1 protection permission” is assigned to BIn. --- carrier signal receive BI
BIn SNS: Inv

[Time Overcurrent Protection Setting]

(1) Settings for Inverse Time Overcurrent Protection

Current setting
In Figure 2.1.25, the current setting at terminal A is set lower than the minimum fault current in the
event of a fault at remote end F1. Furthermore, when also considering backup protection for a fault
on the next feeder section, it is set lower than the minimum fault current in the event of a fault at
remote end F3.
To calculate the minimum fault current, phase-to-phase faults are assumed for the phase
overcurrent element, and phase to earth faults for residual overcurrent element, assuming the
probable maximum source impedance. When considering the fault at F3, the remote end of the
next section is assumed to be open.
The higher the current setting, the more effective the inverse characteristic. On the other hand, the
lower the setting, the more dependable the operation. The setting is normally 1 to 1.5 times or less
of the minimum fault current.
For grading of the current settings, the terminal furthest from the power source is set to the lowest
value and the terminals closer to the power source are set to a higher value.
The minimum setting of the phase overcurrent element is restricted so as not to operate for the
maximum load current, and that of the residual overcurrent element is restricted so as to not
operate on false zero-sequence current caused by an unbalance in the load current, errors in the
current transformer circuits, or zero-sequence mutual coupling of parallel lines.

 29 
 6 F 2 S 0 7 5 8

A B C

F1 F2 F3

Figure 2.1.25 Current Settings in Radial Feeder

Time setting
Time setting is performed to provide selectivity in relation to the relays on adjacent feeders.
Consider the minimum source impedance when the current flowing through the relay reaches a
maximum. In Figure 2.1.25, in the event of a fault at F2, the operating time is set so that terminal A
may operate by time grading Tc behind terminal B. The current flowing in the relays may
sometimes be greater when the remote end of the adjacent line is open. At this time, time
coordination must also be kept.
The reason why the operating time is set when the fault current reaches a maximum is that if time
coordination is obtained for a large fault current, then time coordination can also be obtained for
the small fault current as long as relays with the same operating characteristic are used for each
terminal.
The grading margin Tc of terminal A and terminal B is given by the following expression for a
fault at point F2 in Figure 2.1.25.
T c = T1 + T2 + Tm
where, T1: circuit breaker clearance time at B
T2: relay reset time at A
Tm: time margin

(2) Settings of Definite Time Overcurrent Protection

Current setting
The current setting is set lower than the minimum fault current in the event of a fault at the remote
end of the protected feeder section. Furthermore, when also considering backup protection for a
fault in a next feeder section, it is set lower than the minimum fault current, in the event of a fault
at the remote end of the next feeder section.
Identical current values can be set for terminals, but graded settings are better than identical
settings, in order to provide a margin for current sensitivity. The farther from the power source the
terminal is located, the higher the sensitivity (i.e. the lower setting) that is required.
The minimum setting of the phase overcurrent element is restricted so as not to operate for the
maximum load current, and that of the residual overcurrent element is restricted so as to not
operate on false zero-sequence current caused by an unbalance in the load current, errors in the
current transformer circuits, or zero-sequence mutual coupling of parallel lines. Taking the
selection of instantaneous operation into consideration, the settings must be high enough not to
operate for large motor starting currents or transformer inrush currents.

Time setting
When setting the delayed pick-up timers, the time grading margin Tc is obtained in the same way
as explained in “Settings for Inverse Time Overcurrent Protection”.

 30 
 6 F 2 S 0 7 5 8

(3) Directional Characteristic Angle Setting

OC Characteristic Angle
The quadrature voltages used for polarization of the phase fault directional elements are
automatically phase-shifted in GRD140 by +90˚, such that they are in phase with the
corresponding phase voltages under normal conditions. Under fault conditions, the faulted phase
current will lag its phase voltage (and hence its polarising voltage) by an angle dependent on the
system X/R ratio. Therefore, it is necessary to apply a negative characteristic angle to the phase
fault directional elements in order to obtain maximum sensitivity.
The characteristic angle is determined by the [OCθ] setting. The actual value chosen will depend
on the application, but recommended settings for the majority of typical applications are as
follows:
• -60°, for protection of plain feeders, or applications with an earthing point behind the relay
location.
• -45°, for protection of transformer feeders, or applications with an earthing point in front of the relay
location.

EF Characteristic Angle
When determining the characteristic angle for directional earth fault protection, the method of
system earthing must be considered. In solidly earthed systems, the earth fault current tends to lag
the faulted phase voltage (and hence the inverted residual voltage used for polarising) by a
considerable angle, due to the reactance of the source. In resistance earthed systems the angle will
be much smaller.
Commonly applied settings are as follows:
• -60°, for protection of solidly earthed transmission systems.
• -45°, for protection of solidly earthed distribution systems.
• 0° or -15°, for protection of resistance earthed systems.
Further guidance on application of directional earth fault protection is given in appendix B.

2.1.3.4 Sensitive Earth Fault Protection

The sensitive earth fault (SEF) protection is applied for distribution systems earthed through high
impedance, where very low levels of fault current are expected in earth faults. Furthermore, the
SEF elements of GRD140 are also applicable to the “standby earth fault protection” and the “high
impedance restricted earth fault protection of transformers”.
GRD140 provides directional earth fault protection with more sensitive settings for use in
applications where the fault current magnitude may be very low. A 4-stage directional overcurrent
function is provided, with the first stage programmable for inverse time or definite time operation.
The second, third and fourth stages provide definite time operation.
The sensitive earth fault element includes a digital filter which rejects all harmonics other than the
fundamental power system frequency.
The sensitive earth fault quantity is measured directly, using a dedicated core balance earth fault
CT.
This input can also be used in transformer restricted earth fault applications, by the use of external
metrosils (varistors) and setting resistors.
The directional sensitive earth fault elements can be configured for directional operation in the
same way as the standard earth fault pole, by polarising against the residual voltage. An additional

 31 
 6 F 2 S 0 7 5 8

restraint on operation can be provided by a Residual Power element RP, for use in protection of
power systems which utilise resonant (Petersen coil) earthing methods.
The SEF elements provide 20 times more sensitive setting ranges (20 mA to 5 A in 5A rating) than
the regular earth fault protection.
Since very low levels of current setting may be applied, there is a danger of mal-operation due to
harmonics of the power system frequency, which can appear as residual current. Therefore the
SEF elements operate only on the fundamental component, rejecting all higher harmonics.
The SEF protection is provided in Model 110 and 420 series which have a dedicated earth fault
input circuit.
The element SEF1 provides inverse time or definite time selective two-stage overcurrent
protection. Stage 2 of the two-stage overcurrent protection is used only for the standby earth fault
protection. The SEF2 to SEF4 provide definite time overcurrent protection.
When SEF employs IEEE or USA inverse time characteristics, two reset modes are available:
definite time or dependent time resetting. If the IEC inverse time characteristic is employed,
definite time resetting is provided. For other characteristics, refer to Section 2.1.1.1.
In applications of SEF protection, it must be ensured that any erroneous zero-phase current is
sufficiently low compared to the fault current, so that a highly sensitive setting is available.
The erroneous current may be caused with load current due to unbalanced configuration of the
distribution lines, or mutual coupling from adjacent lines. The value of the erroneous current
during normal conditions can be acquired on the metering screen of the relay front panel.
The earth fault current for SEF may be fed from a core balance CT, but if it is derived from three
phase CTs, the erroneous current may be caused also by the CT error in phase faults. Transient
false functioning may be prevented by a relatively long time delay.

Standby earth fault protection

The SEF is energised from a CT connected in the power transformer low voltage neutral, and the
standby earth fault protection trips the transformer to backup the low voltage feeder protection,
and ensures that the neutral earthing resistor is not loaded beyond its rating. Stage 1 trips the
transformer low voltage circuit breaker, then stage 2 trips the high voltage circuit breaker(s) with a
time delay after stage 1 operates.
The time graded tripping is valid for transformers connected to a ring bus, banked transformers
and feeder transformers.

Restricted earth fault protection

The SEF elements can be applied in a high impedance restricted earth fault scheme (REF), for
protection of a star-connected transformer winding whose neutral is earthed directly or through
impedance.
As shown in Figure 2.1.26, the differential current between the residual current derived from the
three-phase feeder currents and the neutral current in the neutral conductor is introduced into the
SEF elements. Two external components, a stabilising resistor and a varistor, are connected as
shown in the figure. The former increases the overall impedance of the relay circuit and stabilises
the differential voltage, and the latter suppresses any overvoltage in the differential circuit.

 32 
 6 F 2 S 0 7 5 8

Power
Transformer

Varistor

Stabilising GRD140
Resistor SEF input

Figure 2.1.26 High Impedance REF

Scheme Logic
Figure 2.1.27 to 2.1.30 show the scheme logic of directional sensitive earth fault protection. The
directional control characteristic can be selected to “FWD” or “REV” or “Non” by scheme switch
setting [SE∗-DIR].

Figure 2.1.27 shows the scheme logic of directional sensitive earth fault protection SEF1 with
inverse time or definite time selective two-stage overcurrent protection. The definite time
protection is selected by setting [MSE1] to “DT”. The element SEF1 is enabled for sensitive earth
fault protection and stage 1 trip signal SEF1 TRIP is given through the delayed pick-up timer
TSE1. The inverse time protection is selected by setting [MSE1] to either “IEC”, “IEEE”, “US” or
“CON” and then setting [MEF1C] according to the required IDMT characteristic. The element
SEF1 is enabled and stage 1 trip signal SEF1 TRIP is given.
Both protections provide stage 2 trip signal SEF1-S2 through a delayed pick-up timer TSE12.
When the standby earth fault protection is applied by introducing earth current from the
transformer low voltage neutral circuit, stage 1 trip signals are used to trip the transformer low
voltage circuit breaker. If SEF1 continues operating after stage 1 has operated, the stage 2 trip
signal can be used to trip the transformer high voltage circuit breaker(s).
SEF1HS (high speed) element is used for blocked overcurrent protection. See Section 2.1.3.6.
Figure 2.1.28 to Figure 2.1.30 show the scheme logic of the definite time sensitive earth fault
protection SEF2 to SEF4. SEF2 to SEF4 give trip and alarm signals SEF2 TRIP, SEF3 TRIP and
SEF4 ALARM through delayed pick-up timers TSE2, TSE3 and TSE4 respectively.
The signal SE1-INST to SE4-INST are available to trip instantaneously for a fault such as a
reclose-on-to-a-fault. (See Section 2.5.)
The SEF1 to SEF4 protections can be disabled by the scheme switches [SE1EN] to [SE4EN] or
binary input signals SEF1 BLOCK to SEF4 BLOCK. The SEF1 stage 2 trip of standby earth fault
protection can be disabled by the scheme switch [SE1S2].

 33 
 6 F 2 S 0 7 5 8

TSE1
SEF1 t 0
≥1 & &
≥1 SEF1 TRIP
0.00 - 300.00s
SEF1
INST & [SEF1EN]
+ "ON"
SEF1-INST
&
≥1
[MSE1]
+
"DT"

"IEC" TSE12
[SE1S2] t 0
& SEF1-S2
+
"IEEE" "ON" 0.00 - 300.00s TRIP

"US"

"CON"

RPF ON
& ≥1 & ≥1
RPR ON
& ≥1 &
"ON" SEF1 BLOCK by BI 1 &
[RPEN]
"OFF"
+ Non VTF
"FWD" SEF1HS SEF1 HS
[SE1 DIR] VTF SE1-BLK ≥1
"REV" + "OFF"
+

Figure 2.1.27 SEF1 Sensitive Earth Fault Protection Scheme Logic

TSE2
SEF2 & t 0
≥1 &
≥1 SEF2 TRIP
0.00 - 300.00s
SEF2
INST & [SEF2EN]
+ "ON"
SEF2-INST &

RPF ON
& ≥1 & ≥1
RPR ON
& ≥1 &
"ON" SEF2 BLOCK by BI 1 &
[RPEN]
"OFF" Non VTF
+
"FWD" VTF SE2-BLK
[SE2 DIR] ≥1
"REV" + "OFF"
+

Figure 2.1.28 SEF2 Sensitive Earth Fault Protection Scheme Logic

TSE3
SEF3 & & t 0
≥1 ≥1
0.00 - 300.00s
SEF3 TRIP
SEF3
INST & [SEF3EN]
+ "ON"
SEF3-INST
&

RPF ON & ≥1 & ≥1

RPR ON
& ≥1 &
"ON" SEF3 BLOCK by BI 1 &
[RPEN]
"OFF" Non VTF
+
"FWD" VTF SE3-BLK
[SE3 DIR] ≥1
"REV" + "OFF"
+

2.1.29 SEF3 Sensitive Earth Fault Protection Scheme Logic

 34 
 6 F 2 S 0 7 5 8

TSE4
SEF4 & & t 0
≥1 ≥1
0.00 - 300.00s
SEF4 ALARM
SEF4
INST & [SEF3EN]
+ "ON"
SEF4-INST
&

RPF ON & ≥1 & ≥1

RPR ON
& ≥1 &
"ON" SEF4 BLOCK by BI 1 &
[RPEN]
"OFF" Non VTF
+
"FWD" VTF SE4-BLK
[SE4 DIR] ≥1
"REV" + "OFF"
+

2.1.30 SEF4 Sensitive Definite Earth Fault Protection Scheme Logic

Setting
The table below shows the setting elements necessary for the sensitive earth fault protection and
their setting ranges.
Element Range Step Default Remarks
SEθ −95° – 95° 1° 0° SEF characteristic angle
SEV 0.5 – 100.0 0.1 V 3.0V SEF ZPS voltage level
SE1 0.01 – 1.00 A 0.01 A 0.05 A SEF1 threshold setting
(0.002 – 0.200 A)(*) (0.001 A) (0.010 A)
TSE1M 0.010 – 1.500 0.001 1.000 SEF1 inverse time multiplier setting.
Required if [MSE1] = IEC, IEEE or US.
TSE1 0.00 – 300.00 s 0.01 s 1.00 s SEF1 definite time setting. Required if
[MSE1] = DT.
TSE1R 0.0 – 300.0 s 0.1 s 0.0 s SEF1 definite time delayed reset. Required
if [MSE1] = IEC or [SE1R] = DEF.
TSE1RM 0.010 – 1.500 0.001 1.000 SEF1 dependent time delayed reset time
multiplier. Required if [SE1R] = DEP.
TSE12 0.00 – 300.00 s 0.01 s 1.00 s SEF1 stage 2 definite time setting
SE2 0.01 – 1.00 A 0.01 A 0.05 A SEF2 threshold setting
(0.002 – 0.200 A)(*) (0.001 A) (0.010 A)
TSE2 0.00 – 300.00 s 0.01 s 1.00 s SEF2 definite time setting.
SE3 0.01 – 1.00 A 0.01 A 0.05 A SEF3 threshold setting
(0.002 – 0.200 A)(*) (0.001 A) (0.010 A)
TSE3 0.00 – 300.00 s 0.01 s 1.00 s SEF3 definite time setting.
SE4 0.01 – 1.00 A 0.01 A 0.05 A SEF4 threshold setting
(0.002 – 0.200 A)(*) (0.001 A) (0.010 A)
TSE4 0.00 – 300.00 s 0.01 s 1.00 s SEF4 definite time setting.
RP 0.00 – 100.00 W 0.01 W 0.00 W Residual power sensitivity
(0.00 – 20.00 W)(*) (0.01 W) (0.00 W)
[SE1EN] Off / On Off SEF1 Enable
[SE1-DIR] FWD / REV / NON FWD SEF1 directional characteristic

 35 
 6 F 2 S 0 7 5 8

Element Range Step Default Remarks

[MSE1] DT/IEC/IEEE/US/CON DT SEF1 characteristic
[MSE1C] SEF1 inverse curve type.
MSE1C-IEC NI / VI / EI / LTI NI Required if [MSE1] = IEC.
MSE1C-IEEE MI / VI / EI MI Required if [MSE1] = IEEE.
MSE1C-US CO2 / CO8 CO2 Required if [MSE1] = US.
[SE1R] DEF / DEP DEF SEF1 reset characteristic. Required if
[MSE1] = IEEE or US.
[SE1S2] Off / On Off SEF1 stage 2 timer enable
[VTF-SE1BLK] Off / On Off VTF block enable
[SE2EN] Off / On Off SEF2 Enable
[SE2-DIR] FWD / REV /NON FWD SEF2 directional characteristic
[VTF-SE2BLK] Off / On Off VTF block enable
[SE3EN] Off / On Off SEF3 Enable
[SE3-DIR] FWD / REV / NON FWD SEF3 directional characteristic
[VTF-SE3BLK] Off / On Off VTF block enable
[SE4EN] Off / On Off SEF4 Enable
[SE4-DIR] FWD / REV / NON FWD SEF4 directional characteristic
[VTF-SE4BLK] Off / On Off VTF block enable
[RPEN] Off / On Off Residual power block enable
(*) Current values shown in parenthesis are in the case of a 1 A rating. Other current values are in the
case of a 5 A rating.

SEF
SEF is set smaller than the available earth fault current and larger than the erroneous zero-phase
current. The erroneous zero-phase current exists under normal conditions due to the unbalanced
feeder configuration. The zero-phase current is normally fed from a core balance CT on the feeder,
but if it is derived from three phase CTs, the erroneous current may be caused also by the CT error
in phase faults.
The erroneous steady state zero-phase current can be acquired on the metering screen of the relay
front panel.

Directional SEF
Directional SEF protection is commonly applied to unearthed systems, and to systems earthed by
an inductance (Peterson Coil). Refer to appendix B for application guidance.

High impedance REF protection

CT saturation under through fault conditions results in voltage appearing across the relay circuit.
The voltage setting of the relay circuit must be arranged such that it is greater than the maximum
voltage that can occur under through fault conditions. The worst case is considered whereby one
CT of the balancing group becomes completely saturated, while the others maintain linear
operation. The excitation impedance of the saturated CT is considered to approximate a
short-circuit.

 36 
 6 F 2 S 0 7 5 8

Healthy CT Saturated CT
Transformer
Circuit

IF
Varistor ZM≈0
RCT
VS

Stabilising
Resistor GRD140
RS RL

Figure 2.1.31 Maximum Voltage under Through Fault Condition

The voltage across the relay circuit under these conditions is given by the equation:
VS = IF×(RCT + RL)
where:
VS = critical setting voltage (rms)
IF = maximum prospective secondary through fault current (rms)
RCT = CT secondary winding resistance
RL = Lead resistance (total resistance of the loop from the saturated CT to the relaying
point)
A series stabilising resistor is used to raise the voltage setting of the relay circuit to VS. No safety
margin is needed since the extreme assumption of unbalanced CT saturation does not occur in
practice. The series resistor value, RS, is selected as follows:
RS = VS / IS
IS is the current setting (in secondary amps) applied to the GRD140 relay. However, the actual
fault setting of the scheme includes the total current flowing in all parallel paths. That is to say that
the actual primary current for operation, after being referred to the secondary circuit, is the sum of
the relay operating current, the current flowing in the varistor, and the excitation current of all the
parallel connected CTs at the setting voltage. In practice, the varistor current is normally small
enough that it can be neglected. Hence:
IS ≦ IP / N – 4Imag
where:
IS = setting applied to GRD140 relay (secondary amps)
IP = minimum primary current for operation (earth fault sensitivity)
N = CT ratio
Imag = CT magnetising (excitation) current at voltage VS
More sensitive settings for IS allow for greater coverage of the transformer winding, but they also
require larger values of RS to ensure stability, and the increased impedance of the differential
circuit can result in high voltages being developed during internal faults. The peak voltage, Vpk,
developed may be approximated by the equation:

Vpk = 2× 2 × Vk × ( I F R S − Vk )

where:
Vk = CT knee point voltage

 37 
 6 F 2 S 0 7 5 8

IF = maximum prospective secondary current for an internal fault

When a Metrosil is used for the varistor, it should be selected with the following characteristics:
V = CIβ
where:
V = instantaneous voltage
I = instantaneous current
β = constant, normally in the range 0.20 - 0.25
C = constant.
The C value defines the characteristics of the metrosil, and should be chosen according to the
following requirements:
1. The current through the metrosil at the relay voltage setting should be as low as possible,
preferably less than 30mA for a 1Amp CT and less than 100mA for a 5Amp CT.
2. The voltage at the maximum secondary current should be limited, preferably to 1500Vrms.
Restricted earth fault schemes should be applied with high accuracy CTs whose knee point voltage
Vk is chosen according to the equation:
Vk ≧ 2×VS
where VS is the differential stability voltage setting for the scheme.

2.1.3.5 Negative Sequence Overcurrent Protection

The negative sequence overcurrent protection (NOC) is used to detect asymmetrical faults
(phase-to-phase and phase-to-earth faults) with high sensitivity in conjunction with phase
overcurrent protection and residual overcurrent protection. It also used to detect load unbalance
conditions.
Phase overcurrent protection must be set to lower sensitivity when the load current is large but
NOC sensitivity is not affected by magnitude of the load current, except in the case of erroneous
negative sequence current due to the unbalanced configuration of the distribution lines.
For some earth faults, only a small zero sequence current is fed while the negative sequence
current is comparatively larger. This is probable when the fault occurs at the remote end with a
small reverse zero sequence impedance and most of the zero sequence current flows to the remote
end.
In these cases, NOC backs up the phase overcurrent and residual overcurrent protection. The NOC
also protects the rotor of a rotating machine from over heating by detecting a load unbalance.
Unbalanced voltage supply to a rotating machine due to a phase loss can lead to increases in the
negative sequence current and in machine heating.
GRD140 provides the directional negative sequence overcurrent protection with definite time
characteristics.
Two independent elements NOC1 and NOC2 are provided for tripping and alarming. These
elements can be directionalised by polarising against the negative sequence voltage.
The NOC protection is enabled when three-phase current is introduced and the scheme switch
[APPL-CT] is set to “3P”.

Scheme Logic
Figure 2.1.32 and 2.1.33 show the scheme logic of directional negative sequence overcurrent
protection NOC1 and NOC2. The directional control characteristic can be selected to “Forward”

 38 
 6 F 2 S 0 7 5 8

or “Reverse” or “Non” by scheme switch setting [NC1-DIR] and [NC2-DIR] (not shown in
Figures 2.1.32 and 2.1.33).
In Figures 2.1.32 and 2.1.33, the NOC1 and NOC2 gives a trip signal NOC1 TRIP and an alarm
signal NOC2 ALARM through delayed pick-up timers TNC1 and TNC2.
When the VTFS or CTFS detects a VT failure or a CT failure, it can alarm and block the NC1 and
NC2 protection by the scheme switch [VTF NC1-BLK] and [VTF NC2-BLK] or [CTF NC1-BLK]
and [CTF NC2-BLK] respectively.
The NC1 and NC2 protection can be disabled by the scheme switches [NC1EN], [NC2EN] and
[APPL-CT] or the binary input signals NC1 BLOCK and NC2 BLOCK respectively.
The scheme switch [APPL-CT] is available in which three-phase overcurrent protection can be
selected. The NOC protection is enabled when three-phase current is introduced and [APPL-CT]
is set to “3P”.
TNC1
NOC1 t 0
& & NOC1 TRIP
[NC1EN]
0.00 - 300.00s
+
"ON"

NOC1 BLOCK by BI 1
&
Non VTF
VTF NC1-BLK ≥1
+ "OFF"
Non CTF
CTF NC1-BLK ≥1
+
"OFF"

Figure 2.1.32 Negative Sequence Overcurrent Protection NOC1 Scheme Logic

TNC2
NOC2 t 0
& & NOC2 ALARM
[NC2EN]
0.00 - 300.00s
+
"ON"

NOC2 BLOCK by BI 1
&
Non VTF
VTF NC2-BLK ≥1
+ "OFF"

Non CTF
CTF NC2-BLK ≥1
+
"OFF"

Figure 2.1.33 Negative Sequence Overcurrent Protection NOC2 Scheme Logic

Setting
The table below shows the setting elements necessary for the NOC protection and their setting
ranges.
Element Range Step Default Remarks
NCθ −95° – 95° 1° −45° NOC characteristic angle
NCV 0.5 – 25.0 V 0.1 V 3.0 V NOC NPS voltage level

 39 
 6 F 2 S 0 7 5 8

NC1 0.5 – 10.0 A 0.1 A 2.0 A NOC1 threshold setting.

(0.10 – 2.00 A)(*) (0.01 A) (0.40 A)
TNC1 0.00 – 300.00 s 0.01 s 1.00 s NOC1 definite time setting. Required if
[MNC1] = DT.
TNC1M 0.010 – 1.500 0.001 1.000 NOC1 time multiplier setting. Required if
[MNC1] = IEC, IEEE or US.
TNC1R 0.0 – 300.0 s 0.1 s 0.0 s NOC1 definite time delayed reset. Required
if [NC1R] = DEF.
TNC1RM 0.010 – 1.500 0.001 1.000 NC1 dependent time delayed reset time
multiplier. Required if [NC1R] = DEP.
NC2 0.5 - 10.0 A 0.1 A 1.0 A NOC2 threshold setting.
(0.10 – 2.00 A) (0.01 A) (0.20 A)
TNC2 0.00 – 300.00 s 0.01 s 1.00 s NOC2 definite time setting
[NC1EN] Off / On Off NOC1 Enable
[MNC1C] NOC1 inverse curve type.
MNC1C-IEC NI / VI / EI / LTI NI Required if [MNC1] = IEC.
MNC1C-IEEE MI / VI / EI MI Required if [MNC1] = IEEE.
MNC1C-US CO2 / CO8 CO2 Required if [MNC1] = US.
[NC1R] DEF / DEP DEF NOC1 reset characteristic. Required if
[MNC1] = IEEE or US.
[CTF-NC1BLK] Off / On Off CTF block enable for NOC1
[VTF-NC1BLK] Off / On Off VTF block enable for NOC1
[NC2EN] Off / On Off NOC2 Enable
[CTF-NC2BLK] Off / On Off CTF block enable for NOC2
[VTF-NC2BLK] Off / On Off VTF block enable for NOC2
[APPL-CT] 3P / 2P / 1P 3P Three-phase current input
(*) Current values shown in the parenthesis are in the case of a 1 A rating. Other current
values are in the case of a 5 A rating.

Sensitive setting of NOC1 and NOC2 thresholds is restricted by the negative phase sequence
current normally present on the system. The negative phase sequence current is measured in the
relay continuously and displayed on the metering screen of the relay front panel along with the
maximum value. It is recommended to check the display at the commissioning stage and to set
NOC1 and NOC2 to 130 to 150% of the maximum value displayed.
The delay time setting TNC1 and TNC2 is added to the inherent delay of the measuring elements
NOC1 and NOC2. The minimum operating time of the NOC elements is around 200ms.
Under fault conditions, the negative sequence current lags the negative sequence voltage by an
angle dependent on the negative sequence source impedance of the system. This should be
accounted for by setting the NOC characteristic angle setting [NCθ] when the negative sequence
protection is used in directional mode. Typical settings are as follows:
• −60° for transmission systems
• +45° for distribution systems

 40 
 6 F 2 S 0 7 5 8

2.1.3.6 Application of Protection Inhibits

All GRD140 protection elements can be blocked by a binary input signal. This feature is useful in
a number of applications.

Blocked Overcurrent Protection

Conventional time-graded definite time overcurrent protection can lead to excessive fault
clearance times being experienced for faults closest to the source. The implementation of a
blocked overcurrent scheme can eliminate the need for grading margins and thereby greatly
reduce fault clearance times. Such schemes are suited to radial feeder circuits, particularly where
substations are close together and pilot cables can be economically run between switchboards.
Figure 2.1.34 shows the operation of the scheme.
Instantaneous phase fault and earth fault pick-up signals OC1HS, EF1HS and SEF1HS of OC1,
EF1 and SEF1 elements are allocated to any of the binary output relays and used as a blocking
signal. OC2, EF2 and SEF2 protections are set with a short delay time. (For pick-up signals, refer
to Figure 2.1.16, 2.1.20 and 2.1.27.)
For a fault at F as shown, each relay sends the blocking signal to its upstream neighbor. The signal
is input as a binary input signal OC2 BLOCK, EF2 BLOCK and SEF2 BLOCK at the receiving
end, and blocks the OC2, EF2 and SEF2 protection. Minimum protection delays of 50ms are
recommended for the OC2, EF2 and SEF2 protection, to ensure that the blocking signal has time
to arrive before protection operation.
Inverse time graded operation with elements OC1, EF1 and SEF1 are available with the scheme
switch [MOC1], [MEF1] and [MSE1] setting, thus providing back-up protection in the event of a
failure of the blocked scheme.

Trip
GRD140 GRD140 GRD140

OC2/EF2/SEF2 OC2/EF2/SEF2 OC2/EF2/SEF2

OCHS/EFHS/ OCHS/EFHS/
High SEFHS High SEFHS
Speed Speed
Block Block

Figure 2.1.34 Blocked Overcurrent Protection

 41 
 6 F 2 S 0 7 5 8

Blocked Busbar Protection

Non-directional overcurrent protection can be applied to provide a busbar zone scheme for a
simple radial system where a substation has only one source, as illustrated in Figure 2.1.35.
For a fault on an outgoing feeder F1, the feeder protection sends a hardwired blocking signal to
inhibit operation of the incomer, the signal OCHS, EFHS and SEFHS being generated by the
instantaneous phase fault, and earth fault pick-up outputs of OC1, EF1 and SEF1 allocated to any
of the binary output relays. Meanwhile, the feeder is tripped by the OC1, EF1 and SEF1 elements,
programmed with inverse time or definite time delays and set to grade with downstream
protections.
The incomer protection is programmed to trip via its instantaneous elements OC2, EF2 and SEF2
set with short definite time delay settings (minimum 50ms), thus providing rapid isolation for
faults in the busbar zone F2.
At the incomer, inverse time graded operation with elements OC1, EF1 and SEF1 are available
with the scheme switch [MOC1], [MEF1] and [MSE1] setting, thus providing back-up protection
in the event of failure of the blocked scheme.
GRD140 integrated circuit breaker failure protection can be used to provide additional back-trips
from the feeder protection to the incomer, and from the incomer to the HV side of the power
transformer, in the event of the first trip failing to clear the earth fault.
In the case of more complex systems where the substation has two incomers, or where power can
flow into the substation from the feeders, then directional protection must be applied.

GRD140 Delayed Back-up Trip

OC1/EF1/SEF1
High Speed Block to Incomer for Feeder Fault
OC2/ EF2/SEF2

Fast Trip

F2
Feeder Trip Feeder Trip Feeder Trip
GRD140 GRD140 GRD140

OC1/EF1/SEF1 OC1/EF1/SEF1 OC1/EF1/SEF1

OCHS/EFHS/ OCHS/EFHS/ OCHS/EFHS/
SEFHS SEFHS SEFHS
F1

Figure 2.1.35 Blocked Busbar Protection Scheme 1

Figure 2.1.36 shows one half of a two-incomer station. A directional overcurrent relay protects the
incomer, with non-directional overcurrent units on the feeders.

 42 
 6 F 2 S 0 7 5 8

GRD140
Directional
(IDMTL) Delayed Back-up Trip
OC1/EF1/SEF1
(50ms) Trip Bus Section and Bus Coupler
OC2/EF2/SEF2
(250ms)
OC3/EF3/SEF3

High Speed Block

Trip Incomer

Bus Section

Bus Coupler

Feeder Trip Feeder Trip

GRD140 GRD140
Non-directional Non-directional

OC1/EF1/SEF1 OC1/EF1/SEF1

OCHS/EFHS/ OCHS/EFHS/
SEFHS SEFHS

Figure 2.1.36 Blocked Busbar Protection Scheme 2

For a fault on an outgoing feeder, the non-directional feeder protection sends a hardwired blocking
signal to inhibit operation of both incomers, the signal OCHS, EFHS and SEFHS being generated
by the instantaneous phase fault and earth fault pick-up outputs. Meanwhile, the feeder is tripped
by the OC1, EF1 and SEF1 elements, programmed with inverse time delays and set to grade with
downstream protections.
The incomer protection is programmed for directional operation such that it will only trip for
faults on the busbar side of its CTs. Hence, although a fault on the HV side may be back-fed from
the busbars, the relay does not trip.
For a fault in the busbar zone, the GRD140 is programmed to trip the bus section and bus coupler
circuit breakers via its instantaneous elements OC2, EF2 and SEF2 set with short definite time
delay settings (minimum 50ms). This first stage trip maintains operation of half the substation in
the event of a busbar fault or incomer fault in the other half.
If the first stage trip fails to clear the fault, a second stage trip is given to the local incomer circuit
breaker via instantaneous elements OC3, EF3 and SEF3 after a longer delay, thus isolating a fault
on the local busbar.
GRD140 integrated circuit breaker fail protection can be used to provide additional back-trips
from the feeder protection to the incomer, and from the incomer to the HV side of the power
transformer, in the event of the main trip failing to clear the fault.
A further development of this scheme might see directional relays being applied directly to the bus
section and bus coupler circuit breakers, to speed up operation of the scheme.
This scheme assumes that a busbar fault cannot be fed from the outgoing feeder circuits. In the
case of an interconnected system, where a remote power source may provide a back-feed into the
substation, directional relays must also be applied to protect the feeders.

 43 
 6 F 2 S 0 7 5 8

2.1.4 Phase Undercurrent Protection

The phase undercurrent protection is used to detect a decrease in current caused by a loss of load,
typically motor load. Two stage undercurrent protection UC1 and UC2 are available.
The undercurrent element operates for current falling through the threshold level. But the
operation is blocked when the current falls below 4 % of CT secondary rating to discriminate the
loss of load from the feeder tripping by other protection. Figure 2.4.37 shows the undercurrent
element characteristic.

Setting value
|I| ≤ UC1 setting
Operating zone & UC1

0.04×In
|I| ≤ UC2 setting
0 & UC2
I

|I| ≥ 0.04×In

In: rated current

Figure 2.1.37 Undercurrent Element Characteristic

Each phase has two independent undercurrent elements for tripping and alarming. The elements
are programmable for instantaneous or definite time delayed operation.
The undercurrent element operates on per phase basis, although tripping and alarming is three-
phase only.

Scheme Logic
Figure 2.1.38 shows the scheme logic of the phase undercurrent protection.
The undercurrent elements UC1 and UC2 output UC1 TRIP and UC2 ALARM through delayed
pick-up timers TUC1 and TUC2.
This protection can be disabled by the scheme switch [UC1EN] and [UC2EN] or binary input
signals UC1 BLOCK and UC2 BLOCK.
Further, this protection can be blocked when CT failure (CTF) is detected.

 44 
 6 F 2 S 0 7 5 8

TUC1
t 0
A & & & UC1-A TRIP
t 0
UC1 B & & & UC1-B TRIP
C t 0 UC1-C TRIP
& & &
0.00 - 300.00s
[UC1EN] ≥1 UC1 TRIP
+
"ON"
TUC2
t 0
A & & UC2-A ALARM
&
t 0
UC2 B & & & UC2-B ALARM
C t 0 UC2-C ALARM
& & &
0.00 - 300.00s
[UC2EN] ≥1 UC2 ALARM
A +
"ON"
I≥
0.04In B
C

NON CTF

[CTF-UC1BLK] ≥1 &
+
"OFF"

UC1 BLOCK 1

[CTF UC2BLK] ≥1 &

+
"OFF"

UC2 BLOCK 1 In : Rated current

Figure 2.1.38 Undercurrent Protection Scheme Logic

Setting
The table below shows the setting elements necessary for the undercurrent protection and their
setting ranges.
Element Range Step Default Remarks
UC1 0.5 – 10.0 A 0.1 A 1.0 A UC1 threshold setting
(0.10 – 2.00 A)(*) (0.01 A) (0.20 A)
TUC1 0.00 – 300.00 s 0.01 s 1.00 s UC1 definite time setting
UC2 0.5 – 10.0 A 0.1 A 2.0 A UC2 threshold setting
(0.10 – 2.00 A) (0.01 A) (0.40 A)
TUC2 0.00 – 300.00 s 0.01 s 1.00 s UC2 definite time setting
[UC1EN] Off / On Off UC1 Enable
[UC2EN] Off / On Off UC2 Enable
[CTF-UC1BLK] Off / On Off UC1 CTF block
[CTF-UC2BLK] Off / On Off UC2 CTF block
(*) Current values shown in parenthesis are in the case of a 1 A rating. Other current values are in
the case of a 5 A rating.

 45 
 6 F 2 S 0 7 5 8

2.1.5 Thermal Overload Protection

The temperature of electrical plant rises according to an I2t function and the thermal overload
protection in GRD140 provides a good protection against damage caused by sustained
overloading. The protection simulates the changing thermal state in the plant using a thermal
model.
The thermal state of the electrical system can be shown by equation (1).
I2  −t 
θ = 1 − e τ  × 100% (1)
2
I AOL  

where:
θ = thermal state of the system as a percentage of allowable thermal capacity,
I = applied load current,
IAOL = allowable overload current of the system,
τ = thermal time constant of the system.
The thermal state 0% represents the cold state and 100% represents the thermal limit, which is the
point at which no further temperature rise can be safely tolerated and the system should be
disconnected. The thermal limit for any given system is fixed by the thermal setting IAOL. The relay
gives a trip output when θ= 100%.
The thermal overload protection measures the largest of the three phase currents and operates
according to the characteristics defined in IEC60255-8. (Refer to Appendix A for the
implementation of the thermal model for IEC60255-8.)
Time to trip depends not only on the level of overload, but also on the level of load current prior to
the overload - that is, on whether the overload was applied from ‘cold’ or from ‘hot’.
Independent thresholds for trip and alarm are available.
The characteristic of the thermal overload element is defined by equation (2) and equation (3) for
‘cold’ and ‘hot’. The cold curve is a special case of the hot curve where prior load current Ip is
zero, catering to the situation where a cold system is switched on to an immediate overload.
 I2 
t =τ·Ln  2 2  (2)
 I − I AOL 

 I2 − I 2 
t =τ·Ln  2 2P  (3)
 I − I AOL 

where:
t = time to trip for constant overload current I (seconds)
I = overload current (largest phase current) (amps)
IAOL = allowable overload current (amps)
IP = previous load current (amps)
τ= thermal time constant (seconds)
Ln = natural logarithm
Figure 2.1.39 illustrates the IEC60255-8 curves for a range of time constant settings. The left-hand
chart shows the ‘cold’ condition where an overload has been switched onto a previously un-loaded
system. The right-hand chart shows the ‘hot’ condition where an overload is switched onto a

 46 
 6 F 2 S 0 7 5 8

system that has previously been loaded to 90% of its capacity.

Thermal Curves (Cold Curve - Thermal Curves (Hot Curve -

no prior load) 90% prior load)
1000 1000

100
100
Operate Time (minutes)

Operate Time (minutes)

10
10

1
τ
τ
1 100
100
50 0.1 50
20 20
0.1 10 10
0.01 5
5
2
2
1
0.01 1 0.001
1 10 1 10
Overload Current (Multiple of IAOL) Overload Current (Multiple of
IAOL)

Figure 2.1.39 Thermal Curves

Scheme Logic
Figure 2.1.40 shows the scheme logic of the thermal overload protection.
The thermal overload element THM has independent thresholds for alarm and trip, and outputs
alarm signal THM ALARM and trip signal THM TRIP. The alarming threshold level is set as a
percentage of the tripping threshold.
The alarming and tripping can be disabled by the scheme switches [THMAEN] and [THMEN]
respectively or binary input signals THMA BLOCK and THM BLOCK.

A & THM ALARM

&
THM
T & THM TRIP
&
[THMAEN]
+
"ON"
[THMEN]
+
"ON"

THM BLOCK 1

THMA BLOCK 1

Figure 2.1.40 Thermal Overload Protection Scheme Logic

 47 
 6 F 2 S 0 7 5 8

Setting
The table below shows the setting elements necessary for the thermal overload protection and their
setting ranges.
Element Range Step Default Remarks
THM 2.0 – 10.0 A 0.1 A 5.0 A Thermal overload setting.
(0.40 – 2.00 A)(*) (0.01 A) (1.00 A) (THM = IAOL: allowable overload current)
THMIP 0.0 – 5.0 A 0.1 A 0.0 A Previous load current
(0.00 – 1.00 A)(*) (0.01 A) (0.00 A)
TTHM 0.5 - 100.0 min 0.1 min 10.0 min Thermal time constant
THMA 50 – 99 % 1% 80 % Thermal alarm setting.
(Percentage of THM setting.)
[THMEN] Off / On Off Thermal OL enable
[THMAEN] Off / On Off Thermal alarm enable
(*) Current values shown in the parenthesis are in the case of a 1 A rating. Other current
values are in the case of a 5 A rating.
Note: THMIP sets a minimum level of previous load current to be used by the thermal element,
and is typically used when testing the element. For the majority of applications, THMIP
should be set to its default value of zero, in which case the previous load current, Ip, is
calculated internally by the thermal model, providing memory of conditions occurring
before an overload.

 48 
 6 F 2 S 0 7 5 8

2.1.6 Broken Conductor Protection

Series faults or open circuit faults which do not accompany any earth faults or phase faults are
caused by broken conductors, breaker contact failure, operation of fuses, or false operation of
single-phase switchgear.
Figure 2.1.41 shows the sequence network connection diagram in the case of a single-phase series
fault assuming that the positive, negative and zero sequence impedance of the left and right side
system of the fault location is in the ratio of k1 to (1 – k1), k2 to (1 – k2) and k0 to (1 – k0).

E1A
Single-phase series fault
E1B

k1 1– k1

k1Z1 I1F I1F (1-k1)Z1

E1A E1B

Positive phase sequence

k2Z2 I2F I2F (1-k2)Z2

Negative phase sequence

k0Z0 I0F I0F (1-k0)Z0

Zero phase sequence

I1F k2Z2 (1-k2)Z2 I1F

k1Z1 (1-k1)Z1
K0Z0 (1-k0)Z0
E1A E1B

I1F Z2
Z1
Z0
E1A E1B

Figure 2.1.41 Equivalent Circuit for a Single-phase Series Fault

Positive phase sequence current I1F, negative phase sequence current I2F and zero phase sequence

 49 
 6 F 2 S 0 7 5 8

current I0F at fault location in an single-phase series fault are given by:

I1F + I2F + I0F =0 (1)

Z2FI2F − Z0FI0F = 0 (2)
E1A − E1B = Z1FI1F − Z2FI2F (3)
where,
E1A, E1B: power source voltage
Z1: positive sequence impedance
Z2: negative sequence impedance
Z0: zero sequence impedance

From the equations (1), (2) and (3), the following equations are derived.

Z 2 + Z0
I1F = Z Z + Z Z + Z Z (E1A − E1B)
1 2 1 0 2 0

−Z0
I2F = Z Z + Z Z + Z Z (E1A − E1B)
1 2 1 0 2 0

−Z2
I0F = Z Z + Z Z + Z Z (E1A − E1B)
1 2 1 0 2 0

The magnitude of the fault current depends on the overall system impedance, difference in phase
angle and magnitude between the power source voltages behind both ends.
Broken conductor protection element BCD detects series faults by measuring the ratio of negative
to positive phase sequence currents (I2F / I1F). This ratio is given with negative and zero sequence
impedance of the system:

I2F |I2F| Z0
I1F = |I1F| = Z2 + Z0

The ratio is higher than 0.5 in a system when the zero sequence impedance is larger than the
negative sequence impedance. It will approach 1.0 in a high-impedance earthed or a one-end
earthed system.
The characteristic of BCD element is shown in Figure 2.1.42 to obtain the stable operation.

I2

|I2|/|I1| ≥ BCD
setting & BCD

|I1| ≥ 0.04×In

|I2| ≥ 0.01×In

0.01×In
0 I1
0.04×In In: rated current

Figure 2.1.42 BCD Element Characteristic

 50 
 6 F 2 S 0 7 5 8

Scheme Logic

Figure 2.1.43 shows the scheme logic of the broken conductor protection. BCD element outputs
trip signals BCD TRIP through a delayed pick-up timer TBCD.
The tripping can be disabled by the scheme switch [BCDEN], [APPL] or binary input signal BCD
BLOCK. The scheme switch [APPL] is available in Model 400 and 420 in which three-phase or
two-phase phase overcurrent protection can be selected. The broken conductor protection is
enabled when three-phase current is introduced and [APPL] is set to “3P” in those models.

TBCD
BCD t 0
& BCD TRIP

0.00 - 300.00s
[BCDEN]
+
"ON"

[APPL]
+
"3P"
BCD BLOCK 1

Figure 2.1.43 Broken Conductor Protection Scheme Logic

Settings

The table below shows the setting elements necessary for the broken conductor protection and
their setting ranges.
Element Range Step Default Remarks
BCD 0.10 – 1.00 0.01 0.20 I2 / I1
TBCD 0.00 – 300.00s 0.01s 0.00 s BCD definite time setting
[BCDEN] Off / On Off BCD Enable
[APPL] 3P / 2P / 1P 3P Three-phase current input. Only
required in Model 400 and 420.

Minimum setting of the BC threshold is restricted by the negative phase sequence current
normally present on the system. The ratio I2 / I1 of the system is measured in the relay continuously
and displayed on the metering screen of the relay front panel, along with the maximum value of
the last 15 minutes I21 max. It is recommended to check the display at the commissioning stage.
The BCD setting should be 130 to 150% of I2 / I1 displayed.
Note: It must be noted that I2 / I1 is displayed only when the positive phase sequence current
(or load current ) in the secondary circuit is larger than 2 % of the rated secondary circuit
current.
TBCD should be set to more than 1 cycle to prevent mal-operation caused by a transient operation
such as CB closing.

 51 
 6 F 2 S 0 7 5 8

2.1.7 Breaker Failure Protection

When fault clearance fails due to a breaker failure, the breaker failure protection (BFP) clears the
fault by backtripping adjacent circuit breakers.
If the current continues to flow even after a trip command is output, the BFP judges it as a breaker
failure. The existence of the current is detected by an overcurrent element CBF provided for each
phase. For high-speed operation of the BFP, a high-speed reset overcurrent element (less than
20ms) is used. The CBF element resets when the current falls below 80% of the operating value as
shown in Figure 2.1.44.

Pick-up

Drop-off

0 I

Drop-off/Pick-up=0.8

Figure 2.1.44 CBF element Characteristic

In order to prevent the BFP from starting by accident during maintenance work and testing, and
thus tripping adjacent breakers, the BFP has the optional function of retripping the original
breaker. To make sure that the breaker has actually failed, a trip command is made to the original
breaker again before tripping the adjacent breakers to prevent unnecessary tripping of the adjacent
breakers following the erroneous start-up of the BFP. It is possible to choose not to use retripping
at all, or use retripping with trip command plus delayed pick-up timer, or retripping with trip
command plus overcurrent detection plus delayed pick-up timer.
An overcurrent element and delayed pick-up timer are provided for each phase which also operate
correctly during the breaker failure routine in the event of a developing fault.

Scheme logic
The BFP initiation is performed on per-phase basis. Figure 2.1.45 shows the scheme logic for the
BFP. The BFP is started by per-phase base trip signals EXT TRIP-APH to EXT TRIP-CPH or
three-phase base trip signal EXT TRIP-3PH by binary inputs. These trip signals must
continuously exist as long as the fault is present.
The backtripping signal to the adjacent breakers CBF TRIP is output if the overcurrent element
CBF operates continuously for the setting time of the delayed pick-up timer TBTC after initiation.
Tripping of adjacent breakers can be blocked with the scheme switch [BTC].
There are two kinds of modes of the retrip signal to the original breaker CBF RETRIP, the mode in
which retrip is controlled by the overcurrent element CBF, and the direct trip mode in which retrip
is not controlled. The retrip mode together with the trip block can be selected with the scheme
switch [RTC]. In the scheme switch [RTC], “DIR” is the direct trip mode, and “OC” is the trip
mode controlled by the overcurrent element CBF.
Figure 2.1.46 shows a sequence diagram for the BFP when a retrip and backup trip are used. If the
circuit breaker trips normally, the CBF is reset before timer TRTC or TBTC is picked up and the
BFP is reset. As TRTC and TBTC start at the same time, the setting value of TBTC should include
that of TRTC.
If the CBF continues to operate, a retrip command is given to the original breaker after the setting
time of TRTC. Unless the breaker fails, the CBF is reset by retrip. TBTC does not time-out and the
BFP is reset. This sequence of events may happen if the BFP is initiated by mistake and

 52 
 6 F 2 S 0 7 5 8

unnecessary tripping of the original breaker is unavoidable.

If the original breaker fails, retrip has no effect and the CBF continues operating and the TBTC
finally picks up. A trip command CBF TRIP is given to the adjacent breakers and the BFP is
completed.
The BFP protection can be disabled by the scheme switches [BTC] and [RTC] or the binary input
signal CBF BLOCK.

[BTC]
≥1 CBF TRIP
+
"ON" TBTC
A t 0
& CBF TRIP-A
CBF B
t 0
& CBF TRIP-B
C
t 0
& CBF TRIP-C

0.00 - 300.00s
≥1 CBF RETRIP
TRTC
t 0
& CBF RETRIP-A
≥1
t 0 CBF RETRIP-B
& ≥1

t 0
& ≥1 CBF RETRIP-C

0.00 - 300.00s
EXT TRIP-APH
≥1 &

EXT TRIP-BPH
≥1 &

EXT TRIP-CPH
≥1 &
EXT TRIP-3PH [RTC]
+
"OC"

"DIR"
[APPL-CT]
+
"3P" &
CBF BLOCK 1

Figure 2.1.45 Breaker Failure Protection Scheme Logic

 53 
 6 F 2 S 0 7 5 8

Fault Start CBFP

Trip
Adjacent
breakers Closed Open

TRIP
Normal trip Retrip
Original
breakers Closed Open Open
Tcb Tcb

OCBF
Toc Toc
TBF1
TRTC

CBF
RETRIP

TBF2
TBTC

CBF
TRIP

Figure 2.1.46 Sequence Diagram

Setting
The setting elements necessary for the breaker failure protection and their setting ranges are as
follows:
Element Range Step Default Remarks
CBF 0.5 – 10.0 A 0.1 A 2.5 A Overcurrent setting
(0.10 - 2.00 A)(*) (0.01 A) (0.50 A)
TRTC 0.00 – 300.00 s 0.01 s 0.40 s Retrip time setting
TBTC 0.00 – 300.00 s 0.01 s 0.50 s Back trip time setting
[RTC] Off / DIR / OC Off Retrip control
[BTC] Off / On Off Back trip control
(*) Current values shown in the parentheses are in the case of 1 A rating. Other
current values are in the case of 5 A rating.
The overcurrent element CBF checks that the circuit breaker has opened and that the current has
disappeared. Therefore, since it is allowed to respond to load current, it can be set to 10 to 200% of
the rated current.
The settings of TRTC and TBTC are determined by the opening time of the original circuit breaker
(Tcb in Figure 2.1.46) and the reset time of the overcurrent element (Toc in Figure 2.1.46). The
timer setting example when using retrip can be obtained as follows.
Setting of TRTC = Breaker opening time + CBF reset time + Margin
= 40ms + 10ms + 20ms
= 70ms
Setting of TBTC = TCBF1 + Output relay operating time + Breaker opening time +
CBF reset time + Margin
= 70ms + 10ms + 40ms + 10ms + 10ms
= 140ms
If retrip is not used, the setting of the TBTC can be the same as the setting of the TRTC.

 54 
 6 F 2 S 0 7 5 8

2.1.8 Cold Load Protection

GRD140 provides cold load protection to prevent incorrect operation from a magnetising inrush
current during transformer energisation.
In normal operation, the load current on the distribution line is smaller than the sum of the rated
loads connected to the line. But it amounts to several times the maximum load current for a
moment when all of the loads are energised at once after a long interruption, and decreases to 1.5
times normal peak load after three or four seconds.
To protect those lines with overcurrent element, it is necessary to use settings to discriminate the
inrush current in cold load restoration and the fault current.
This function modifies the overcurrent protection settings for a period after closing on to the type
of load that takes a high level of load on energisation. This is achieved by a ‘Cold Load Setting’, in
which the user can program alternative setting. Normally the user will choose higher current
settings within this setting.
A state transition diagram and its scheme logic are shown in Figure 2.1.47 and Figure 2.1.48 for
the cold load protection. Note that the scheme requires the use of two binary inputs assigned by
PLC function, one each for CB OPEN and CB CLOSED.
Under normal conditions, where the circuit breaker has been closed for some time, the scheme is in
STATE 0, and the normal default setting is applied to the overcurrent protection.
If the circuit breaker opens then the scheme moves to STATE 1 and runs the Cold Load Enable
timer TCLE. If the breaker closes again while the timer is running, then STATE 0 is re-entered.
Alternatively, if TCLE expires then the load is considered cold and the scheme moves to STATE
2, and stays there until the breaker closes, upon which it goes to STATE 3.
In STATE 2 and STATE 3, the ‘Cold Load Setting’ is applied.
In STATE 3 the Cold Load Reset timer TCLR runs. If the circuit breaker re-opens while the timer
is running then the scheme returns to STATE 2. Alternatively, if TCLR expires then it goes to
STATE 0, the load is considered warm and normal settings can again be applied.
Accelerated reset of the cold load protection is also possible. In STATE 3, the phase currents are
monitored by overcurrent element ICLDO and if all phase currents drop below the ICLDO
threshold for longer than the cold load drop off time (TCLDO) then the scheme automatically
reverts to STATE 0. The accelerated reset function can be enabled with the scheme switch
[CLDOEN] setting.
Cold load protection can be disabled by setting [CLEN] to “Off”.
To test the cold load protection function, the switch [CLPTST] is provided to set the STATE 0 or
STATE 3 condition forcibly.

 55 
 6 F 2 S 0 7 5 8

STATE 0
CB status: Closed
Settings Group: Normal

Monitor CB status

CB opens CB closes
within
T CLE time

STATE 1
CB status: Open
Settings Group: Normal

Run T CLE timer

Monitor CB status
IL<ICLDO for
T CLR timer T CLDO time
T CLE timer expires
expires

STATE 3
STATE 2 CB closes CB status: Closed
CB status: Open Settings Group: Cold Load
Settings Group: Cold Load
Run T CLR timer
Monitor CB status CB opens within Monitor CB status
CLR time Monitor load current I L

Figure 2.1.47 State Transition Diagram for Cold Load Protection

STATE 0 Change to
&
STATE 1
TCLE
STATE 1 t 0 Change to
& ≥1 STATE 2
0.0 - 10000.0s

& Change to
≥1 STATE 0

STATE 2 Change to
&
STATE 3

STATE 3
&
TCLR
[CLEN] t 0
&
+ 1 [CLPTST] "S0"
"OFF"
0.0 - 10000.0s +
"S3"
CB CONT OPN CB CLOSE
≥1

CB ClONT CLS 1 1 CB OPEN

TCLDO
A t 0
≥1 1 &
ICLDO B 0.00 - 100.00s
C

[CLDOEN]
+
"ON"

Figure 2.1.48 Scheme Logic for Cold Load Protection

 56 
 6 F 2 S 0 7 5 8

Setting
The setting elements necessary for the cold load protection and their setting ranges are as follows:
Element Range Step Default Remarks
ICLDO 0.5 – 10.0 A 0.1 A 2.5 A Cold load drop-off threshold setting
(0.10 - 2.00 A)(*) (0.01 A) (0.50 A)
TCLE 0-10000 s 1s 100 s Cold load enable timer
TCLR 0-10000 s 1s 100 s Cold load reset timer
TCLDO 0.00-100.00 s 0.01 s 0.00 s Cold load drop-off timer
[CLEN] Off / On Off Cold load protection enable
[CLDOEN] Off / On Off Cold load drop-off enable
(*) Current values shown in the parentheses are in the case of a 1 A rating. Other current values
are in the case of a 5 A rating.

Further, other element settings (OC1 to OC4, EF1 to EF4, SEF1 to SEF4, NOC1, NOC2 and
BCD) are required for the cold load protection.

 57 
 6 F 2 S 0 7 5 8

2.1.9 CT Requirements

2.1.9.1 Phase Fault and Earth Fault Protection

Protection class current transformers are normally specified in the form shown below. The CT
transforms primary current within the specified accuracy limit, for primary current up to the
overcurrent factor, when connected to a secondary circuit of the given burden.

5 P 20 : 10VA

Accuracy Overcurrent Maximum Burden

Limit (%) Factor (at rated current)

Accuracy limit : Typically 5 or 10%. In applications where current grading is to be applied and
small grading steps are desirable, then a 5% CT can assist in achieving the necessary accuracy. In
less onerous applications, a limit of 10% may be acceptable.
Overcurrent factor : The multiple of the CT rating up to which the accuracy limit is claimed,
typically 10 or 20 times. A value of 20 should be specified where maximum fault current is high
and accurate inverse time grading is required. In applications where fault current is relatively low,
or where inverse time grading is not used, then an overcurrent factor of 10 may be adequate.
Maximum burden : The total burden calculated at rated secondary current of all equipment
connected to the CT secondary, including relay input burden, lead burden, and taking the CT’s
own secondary resistance into account. GRD140 has an extremely low AC current burden,
typically less than 0.1VA for a 1A phase input, allowing relatively low burden CTs to be applied.
Relay burden does not vary with settings.
If a burden lower than the maximum specified is connected, then the practical overcurrent factor
may be scaled accordingly. For the example given above, at a rated current of 1A, the maximum
value of CT secondary resistance plus secondary circuit resistance (RCT + R2) should be 10Ω. If
a lower value of, say, (RCT + R2) = 5Ω is applied, then the practical overcurrent factor may be
increased by a factor of two, that is, to 40A.
In summary, the example given of a 5P20 CT of suitable rated burden will meet most applications
of high fault current and tight grading margins. Many less severe applications may be served by
5P10 or 10P10 transformers.

2.1.9.2 Minimum Knee Point Voltage

An alternative method of specifying a CT is to calculate the minimum knee point voltage,
according to the secondary current which will flow during fault conditions:
Vk ≥ If (RCT + R2)
where:
Vk = knee point voltage
If = maximum secondary fault current
RCT = resistance of CT secondary winding
R2 = secondary circuit resistance, including lead resistance.
When using this method, it should be noted that it is often not necessary to transform the
maximum fault current accurately. The knee point should be chosen with consideration of the
settings to be applied and the likely effect of any saturation on protection performance. Further,

 58 
 6 F 2 S 0 7 5 8

care should be taken when determining R2, as this is dependent on the method used to connect the
CTs (E.g. residual connection, core balanced CT connection, etc).

2.1.9.3 Sensitive Earth Fault Protection

A core balance CT should be applied, with a minimum knee point calculated as described above.

2.1.9.4 Restricted Earth Fault Protection

High accuracy CTs should be selected with a knee point voltage Vk chosen according to the
equation:
Vk ≥ 2× Vs
where Vs is the differential stability voltage setting for the scheme.

 59 
 6 F 2 S 0 7 5 8

2.2 Overvoltage and Undervoltage Protection

2.2.1 Phase Overvoltage Protection

GRD140 provides two independent phase overvoltage elements with programmable

dropoff/pickup(DO/PU) ratio. OV1 is programmable for inverse time (IDMT) or definite time
(DT) operation. OV2 has definite time characteristic only.
Figure 2.2.1 shows the characteristic of overvoltage elements.

Pickup

Dropoff

0 V

Figure 2.2.1 Characteristic of Overvoltage Elements

The overvoltage protection element OV1 has the IDMT characteristic defined by equation (1):
 
 1 
t = TMS ×  (1)
( ) 
 V Vs − 1 
 

where:
t = operating time for constant voltage V (seconds),
V = energising voltage (V),
Vs = overvoltage setting (V),
TMS = time multiplier setting.

The IDMT characteristic is illustrated in Figure 2.2.2.

The OV2 element is used for definite time overvoltage protection.

Definite time reset

The definite time resetting characteristic is applied to the OV1 element when the inverse time
delay is used.
If definite time resetting is selected, and the delay period is set to instantaneous, then no
intentional delay is added. As soon as the energising voltage falls below the reset threshold, the
element returns to its reset condition.
If the delay period is set to some value in seconds, then an intentional delay is added to the reset
period. If the energising voltage exceeds the setting for a transient period without causing tripping,
then resetting is delayed for a user-definable period. When the energising voltage falls below the
reset threshold, the integral state (the point towards operation that it has travelled) of the timing
function (IDMT) is held for that period.
This does not apply following a trip operation, in which case resetting is always instantaneous.
Both OV1 and OV2 have a programmable dropoff/pickup(DO/PU) ratio.

 60 
 6 F 2 S 0 7 5 8

Overvoltage Inverse Time

Curves
1000.000

100.000

Operating Time (secs)

10.000
TMS = 10

TMS = 5

TMS = 2

1.000
TMS = 1

0.100
1 1.5 2 2.5 3

Applied Voltage (x Vs)

Figure 2.2.2 IDMT Characteristic

Scheme Logic
Figure 2.2.3 shows the scheme logic of the OV1 overvoltage protection with selective definite
time or inverse time characteristic.
The definite time protection is enabled by setting [OV1EN] to “DT”, and trip signal OV1 TRIP is
given through the delayed pick-up timer TOV1. The inverse time protection is enabled by setting
[OV1EN] to “IDMT”, and trip signal OV1 TRIP is given.
The OV1 protection can be disabled by the scheme switch [OV1EN] or the binary input signal
OV1 BLOCK.

Figure 2.2.4 shows the scheme logic of the OV2 protection with definite time characteristic. The
OV2 gives the signal OV2-ALARM through delayed pick-up timer TOV2.
The OV2-ALARM signal can be blocked by incorporated scheme switch [OV2EN] and the binary
input signal OV2 BLOCK.

 61 
 6 F 2 S 0 7 5 8

TOV1
A & & t 0
≥1 OV1-A TRIP
OV1 B

C & & t 0 OV1-B TRIP

≥1

& & t 0
OV1-C TRIP
≥1
0.00 - 300.00s
[OV1EN] "DT"
≥1
+ & ≥1 OV1 TRIP
"IDMT"
&
OV1 BLOCK 1

&

Figure 2.2.3 OV1 Overvoltage Protection

TOV2
A & t 0
& OV2-A ALARM
OV2 B
C & & t 0 OV2-B ALARM

& & t 0
[OV2EN] OV2-C ALARM
+ 0.00 - 300.00s
"On"
≥1 OV2 ALARM
OV2 BLOCK 1

Figure 2.2.4 OV2 Overvoltage Protection

Setting
The table shows the setting elements necessary for the overvoltage protection and their setting
ranges.
Element Range Step Default Remarks
OV1 10.0 – 200.0 V 0.1 V 120.0 V OV1 threshold setting
TOV1M 0.05 – 100.00 0.01 1.00 OV1 time multiplier setting. Required if [OV1EN] = IDMT.
TOV1 0.00 – 300.00 s 0.01 s 1.00 s OV1 definite time setting. Required if [OV1EN] = DT.
TOV1R 0.0 – 300.0 s 0.1 s 0.0 s OV1 definite time delayed reset.
OV1DPR 10 – 98 % 1% 95 % OV1 DO/PU ratio setting.
OV2 10.0 – 200.0 V 0.1 V 140.0 V OV2 threshold setting.
TOV2 0.00 – 300.00 s 0.01 s 1.00 s OV2 definite time setting.
OV2DPR 10 - 98 % 1% 95 % OV2 DO/PU ratio setting.
[OV1EN] Off / DT / IDMT Off OV1 Enable
[OV2EN] Off / On Off OV2 Enable

 62 
 6 F 2 S 0 7 5 8

2.2.2 Phase Undervoltage Protection

GRD140 provides two independent phase undervoltage elements. UV1 programmable for inverse
time (IDMT) or definite time (DT) operation. UV2 has definite time characteristic only.
Figure 2.2.5 shows the characteristic of the undervoltage elements.

0 V

Figure 2.2.5 Characteristic of Undervoltage Elements

The undervoltage protection element UV1 has an IDMT characteristic defined by equation (2):
 
 1 
t = TMS ×  (2)

( )
1 − V Vs




where:
t = operating time for constant voltage V (seconds),
V = energising voltage (V),
Vs = undervoltage setting (V),
TMS = time multiplier setting.

The IDMT characteristic is illustrated in Figure 2.2.6.

The UV2 element is used for definite time undervoltage protection.

Definite time reset

The definite time resetting characteristic is applied to the UV1 element when the inverse time
delay is used.
If definite time resetting is selected, and the delay period is set to instantaneous, then no
intentional delay is added. As soon as the energising voltage rises above the reset threshold, the
element returns to its reset condition.
If the delay period is set to some value in seconds, then an intentional delay is added to the reset
period. If the energising voltage is below the undercurrent setting for a transient period without
causing tripping, then resetting is delayed for a user-definable period. When the energising
voltage rises above the reset threshold, the integral state (the point towards operation that it has
travelled) of the timing function (IDMT) is held for that period.
This does not apply following a trip operation, in which case resetting is always instantaneous.

 63 
 6 F 2 S 0 7 5 8

Undervoltage Inverse Time

Curves
1000.000

100.000

Operating Time (secs)

TMS = 10

10.000

TMS = 5

TMS = 2

TMS = 1

1.000
0 0.2 0.4 0.6 0.8 1
Applied Voltage (x Vs)

Figure 2.2.6 IDMT Characteristic

Scheme Logic
Figure 2.2.7 shows the scheme logic of the UV1 undervoltage protection with selective definite
time or inverse time characteristic.
The definite time protection is selected by setting [UV1EN] to “DT”, and trip signal UV1 TRIP is
given through the delayed pick-up timer TUV1. The inverse time protection is selected by setting
[UV1EN] to “IDMT”, and trip signal UV1 TRIP is given.
The UV1 protection can be disabled by the scheme switch [UV1EN] or binary input signal UV1
BLOCK.

Figure 2.2.8 shows the scheme logic of the UV2 protection with definite time characteristic. The
UV2 gives the signal UV2-ALARM through delayed pick-up timer TUV2.
The UV2-ALARM can be blocked by incorporated scheme switch [UV2EN] and the binary input
signal UV2 BLOCK.

In addition, there is a user programmable voltage threshold VBLK. If all measured phase voltages
drop below this setting, then both UV1 and UV2 are prevented from operating. This function can
be blocked by the scheme switch [VBLKEN]. The [VBLKEN] should be set to “OFF” (not used)
when the UV elements are used as fault detectors, and set to “ON” (used) when used for load
shedding.
Note: The VBLK must be set lower than any other UV setting values.
Further, these protection can be blocked when VT failure (VTF) is detected.

 64 
 6 F 2 S 0 7 5 8

TUV1
A & & t 0 UV1-A TRIP
UV1 ≥1
B
& & t 0
C UV1-B TRIP
≥1
& & t 0 UV1-C TRIP
UVBLK
& ≥1
1 0.00 - 300.00s
[VBLKEN] NON
+ UVBLK
"ON" "DT"
[UV1EN]
[UVTST] ≥1 ≥1 UV1 TRIP
+ + &
"OFF"
"IDMT"

NON VTF &

≥1
[VTF UV1-BLK]
+ &
"OFF"
UV1 BLOCK 1

Figure 2.2.7 UV1 Undervoltage Protection

TUV2
A & & t 0
UV2-A ALARM
UV2 B
C & & t 0 UV2-B ALARM

[OV2EN] & & t 0

UV2-C ALARM
+
"ON"
0.00 - 300.00s
NON BLK
≥1 UV2 ALARM
NON VTF
≥1
[VTF UV2-BLK]
+
"OFF"
UV2 BLOCK 1

Figure 2.2.8 UV2 Undervoltage Protection

Setting
The table shows the setting elements necessary for the undervoltage protection and their setting
ranges.
Element Range Step Default Remarks
UV1 5.0 – 130.0 V 0.1 V 60.0 V UV1 threshold setting
TUV1M 0.05– 100.00 0.01 1.00 UVI time multiplier setting. Required if [UV1EN] = IDMT.
TUV1 0.00 – 300.00 s 0.01 s 1.00 s UV1 definite time setting. Required if [UV1EN] = DT.
TUV1R 0.0 – 300.0 s 0.1 s 0.0 s UV1 definite time delayed reset.
UV2 5.0 – 130.0 V 0.1 V 40.0 V UV2 threshold setting.
TUV2 0.00 – 300.00 s 0.01 s 1.00 s UV2 definite time setting.
VBLK 5.0 - 20.0 V 0.1 V 10.0 V Undervoltage block threshold setting.
[UV1EN] Off / DT / IDMT DT UV1 Enable
[VTF UV1BLK] Off / On Off UV1 VTF block
[VBLKEN] Off / On Off UV block Enable
[UV2EN] Off / On Off UV2 Enable
[VTF UV2BLK] Off / On Off UV2 VTF block

 65 
 6 F 2 S 0 7 5 8

2.2.3 Zero Phase Sequence Overvoltage Protection

The zero phase sequence overvoltage protection (ZOV) is applied to earth fault detection on
unearthed, resistance-earthed system or on ac generators.
Note: Model 400; V0 is calculated from the three measured phase voltages.
Models 110 and 420; V0 is measured directly in the form of the system residual voltage.
The low voltage settings which may be applied make the ZOV element susceptible to any 3rd
harmonic component which may be superimposed on the input signal. Therefore, a 3rd harmonic
filter is provided to suppress such superimposed components.

For the earth fault detection, following two methods are in general use.
• Measuring the zero sequence voltage produced by VT residual connection (broken-delta
connection) as shown in Figure 2.2.9.
• Measuring the residual voltage across the earthing transformers as shown in Figure 2.2.10.
A B C

GRD140
V0

Figure 2.2.9 Earth Fault Detection on Unearthed System

A B

GRD140
V0

Resistor

Figure 2.2.10 Earth Fault Detection on Generator

Two independent elements ZOV1 and ZOV2 are provided. The ZOV1 element is programmable
for definite time delayed or inverse time delayed (IDMT) operation, and the ZOV2 element for
definite time delayed operation only.
The inverse time characteristic is defined by equation (3).

 66 
 6 F 2 S 0 7 5 8

 
 1 
t = TMS ×  (3)
( V ) 
 Vs − 1 

0


where:
t = operating time for constant voltage V0 (seconds),
V0 = Zero sequence voltage (V),
Vs = Zero sequence overvoltage setting (V),
TMS = time multiplier setting.

The IDMT characteristic is illustrated in Figure 2.2.11.

ZOV Overvoltage
Inverse Time Curves
1000.000

100.000
Operating Time (secs)

10.000

1.000
TMS = 10

TMS = 5

TMS = 2
0.100
TMS = 1

0.010
0 5 10 15 20

Applied Voltage (x Vs)

Figure 2.2.11 IDMT Characteristic of ZOV

 67 
 6 F 2 S 0 7 5 8

Definite time reset

A definite time reset characteristic is applied to the ZOV1 element when the inverse time delay is
used. Its operation is identical to that for the phase overvoltage protection.

Scheme Logic
Figure 2.2.12 shows the scheme logic of the zero sequence overvoltage protection. Two negative
sequence overvoltage elements ZOV1 and ZOV2 with independent thresholds output trip signals
ZOV1 TRIP and ZOV2 TRIP through delayed pick-up timers TZOV1 and TZOV2.
The tripping can be disabled by the scheme switches [ZOV1EN] and [ZOV2EN] or binary input
signals ZOV1 BLOCK and ZOV2 BLOCK.
Further, this protection can be blocked when VT failure (VTF) is detected.
TZOV1
ZOV1 t 0
& &
≥1 ZOV1 TRIP
"DT" 0.00 - 300.00s
[ZOV1EN] ≥1
+ &
"IDMT"

ZOV1 BLOCK 1
&
NON VTF
[VTF ZV1-BLK]
+
"OFF"
TZOV2
ZOV2 & & t 0 ZOV2 ALARM
[ZOV2EN]
0.00 - 300.00s
+
"ON"

ZOV2 BLOCK 1
&
[VTF ZV2-BLK]
+
"OFF"

Figure 2.2.12 Zero Sequence Overvoltage Protection

Setting
The table below shows the setting elements necessary for the zero sequence overvoltage
protection and their setting ranges.
Element Range Step Default Remarks
ZOV1 1.0 - 130.0 V 0.1V 20.0 V ZOV1 threshold setting (V0) for tripping.
ZOV2 1.0 - 130.0 V 0.1V 40.0 V ZOV2 threshold setting (V0) for alarming.
TZOV1P 0.05 – 100.00 0.01 1.00 ZOV1 time multiplier setting. Required if [ZOV1EN]=IDMT.
TZOV1D 0.00 – 300.00 s 0.01 s 1.00 s ZOV1 definite time setting. Required if [ZOV1EN]=DT.
TZOV1R 0.0 – 300.0 s 0.1 s 0.0 s ZOV1 definite time delayed reset.
TZOV2 0.00 – 300.00 s 0.01 s 1.00 s ZOV2 definite time setting
[ZOV1EN] Off / DT/IDMT DT ZOV1 Enable
[VTF ZV1BLK] Off / On Off ZOV1 VTF block
[ZOV2EN] Off / On Off ZOV2 Enable
[VTF ZV2BLK] Off / On Off ZOV2 VTF block

 68 
 6 F 2 S 0 7 5 8

2.2.4 Negative Phase Sequence Overvoltage Protection

The negative phase sequence overvoltage protection is used to detect voltage unbalance
conditions such as reverse-phase rotation, unbalanced voltage supply etc.
The NOV protection is applied to protect three-phase motors from the damage which may be
caused by the voltage unbalance. Unbalanced voltage supply to motors due to a phase loss can
lead to increases in the negative sequence voltage.
The NOV protection is also applied to prevent the starting of the motor in the wrong direction, if
the phase sequence is reversed.
Two independent elements NOV1 and NOV2 are provided. The NOV1 element is programmable
for definite time delayed or inverse time delayed (IDMT) operation, and the NOV2 element for
definite time delayed operation only.
The inverse time characteristic is defined by equation (4).
 
 1 
t = TMS ×  (4)
( ) 
 V 2 Vs − 1
 

where:
t = operating time for constant voltage V2 (seconds),
V2 = Negative sequence voltage (V),
Vs = Negative sequence overvoltage setting (V),
TMS = time multiplier setting.

The IDMT characteristic is illustrated in Figure 2.2.13.

NOV Overvoltage
Inverse Time Curves
1000.000

100.000
Operating Time (secs)

10.000

1.000
TMS = 10

TMS = 5

TMS = 2
0.100
TMS = 1

0.010
0 5 10 15 20

Applied Voltage (x Vs)

Figure 2.2.13 IDMT Characteristic of NOV

 69 
 6 F 2 S 0 7 5 8

Definite time reset

A definite time reset characteristic is applied to the NOV1 element when the inverse time delay is
used. Its operation is identical to that for the phase overvoltage protection.

Scheme Logic
Figure 2.2.14 shows the scheme logic of the negative sequence overvoltage protection. Two
negative sequence overvoltage elements NOV1 and NOV2 with independent thresholds output
trip signals NOV1 TRIP and NOV2 TRIP through delayed pick-up timers TNOV1 and TNOV2.
The tripping can be disabled by the scheme switches [NOV1EN] and [NOV2EN] or binary input
signals NOV1 BLOCK and NOV2 BLOCK.
Further, this protection can be blocked when VT failure (VTF) is detected.
TNOV1
NOV1 t 0
& &
≥1 NOV1 TRIP
"DT" 0.00 - 300.00s
[NOV1EN] ≥1
+ &
"IDMT"

NOV1 BLOCK 1
&
NON VTF
[VTF NV1-BLK]
+
"OFF"
TNOV2
NOV2 & & t 0 NOV2 ALARM
[NOV2EN]
0.00 - 300.00s
+
"ON"

NOV2 BLOCK 1
&
[VTF NV2-BLK]
+
"OFF"

Figure 2.2.14 Negative Sequence Overvoltage Protection

Setting
The table below shows the setting elements necessary for the negative sequence overvoltage
protection and their setting ranges.
The delay time setting TNOV1 and TNOV2 is added to the inherent delay of the measuring
elements NOV1 and NOV2. The minimum operating time of the NOV elements is around 200ms.
Element Range Step Default Remarks
NOV1 1.0 - 130.0 V 0.1V 20.0 V NOV1 threshold setting for tripping.
NOV2 1.0 - 130.0 V 0.1V 40.0 V NOV2 threshold setting for alarming.
TNOV1P 0.05 – 100.00 0.01 1.00 NOV1 time multiplier setting. Required if [NOV1EN]=IDMT.
TNOV1D 0.00 – 300.00 s 0.01 s 1.00 s NOV1 definite time setting. Required if [NOV1EN]=DT.
TNOV1R 0.0 – 300.0 s 0.1 s 0.0 s NOV1 definite time delayed reset.
TNOV2 0.00 – 300.00 s 0.01 s 1.00 s NOV2 definite time setting
[NOV1EN] Off / DT/IDMT Off NOV1 Enable
[NOV2EN] Off / On Off NOV2 Enable

 70 
 6 F 2 S 0 7 5 8

2.3 Frequency Protection

For a four-stage frequency protection, GRD140 incorporates dedicated frequency measuring
elements and scheme logic for each stage. Each stage is programmable for underfrequency or
overfrequency protection.
Underfrequency protection is provided to maintain the balance between the power generation
capability and the loads. It is also used to maintain the frequency within the normal range by load
shedding.
Overfrequency protection is typically applied to protect synchronous machines from possible damage
due to overfrequency conditions.

Frequency element
Underfrequency element UF operates when the power system frequency falls under the setting
value.
Overfrequency element OF operates when the power system frequency rises over the setting
value.
These elements measure the frequency and check for underfrequency or overfrequency every 5
ms. They operate when the underfrequency or overfrequency condition is detected 16 consecutive
times.
Both UF and OF elements output is invalidated by undervoltage block element (FVBLK)
operation during undervoltage condition.
Figure 2.3.1 shows characteristics of UF and OF elements.

Hz
OF

OF setting

UF setting

UF

0 V
FVBLK setting

Figure 2.3.1 Underfrequency and Overfrequency Element

Scheme Logic
Figure 2.3.2 shows the scheme logic of frequency protection in stage 1. The frequency element
FRQ1 can output a trip command under the condition that the system voltage is higher than the
setting of the undervoltage element FVBLK (FVBLK=1). The FRQ1 element is programmable for
underfrequency or overfrequency operation by the scheme switch [FRQ1EN].
The tripping can be disabled by the scheme switches [FRQ1EN].
The stage 2 (FRQ2) to stage 4 (FRQ4) are the same logic of FRQ1

 71 
 6 F 2 S 0 7 5 8

TFRQ1
t 0
OF FRQ1 TRIP
FRQ1 & ≥1 & &
0.00 - 100.00s
1
UF
&
TFRQ2
t 0
OF FRQ2 TRIP
FRQ2 & ≥1 & &
0.00 - 100.00s
1
UF
&
TFRQ3
t 0
OF FRQ3 TRIP
FRQ3 & ≥1 & &
0.00 - 100.00s
1
UF
&
TFRQ4
t 0
OF FRQ4 TRIP
FRQ4 & ≥1 & &
0.00 - 100.00s
1
UF
&

FVBLK 1

[FRQ1EN] "OF"
"UF" ≥1
+
[FRQ2EN] "OF"
"UF" ≥1
+
[FRQ3EN] "OF"
"UF" ≥1
+
[FRQ4EN] "OF"
"UF" ≥1
+

FRQ1 BLOCK 1

FRQ2 BLOCK 1

FRQ3 BLOCK 1

FRQ4 BLOCK 1

Figure 2.3.2 Scheme Logic of Frequency Protection

Setting
The setting elements necessary for the frequency protection and their setting ranges are shown in
the table below.
Element Range Step Default Remarks
FRQ1 -10.00 – +10.00 Hz 0.01 Hz -1.00 Hz FRQ1 frequency element setting
TFRQ1 0.00 – 300.00 s 0.01 s 1.00 s Timer setting of FRQ1
FRQ2 -10.00 – +10.00 Hz 0.01 Hz -1.00 Hz FRQ2 frequency element setting
TFRQ2 0.00 – 300.00 s 0.01 s 1.00 s Timer setting of FRQ2
FRQ3 -10.00 – +10.00 Hz 0.01 Hz -1.00 Hz FRQ3 frequency element setting
TFRQ3 0.00 – 300.00 s 0.01 s 1.00 s Timer setting of FRQ3
FRQ4 -10.00 – +10.00 Hz 0.01 Hz -1.00 Hz FRQ4 frequency element setting
TFRQ4 0.00 – 300.00 s 0.01 s 1.00 s Timer setting of FRQ4
FVBLK 40.0 – 100.0 V 0.1 V 40.0 V UV block setting
FRQ1EN Off / OF / UF Off FRQ1 Enable
FRQ2EN Off / OF / UF Off FRQ2 Enable
FRQ3EN Off / OF / UF Off FRQ3 Enable
FRQ4EN Off / OF / UF Off FRQ4 Enable

 72 
 6 F 2 S 0 7 5 8

2.4 Trip and Alarm Signal Output

GRD140 provides various trip and alarm signal outputs such as three-phase and single-phase trip
and alarm of each protection. Figures 2.4.1 and 2.4.2 show gathered trip and alarm signals of each
protection.
GRD140 provides 8 auxiliary relays for binary outputs as described in Section 3.2.7 of the
auxiliary relays can be assigned to any protection outputs.
After the trip signal disappears by clearing the fault, the reset time of the tripping output relay can
be programmed. The setting is respective for each output relay.
When the relay is latched, it can be reset with the RESET key on the relay front panel or a binary
input. This resetting resets all the output relays collectively.
In the tripping output relay, it must be checked that the tripping circuit is opened with a circuit
breaker auxiliary contact prior to the tripping output relay resetting, in order to prevent the
tripping output relay from directly interrupting the circuit breaker tripping coil current.

OC1 TRIP
OC2 TRIP
OC3 TRIP ≥1
EF1 TRIP
EF2 TRIP
EF3 TRIP ≥1 GEN. TRIP

SEF1-S1 TRIP
SEF2 TRIP ≥1
SEF3 TRIP
NOC1 TRIP

UC1 TRIP
≥1
THM TRIP
BCD TRIP

OV1 TRIP
UV1 TRIP ≥1
ZOV1 TRIP
NOV1 TRIP

OC4 ALARM
≥1
EF4 ALARM

SEF4 ALARM
≥1
NOC2 ALARM ≥1 GEN. ALARM

UC2 ALARM
≥1
THM ALARM

OV2 ALARM
UV2 ALARM ≥1
ZOV2 ALARM
NOV2 ALARM

FRQ1 TRIP
FRQ2 TRIP ≥1 FRQ. TRIP
FRQ3 TRIP
FRQ4 TRIP

Figure 2.4.1 Three-phase Output

 73 
 6 F 2 S 0 7 5 8

OC1-A TRIP
≥1 ≥1
OC2-A TRIP GEN. TRIP-A
≥1
OC3-A TRIP
UC1-A TRIP
OV1-A TRIP ≥1
UV1-A TRIP

OC1-B TRIP
≥1 ≥1
OC2-B TRIP GEN. TRIP-B
≥1
OC3-B TRIP
UC1-B TRIP
OV1-B TRIP ≥1
UV1-B TRIP

OC1-C TRIP
≥1 ≥1
OC2-C TRIP GEN. TRIP-C
≥1
OC3-C TRIP
UC1-C TRIP
OV1-C TRIP ≥1
UV1-C TRIP

EF1 TRIP
≥1 GEN. TRIP-N
EF2 TRIP ≥1
EF3 TRIP
SEF1-S1 TRIP
≥1
SEF2 TRIP
SEF3 TRIP
ZOV1 TRIP

OC4-A ALARM ≥1 GEN. ALARM-A

UC2-A ALARM ≥1
OV2-A ALARM ≥1
UV2-A ALARM

OC4-B ALARM ≥1 GEN. ALARM-B

UC2-B ALARM ≥1
OV2-B ALARM ≥1
UV2-B ALARM

OC4-C ALARM ≥1 GEN. ALARM-C

UC2-C ALARM ≥1
OV2-C ALARM ≥1
UV2-C ALARM

EF4 ALARM
≥1 GEN. ALARM-N
SEF4 ALARM
ZOV2 ALARM

Figure 2.4.2 Single-phase Output

 74 
 6 F 2 S 0 7 5 8

2.5 Autoreclose
The GRD140 provides a multi-shot (five shots) autoreclosing scheme applied for one-circuit
breaker:
• Three phase autoreclosing scheme for all shots
• Autoreclosing counter
The autoreclosing (ARC) can be initialized by OC1 to OC4, EF1 to EF4, SEF1-S1 to SEF4 trip
signals or external trip signals via binary inputs, as determined by scheme switches [∗∗∗∗-INIT].
Trip signals are selected to be used or not used for ARC, by setting [∗∗∗∗-INIT] to “On” or “NA”
respectively. If a trip signal is used to block ARC, then [∗∗∗∗-INIT] is set to “BLK”. ARC can also
be blocked by binary input signal ARC BLOCK.
Three-phase autoreclosing is provided for all shots, regardless of whether the fault is single-phase
or multi-phase. Autoreclosing can be programmed to provide any number of shots, from one to
five. In each case, if the first shot fails, then all subsequent shots apply three-phase tripping and
reclosing.
To disable autoreclosing, scheme switch [ARCEN] is set to "Off".

2.5.1 Scheme Logic

Figure 2.5.1 shows the simplified scheme logic for the autoreclose. Autoreclose becomes ready
when the circuit breaker is closed and ready for autoreclose (CB READY=1), the on-delay timer
TRDY is picked up, and the [ARCEN] is set to "ON". TRDY is used to determine the reclaim time.
If the autoreclose is ready, then reclosing is activated by ARC INIT. ARC INIT is programmed
from tripping commands of the various protections by scheme switches [∗∗∗∗-INIT]. Further, the
external tripping command signal EXT TRIP-APH, EXT TRIP-BPH, EXT TRIP-CPH or EXT
TRIP-3PH can also activate the autoreclose via binary inputs.
Once autoreclose is activated, it is maintained by a flip-flop circuit until one reclosing cycle is
completed.

Multi-shot autoreclose
Regardless of the tripping mode, three-phase reclose is performed. If the [ARCEN] is set to "On",
the dead time counter TD1 for three-phase reclosing is started. After the dead time has elapsed,
reclosing command ARC-SHOT is initiated.
Multi-shot autoreclose can be executed up to four times after the first-shot autoreclose fails. The
multi-shot mode, one to five shots, is set with the scheme switch [ARC∗-NUM].
During multi-shot reclosing, the dead time counter TD2 for the second shot is activated if the first
shot autoreclose is performed, but tripping occurs again. Second shot autoreclose is performed
after the period of time set on TD2 has elapsed. At this time, outputs of the step counter are: SP1 =
1, SP2 = 0, SP3 = 0, SP4 = 0 and SP5 = 0.
Autoreclose is completed at this step if the two shots mode is selected for the multi-shot mode. In
this case, tripping following a "reclose-onto-a-fault" becomes the final trip (ARC FT = 1).
If three shot mode is selected for the multi-shot mode, autoreclose is further retried after the above
tripping occurs. At this time, the T1S3 is started. The third shot autoreclose is performed after the
period of time set on the TD3 has elapsed. At this time, outputs of the step counter are: SP1 = 0,
SP2 = 1, SP3 = 0, SP4 = 0 and SP5 = 0.
The three shot mode of autoreclose is then completed, and tripping following a
"reclose-onto-a-fault" becomes the final trip (ARC FT = 1).

 75 
 6 F 2 S 0 7 5 8

When four or five shot autoreclose is selected, autoreclose is further retried once again for tripping
that occurs after "reclose-onto-a-fault". This functions in the same manner as the three shot
autoreclose.
If a fault occurs under the following conditions, the final trip is performed and autoreclose is
blocked.
• Reclosing block signal is applied.
• During the reclaim time
STEP COUNTER
SP1
Coordination CLK SP2
≥1
SP3
SP4
TRDY SP5
t 0 TD1
ARC READY S ARC-SHOT1
& & F/F & S t 0 TW
0.0-600.0s R F/F ≥1 ARC-SHOT
[ARCEN] R 0.01-300.00s ≥1
+ SP1 0.01-10.00s
"ON"
ARC-SHOT1
ARC INIT (Trip command)
≥1
TD2 ARC-SHOT2
EXT TRIP & S
t 0
≥1 F/F
R 0.01-300.00s
ARC-SUCCESS SP2
ARC-SHOT2
ARC-FT
TD3 ARC-SHOT3
& S t 0
F/F
R 0.01-300.00s
TRSET SP3
t 0 ARC-SHOT3
CB CLOSE & ≥1
0.01-300.00s
TD4 ARC-SHOT4
& S t 0
& F/F
R 0.01-300.00s
TARCP SP4
t 0 ARC-SHOT4

0.01-300.00s
TD5 ARC-SHOT5
& S
t 0
F/F
R 0.01-300.00s
SP5
TRCOV ARC-SHOT5
0 t
1
&
0.1-600.0s
MANUAL CLOSE

Figure 2.5.1 Autoreclose Scheme Logic

2.5.2 Sequence Coordination

Co-ordination is maintained between the autoreclose sequences of adjacent relays on a feeder.

This means that a relay will register the flow of fault current and increment through its autoreclose
sequence even if another relay actually carries out the tripping and reclosing operations. This
function is initiated by the operation of OC, EF or SEF element, and can be disabled by the scheme
switch [COORD-OC], [COORD-EF] or [COORD-SE].
The reclose shot number at the local terminal A is coordinated with that at the adjacent terminal B
as shown in Figure 2.5.2.
A B Fault

GRD140 GRD140

Figure 2.5.2 Sequence Coordination

 76 
 6 F 2 S 0 7 5 8

2.5.3 Setting

The setting elements necessary for the autoreclose and their setting ranges are shown in the table
below.
Element Range Step Default Remarks
ARC
TRDY 0.0 – 600.0 s 0.1 s 60.0 s Reclaim time
TD1 0.01 – 300.00 s 0.01 s 10.00 s 1st shot dead time for Stage 1
TD2 0.01 – 300.00 s 0.01 s 10.00 s 2nd shot dead time for Stage 1
TD3 0.01 – 300.00 s 0.01 s 10.00 s 3rd shot dead time for Stage 1
TD4 0.01 – 300.00 s 0.01 s 10.00 s 4th shot dead time for Stage 1
TD5 0.01 – 300.00 s 0.01 s 10.00 s 5th shot dead time for Stage 1
TW 0.01 – 10.00 s 0.01 s 2.00 s Output pulse time
TSUC 0.1 – 600.0 s 0.1 s 3.0 s Autoreclose succeed judgement time
TRCOV 0.1 – 600.0 s 0.1 s 10.0 s Autoreclose recovery time after final trip
TARCP 0.1 – 600.0 s 0.1 s 10.0 s Autoreclose pause time after manually closing
TRSET 0.01 – 300.00 s 0.01 s 3.00 s Autoreclose reset time
[ARCEN] Off/On On Autoreclose enable
[ARC-NUM] S1/S2/S3/S4/S5 S1 Autoreclosing shot number
[OC1-INIT] NA/A1/A2/BLK A1 Autoreclose initiation by OC1
[OC2-INIT] NA/A1/A2/BLK NA Autoreclose initiation by OC2
[OC3-INIT] NA/A1/A2/BLK NA Autoreclose initiation by OC3
[OC4-INIT] NA/A1/A2/BLK NA Autoreclose initiation by OC4
[EF1-INIT] NA/A1/A2/BLK NA Autoreclose initiation by EF1
[EF2-INIT] NA/A1/A2/BLK NA Autoreclose initiation by EF2
[EF3-INIT] NA/A1/A2/BLK NA Autoreclose initiation by EF3
[EF4-INIT] NA/A1/A2/BLK NA Autoreclose initiation by EF4
[SE1-INIT] NA/A1/A2/BLK NA Autoreclose initiation by SE1
[SE2-INIT] NA/A1/A2/BLK NA Autoreclose initiation by SE2
[SE3-INIT] NA/A1/A2/BLK NA Autoreclose initiation by SE3
[SE4-INIT] NA/A1/A2/BLK NA Autoreclose initiation by SE4
[EXT-INIT] NA/A1/A2/BLK NA Autoreclose initiation by external trip command
[COORD-OC] Off/On Off OC relay for Co-ordination
[COORD-EF] Off/On Off EF relay for Co-ordination
[COORD-SE] Off/On Off SE relay for Co-ordination
OC 0.2 − 250.0 A 0.1 A 5.0 A OC for co-ordination
(0.04 − 50.00 A) (*) (0.01 A) (1.00 A)
EF 0.2 − 250.0 A 0.1 A 1.5 A EF for co-ordination
(0.04 − 50.00 A) (0.01 A) (0.30 A)
SEF 0.025 − 0.125 A 0.01 A 0.050 A SEF for co-ordination
(0.005 − 0.025 A) (0.01 A) (0.010 A)
(*) Current values shown in the parenthesis are in the case of a 1 A rating. Other current values are in
the case of a 5 A rating.
To determine the dead time, it is essential to find an optimal value while taking factors,
de-ionization time and power system stability, into consideration which normally contradict each
other.
Normally, a longer de-ionization time is required as for a higher line voltage or larger fault current.
For three-phase autoreclose, the dead time is generally 15 to 30 cycles.

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3. Technical Description
3.1 Hardware Description
3.1.1 Outline of Hardware Modules

The case outline of GRD140 is shown in Appendix F.

The hardware structure of GRD140 is shown in Figure 3.1.1.
The GRD140 relay unit consists of the following hardware modules. These modules are fixed in a
frame and cannot be taken off individually. The human machine interface module is provided with
the front panel.
• Power module (POWD)
• Signal processing module (SPMD)
• Human machine interface module (HMI)
The hardware block diagram of GRD140 is shown in Figure 3.1.2.

SPMD

POWD

HMI

IN SERVICE VIEW
TRIP
ALARM

RESET

A B 0V
CAN
CEL ENTER
Handle for relay END
withdrawal

Figure 3.1.1 Hardware Structure without Case

 78 
 6 F 2 S 0 7 5 8

POWD SPMD
DC
supply DC/DC
Converter

Binary Photo-coupler
input × 5 or 8

Auxiliary relay Binary output

AC input Analogue Multi- A/D
CT × 4 ×8 (Trip
I, V filter plexer converter MPU
(Max) command etc.)
VT x 4
(Max) Relay
RS485 setting and
RAM ROM Transceiver monitoring
× 1 or 2 system
or
IEC60870-5
-103

Human machine
Interface (HMI)

Liquid crystal display

16 characters × 2 lines

LEDs Operation keys

Local
personal RS232C Monitoring
computer I/F jacks

Figure 3.1.2 Hardware Block Diagram

POWD Module
The POWD module insulates between the internal and external circuits through an auxiliary
transformer and transforms the magnitude of AC input signals to suit the electronic circuits. The
AC input signals may be one to three phase currents and a residual current depending on the relay
model.
This module incorporates max. 4 auxiliary CTs and max. 4 VTs, DC/DC converter and 5 or 8
photo-coupler circuits for binary input signals.
The available input voltage ratings of the DC/DC converter are, 48V, 110V/125V or 220/250V.
The normal range of input voltage is −20% to +20%.

SPMD Module
The SPMD module consists of analogue filter, multiplexer, analogue to digital (A/D) converter,
main processing unit (MPU), random access memory (RAM) and read only memory (ROM) and
executes all kinds of processing such as protection, measurement, recording and display.
The analogue filter performs low-pass filtering for the corresponding current signals.
The A/D converter has a resolution of 12 bits and samples input signals at sampling frequencies of
2400 Hz (at 50 Hz) and 2880 Hz (at 60 Hz).
The MPU implements more than 240 MIPS and uses a RISC (Reduced Instruction Set Computer)
type 32-bit microprocessors.

 79 
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The SPMD module also incorporates 8 auxiliary relays (BO1-BO7 and FAIL) for binary output
signals and an RS485 transceiver.
BO1 to BO6 are user configurable output signals and have one normally open and one normally
closed contact. BO7 is also a user-configurable output signal and has one normally open contact.
The auxiliary relay FAIL has one normally open and one normally closed contacts, and operates
when a relay failure or abnormality in the DC circuit is detected.
The RS485 transceiver is used for the link with the relay setting and monitoring (RSM) system or
IEC60870-5-103 communication. The external signal is isolated from the relay’s internal circuits.

Human Machine Interface (HMI) Module

The operator can access the GRD140 via the human machine interface (HMI) module. As shown
in Figure 3.1.3, the HMI panel has a liquid crystal display (LCD), light emitting diodes (LED),
view and reset keys, operation keys, monitoring jacks and an RS232C connector on the front
panel.
The LCD consists of 16 columns by 2 rows with a back-light and displays recording, status and
setting data.
There are a total of 6 LED indicators and their signal labels and LED colors are defined as follows:
Label Color Remarks
IN SERVICE Green Lit when the relay is in service and flickered when the relay is in “Test” menu.
TRIP Red Lit when a trip command is issued.
ALARM Red Lit when a failure is detected.
(LED1) Yellow
(LED2) Yellow
(LED3) Yellow

LED1, LED2 and LED3 are user-configurable. Each is driven via a logic gate which can be
programmed for OR gate or AND gate operation. Further, each LED has a programmable reset
characteristic, settable for instantaneous drop-off, or for latching operation. A configurable LED
can be programmed to indicate the OR combination of a maximum of 16 elements, the individual
statuses of which can be viewed on the LCD screen as “Virtual LEDs.”
The TRIP LED and an operated LED if latching operation is selected, must be reset by user, either
by pressing the RESET key, by energising a binary input which has been programmed for
‘Remote Reset’ operation, or by a communications command. Other LEDs operate as long as a
signal is present. The RESET key is ineffective for these LEDs.

The VIEW key starts the LCD indication and switches between windows. The RESET key
clears the LCD indication and turns off the LCD back-light.
The operation keys are used to display the record, status and setting data on the LCD, input the
settings or change the settings.
The monitoring jacks and two pairs of LEDs, A and B, on top of the jacks can be used while the
test mode is selected in the LCD window. Signals can be displayed on LED A or LED B by
selecting the signal to be observed from the "Signal List" and setting it in the window and the
signals can be transmitted to an oscilloscope via the monitoring jacks. (For the "Signal List", see
Appendix C.)
The RS232C connector is a 9-way D-type connector for serial RS232C connection. This
connector is used for connection with a local personal computer.

 80 
 6 F 2 S 0 7 5 8

Screw for cover

Liquid crystal
display
IN SERVICE VIEW
TRIP
Light emitting ALARM

diodes (LED)
RESET

Operation keys

Light emitting
diodes (LED)
A B 0V CAN
Monitoring Jacks CEL ENTER

RS232C connector END

To a local PC
Screw for handle Screw for cover

Figure 3.1.3 Front Panel

 81 
 6 F 2 S 0 7 5 8

3.2 Input and Output Signals

3.2.1 AC Input Signals

Table 3.2.1 shows the AC input signals necessary for the GRD140 model and their respective
input terminal numbers. Model 400 and 420 depend on their scheme switch [APPL] setting.

Table 3.2.1 AC Input Signals

Term. [APPL-CT] setting [APPL-VT] setting

No. 3P 2P 1P (Model 110) 3PN 3PV Model 110
TB1 A phase A phase --- --- --- Residual
1-2 current Ia current Ia voltage Ve
TB1 B phase C phase --- --- --- ---
3-4 current Ib current Ic
TB1 C phase Residual Residual current --- --- ---
5-6 current Ic current Ie Ie
TB1 Residual Zero Zero sequence --- --- ---
7-8 current Ie sequence current Ise(*)
or current Ise(*)
Zero sequence
current Ise(*)

TB2 --- --- --- A phase A phase ---

A1-B2 voltage Va voltage Va
TB2 --- --- --- B phase B phase ---
B1-B2 voltage Vb voltage Vb
TB2 --- --- --- C phase C phase ---
A2-B2 voltage Vc voltage Vc
TB2 --- --- --- --- Residual ---
A3-B3 voltage Ve
(*): Ise required for SEF elements. In the model 420 and [APPL-CT]=3P, the residual current is
calculated by Ia , Ib and Ic.

3.2.2 Binary Input, Output Signals

The GRD140 provides eight programmable binary input circuits. Each binary input circuit is
programmable, and provided with the function of Logic level inversion and Function selection.

Logic level inversion

The binary input circuit of the GRD140 is provided with a logic level inversion function and a
pick-up and drop-off delay timer function as shown in Figure 3.2.1. Each input circuit has a binary
switch BISNS which can be used to select either normal or inverted operation. This allows the
inputs to be driven either by normally open or normally closed contacts. Where the driving contact
meets the contact conditions then the BISNS can be set to “Norm” (normal). If not, then “Inv”
(inverted) should be selected. The pick-up and drop-off delay times can be set 0.0 to 300.00s
respectively.
Logic level inversion function, and pick-up and drop-off delay timer settings are as follow:
Element Contents Range Step Default
BI1SNS - BI8SNS Binary switch Norm/ Inv Norm
BI1PUD - BI8PUD Delayed pick-up timer 0.00 - 300.00s 0.01s 0.00
BI1DOD - BI8DOD Delayed drop-off timer 0.00 - 300.00s 0.01s 0.00

 82 
 6 F 2 S 0 7 5 8

The operating voltage of binary input signal is typical 74V DC at 110V/125V DC rating and 138V
DC at 220/250V DC. The minimum operating voltage is 70V DC at 110/125V DC rating and
125V DC at 220/250V DC.
GRD140
(+) (−) BI1PUD BI1DOD [BI1SNS]
BI1 t 0 0 t
BI1 command
BI1
"Norm"
1
"Inv"
BI2PUD BI2DOD [BI2SNS]
BI2 t 0 0 t
BI2 command
BI2
"Norm"
1
"Inv"

BI8PUD BI8DOD [BI8SNS]

BI8 t 0 0 t
BI8 BI8 command
"Norm"
1
"Inv"

0V

Figure 3.2.1 Logic Level Inversion

Function selection
The input signals BI1 COMMAND to BI5 COMMAND or to BI8 COMMAND are used for the
functions listed in Table 3.2.2. Each input signal can be allocated for one or some of those
functions by setting. For the setting, refer to Section 4.2.6.8.
The Table also shows the signal name corresponding to each function used in the scheme logic and
LCD indication and driving contact condition required for each function.
[OC1BLK]
BI1 COMMAND OC1 BLOCK
"ON"
[OC2BLK]
OC2 BLOCK
"ON"
[OC3BLK]
OC3 BLOCK
"ON"

[Alarm4]
Alarm 4
"ON"
Figure 3.2.2 Function Scheme Logic

The logic of BI2 COMMAND to BI8 COMMAND are the same as that of BI1 COMMAND as
shown in Figure 3.2.2.

 83 
 6 F 2 S 0 7 5 8

Table 3.2.2 Function of Binary Input Signals

Functions Signal Names (*1) Driving Contact Condition

Change active setting Group 1 SET.GROUP1 Closed to change the setting to Group 1
Change active setting Group 2 SET.GROUP2 Closed to change the setting to Group 2
Change active setting Group 3 SET.GROUP3 Closed to change the setting to Group 3
Change active setting Group 4 SET.GROUP4 Closed to change the setting to Group 4
OC1 protection block OC1 BLOCK / OC1BLK Closed to block OC1
OC2 protection block OC2 BLOCK / OC2BLK Closed to block OC2
OC3 protection block OC3 BLOCK / OC3BLK Closed to block OC3
OC4 protection block OC4 BLOCK / OC4BLK Closed to block OC4
EF1 protection block EF1 BLOCK / EF1BLK Closed to block EF1
EF2 protection block EF2 BLOCK / EF2BLK Closed to block EF2
EF3 protection block EF3 BLOCK / EF3BLK Closed to block EF3
EF4 protection block EF4 BLOCK / EF4BLK Closed to block EF4
EF1 protection permission EF1 PERMIT Closed to permit EF1
EF2 protection permission EF2 PERMIT Closed to permit EF2
EF3 protection permission EF3 PERMIT Closed to permit EF3
EF4 protection permission EF4 PERMIT Closed to permit EF4
SEF1 protection block SEF1 BLOCK / SEF1BLK Closed to block SEF1
SEF2 protection block SEF2 BLOCK / SEF2BLK Closed to block SEF2
SEF3 protection block SEF3 BLOCK / SEF3BLK Closed to block SEF3
SEF4 protection block SEF4 BLOCK / SEF4BLK Closed to block SEF4
UC1 protection block UC1 BLOCK / UC1BLK Closed to block UC1
UC2 protection block UC2 BLOCK / UC1BLK Closed to block UC2
THM protection block THM BLOCK / THMBLK Closed to block THM
THMA protection block THMA BLOCK / THMABLK Closed to block THMA
NOC1 protection block NOC1 BLOCK / NC1BLK Closed to block NOC1
NOC2 protection block NOC2 BLOCK / NC1BLK Closed to block NOC2
BCD protection block BCD BLOCK / BCDBLK Closed to block BCD
CBF protection block CBF BLOCK / CBFBLK Closed to block CBF
OV1 protection block OV1 BLOCK / OV1BLK Closed to block OV1
OV2 protection block OV2 BLOCK / OV2BLK Closed to block OV2
UV1 protection block UV1 BLOCK / OV1BLK Closed to block UV1
UV2 protection block UV2 BLOCK / OV2BLK Closed to block UV2
ZOV1 protection block ZOV1 BLOCK / ZOV1BLK Closed to block ZOV1
ZOV2 protection block ZOV2 BLOCK / ZOV2BLK Closed to block ZOV2
NOV1 protection block NOV1 BLOCK / NOV1BLK Closed to block NOV1
NOV2 protection block NOV2 BLOCK / NOV2BLK Closed to block NOV2
FRQ1 protection block FRQ1 BLOCK / FRQ1BLK Closed to block FRQ1
FRQ2 protection block FRQ2 BLOCK / FRQ1BLK Closed to block FRQ2
FRQ3 protection block FRQ3 BLOCK / FRQ1BLK Closed to block FRQ3
FRQ4 protection block FRQ4 BLOCK / FRQ1BLK Closed to block FRQ4
Autoreclose (ARC) scheme block ARC BLOCK / ARCBLK Closed to block ARC

 84 
 6 F 2 S 0 7 5 8

Functions Signal Names (*1) Driving Contact Condition

ARC ready ARC READY / ARCRDY Closed when CB is closed and gas pressure is
sufficient.
ARC initiation ARC INIT / ARCINI Closed to initiate ARC
Manual close MANUAL CLOSE / MNLCLS Closed to close CB manually.
ARC not applied ARC N/A / ARCNA Closed not to apply ARC scheme
CTF function block CTF BLOCK / CTFBLK Closed to block CTF function
External CTF EXT CTF / CTFEXT Closed to block a protection
VTF function block VTF BLOCK / VTFBLK Closed to block VTF function
External VTF EXT VTF / VTFEXT Closed to block a protection
Trip circuit supervision TC FAIL / TCFALM Trip circuit failure alarm
State transition for cold load CB CONT OPN / CBOPN CB normally open contact
protection, trip supervision and CB
monitoring
CB monitoring CB CONT CLS / CBCLS CB normally closed contact.
Breaker failure protection initiate EXT TRIP-3PH / EXT3PH External trip - 3 phase.
Breaker failure protection initiate EXT TRIP-APH / EXTAPH External trip - A phase.
Breaker failure protection initiate EXT TRIP-BPH / EXTBPH External trip - B phase
Breaker failure protection initiate EXT TRIP-CPH / EXTCPH External trip - C phase
Indication remote reset REMOTE RESET / RMTRST Closed to reset TRIP LED indication and latch of
binary output relays
Synchronise clock SYNC CLOCK / SYNCLK Synchronise clock
Disturbance record store STORE RECORD / STORCD Closed to store the record
Alarm 1 Alarm 1 / Alarm1 Closed to display Alarm 1 text.
Alarm 2 Alarm 2 / Alarm2 Closed to display Alarm 2 text.
Alarm 3 Alarm 3 / Alarm3 Closed to display Alarm 3 text.
Alarm 4 Alarm 4 / Alarm4 Closed to display Alarm 4 text.
(*1) : Signal names are those used in the scheme logic / LCD indication.

The binary input signals can be programmed to switch between four settings groups.
Element Contents Range Step Default
BI1SGS – BI8SGS Setting group selection OFF / 1 / 2 / 3 / 4 OFF

Four alarm messages can be set. The user can define a text message within 16 characters for each
alarm. The messages are valid for any of the input signals BI1 to BI8 by setting. Then when inputs
associated with that alarm are raised, the defined text is displayed on the LCD.

 85 
 6 F 2 S 0 7 5 8

3.2.3 Binary Output Signals

The number of binary output signals and their output terminals are as shown in Appendix G. All
outputs, except the relay failure signal, can be configured.
The signals shown in the signal list in Appendix C can be assigned to the output relays BO1 to
BO7 individually or in arbitrary combinations. Signals can be combined using either an AND
circuit or OR circuit with 4 gates each as shown in Figure 3.2.3. The output circuit can be
configured according to the setting menu. Appendix H shows the factory default settings.
Further, each BO has a programmable reset characteristic, settable for instantaneous drop-off
“Ins”, for delayed drop-off “Dl”, for dwell operation “Dw” or for latching operation “Lat” by the
scheme switch [RESET]. The time of the delayed drop-off “Dl” or dwell operation “Dw” can be
set by TBO.
The relay failure contact closes when a relay defect or abnormality in the DC power supply circuit
is detected.

Signal List

& Auxiliary relay

4 GATES
Appendix B
or ≥1

≥1
4 GATES TBO

&

0 t
&
[RESET] "Dw" 0.00 – 10.00s
+ "Dl"
& S
F/F
"Lat"
R

Reset button
+
≥1

REMOTE RESET

Figure 3.2.3 Configurable Output

 86 
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3.3 Automatic Supervision

3.3.1 Basic Concept of Supervision

Though the protection system is in a non-operating state under normal conditions, it waits for a
power system fault to occur at any time, and must operate for the fault without fail. Therefore, the
automatic supervision function, which checks the health of the protection system during normal
operation, plays an important role. The GRD140 implements an automatic supervision function,
based on the following concepts:
• The supervising function should not affect the protection performance.
• Perform supervision with no omissions wherever possible.
• When a failure occurs, it is recorded as Alarm record, the user should be able to easily identify
the location of the failure.

3.3.2 Relay Monitoring

The relay is supervised by the following functions.

AC input imbalance monitoring

The AC current input is monitored to check that the following equation is satisfied and the health
of the AC input circuit is verified.
• CT circuit current monitoring for [APPL-CT] = “3P” setting
Max(|Ia|, |Ib|, |Ic|) − 4 × Min(|Ia|, |Ib|, |Ic|) ≥ k0
where,
Max(|Ia|, |Ib|, |Ic|) = Maximum amplitude among Ia, Ib and Ic
Min(|Ia|, |Ib|, |Ic|) = Minimum amplitude among Ia, Ib and Ic
k0 = 20% of rated current
• Zero sequence voltage monitoring for [APPL-VT]= “3PN” setting
|Va + Vb + Vc| / 3 ≤ 6.35 (V)
• Negative sequence voltage monitoring for [APPL-VT]= “3PN” and “3PV” setting
|Va + a2Vb + aVc| / 3 ≤ 6.35 (V)
where, a = Phase shifter of 120°, a2 = Phase shifter of 240°

The CT circuit current monitoring allows high sensitivity detection of failures that have occurred
in the AC input circuit. This monitoring can be disabled by the scheme switch [CTSVEN].
The zero sequence monitoring and negative sequence monitoring allow high sensitivity detection
of failures that have occurred in the AC input circuits. These monitoring can be disabled by the
scheme switches [V0SVEN] and [V2SVEN] respectively.
The negative sequence voltage monitoring allows high sensitivity detection of failures in the
voltage input circuit, and it is effective for detection particularly when cables have been connected
with the incorrect phase sequence.

A/D accuracy checking

An analog reference voltage is input to a prescribed channel in the analog-to-digital (A/D)
converter, and it is checked that the data after A/D conversion is within a prescribed range, and

 87 
 6 F 2 S 0 7 5 8

that the A/D conversion characteristics are correct.

Memory monitoring
Memory is monitored as follows, depending on the type of memory, and checks are done to verify
that memory circuits are healthy:
• Random access memory monitoring:
Writes/reads prescribed data and checks the storage function.
• Program memory monitoring: Checks the checksum value of the written data.
• Setting value monitoring: Checks discrepancies between the setting values stored in
duplicate.

Watchdog Timer
A hardware timer that is cleared periodically by the software is provided, which checks that the
software is running normally.

DC Supply Monitoring
The secondary voltage level of the built-in DC/DC converter is monitored, and is checked to see
that the DC voltage is within a prescribed range.

3.3.3 CT Failure Supervision

This function is available for [APPL-CT] = “3P” setting only.

Figure 3.3.1 shows the scheme logic of the CT failure supervision (CTFS). If the residual
overcurrent element EFF(EFCF) operates and the residual overvoltage element ZOVF(ZOVCF)
does not operate, CT failure (CTF) is detected. When the CTFS detects a CTF, it can alarm and
block various protections as EF, NOC and UC protections etc.
The CTF signal is reset 100 ms after the CT failure condition has reset. When the CTF continues
for 10s or more, “Err: CTF” is displayed in LCD message.
Further, the CT failure is detected when the binary input signal (external CTF) is received.
This function can be enabled or disabled by the scheme switch [CTFEN] and has a programmable
reset characteristic. For latching operation, set to “ON”, and for automatic reset after recovery, set
to “OPT-ON”.

EFF & ≥1 ≥1 CTF

&
t 0 t 0
ZOVF & 1 & t 0
CTF ALM
1 0.015s 0.1s
& 10s

[CTFEN] "ON"
≥1
+
"OPT-ON"
CB CLOSE 1 CB NON BLK
0.2s
A.M.F. ON

CTF BLOCK 1

EXT CTF

Figure 3.3.1 CT Failure Supervision

 88 
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3.3.4 VT Failure Supervision

This function is available for [APPL-VT] = “3PN” and “3PV” settings.

When a fault occurs in the secondary circuit of the voltage transformer (VT), the voltage
dependent measuring elements may operate incorrectly. GRD140 incorporates a VT failure
supervision function (VTFS) as a measure against such incorrect operation. When the VTFS
detects a VT failure, it can alarm and block the following voltage dependent protections by a
binary input.
• Directional overcurrent protection
• Directional earth fault protection
• Directional sensitive earth fault protection
• Directional negative overcurrent protection
• Undervoltage protection
• Zero phase sequence overvoltage protection
• Negative phase sequence overvoltage protection
A binary input signal (external VTF) to indicate a miniature circuit breaker trip in the VT circuits
is also available for the VTFS.

Scheme logic
Figure 3.3.2 shows the scheme logic for the VTFS. VT failure is detected by the following two
schemes.
VTF1: The residual overcurrent element EFF(EFVF) does not operate (EFF=0), the residual
overvoltage element ZOVF(ZOVVF) operates (ZOVF=1) and the phase current
change detection element OCDF(OCDVF) does not operate (OCDF=0).
VTF2: The phase undervoltage element UVF(UVVF) operates (UVF=1) when the three
phases of the circuit breaker are closed (CB CLOSE=1) and the phase current change
detection element OCDF(OCDVF) does not operate (OCDF=0).
In order to prevent detection of false VT failures due to unequal pole closing of the circuit breaker,
the VTFS is blocked for 200 ms after line energization.
The VTF signal is reset 100 ms after the VT failure condition has reset. When the VTF continues
for 10s or more, “Err: VTF1” or “Err: VTF2” is displayed in LCD message.
Further, the VT failure is detected when the binary input signal (external VTF) is received.
This function can be enabled or disabled by the scheme switch [VTF1EN] or [VTF2EN] and has a
programmable reset characteristic. For latching operation, set to “ON”, and for automatic reset
after the recover, set to “OPT-ON”.

 89 
 6 F 2 S 0 7 5 8

t 0
VTF1 ALM
A
10s
UVF B ≥1 ≥1 VTF1
≥1 &
C &
1 t 0 t 0
1 NON VTF1
A
t 0 0.015s 0.1s
OCDF B ≥1 S 1
& &
C F/F
0.1s
R

& 1
"OPT-ON"
[VTF1EN] "ON" ≥1
+ t 0
CB CLOSE VTF2 ALM
10s
ZOVF ≥1 VTF2
& ≥1

EFF ≥1 & 1 t 0 t 0
& 1 NON VTF2
0.015s 0.1s

& 1
"OPT-ON"
[VTF2EN]
"ON" ≥1
+
CB NON BLK

A.M.F. ON

VTF BLOCK 1

EXT VTF

Figure 3.3.2 VT Failure Supervision

3.3.5 Trip Circuit Supervision

The circuit breaker tripping control circuit can be monitored by a binary input. Figure 3.3.3 shows
a typical scheme. When the trip circuit is complete, a small current flows through the binary input
and the trip circuit. Then logic signal of the binary input circuit BI is "1".
If the trip supply is lost or if a connection becomes an open circuit, then the binary input resets and
the BI output is "0". A trip circuit fail alarm TCSV is output when the BI output is "0".
If the trip circuit failure is detected, then “ALARM” LED is lit and “Err: TC” is displayed in LCD
message.
The monitoring is enabled by setting the scheme switch [TCSPEN] to "ON" or "OPT-ON". When
"OPT-ON" is selected, the monitoring is enabled only while CB is closed.
(+) Trip circuit supervision

BI
Trip t 0
output 1 & TCSV

CB CLOSE 0.4s
& ≥1
"OPT-ON"
[TCSPEN]
+ "ON"

CB trip coil

Figure 3.3.3 Trip Circuit Supervision Scheme Logic

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3.3.6 Circuit Breaker Monitoring

The relay provides the following circuit breaker monitoring functions.

Circuit Breaker State Monitoring

Circuit breaker state monitoring is provided for checking the health of circuit breaker (CB). If two
binary inputs are programmed to the functions ‘CB OPEN’ and ‘CB CLOSED’, then the CB state
monitoring function becomes active. In normal circumstances these inputs are in opposite states.
Figure 3.3.4 shows the scheme logic. If both show the same state during five seconds, then a CB
state alarm CBSV operates and “Err:CB” and “CB err” are displayed in LCD message and event
record message respectively.
The monitoring can be enabled or disabled by setting the scheme switch [CBSMEN].
t 0
CB CONT OPN 1 CBSV
=1 &
(BI command)
5.0s

CB CONT CLS
(BI command)
[CBSMEN]
"ON"
+
Figure 3.3.4 CB State Monitoring Scheme Logic

Normally open and normally closed contacts of the CB are connected to binary inputs BIm and
BIn respectively, and functions of BIm and BIn are set to “CBOPN=ON” and “CBCLS=ON”.
(Refer to Section 4.2.6.8.)

Circuit Breaker Condition Monitoring

Periodic maintenance of CB is required for checking of the trip circuit, the operation mechanism
and the interrupting capability. Generally, maintenance is based on a time interval or a number of
fault current interruptions.
The following CB condition monitoring functions are provided to determine the time for
maintenance of CB:
• Trip is counted for maintenance of the trip circuit and CB operation mechanism. The trip
counter increments the number of tripping operations performed. An alarm is issued and
informs user of time for maintenance when the count exceeds a user-defined setting TCALM.
The trip count alarm can be enabled or disabled by setting the scheme switch [TCAEN].
• Sum of the broken current quantity ∑Iy is counted for monitoring the interrupting capability of
CB. The ∑Iy counter increments the value of current to the power ‘y’, recorded at the time of
issue of the tripping signal, on a phase by phase basis. For oil circuit breakers, the dielectric
withstand of the oil generally decreases as a function of ∑I2t, and maintenance such as oil
changes, etc., may be required. ‘I’ is the fault current broken by CB. ‘t’ is the arcing time
within the interrupter tank and it cannot be determined accurately. Therefore, ‘y’ is normally
set to 2 to monitor the broken current squared. For other circuit breaker types, especially those
for HV systems, ‘y’ may be set lower, typically 1.0. An alarm is issued when the count for any
phase exceeds a user-defined setting ∑IyALM. This feature is not available in GRD140-110.
The ∑Iy count alarm can be enabled or disabled by setting the scheme switch [∑IyAEN].
• Operating time monitoring is provided for CB mechanism maintenance. It checks CB
operating time and the need for mechanism maintenance is informed if the CB operation is
slow. The operating time monitor records the time between issuing the tripping signal and the
phase currents falling to zero. An alarm is issued when the operating time for any phase

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exceeds a user-defined setting OPTALM. The operating time is set in relation to the specified
interrupting time of the CB. The operating time alarm can be enabled or disabled by setting the
scheme switch [OPTAEN].
The maintenance program should comply with the switchgear manufacturer’s instructions.
The CB condition monitoring functions are triggered each time a trip is issued, and they can also
be triggered by an external device via binary input EXT TRIP3PH (EXT3PH) or EXT TRIP∗PH
(EXT∗PH) as shown in Figure 3.3.5. (Refer to Section 4.2.6.8.)

(+) (−) External trip GRD140 Binary input setting

three-phase [EXT3PH]
BIa command EXT3PH
BIa
"ON"

External trip
A-phase [EXTAPH]
BIb command EXTAPH
BIb
"ON"

Figure 3.3.5 Binary Input Setting for CB Condition Monitoring

3.3.7 Failure Alarms

When a failure is detected by the automatic supervision, it is followed with an LCD message, LED
indication, external alarm and event recording. Table 3.3.1 summarizes the supervision items and
alarms.
The LCD messages are shown on the "Auto-supervision" screen, which is displayed automatically
when a failure is detected or displayed by pressing the VIEW key. The event record messages
are shown on the "Event record" screen by opening the "Record" sub-menu.
The alarms are retained until the failure is recovered.
The alarms can be disabled collectively by setting the scheme switch [AMF] to "OFF". The AC
input imbalance monitoring alarms can be disabled collectively by setting the scheme switches
[CTSVEN], [V0SVEN] and [V2SVEN] to "OFF". The setting is used to block unnecessary alarms
during commissioning, test or maintenance.
When the Watchdog Timer detects that the software is not running normally, LCD display and
event recording of the failure may not function normally.

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Table 3.3.1 Supervision Items and Alarms

Supervision Item LCD Message LED LED External Alarm record Message
"IN "ALARM" alarm
SERVICE"

AC input imbalance Err:CT, Err:V0, CT err, V0 err, V2 err,

On/Off (2) On (4)
monitoring Err:V2 (1) Relay fail or Relay fail-A (2)

A/D accuracy check Err:A/D Off On (4) Relay fail

Memory monitoring Err:SUM, Err:RAM,
Off On (4) Relay fail
Err:BRAM, Err:EEP
Watchdog Timer ---- Off On (4) ----
DC supply monitoring Err:DC Off (3) Off Relay fail-A
Trip circuit supervision Err:TC On On Off TC err, Relay fail-A
CB state monitoring Err:CB On On Off CB err, Relay fail-A
CB condition monitoring
Trip count alarm ALM:TP COUNT On On Off TP COUNT ALM,
Relay fail-A
Operating time alarm ALM: OP time On On Off OP time ALM, Relay fail-A
∑Iy count alarm ALM:∑IY On On Off ∑IY-A ALM, ∑IY-B ALM or
∑IY-C ALM, Relay fail-A
CT failure supervision Err:CTF On On Off CTF err, Relay fail-A
VT failure supervision Err:VTF1, Err:VTF2 On On Off VTF1 err, VTF2 err,
Relay fail-A
(1): Diverse messages are provided as expressed with "Err:---" in the table in Section 6.7.2.
(2): The LED is on when the scheme switch [CTSVEN], [V0SVEN] or [V2SVEN] is set to "ALM"
and off when set to "ALM & BLK" (refer to Section 3.3.6). The message "Relay fail-A" is
recorded when the scheme switch [SVCNT] is set to "ALM".
(3): Whether the LED is lit or not depends on the degree of the voltage drop.
(4): The binary output relay "FAIL" operates.

The relationship between the LCD message and the location of the failure is shown in Table 6.7.1
in Section 6.7.2.

3.3.8 Trip Blocking

When a failure is detected by the following supervision items, the trip function is blocked as long
as the failure exists, and is restored when the failure is removed.
• A/D accuracy check
• Memory monitoring
• Watchdog Timer
When a fault is detected by the AC input imbalance monitoring, the scheme switches [CTSVEN],
[V0SVEN] and [V2SVEN] setting can be used to determine if both tripping is blocked and an
alarm is output, or if only an alarm is output.

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3.3.9 Setting

The setting element necessary for the automatic supervision and its setting range are shown in the
table below.

Element Range Step Default Remarks

CTF supervision
EFF 0.05 - 25.00 A 0.01 A 1.00 A Residual overcurrent threshold setting
( 0.01 - 5.00 A 0.01 A 0.20 A) (*)
ZOVF 5.0 – 130.0 V 0.1 V 20.0 V Residual overvoltage threshold setting
VTF supervision
UVF 5.0 – 130.0 V 0.1 V 51.0 V Undervoltage threshold setting
OCDF 0.5 A (Fixed) Phase current change detection
( 0.1 A (Fixed) )
[CTFEN] Off/On/OPT-On Off CTF supervision
[VTF1EN] Off/On/OPT-On Off VTF1 supervision
[VTF2EN] Off/On/OPT-On Off VTF2 supervision
[CTSVEN] Off/ALM&BLK/ALM ALM AC input imbalance monitoring (current)
[V0SVEN] Off/ALM&BLK/ALM ALM AC input imbalance monitoring (Vo)
[V2SVEN] Off/ALM&BLK/ALM ALM AC input imbalance monitoring (V2)
[TCSPEN] Off/On/OPT-On Off Trip circuit supervision
[CBSMEN] Off/On Off CB condition supervision
[TCAEN] OFF/ON OFF Trip count alarm
[∑IyAEN] OFF/ON OFF ∑Iy count alarm
[OPTAEN] OFF/ON OFF Operate time alarm
TCALM 1 - 10000 1 10000 Trip count alarm threshold setting
∑IyALM 10 – 10000 E6 E6 10000 ∑Iy alarm threshold setting
YVALUE 1.0 – 2.0 0.1 2.0 y value setting
OPTALM 100 – 5000 ms 10 ms 1000 ms Operate time alarm threshold setting
(*) Current values shown in the parentheses are in the case of 1 A rating. Other current values are in
the case of 5 A rating.
When setting the ZOVF and EFF, the maximum detection sensitivity of each element should be
set with a margin of 15 to 20% taking account of variations in the system voltage, the asymmetry
of the primary system and CT and VT error.

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3.4 Recording Function

The GRD140 is provided with the following recording functions:
Fault recording
Event recording
Disturbance recording
Counters
These records are displayed on the LCD of the relay front panel or on the local or remote PC.

3.4.1 Fault Recording

Fault recording is started by a tripping command of the GRD140 and the following items are
recorded for one fault:
Date and time
Trip mode
Operating phase
Fault location
Relevant events
Power system quantities
Up to the 8 most-recent faults are stored as fault records. If a new fault occurs when 8 faults have
been stored, the record of the oldest fault is deleted and the record of the latest fault is then stored.

Date and time occurrence

This is the time at which a tripping command has been initiated.
The time resolution is 1 ms using the relay internal clock.

Trip mode
This shows the protection scheme such as OC1, EF1, UV1 etc. that output the tripping command.

Operating phase
This is the phase to which a tripping command is output.

Fault location
The distance to the fault point calculated by the fault locator is recorded.
The distance is expressed in km and as a percentage (%) of the line length.
Relevant events
Such events as autoreclose, re-tripping following the reclose-on-to-a fault or autoreclose are
recorded with time-tags.

Power system quantities

The following power system quantities in pre-faults and post-faults are recorded.
- Magnitude and phase angle of phase voltage (Va, Vb, Vc)
- Magnitude and phase angle of phase-to-phase voltage (Vab, Vbc, Vca)
- Magnitude and phase angle of symmetrical component voltage (V1, V2, V0)

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- Magnitude and phase angle of zero sequence voltage which is measured directly in the form of
the system residual voltage (Ve)
- Magnitude and phase angle of phase current (Ia, Ib, Ic)
- Magnitude and phase angle of symmetrical component current (I1, I2, I0)
- Magnitude and phase angle of zero sequence current from residual circuit (Ie)
- Magnitude and phase angle of zero sequence current from core balance CT (Ise) for model 110
and 420 series
- Percentage of thermal capacity (THM%) only recorded at post-fault
- Frequency (f)
The displayed power system quantities depend on [APPL-CT] and [APPL-VT] setting for models
400 and 420 as shown in Table 3.4.1.

Table 3.4.1 Displayed Power System Quantities

[APPL-CT] [APPL-VT]
Power system quantities
3P 2P 1P 3PN 3PV
Phase voltage － － － Va, Vb, Vc Va, Vb, Vc
Phase-to-phase voltage － － － － －
Residual voltage － － － － Ve
Symmetrical component voltage － － － V1, V2, V0
Phase current Ia, Ib, Ic Ia, Ic － － －
Zero sequence current from Ie (*) or Ie (*) or Ie (*) or
－ －
residual circuit Ise(**) Ie, Ise(**) Ie, Ise(**)
Symmetrical component current I1, I2, I0 － －
Percentage of thermal capacity THM THM － － －
Note: (*) marked for Model 400. (**) marked for Model 420.

3.4.2 Event Recording

The events shown in Appendix D are recorded with the 1 ms resolution time-tag when the status
changes. For BI1 to BI8 command, the user can select the recording items and their status change
mode to initiate recording as below.
One of the following four modes is selectable.
Modes Setting
Not to record the event. N
To record the event when the status changes to "operate". O
To record the event when the status changes to "reset". R
To record the event when the status changes both to "operate" and "reset". B

For the setting, see the Section 4.2.6.5. The default setting is "B"
Up to 480 records can be stored. If an additional event occurs when 480 records have been stored,
the oldest event record is deleted and the latest event record is then stored.

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3.4.3 Disturbance Recording

Disturbance recording is started when the overcurrent, overvoltage or undervoltage starter

element operates or a tripping command is initiated. The records include maximum 8 analogue
signals as shown in Table 3.4.2, 32 binary signals and the dates and times at which recording
started. Any binary signal shown in Appendix C can be assigned by the binary signal setting of
disturbance record.

Table 3.4.2 Analog Signals for Disturbance Recording

Model
Model 110 Model 400 Model 420
APPL setting
APPL CT = 1P I0 Ie(I0), Ise(I0)
CT APPL CT = 2P Ie(I0), Ise(I0) Ia, Ic, Ie(I0) Ia, Ic, Ie(I0), Ise(I0)
APPL CT = 3P Ia, Ib, Ic, Ie(I0) Ia, Ib, Ic, Ise(I0)
APPL VT = 3PN Va, Vb, Vc Va, Vb, Vc
VT Ve(V0)
APPL VT = 3PV Va, Vb, Vc, Ve(V0) Va, Vb, Vc, Ve(V0)

The LCD display only shows the dates and times of disturbance records stored. Details can be
displayed on a PC. For how to obtain disturbance records on the PC, see the PC software
instruction manual.
The pre-fault recording time is fixed at 0.3s and post-fault recording time can be set between 0.1
and 3.0s.
The number of records stored depends on the post-fault recording time. The approximate
relationship between the post-fault recording time and the number of records stored is shown in
Table 3.4.2.
Note: If the recording time setting is changed, the records stored so far are deleted.

Table 3.4.2 Post Fault Recording Time and Number of Disturbance Records Stored

Recording time 0.1s 0.5s 1.0s 1.5s 2.0s 2.5s 3.0s

50Hz 40 23 14 10 8 6 5
60Hz 38 19 11 8 6 5 4

Settings
The elements necessary for initiating a disturbance recording and their setting ranges are shown in
the table below.
Element Range Step Default Remarks
OC 0.1-250.0 A 0.1 A 10.0 A Overcurrent detection
(0.02-50.00 A 0.01 A 2.00 A) (*)
EF 0.1-125.0 A 0.1 A 3.0 A Earth fault detection
(0.02-25.00 A 0.01 A 0.60A)
SEF 0.01-1.00 A 0.01 A 1.00 A Sensitive earth fault detection
(0.002-0.200 A 0.001 A 0.200 A)
NC 0.5-10.0 A 0.1 A 2.0 A Negative sequence overcurrent detection
(0.10-2.00 A 0.01 A 0.40 A)

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OV 10.0-200.0 V 0.1 V 120.0 V Overvoltage detection

UV 1.0-130.0 V 0.1 V 60.0 V Undervoltage detection
ZOV 1.0-130.0 V 0.1 V 20.0 V Zero sequence overvoltage detection
NOV 1.0-130.0 V 0.1 V 20.0 V Negative sequence overvoltage detection
(*) Current values shown in the parentheses are for the case of a 1A rating. Other current values are
for the case of a 5A rating.
Starting the disturbance recording by a tripping command or the starter element listed above is
enabled or disabled by setting the following scheme switches.

Element Range Step Default Remarks

[Trip] OFF/ON ON Start by tripping command
[BI] OFF/ON ON Start by Binary Input signal
[OC] OFF/ON ON Start by OC operation
[EF] OFF/ON ON Start by EF operation
[SEF] OFF/ON ON Start by SEF operation
[NC] OFF/ON ON Start by NC operation
[OV] OFF/ON ON Start by OV operation
[UV] OFF/ON ON Start by UV operation
[ZOV] OFF/ON ON Start by ZOV operation
[NOV] OFF/ON ON Start by NOV operation

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3.5 Metering Function

The GRD140 measures current and demand values of phase currents, phase and phase-to-phase
voltages, residual current, residual voltage, symmetrical component currents and voltages,
frequency, power factor, active and reactive power, and apparent power. The measurement data
shown below is displayed on the LCD of the relay front panel or on the local or remote PC.
Current
The following quantities are measured and updated every second.
- Magnitude and phase angle of phase current (Ia, Ib, Ic)
- Magnitude and phase angle of zero sequence current from residual circuit (Ie)
- Magnitude and phase angle of zero sequence current from core balance CT (Ise) for model 110
and 420 series
- Magnitude of positive and negative sequence currents (I1, I2)
- The ratio of negative to positive sequence current (I2/I1)
- Magnitude and phase angle of phase voltage (Va, Vb, Vc)
- Magnitude and phase angle of phase-to-phase voltage (Vab, Vbc, Vca)
- Magnitude and phase angle of zero sequence voltage which is measured directly in the form of
the system residual voltage (Ve)
- Magnitude and phase angle of symmetrical component voltage (V1, V2, V0)
- Active power (P)
- Reactive power (Q)
- Apparent power (S)
- Power factor (PF)
- Frequency (f)
- Percentage of thermal capacity (THM%)
- Direction of each current (Ia, Ib, Ic, Ie, Ise, I2)

Demand
- Maximum and minimum of phase voltage (Va, Vb, Vc: max, min)
- Maximum and minimum of zero sequence voltage (V0: max, min)
- Maximum and minimum of zero sequence voltage which is measured directly in the form of
the system residual voltage (Ve: max, min)
- Maximum of phase current (Ia, Ib, Ic: max.)
- Maximum of zero sequence current from residual circuit (Ie: max)
- Maximum of zero sequence current from core balance CT (Ise: max) for model 110 and 420
series
- Maximum of negative sequence current (I2: max.)
- Maximum of the ratio of negative to positive sequence current (I2/I1(I21): max)
- Maximum of active power (P: max.)

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- Maximum of reactive power (Q: max.)

- Maximum of apparent power (S: max.)
- Maximum and minimum of frequency (f: max, min)
The above system quantities are displayed in values on the primary side or on the secondary side
as determined by a setting. To display accurate values, it is necessary to set the CT ratio as well.
For the setting method, see "Setting the metering" in 4.2.6.6 and "Setting the parameter" in 4.2.6.7.
In the case of the maximum and minimum values display above, the measured quantity is averaged
over a rolling 15 minute time window, and the maximum and minimum recorded average values
are shown on the display screen.
The displayed quantities depend on [APPL-CT] and [APPL-VT] setting as shown in Table 3.5.1.
Input current and voltage greater than 0.01×In(rated current) and 0.06V at the secondary side are
required for the measurement.
The zero sequence current Ie in “3P” setting of the model 420 is calculated from the three phase
input currents and the calculated Ie (I0) is displayed. The Ie displayed in other settings and models
is the current fed from CT.
Phase angles above are expressed taking the positive sequence voltage as a reference phase angle,
where leading phase angles are expressed as positive, (+).
The signing of active and reactive power flow direction can be set positive for either power
sending or power receiving. The signing of reactive power can be also set positive for either
lagging phase or leading phase.

Table 3.5.1 Displayed Quantity Depends on APPL setting

Model 110 400 420 400, 420

APPL APPL-CT APPL-CT APPL-VT
setting --
Quantity 1P 2P 3P 1P 2P 3P 3PN 3PV
Ia 9 9 9 9
Ib 9 9
Ic 9 9 9 9
Ie (Io) 9 9 9 9 9 9
Ise 9 9 9
I1 9 9
I2 9 9
I2/I1 9 9
Va 9 9
Vb 9 9
Vc 9 9
Vab 9 9
Vbc 9 9
Vca 9 9
Ve 9
V1 9 9
V2 9 9
V0 9 9
P 9 9 9 9 9 9

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Model 110 400 420 400, 420

APPL APPL-CT APPL-CT APPL-VT
setting --
Quantity 1P 2P 3P 1P 2P 3P 3PN 3PV
Q 9 9 9 9 9 9
S 9 9 9 9 9 9
PF 9 9 9 9 9 9
f 9 9
THM 9 9

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3.6 Fault locator

3.6.1 Application

The fault locator incorporated in the GRD140 measures the distance to fault on the protected line
using local voltages and currents. The measurement result is expressed as a percentage (%) of the
line length and the distance (km) and is displayed on the LCD on the relay front panel. It is also
output to a local PC or RSM (relay setting and monitoring) system.
To measure the distance to fault, the fault locator requires minimum 3 cycles as fault duration
time.
In distance to fault calculations, the change in the current before and after the fault has occurred is
used as a reference current, alleviating influences of the load current and arc voltage. As a result,
the location error is a maximum of ±2.5 km for faults at a distance of up to 100 km, and a
maximum of ±2.5% for faults at a distance between 100 km and 250 km.
The fault locator is available for [APPL-CT]= "3P" and [APPL-VT]= "3PN" or "3PV" setting.
The fault locator cannot correctly measure the distance to fault during a power swing.

3.6.2 Distance to Fault Calculation

The distance to fault x1 is calculated from equation (1) and (2) using the voltage and current of the
fault phase and a current change before and after the fault occurrence. The current change before
and after the fault occurrence represented by Iβ" and Iα" is used as the reference current. The
impedance imbalance compensation factor is used to maintain high measuring accuracy even
when the impedance of each phase has great variations.

Distance calculation for phase fault (in the case of BC-phase fault)

Im(Vbc ⋅ Iβ") × L
x 1 = {I (R ⋅ I × Iβ") + R (X ⋅ I ⋅ Iβ")} × K (1)
m 1 bc e 1 bc bc

where,
Vbc = fault voltage between faulted phases = Vb − Vc
Ibc = fault current between faulted phases = Ib − Ic
Iβ" = change of fault current before and after fault occurrence = (Ib-Ic) − (ILb-ILc)
ILb, ILc = load current
R1 = resistance component of line positive sequence impedance
X1 = reactance component of line positive sequence impedance
Kbc = impedance imbalance compensation factor
Im( ) = imaginary part in parentheses
Re( ) = real part in parentheses
L = line length (km)

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Distance calculation for earth fault (in the case of A-phase earth fault)

Im(Va ⋅ Iα") × L
x1= (2)
{Im(R1 ⋅ Iα ⋅ Iα" + R0 ⋅ I0S ⋅ Iα") + Re(X1 ⋅ Iα ⋅ Iα" + X0 ⋅ I0S ⋅ Iα")} × Ka

where,
Va = fault voltage
Iα = fault current = (2Ia − Ib − Ic)/3
Iα" = change of fault current before and after fault occurrence
2Ia − Ib − Ic 2ILa − ILb − ILc
= −
3 3
Ia, Ib, Ic = fault current
ILa, ILb, ILc = load current
I0s = zero sequence current
R1 = resistance component of line positive sequence impedance
X1 = reactance component of line positive sequence impedance
R0 = resistance component of line zero sequence impedance
X0 = reactance component of line zero sequence impedance
Ka = impedance imbalance compensation factor
Im( ) = imaginary part in parentheses
Re( ) = real part in parentheses
L = line length (km)

Equations (1) and (2) are general expressions when lines are treated as having lumped constants
and these expressions are sufficient for lines within 100 km. For lines exceeding 100 km,
influences of the distributed capacitance must be considered. For this fault locator, the following
equation is used irrespective of line length to find the compensated distance x2 with respect to
distance x1 which was obtained in equation (1) or (2).
3
x1
2
x2 = x1 − k ⋅ 3 (3)

where,
k = propagation constant of the protected line = 0.001km-1 (fixed)

3.6.3 Starting Calculation

Calculation of the fault location is initiated by tripping signals.

3.6.4 Displaying Location

The measurement result is stored in the "Fault record" and displayed on the LCD of the relay front
panel or on the local or remote PC. For displaying on the LCD, see Section 4.2.3.1.

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3.6.5 Setting

The setting items necessary for the fault location and their setting ranges are shown in the table
below. The reactance and resistance values are input in expressions on the secondary side.
When there are great variations in the impedance of each phase, equation (4) is used to find the
positive sequence impedance, zero sequence impedance and zero sequence mutual impedance,
while equation (5) is used to find imbalance compensation factors Kab to Ka.
When variations in impedance of each phase can be ignored, the imbalance compensation factor is
set to 100%.

Z1 = {(Zaa + Zbb + Zcc) − (Zab + Zbc + Zca)}/3

Z0 = {(Zaa + Zbb + Zcc) + 2(Zab + Zbc + Zca)}/3 (4)

Kab = {(Zaa + Zbb)/2 − Zab}/Z1

Kbc = {(Zbb + Zcc)/2 − Zbc}/Z1
Kca = {(Zcc + Zaa)/2 − Zca}/Z1 (5)
Ka = {Zaa − (Zab + Zca)/2}/Z1
Kb = {Zbb − (Zbc + Zab)/2}/Z1
Kc = {Zcc − (Zca + Zab)/2}/Z1

Item Range Step Default Remarks

R1 0.0 - 199.99 Ω 0.01 Ω 0.20Ω
(0.0 - 999.9 Ω 0.1 Ω 1.0Ω) (*)
X1 0.0 - 199.99 Ω 0.01 Ω 2.00Ω
(0.0 - 999.9 Ω 0.1 Ω 10.0Ω)
R0 0.0 - 999.99 Ω 0.01 Ω 0.70Ω
(0.0 - 999.9 Ω 0.1 Ω 3.5Ω)
X0 0.0 - 199.99 Ω 0.01 Ω 6.80Ω
(0.0 - 999.9 Ω 0.1 Ω 34.0Ω)
Kab 80 - 120% 1% 100%
Kbc 80 - 120% 1% 100%
Kca 80 - 120% 1% 100%
Ka 80 - 120% 1% 100%
Kb 80 - 120% 1% 100%
Kc 80 - 120% 1% 100%
Line 0 - 399.9 km 0.1 km 50.0km
(*) Ohmic values shown in the parentheses are in the case of 1 A rating. Other ohmic values are
in the case of 5A rating.

 104 
 6 F 2 S 0 7 5 8

4. User Interface
4.1 Outline of User Interface
The user can access the relay from the front or rear panel.
Local communication with the relay is also possible using a personal computer (PC) via an
RS232C port. Furthermore, remote communication is also possible using RSM (Relay Setting and
Monitoring) or IEC60870-5-103 communication via RS485 port.
This section describes the front panel configuration and the basic configuration of the menu tree of
the local human machine communication ports and HMI (Human Machine Interface).

4.1.1 Front Panel

As shown in Figure 3.1.3, the front panel is provided with a liquid crystal display (LCD), light
emitting diodes (LED), operation keys, and RS-232C connector.

LCD
The LCD screen, provided with a 2-line, 16-character display and back-light, provides the user
with information such as records, statuses and settings. The LCD screen is normally unlit, but
pressing the VIEW key will display the default screen and pressing any key other than VIEW
and RESET will display the menu screen.

These screens are turned off by pressing the RESET key or END key. If any display is left for 5
minutes or longer without operation, the back-light will go off.

LED
There are 6 LED displays. The signal labels and LED colors are defined as follows:
Label Color Remarks
IN SERVICE Green Lit when the relay is in service and flickered when the relay is in “Test” menu.
TRIP Red Lit when a trip command is issued.
ALARM Red Lit when a failure is detected.
(LED1) Yellow
(LED2) Yellow
(LED3) Yellow

LED1, LED2 and LED3 are configurable. A configurable LED can be used as a virtual LED and
can indicate statuses of maximum 16 elements as OR output of them. For the setting, see Section
4.2.6.10.
The TRIP LED lights up once the relay is operating and remains lit even after the trip command
goes off. The TRIP LED can be turned off by pressing the RESET key. Other LEDs are lit as
long as a signal is present and the RESET key is invalid while the signal is being maintained.

 105 
 6 F 2 S 0 7 5 8

Operation keys
The operation keys are used to display records, status, and set values on the LCD, as well as to
input or change set values. The function of each operation key is as follows:
c , , , : Used to move between lines displayed on a screen and to enter numerical
values and text strings.
d CANCEL : Used to cancel entries and return to the upper screen.

e END : Used to end the entering operation, return to the upper screen or turn off the
display.
f ENTER : Used to store or establish entries.

VIEW and RESET keys

Pressing VIEW key displays default screens such as "Metering", "Latest fault",
"Auto-supervision", "Alarm display" and "Indication".
Pressing RESET key turns off the display.

Monitoring jacks
The two monitoring jacks A and B and their respective LEDs can be used when the test mode is
selected on the LCD screen. By selecting the signal to be observed from the "Signal List" and
setting it on the screen, the signal can be displayed on LED A or LED B, or transmitted to an
oscilloscope via a monitoring jack.

RS232C connector
The RS232C connector is a 9-way D-type connector for serial RS232C connection with a local
personal computer.

 106 
 6 F 2 S 0 7 5 8

4.1.2 Communication Ports

The following two interfaces are mounted as communication ports:

• RS232C port
• RS485 port

RS232C port
This connector is a standard 9-way D-type connector for serial port RS232C transmission and is
mounted on the front panel. By connecting a personal computer to this connector, setting
operation and display functions can be performed.

RS485 port
The RS485 port is used for the RSM (Remote Setting and Monitoring system) via the protocol
converter G1PR2 and IEC60870-5-103 communication via BCU/RTU (Bay Control Unit /
Remote Terminal Unit) to connect between relays and to construct a network communication
system. (See Figure 4.4.1 in Section 4.4.)
One or two RS485 ports (COM1 and COM2) is provided on the rear of the relay as shown in
Figure 4.1.1. In the relay provided with two RS485 ports, COM1 is used for the RSM or
IEC60870-5-103 communication, and COM2 used for IEC60870-5-103 communication. When
the COM1 is used for IEC60870-5-103 communication, the COM2 cannot be used for
IEC60870-5-103 communication.

TB3 TB4 COM2

TB1
RS485 TB1 TB3 RS485
connection connection
COM1 terminal
terminal

TB2
TB2

E E

Rear view Rear view

(a) One port (b) Two ports

Figure 4.1.1 Location of RS485 Port

 107 
 6 F 2 S 0 7 5 8

4.2 Operation of the User Interface

The user can access such functions as recording, measurement, relay setting and testing with the
LCD display and operation keys.

4.2.1 LCD and LED Displays

Displays during normal operation

When the GRD140 is operating normally, the green "IN SERVICE" LED is lit and the LCD is off.
Press the VIEW key when the LCD is off to display the digest screens which are "Indication",
"Metering1", "Metering2", "Metering3", "Metering4", "Metering5", "Latest fault",
"Auto-supervision" and "Alarm Display" screens in turn. "Latest fault", "Auto-supervision" and
"Alarm Display" screens are displayed only when there is some data. The following are the default
screens and can be displayed without entering the menu screens.

Indication
I N D 1 [ 0 0 0 0 0 0 0 0 ]
I N D 2 [ 0 0 0 1 0 0 0 0 ]

Metering 1
I a ∗ ∗ . ∗ ∗ k A Not available for model 110 and APPL=1P
setting in models 400 and 420.

Metering 2
I b ∗ ∗ . ∗ ∗ k A Not available for models 110, and APPL=1P and
2P settings in models 400 and 420.

Metering 3
I c ∗ ∗ . ∗ ∗ k A Not available for model 110 and APPL=1P
setting in models 400 and 420.

Metering 4
I e ∗ ∗ . ∗ ∗ k A

Metering 5
I s e ∗ ∗ . ∗ ∗ ∗ k A Not available for models 400.

Metering 6
V a n ∗ ∗ ∗ . ∗ ∗ k V Available for APPL=3PN and 3PV setting in
∗ ∗ ∗ . ∗ ° models 400 and 420.

Metering 7
V b n ∗ ∗ ∗ . ∗ ∗ k V Available for APPL=3PN and 3PV setting in
∗ ∗ ∗ . ∗ ° models 400 and 420.

Metering 8
V c n ∗ ∗ ∗ . ∗ ∗ k V Available for APPL=3PN and 3PV setting in
∗ ∗ ∗ . ∗ ° models 400 and 420.

Metering 9
V e ∗ ∗ ∗ . ∗ ∗ k V
∗ ∗ ∗ . ∗ °

 108 
 6 F 2 S 0 7 5 8

Metering 10
V 0 ∗ ∗ ∗ . ∗ ∗ k V
∗ ∗ ∗ . ∗ °

Metering 11
V 1 ∗ ∗ ∗ . ∗ ∗ k V Not available for model 110.
∗ ∗ ∗ . ∗ °

Metering 12
V 2 ∗ ∗ ∗ . ∗ ∗ k V Not available for model 110
∗ ∗ ∗ . ∗ °

Metering 13
ff ∗ ∗ . ∗ ∗ H z

Latest fault
P h a s e A B C E : Faulted phases. Not displayed for model 110
O C 1 : Tripping element

Auto-supervision
E r r : R OM , A / D

Alarm Display (ALM1 to ALM4)

∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗
∗ ∗ ∗ ∗ ∗ ∗ ∗ ∗ : A L M 1

Press the RESET key to turn off the LCD.

To clear the latched indications (latched LEDs, LCD screen of Latest fault), press RESET key
for 3 seconds or more. In the case of Alarm Display, the clearing is available after displaying up to
ALM4.
For any display, the back-light is automatically turned off after five minutes.

Indication
This screen shows the status of elements assigned as a virtual LED.
I N D 1 [ 0 0 0 0 0 0 0 0 ]
I N D 2 [ 0 0 0 1 0 0 0 0 ]

Status of element,
Elements depend on user setting. 1: Operate, 0: Not operate (Reset)

Displays in tripping
If a fault occurs and a tripping command is output when the LCD is off, the "Latest fault" screen is
displayed on the LCD automatically and the red "TRIP" LED lights.
Press the VIEW key to display the default screens in turn including the "Metering" and
"Auto-supervision" screens.
Press the RESET key to turn off the LEDs and LCD display.
If the tripping command is output when any of the screens is displayed, the current screen remains
displayed and the red "TRIP" LED lights.

 109 
 6 F 2 S 0 7 5 8

While any of the menu screens is displayed, the VIEW and RESET keys do not function. To
return to the default screen, do the following:
• Return to the top screen of the menu by repeatedly pressing the END key.

• Press the END key to turn off the LCD.

• Press the VIEW key to display the default screen.

• Press the RESET key to turn off the "TRIP" LED and LCD.

Displays in automatic supervision operation

If the automatic supervision function detects a failure while the LCD is off, the
"Auto-supervision" screen is displayed automatically, showing the location of the failure, and the
"ALARM" LED lights.
Press the VIEW key to display other default screens in turn including the "Metering" and "Latest
fault" screens.
Press the RESET key to turn off the LCD display. The "ALARM" LED remains lit if the failure
continues.
After recovery from a failure, the "ALARM" LED and "Auto-supervision" display turn off
automatically.
If a failure is detected while any of the screens is displayed, the current screen remains displayed
and the "ALARM" LED lights.
While any of the menu screens is displayed, the VIEW and RESET keys do not function. To
return to the default "Auto-supervision" screen, do the following:
• Return to the top screen of the menu by repeatedly pressing the END key.

• Press the END key to turn off the LCD.

• Press the VIEW key to display the default screen.

• Press the RESET key to turn off the LCD.

Alarm Display
The four alarm screens can be provided, and their text messages are defined by user. (For setting,
see Section 4.2.6.8). These alarms are raised by associated binary inputs.
Press the VIEW key to display other default screens in turn including the "Metering" and "Latest
fault" screens.
To clear the Alarm Display, press RESET key. The clearing is available after displaying up to
ALM4.
While any of the menu screens is displayed, the VIEW and RESET keys do not function. To
return to the default "Auto-supervision" screen, do the following:
• Return to the top screen of the menu by repeatedly pressing the END key.

• Press the END key to turn off the LCD.

 110 
 6 F 2 S 0 7 5 8

• Press the VIEW key to display the default screen.

• Press the RESET key to turn off the LCD.

4.2.2 Relay Menu

Figure 4.2.1 shows the menu hierarchy in the GRD140. The menu has five sub-menus, "Record",
"Status", "Set. (view)", "Set. (change)", and "Test". For details of the menu hierarchy, see
Appendix E.

Menu Record F. record

E. record
D. record
Counter

Status Metering
Binary I/O
Relay element
Time sync.
Clock adjust.
LCD contrast

Set. (view) Version

Description
Comms
Record
Status
Protection
Binary I/P
Binary O/P
LED

Set. (change) Password

Description
Comms
Record
Status
Protection
Binary I/P
Binary O/P
LED

Test Switch
Binary O/P

Figure 4.2.1 Relay Menu

 111 
 6 F 2 S 0 7 5 8

Record
In the "Record" menu, the fault records event records, disturbance records and counts such as trip
count.

Status
The "Status" menu displays the power system quantities, binary input and output status, relay
measuring element status, signal source for time synchronisation (BI, RSM or IEC60870-5-103),
clock adjustment and LCD contrast.

Set. (view)
The "Set. (view)" menu displays the relay version, description, relay address and baud rate in
RSM or IEC60870-5-103 communication, the current settings of record, status, protection, binary
inputs, configurable binary outputs and configurable LEDs.

Set. (change)
The "Set. (change)" menu is used to change the settings of password, description, relay address
and baud rate in RSM or IEC60870-5-103 communication, record, status, protection, binary
inputs, configurable binary outputs and configurable LEDs.
Since this is an important menu and is used to change settings related to relay tripping, it has
password security protection.

Test
The "Test" menu is used to set testing switches and to forcibly operate binary output relays.

When the LCD is off, press any key other than the VIEW and RESET keys to display the top
"MENU" screen and then proceed to the relay menus.

M E N U
• R e c o r d
• S t a t u s
• S e t . ( v i e w )
• S e t . ( c h a n g e )
• T e s t

To display the "MENU" screen when the default screen is displayed, press the RESET key to
turn off the LCD, then press any key other than the VIEW and RESET keys.

Press the END key when the top screen is displayed to turn off the LCD.
An example of the sub-menu screen is shown below. The top line shows the hierarchical layer.
The last item is not displayed for all the screens. " " or " " displayed on the far right shows that
lower or upper lines exist.
To move the cursor downward or upward for setting or for viewing other lines not displayed on the
window, use the and keys.
/ 5 T r i p
• S c h e m e s w
• P r o t . e l e m e n t

To return to the higher screen or move from the right side screen to the left side screen in Appendix

 112 
 6 F 2 S 0 7 5 8

E, press the END key.

The CANCEL key can also be used to return to the higher screen but it must be used carefully
because it may cancel entries made so far.
To move between screens of the same hierarchical depth, first return to the higher screen and then
move to the lower screen.

4.2.3 Displaying Records

The sub-menu of "Record" is used to display fault records, event records, disturbance records and
counts such as trip count, ΣIy count and reclose count.

4.2.3.1 Displaying Fault Records

To display fault records, do the following:
• Open the top "MENU" screen by pressing any keys other than the VIEW and RESET keys.

• Select "Record" to display the "Record" sub-menu.

/ 1 R e c o r d
• F . r e c o r d
• E . r e c o r d
• D . r e c o r d
• C o u n t e r

• Select "F. record" to display the "F. record" screen.

/ 2 F . r e c o r d
• D i s p l a y
• C l e a r
• Select "Display" to display the dates and times of fault records stored in the relay from the top
in new-to-old sequence.
/ 3 F . r e c o r d

# 1 1 6 / J u l / 2 0 0 1
1 8 : 1 3 : 5 7 . 0 3 1
# 2 2 0 / M a y / 2 0 0 1
1 5 : 2 9 : 2 2 . 1 0 1
# 3 0 4 / F e b / 2 0 0 1
1 1 : 5 4 : 5 3 . 2 9 9
# 4 2 8 / J a n / 2 0 0 1
0 7 : 3 0 : 1 8 . 4 1 2
• Move the cursor to the fault record line to be displayed using the and keys and press the
ENTER key to display the details of the fault record.

 113 
 6 F 2 S 0 7 5 8

/ 4 F . r e c o r d # 1
0 1 / J a n / 2 0 0 2
1 8 : 1 3 : 5 7 . 0 3 1
O C 1 Trip element
P h a s e A B C Not available for model 110.
∗ ∗ ∗ . ∗ k m ( ∗ ∗ ∗ % ) Not available for model 110.
P r e f a u l t v a l u e s
I a ∗ ∗ . ∗ ∗ k A Not available for model 110 and APPL=1P setting in models 400 and 420.
∗ ∗ ∗ . ∗ °
I b ∗ ∗ . ∗ ∗ k A Not available for model 110 and APPL=1P and 2P settings in models 400 and 420.
∗ ∗ ∗ . ∗ °
I c ∗ ∗ . ∗ ∗ k A Not available for model 110 and APPL=1P setting in models 400 and 420.
∗ ∗ ∗ . ∗ °
I e ∗ ∗ . ∗ ∗ k A
∗ ∗ ∗ . ∗ °
I s e ∗ ∗ . ∗ ∗ ∗ k A Not available for model 400.
∗ ∗ ∗ . ∗ °
I 1 ∗ ∗ . ∗ ∗ k A Not available for model 110 and APPL=1P and 2P settings in models 400 and 420.
∗ ∗ ∗ . ∗ °
I 2 ∗ ∗ . ∗ ∗ k A Not available for model 110 and APPL=1P and 2P settings in models 400 and 420.
∗ ∗ ∗ . ∗ °
I 2 / I 1 ∗ ∗ . ∗ ∗ Not available for model 110 and APPL=1P and 2P settings in models 400 and 420.
V a n ∗ ∗ ∗ . ∗ ∗ k V Not available for model 110 and APPL=3P and 2P setting in models 400 and 420.
∗ ∗ ∗ . ∗ °
V b n ∗ ∗ ∗ . ∗ ∗ k V Not available for model 110 and APPL=3P and 2P setting in models 400 and 420.
∗ ∗ ∗ . ∗ °
V c n ∗ ∗ ∗ . ∗ ∗ k V Not available for model 110 and APPL=3P and 2P setting in models 400 and 420.
∗ ∗ ∗ . ∗ °
V e ∗ ∗ ∗ . ∗ ∗ k V
∗ ∗ ∗ . ∗ °
V a b ∗ ∗ ∗ . ∗ ∗ k V Not available for model 110.
∗ ∗ ∗ . ∗ °
V b c ∗ ∗ ∗ . ∗ ∗ k V Not available for model 110.
∗ ∗ ∗ . ∗ °
V c a ∗ ∗ ∗ . ∗ ∗ k V Not available for model 110.
∗ ∗ ∗ . ∗ °
V 0 ∗ ∗ ∗ . ∗ ∗ k V Not available for model 110.
∗ ∗ ∗ . ∗ °
V 1 ∗ ∗ ∗ . ∗ ∗ k V Not available for model 110.
∗ ∗ ∗ . ∗ °
V 2 ∗ ∗ ∗ . ∗ ∗ k V Not available for model 110.
∗ ∗ ∗ . ∗ °
f ∗ ∗ . ∗ ∗ H z Not available for model 110.
F a u l t v a l u e s
I a ∗ ∗ . ∗ ∗ k A Not available for model 110 and APPL=1P setting in models 400 and 420.
∗ ∗ ∗ . ∗ °
I b ∗ ∗ . ∗ ∗ k A Not available for model 110 and APPL=1P and 2P settings in models 400 and 420.
∗ ∗ ∗ . ∗ °
I c ∗ ∗ . ∗ ∗ k A Not available for model 110 and APPL=1P setting in models 400 and 420.
∗ ∗ ∗ . ∗ °
I e ∗ ∗ . ∗ ∗ k A
∗ ∗ ∗ . ∗ °
I s e ∗ ∗ . ∗ ∗ ∗ k A Not available for model 400.
∗ ∗ ∗ . ∗ °
I 1 ∗ ∗ . ∗ ∗ k A Not available for model 110 and APPL=1P and 2P settings in models 400 and 420.
∗ ∗ ∗ . ∗ °
I 2 ∗ ∗ . ∗ ∗ k A Not available for model 110 and APPL=1P and 2P settings in models 400 and 420.

 114 
 6 F 2 S 0 7 5 8

∗ ∗ ∗ . ∗ °
I 2 / I 1 ∗ ∗ . ∗ ∗ Not available for model 110 and APPL=1P and 2P settings in models 400 and 420.
T H M ∗ ∗ ∗ . ∗ % Not available for model 110.
V a n ∗ ∗ ∗ . ∗ ∗ k V Not available for model 110 and APPL=3P and 2P setting in models 400 and 420.
∗ ∗ ∗ . ∗ °
V b n ∗ ∗ ∗ . ∗ ∗ k V Not available for model 110 and APPL=3P and 2P setting in models 400 and 420.
∗ ∗ ∗ . ∗ °
V c n ∗ ∗ ∗ . ∗ ∗ k V Not available for model 110 and APPL=3P and 2P setting in models 400 and 420.
∗ ∗ ∗ . ∗ °
V e ∗ ∗ ∗ . ∗ ∗ k V
∗ ∗ ∗ . ∗ °
V a b ∗ ∗ ∗ . ∗ ∗ k V Not available for model 110.
∗ ∗ ∗ . ∗ °
V b c ∗ ∗ ∗ . ∗ ∗ k V Not available for model 110.
∗ ∗ ∗ . ∗ °
V c a ∗ ∗ ∗ . ∗ ∗ k V Not available for model 110.
∗ ∗ ∗ . ∗ °
V 0 ∗ ∗ ∗ . ∗ ∗ k V Not available for model 110.
∗ ∗ ∗ . ∗ °
V 1 ∗ ∗ ∗ . ∗ ∗ k V Not available for model 110.
∗ ∗ ∗ . ∗ °
V 2 ∗ ∗ ∗ . ∗ ∗ k V Not available for model 110.
∗ ∗ ∗ . ∗ °
f ∗ ∗ . ∗ ∗ H z Not available for model 110.
0 1 / J a n / 2 0 0 2
1 8 : 1 3 : 5 8 . 0 3 1
A R C - S 1
0 1 / J a n / 2 0 0 2
1 8 : 1 3 : 5 9 . 0 3 1
O C 1
0 1 / J a n / 2 0 0 2
1 8 : 1 4 : 0 0 . 0 3 1
A R C - S 2
0 1 / J a n / 2 0 0 2
1 8 : 1 4 : 0 1 . 0 3 1
O C 1 , A R C - F T

The lines which are not displayed in the window can be displayed by pressing the and keys.

To clear all the fault records, do the following:

• Open the "Record" sub-menu.
• Select "F. record" to display the "F. record" screen.
• Select "Clear" to display the following confirmation screen.
C l e a r r e c o r d s ?
E N D = Y C A N C E L = N

• Press the END (= Y) key to clear all the fault records stored in non-volatile memory.
If all fault records have been cleared, the "Latest fault" screen of the default screens is not
displayed.

4.2.3.2 Displaying Event Records

To display event records, do the following:
• Open the top "MENU" screen by pressing any keys other than the VIEW and RESET keys.

 115 
 6 F 2 S 0 7 5 8

• Select "Record" to display the "Record" sub-menu.

• Select "E. record" to display the "E. record" screen.
/ 2 E . r e c o r d
• D i s p l a y
• C l e a r
• Select "Display" to display the events with date from the top in new-to-old sequence.
/ 3 E . r e c o r d

2 1 / S e p / 2 0 0 2 4 8 0
O C 1 - A t r i p O n
2 1 / S e p / 2 0 0 2 4 7 9
O C 1 - A O n
The time is displayed by pressing the key.
/ 3 E . r e c o r d

1 3 : 2 2 : 4 5 . 2 1 1
O C 1 - A t r i p O n
1 3 : 2 2 : 4 5 . 1 0 9
O C 1 - A O n
Press the key to return the screen with date.

The lines which are not displayed in the window can be displayed by pressing the and keys.

To clear all the event records, do the following:

• Open the "Record" sub-menu.
• Select "E. record" to display the "E. record" screen.
• Select "Clear" to display the following confirmation screen.
C l e a r r e c o r d s ?
E N D = Y C A N C E L = N

• Press the END (= Y) key to clear all the event records stored in non-volatile memory.

4.2.3.3 Displaying Disturbance Records

Details of disturbance records can be displayed on the PC screen only (*); the LCD displays only
the recorded date and time for all disturbances stored in the relay. They are displayed in the
following sequence.
(*) For the display on the PC screen, refer to RSM100 manual.
• Open the top "MENU" screen by pressing any keys other than the VIEW and RESET keys.

• Select "Record" to display the "Record" sub-menu.

• Select "D. record" to display the "D. record" screen.
/ 2 D . r e c o r d
• D i s p l a y
• C l e a r
• Select "Display" to display the date and time of the disturbance records from the top in

 116 
 6 F 2 S 0 7 5 8

new-to-old sequence.
/ 3 D . r e c o r d

# 1 1 6 / J u l / 2 0 0 1
1 8 : 1 3 : 5 7 . 4 0 1
# 2 2 0 / M a y / 2 0 0 1
1 5 : 2 9 : 2 2 . 3 8 8
# 3 0 4 / F e b / 2 0 0 1
1 1 : 5 4 : 5 3 . 4 4 4
# 4 2 8 / J a n / 2 0 0 1
0 7 : 3 0 : 1 8 . 8 7 6
The lines which are not displayed in the window can be displayed by pressing the and keys.

To clear all the disturbance records, do the following:

• Open the "Record" sub-menu.
• Select "D. record" to display the "D. record" screen.
• Select "Clear" to display the following confirmation screen.
C l e a r r e c o r d s ?
E N D = Y C A N C E L = N

• Press the END (= Y) key to clear all the disturbance records stored in non-volatile memory.

4.2.3.4 Displaying Counter

• Open the top "MENU" screen by pressing any keys other than the VIEW and RESET keys.

• Select "Record" to display the "Record" sub-menu.

• Select "Counter" to display the "Counter" screen.
/ 2 C o u n t e r
• D i s p l a y
• C l e a r T r i p s
• C l e a r T r i p s A (*)
• C l e a r T r i p s B (*)
• C l e a r T r i p s C (*)
• C l e a r Σ I ^ y A
• C l e a r Σ I ^ y B
• C l e a r Σ I ^ y C
• C l e a r A R C s
(*) Note: These settings are only available when single phase External Trip BI functions
are used. In this case, the main "Clear Trips" option is not available.
• Select "Display" to display the counts stored in the relay.
/ 3 C o u n t e r
T r i p s ∗ ∗ ∗ ∗ ∗
T r i p s A ∗ ∗ ∗ ∗ ∗ (*)
T r i p s B ∗ ∗ ∗ ∗ ∗ (*)
T r i p s C ∗ ∗ ∗ ∗ ∗ (*)
Σ I ^ y A ∗ ∗ ∗ ∗ ∗ ∗ E 6
Σ I ^ y B ∗ ∗ ∗ ∗ ∗ ∗ E 6
Σ I ^ y C ∗ ∗ ∗ ∗ ∗ ∗ E 6
A R C s ∗ ∗ ∗ ∗ ∗ ∗

 117 
 6 F 2 S 0 7 5 8

(*) Note: These settings are only available when single phase External Trip BI functions
are used. In this case, the main "Trips" option is not available.

The lines which are not displayed in the window can be displayed by pressing the and keys.

To clear each count, do the following:

• Open the "Record" sub-menu.
• Select "Counter" to display the "Counter" screen.
• Select "Clear Trips" to display the following confirmation screen.
C l e a r T r i p s ?
E N D = Y C A N C E L = N

• Select "Clear Trips A" to display the following confirmation screen.

C l e a r T r i p s A ?
E N D = Y C A N C E L = N

• Select "Clear Trips B" to display the following confirmation screen.

C l e a r T r i p s B ?
E N D = Y C A N C E L = N

• Select "Clear Trips C" to display the following confirmation screen.

C l e a r T r i p s C ?
E N D = Y C A N C E L = N

• Select "Clear Σ I^yA" to display the following confirmation screen.

C l e a r Σ I ^ y A ?
E N D = Y C A N C E L = N

• Select "Clear Σ I^yB" to display the following confirmation screen.

C l e a r Σ I ^ y B ?
E N D = Y C A N C E L = N

• Select "Clear Σ I^yC" to display the following confirmation screen.

C l e a r Σ I ^ y C ?
E N D = Y C A N C E L = N

• Select "Clear ARCs" to display the following confirmation screen.

C l e a r A R C s ?
E N D = Y C A N C E L = N

• Press the END (= Y) key to clear the count stored in non-volatile memory.

4.2.4 Displaying the Status

From the sub-menu of "Status", the following status condition can be displayed on the LCD:
Metering data of the protected line, apparatus, etc.
Status of binary inputs and outputs
Status of measuring elements output
Status of time synchronisation source

 118 
 6 F 2 S 0 7 5 8

Status of clock adjustment

Status of LCD contrast
The data are updated every second.

4.2.4.1 Displaying Metering Data

To display metering data on the LCD, do the following:
• Select "Status" on the top "MENU" screen to display the "Status" screen.
/ 1 S t a t u s
• M e t e r i n g
• B i n a r y I / O
• R e l a y e l e m e n t
• T i m e s y n c .
• C l o c k a d j u s t .
• L C D c o n t r a s t

• Select "Metering" to display the "Metering" screen.

/ 2 M e t e r i n g
• C u r r e n t
• D e m a n d
• D i r e c t i o n

• Select "Current" to display the current power system quantities on the "Metering" screen.
/ 3 C u r r e n t
I a ∗ ∗ . ∗ ∗ k A Not available for model 110 and APPL=1P setting in models 400 and 420.
∗ ∗ ∗ . ∗ °
I b ∗ ∗ . ∗ ∗ k A Not available for models 110 and APPL=1P and 2P settings in models 400 and 420.
∗ ∗ ∗ . ∗ °
I c ∗ ∗ . ∗ ∗ k A Not available for model 110 and APPL=1P setting in models 400 and 420.
∗ ∗ ∗ . ∗ °
I e ∗ ∗ . ∗ ∗ k A
∗ ∗ ∗ . ∗ °
I s e ∗ ∗ ∗ ∗ . ∗ A Not available for models 400.
∗ ∗ ∗ . ∗ °
I 1 ∗ ∗ . ∗ ∗ k A Not available for models 110 and APPL=1P and 2P settings in models 400 and 420.
∗ ∗ ∗ . ∗ °
I 2 ∗ ∗ . ∗ ∗ k A Not available for models 110 and APPL=1P and 2P settings in models 400 and 420.
∗ ∗ ∗ . ∗ °
I 2 / I 1 ∗ ∗ . ∗ ∗ Not available for models 110 and APPL=1P and 2P settings in models 400 and 420.
T H M ∗ ∗ ∗ . ∗ % Not available for model 110 and APPL=1P setting in models 400 and 420.
V a n ∗ ∗ ∗ . ∗ ∗ k V Not available for model 110 and APPL=3P and 2P setting in models 400 and 420.
∗ ∗ ∗ . ∗ °
V b n ∗ ∗ ∗ . ∗ ∗ k V Not available for model 110 and APPL=3P and 2P setting in models 400 and 420.
∗ ∗ ∗ . ∗ °
V c n ∗ ∗ ∗ . ∗ ∗ k V Not available for model 110 and APPL=3P and 2P setting in models 400 and 420.
∗ ∗ ∗ . ∗ °
V e ∗ ∗ ∗ . ∗ ∗ k V
∗ ∗ ∗ . ∗ °
V a b ∗ ∗ ∗ . ∗ ∗ k V Not available for model 110.
∗ ∗ ∗ . ∗ °
V b c ∗ ∗ ∗ . ∗ ∗ k V Not available for model 110.
∗ ∗ ∗ . ∗ °
V c a ∗ ∗ ∗ . ∗ ∗ k V Not available for model 110.
∗ ∗ ∗ . ∗ °

 119 
 6 F 2 S 0 7 5 8

V 0 ∗ ∗ ∗ . ∗ ∗ k V Not available for model 110.

∗ ∗ ∗ . ∗ °
V 1 ∗ ∗ ∗ . ∗ ∗ k V Not available for model 110.
∗ ∗ ∗ . ∗ °
V 2 ∗ ∗ ∗ . ∗ ∗ k V Not available for model 110.
∗ ∗ ∗ . ∗ °
f ∗ ∗ . ∗ ∗ H z Not available for model 110.
P F - ∗ . ∗ ∗ ∗ Not available for model 110. Total 3 phase power factor.
P - ∗ ∗ ∗ ∗ ∗ ∗ k W Not available for model 110. Total 3 phase active power.
Q - ∗ ∗ ∗ ∗ ∗ ∗ k v a r Not available for model 110. Total 3 phase reactive power.
S - ∗ ∗ ∗ ∗ ∗ ∗ k V A Not available for model 110. Total 3 phase apparent power.

• Select "Demand" to display the current demand on the "Metering" screen.

/ 3 D e m a n d
I a m a x ∗ ∗ . ∗ ∗ k A Not available for model 110.
I b m a x ∗ ∗ . ∗ ∗ k A Not available for model 110.
I c m a x ∗ ∗ . ∗ ∗ k A Not available for model 110.
I e m a x ∗ ∗ . ∗ ∗ k A
I s e m a x ∗ ∗ . ∗ ∗ ∗ k A Not available for models 400.
I 2 m a x ∗ ∗ . ∗ ∗ k A Not available for model 110.
I 2 1 m a x ∗ ∗ . ∗ ∗ Not available for model 110.
P m a x - ∗ ∗ ∗ ∗ ∗ ∗ k W Not available for model 110.
Q m a x - ∗ ∗ ∗ ∗ ∗ ∗ k v a Not available for model 110.
S m a x - ∗ ∗ ∗ ∗ ∗ ∗ k V A Not available for model 110.
V a n m a x ∗ ∗ ∗ . ∗ ∗ k V Not available for model 110.
V a n m i n ∗ ∗ ∗ . ∗ ∗ k V Not available for model 110.
V b n m a x ∗ ∗ ∗ . ∗ ∗ k V Not available for model 110.
V b n m i n ∗ ∗ ∗ . ∗ ∗ k V Not available for model 110.
V c n m a x ∗ ∗ ∗ . ∗ ∗ k V Not available for model 110.
V c n m i n ∗ ∗ ∗ . ∗ ∗ k V Not available for model 110.
V e m a x ∗ ∗ ∗ . ∗ ∗ k V Not available for model 110.
V e m i n ∗ ∗ ∗ . ∗ ∗ k V Not available for model 110.
V 0 m a x ∗ ∗ ∗ . ∗ ∗ k V
V 0 m i n ∗ ∗ ∗ . ∗ ∗ k V
f m a x ∗ ∗ . ∗ ∗ H z Not available for model 110.
f m i n ∗ ∗ . ∗ ∗ H z Not available for model 110.

To clear all max data, do the following:

• Press the RESET key on any max demand screen (primary or secondary) to display the
following confirmation screen.
C l e a r m a x ?
E N D = Y C A N C E L = N

• Press the END (= Y) key to clear all max data stored in non-volatile memory.

• Select "Direction" to display the direction of a current on the "Metering" screen.

/ 3 D i r e c t i o n
I a F o r w a r d Not available for model 110.
I b R e v e r s e Not available for model 110.
I c F o r w a r d Not available for model 110.
I e F o r w a r d
I s e F o r w a r d Not available for model 400.
I 2 _ _ _ _ _ _ _ Not available for model 110.

 120 
 6 F 2 S 0 7 5 8

4.2.4.2 Displaying the Status of Binary Inputs and Outputs

To display the binary input and output status, do the following:
• Select "Status" on the top "MENU" screen to display the "Status" screen.
• Select "Binary I/O" to display the binary input and output status.
/ 2 B i n a r y I / O
I P [ 0 0 0 0 0 0 0 0 ]
O P [ 0 0 0 0 0 0 0 0 ]
The display format is shown below.
[„ „ „ „ „ „ „ „]
Input (IP) BI1 BI2 BI3 BI4 BI5 BI6 BI7 BI8
Output (OP) BO1 BO2 BO3 BO4 BO5 BO6 BO7 FAIL

Line 1 shows the binary input status. BI1 to BI8 correspond to each binary input signal. The
models 400 and 420 are available for BI1 to BI5. For the binary input signal, see Appendix H. The
status is expressed with logical level "1" or "0" at the photo-coupler output circuit.
Line 2 shows the binary output status. All binary outputs BO1 to BO7 are configurable. The status
of these outputs is expressed with logical level "1" or "0" at the input circuit of the output relay
driver. That is, the output relay is energised when the status is "1".
To display all the lines, press the and keys.

4.2.4.3 Displaying the Status of Measuring Elements

To display the status of measuring elements on the LCD, do the following:
• Select "Status" on the top "MENU" screen to display the "Status" screen.
• Select 3 "Ry element" to display the status of the relay elements.
/ 2 R y e l e m e n t
A O C 1 - 4 [ 0 0 0 0 ]
B O C 1 - 4 [ 0 0 0 0 ]
C O C 1 - 4 [ 0 0 0 0 ]
E F 1 - 4 [ 0 0 0 0 ]
S E 1 - 4 [ 0 0 0 0 ]
N C [ 0 0 ]
A U C 1 - 2 [ 0 0 ]
B U C 1 - 2 [ 0 0 ]
C U C 1 - 2 [ 0 0 ]
T H M [ 0 0 ]
B C [ 0 ]
C B F A B C [ 0 0 0 ]
C o l d L d [ 0 0 0 0 ]
A O V 1 - 2 [ 0 0 ]
B O V 1 - 2 [ 0 0 ]
C O V 1 - 2 [ 0 0 ]
A U V 1 - 2 [ 0 0 ]
B U V 1 - 2 [ 0 0 ]
C U V 1 - 2 [ 0 0 ]
Z O V 1 - 2 [ 0 0 ]
N O V 1 - 2 [ 0 0 ]
F R Q 1 - 4 [ 0 0 0 0 ]
The displayed elements depend on relay model. (See Table 1.1.1 in Section 1.)

 121 
 6 F 2 S 0 7 5 8

The operation status of phase and residual overcurrent elements are shown as below.
[„ „ „ „ ]
A OC1-4 OC1 OC2 OC3 OC4 A phase OC elements
B OC1-4 OC1 OC2 OC3 OC4 B phase OC elements
C OC1-4 OC1 OC2 OC3 OC4 C phase OC elements
EF1-4 EF1 EF2 EF3 EF4
SE1-4 SE1 SE2 SE3 SE4
NC NC1 NC2 - -
A UC1-2 UC1 UC2 - - A phase UC elements
B UC1-2 UC1 UC2 - - B phase UC elements
C UC1-2 UC1 UC2 - - C phase UC elements
THM Alarm Trip - -
BC BC - - -
CBFABC A B C -
Cold Ld 0 1 2 3 Cold Load state
A OV1-2 OV1 OV2 - - A phase OV elements
B OV1-2 OV1 OV2 - - B phase OV elements
C OV1-2 OV1 OV2 - - C phase OV elements
A UV1-2 UV1 UV2 - - A phase UV elements
B UV1-2 UV1 UV2 - - B phase UV elements
C UV1-2 UV1 UV2 - - C phase UV elements
ZOV1-2 ZOV1 ZOV2 - -
NOV1-2 NOV1 NOV2 - -
FRQ1-4 FRQ1 FRQ2 FRQ3 FRQ4

The status of each element is expressed with logical level "1" or "0". Status "1" means the element
is in operation.

4.2.4.4 Displaying the Status of the Time Synchronisation Source

The internal clock of the GRD140 can be synchronised with external clocks such as the binary
input signal clock, RSM (relay setting and monitoring system) clock or IEC60870-5-103. To
display on the LCD whether these clocks are active (=Act.) or inactive (=Inact.) and which clock
the relay is synchronised with, do the following:
• Select "Status" on the top "MENU" screen to display the "Status" screen.
• Select "Time sync." to display the status of time synchronisation sources.
/ 2 T i m e s y n c .
∗ B I : A c t .
R S M : I n a c t .
I E C : I n a c t .
The asterisk on the far left shows that the internal clock is synchronised with the marked source
clock. If the marked source clock is inactive, the internal clock runs locally.
Note: If the Binary input signal has not been detected for one hour or more after the last detection, the
status becomes "inactive".
For details of the setting time synchronisation, see Section 4.2.6.6.

 122 
 6 F 2 S 0 7 5 8

4.2.4.5 Clock Adjustment

To adjust the clock when the internal clock is running locally, do the following:
• Select "Status" on the top "MENU" screen to display the "Status" screen.
• Select "Clock adjust." to display the setting screen.
/ 2 1 2 / N o v / 2 0 0 1
2 2 : 5 6 : 1 9
M i n u t e
5 6 _
H o u r
2 2
D a y
1 2
M o n t h
1 1
Y e a r
2 0 0 1
Line 1 and 2 show the current date and time. The time can be adjusted only when the clock is
running locally. When [BI], [RSM] or [IEC] is active, the adjustment is invalid.
• Enter a numerical value for each item and press the ENTER key. For details to enter a
numerical value, see 4.2.6.1.
• Press the END key to adjust the internal clock to the set hours without fractions and return to
the previous screen.
If a date which does not exist in the calendar is set and END is pressed, "**** Error ****" is
displayed on the top line and the adjustment is discarded. Return to the normal screen by pressing
the CANCEL key and adjust again.

4.2.4.6 LCD Contrast

To adjust the contrast of LCD screen, do the following:
• Select "Status" on the top "MENU" screen to display the "Status" screen.
• Select "LCD contrast" to display the setting screen.
/ 2 L C D c o n t r a s t

• Press the or key to adjust the contrast. The characters on the screen become thin by
pressing the key and deep by pressing the key.

4.2.5 Viewing the Settings

The sub-menu "Set. (view)" is used to view the settings made using the sub-menu "Set. (change)".
The following items are displayed:
Relay version
Description
Relay address and baud rate in the RSM (relay setting and monitoring system) or
IEC60870-5-103 communication

 123 
 6 F 2 S 0 7 5 8

Record setting
Status setting
Protection setting
Binary input setting
Binary output setting
LED setting
Enter an item on the LCD to display each item as described in the previous sections.

4.2.5.1 Relay Version

To view the relay version, do the following.
• Press the "Set.(view)" on the main menu.
/ 1 S e t . ( v i e w )
• V e r s i o n
• D e s c r i p t i o n
• C o m m s
• R e c o r d
• S t a t u s
• P r o t e c t i o n
• B i n a r y I / P
• B i n a r y O / P
• L E D

• Press the "Version" on the "Set.(view)" menu.

/ 2 V e r s i o n
• R e l a y t y p e
• S e r i a l N o .
• S o f t w a r e

• Select "Relay type" to display the relay type form and model number.
G R D 1 4 0 - 1 1 0 A - 1 1
- 1 1

• Select "Serial number" to display the relay manufacturing number.

• Select "Software" to display the relay software type form and version.
G S 1 D P 1 - 0 4 - ∗

4.2.5.2 Settings
The "Description", "Comms", "Record", "Status", "Protection", "Binary I/P", "Binary O/P" and
"LED" screens display the current settings input using the "Set. (change)" sub-menu.

4.2.6 Changing the Settings

The "Set. (change)" sub-menu is used to make or change settings for the following items:
Password
Description

 124 
 6 F 2 S 0 7 5 8

Relay address and baud rate in the RSM or IEC60870-5-103 communication

Recording setting
Status setting
Protection setting
Binary input setting
Binary output setting
LED setting
All of the above settings except the password can be seen using the "Set. (view)" sub-menu.

CAUTION
Modification of settings : Care should be taken when modifying settings for "active group",
"scheme switch" and "protection element" in the "Protection" menu. Dependencies exist between
the settings in the various menus, with settings in one menu becoming active (or inactive)
depending on the selection made in another menu. Therefore, it is recommended that all necessary
settings changes be made while the circuit breaker tripping circuit is disconnected.
Alternatively, if it is necessary to make settings changes with the tripping circuit active, then it is
recommended to enter the new settings into a different settings group, and then change the "active
group" setting, thus ensuring that all new settings become valid simultaneously.

4.2.6.1 Setting Method

There are three setting methods as follows:
- To enter a selected item
- To enter a text string
- To enter numerical values

To enter a selected item

If a screen as shown below is displayed, perform setting as follows.
The cursor can be moved to upper or lower lines within the screen by pressing the and keys.
If setting (change) is not required, skip the line with the and keys.
/ 1 S e t . ( c h a n g e)
• P a s s w o r d
• D e s c r i p t i o n
• C o m m s
• R e c o r d
• S t a t u s
• P r o t e c t i o n
• B i n a r y I / P
• B i n a r y O / P
• L E D

• Move the cursor to a setting item.

• Press the ENTER key.

To enter a text string

Texts strings are entered under "Plant name" or "Description" screen.

 125 
 6 F 2 S 0 7 5 8

/ 2 D e s c r i p t i o n
• P l a n t n a m e
• D e s c r i p t i o n

To select a character, use keys , , and to move blinking cursor down, up, left and right.
"→" and "←" on each of lines 4, 8 and 10 indicate a space and backspace, respectively. A
maximum of 22 characters can be entered.
_
A B C D E F G
H I J K L M N
O P Q R S T U
V W X Y Z ←→
a b c d e f g
h i j k l m n
o p q r s t u
v w x y z ←→
0 1 2 3 4 5 6
7 8 9 ←→
( ) [ ] @_ {
} ∗ / + − < =
> ! “ # $ %&
‘ : ; , . ˆ `

• Set the cursor position in the bracket by selecting "→" or "←" and pressing the ENTER key.

• Move the blinking cursor to a selecting character.

• Press the ENTER key to enter the blinking character at the cursor position in the brackets.

• Press the END key to confirm the entry and return to the upper screen.
To correct the entered character, do either of the following:
• Discard the character by selecting "←" and pressing the ENTER key and enter the new
character.
• Discard the whole entry by pressing the CANCEL key and restart the entry from the first.

To enter numerical values

When the screen shown below is displayed, perform setting as follows:
The number to the left of the cursor shows the current setting or default setting set at shipment. The
cursor can be moved to upper or lower lines within the screen by pressing the and keys. If
setting (change) is not required, skip the line with the and keys.
/ 4 T i m e / s t a r t e r

T i m e s
2 . 0 _
O C A
2 . 0 0
E F A
0 . 6 0
S E F A
0 . 2 0 0
N C A
0 . 4 0

 126 
 6 F 2 S 0 7 5 8

O V V
1 2 0 . 0
U V V
6 0 . 0
Z O V V
2 0 . 0
N O V V
2 0 . 0
• Move the cursor to a setting line.
• Press the or key to set a desired value. The value is up or down by pressing the or
key.
• Press the ENTER key to enter the value.

• After completing the setting on the screen, press the END key to return to the upper screen.
To correct the entered numerical value, do the following.
• If it is before pressing the ENTER key, press the CANCEL key and enter the new
numerical value.
• If it is after pressing the ENTER key, move the cursor to the correcting line by pressing the
and keys and enter the new numerical value.
Note: If the CANCEL key is pressed after any entry is confirmed by pressing the ENTER key, all
the entries made so far on the screen concerned are canceled and screen returns to the upper
one.

To complete the setting

Enter after making entries on each setting screen by pressing the ENTER key, the new settings
are not yet used for operation, though stored in the memory. To validate the new settings, take the
following steps.
• Press the END key to return to the upper screen. Repeat this until the confirmation screen
shown below is displayed. The confirmation screen is displayed just before returning to the
"Set. (change)" sub-menu.
C h a n g e s e t t i n g s ?
E N T E R = Y C A N C E L = N

• When the screen is displayed, press the ENTER key to start operation using the new settings,
or press the CANCEL key to correct or cancel entries. In the latter case, the screen turns back
to the setting screen to enable re-entries. Press the CANCEL key to cancel entries made so far
and to turn to the "Set. (change)" sub-menu.

4.2.6.2 Password
For the sake of security of setting changes, password protection can be set as follows:
• Select "Set. (change)" on the main "MENU" screen to display the "Setting change" screen.
• Select "Password" to display the "Password" screen.
• Enter a 4-digit number within the brackets after "Input" and press the ENTER key.

I n p u t [ _ ]

 127 
 6 F 2 S 0 7 5 8

1 2 3 4 5 6 7 8 9 0 ←

• For confirmation, enter the same 4-digit number in the brackets after "Retype".
R e t y p e [ _ ]
1 2 3 4 5 6 7 8 9 0 ←

• Press the END key to display the confirmation screen. If the retyped number is different from
that first entered, the following message is displayed on the bottom of the "Password" screen
before returning to the upper screen.
"Unmatch passwd!"
Re-entry is then requested.

Password trap
After the password has been set, the password must be entered in order to enter the setting change
screens.
If "Set. (change)" is entered on the top "MENU" screen, the password trap screen "Password" is
displayed. If the password is not entered correctly, it is not possible to move to the "Setting
(change)" sub-menu screens.
P a s s w o r d [ _ ]
1 2 3 4 5 6 7 8 9 0 ←

Canceling or changing the password

To cancel the password protection, enter "0000" in the two brackets on the "Password" screen. The
"Set. (change)" screen is then displayed without having to enter a password.
The password can be changed by entering a new 4-digit number on the "Password" screen in the
same way as the first password setting.

If you forget the password

Press CANCEL and RESET keys together for one second on the top "MENU" screen. The
screen goes off, and the password protection of the GRD140 is canceled. Set the password again.

4.2.6.3 Plant Name

To enter the plant name and other data, do the following. These data are attached to records.
• Select "Set. (change)" on the main "MENU" screen to display the " Set. (change)" screen.
• Select "Description" to display the "Description" screen.
/ 2 D e s c r i p t i o n
• P l a n t n a m e
• D e s c r i p t i o n

• To enter the plant name, select "Plant name" on the "Description" screen.
• To enter special items, select "Description" on the "Description" screen.
_
A B C D E F G
H I J K L M N
O P Q R S T U
V W X Y Z ←→

 128 
 6 F 2 S 0 7 5 8

a b c d e f g
h i j k l m n
o p q r s t u
v w x y z ←→
0 1 2 3 4 5 6
7 8 9 ←→
( ) [ ] @_ {
} ∗ / + − < =
> ! “ # $ %&
‘ : ; , . ˆ `
• Enter the text string.

4.2.6.4 Communication
If the relay is linked with RSM (relay setting and monitoring system) or IEC60870-5-103
communication, the relay address must be set. Do this as follows:
• Select "Set. (change)" on the main "MENU" screen to display the "Set. (change)" screen.
• Select "Comms" to display the "Comms" screen.
/ 2 C o m m s .
• A d d r . / P a r a m .
• S w i t c h
• Select "Addr./Param." on the "Comms" screen to enter the relay address number.
/ 3 A d d r . / P a r a m .

H D L C
1 _
I E C
2
I E C B 1 1
0
:
:
I E C B 4 4
0
I E C G T 1
1
I E C A T 1
1
I E C B T 1
1
I E C C T 1
1
I E C E 1 0
0
:
:
I E C E 8 0
0
I E C I 1 0
0
:
:
I E C I 8 0
0

 129 
 6 F 2 S 0 7 5 8

• Enter the relay address number on "HDLC" line for RSM or "IEC" line for IEC60870-5-103
and press the ENTER key.

CAUTION Do not overlap the relay address number.

Settings for IEC60870-5-103 communication

The lines "IECB1" to "IECB4" are used for auxiliary inputs of IEC103 events INF27 to INF30
in Appendix M. Assign signals to the columns "IECB1" to "IECB4" by entering the number
corresponding to each signal referring to Appendix C.
The lines "IECGT" to "IECCT" are used for fault indications of IEC103 events INF68 to
INF71 in Appendix M. Assign signals to the columns "IECGT" to "IECCT" by entering the BO
numbers (1 to 7) corresponding to the binary output settings.
The lines "IECE1" to "IECE8" are used to assign the signals for user customization. Assign
signals to the columns "IECE1" to "IECE8" by entering the number corresponding to each
signal referring to Appendix C.
Note: Assign "0" to the column when this function is not used.
The lines "IECI1" to "IECI8" are used to assign the above signals of "IECE1" to "IECE8" to
each INF number. Enter the INF number to the columns "IECI1" to "IECI8".
• Select "Switch" on the "Comms" screen to select the protocol and transmission speed (baud
rate), etc., of the RSM and IEC60870-5-103.
/ 3 S w i t c h .

P r
o t o c o l 0 _
H D
L C / I E C
2 3
2 C 0
9 .
6 / 1 9 . 2 / 5 7 . 6
I E
C B R 1
9 .
6 / 1 9 . 2
I E
C B L K 0
N o
r m a l / B l o c k e d
I E
C N F I 0
1 .
2 / 2 . 4
I E
C N F V 0
1 .
2 / 2 . 4
I E
C N F P 1
1 .
2 / 2 . 4
I E
C N F f 0
1 .
2 / 2 . 4
I E
C F L 0
P r
i m / S e c o n d / k m
I E
C G I 1 0
N o
/ Y e s
:
:
I E C G I 8 0
N o / Y e s

• Select the number and press the ENTER key.

<Protocol>
This setting is for changing the protocol (HDLC or IEC) of the channel 1 (COM1 port). In the
model with two channels (COM1 and COM2 ports), this setting for COM1 should be “HDLC”.

 130 
 6 F 2 S 0 7 5 8

• When the remote RSM system applied, select 0(=HDLC). When the IEC60870-5-103 applied,
select 1(=IEC103).
CAUTION When changing the setting to the HDLC during the IEC103 operation, the IEC103
command INF18 in Appendix M is canceled.
The output of IEC103 command INF18 can be observed by assigning their
signal numbers to LEDs or binary output relays (see Sections 4.2.6.9 and
4.2.6.10).

<232C>
This line is to select the RS-232C baud rate when the RSM system applied.
Note: The default setting of the 232C is 9.6kbps. The 57.6kbps setting, if possible, is recommended to
serve user for comfortable operation. The setting of RSM100 is also set to the same baud rate.

<IECBR>
This line is to select the baud rate when the IEC60870-5-103 system applied.

<IECBLK>
Enter 1(=Blocked) to block the monitor direction in the IEC60870-5-103 communication.

<IECNFI , IECNFV, IECNFP, IECNFf>

These lines are to select the normalized factor (1.2 or 2.4) of the current measurand.
IECNFI: Current
IECNFV: Voltage
IECNFP: Active power, Reactive power
IECNFf: Frequency

<IECFL >
This line is to select the measurement result of the fault locator which is expressed as the primary
side value or the secondary side value of power system impedance, or the distance (km).

<IECGI1 - 8 >
These lines are to use the GI (General Interrogation) or not for user customized signals. If use the
GI, enter 1(=Yes).

4.2.6.5 Setting the Recording

To set the recording function as described in Section 4.2.3, do the following:
• Select "Set. (change)" on the main "MENU" screen to display the "Set. (change)" screen.
• Select "Record" to display the "Record " screen.
/ 2 R e c o r d
• F . r e c o r d
• E . r e c o r d
• D . r e c o r d
• C o u n t e r

Setting the fault recording

• Select "F. record" to display the "F. record" screen.

 131 
 6 F 2 S 0 7 5 8

/ 3 F . r e c o r d

F a u l t L o c . 0 _
O f f / O n
• Enter 1 to enable the fault locator. If to disable the fault locator, enter 0.

Setting the event recording

• Select "E. record" to display the "E. record" screen.

/ 3 E . r e c o r d

B I 1 c o m m . 3 _
N / O / R / B
B I 2 c o m m . 3
N / O / R / B
B I 3 c o m m . 3
N / O / R / B
B I 4 c o m m . 3
N / O / R / B
B I 5 c o m m . 3
N / O / R / B
• Enter 0(=None) or 1(=Operate) or 2(=Reset) or 3(=Both) for BI command trigger setting and
press the ENTER key.

Setting the disturbance recording

• Select "D. record" to display the "D. record" screen.

/ 3 D . r e c o r d
• T i m e / s t a r t e r
• S c h e m e s w
• B i n a r y s i g .

• Select "Time/starter" to display the "Time/starter" screen.

/ 4 T i m e / s t a r t e r

T i m e s
2 . 0 _
O C A
2 . 0 0
E F A
0 . 6 0
S E F A
0 . 2 0 0
N C A
0 . 4 0
O V V
1 2 0 . 0
U V V
6 0 . 0
Z O V V
2 0 . 0
N O V V
2 0 . 0

 132 
 6 F 2 S 0 7 5 8

• Enter the recording time and starter element settings.

To set each starter to use or not to use, do the following:
• Select "Scheme sw" on the "D. record" screen to display the "Scheme sw" screen.
/ 4 S c h e me s w

T r i p 1 _
O f f / O n
B I 1
O f f / O n
O C 1
O f f / O n
E F 1
O f f / O n
S E F 1
O f f / O n
N C 1
O f f / O n
O V 1
O f f / O n
U V 1
O f f / O n
Z O V 1
O f f / O n
N O V 1
O f f / O n
• Enter 1 to use as a starter. If not to be used as a starter, enter 0.
To set each signal number to record binary signals, do the following:
• Select "Binary sig." on the "D. record" screen to display the "Binary sig." screen.
/ 4 B i n a r y s i g .

S I G 1
1 0 1 _
S I G 2
1 0 2
S I G 3 2
1 3 3
• Enter the signal number to record binary signals in Appendix C.

Setting the counter

• Select "Counter" to display the "Counter" screen.

/ 3 C o u n t e r
• S c h e m e s w
• A l a r m s e t
To set each counter to use or not to use, do the following:
• Select "Scheme sw" on the "Counter" screen to display the "Scheme sw" screen.
/ 4 S c h e me s w

T C S P E N 0 _

 133 
 6 F 2 S 0 7 5 8

O f f / O n / O p t - O n
C B S M E N 0
O f f / O n
T C A E N 0
O f f / O n
Σ I y A E N 0
O f f / O n
O P T A E N 0
O f f / O n
• Enter 1 to use as a counter. If not to be used as a counter, enter 0.
To set threshold setting, do the following:
• Select "Alarm set" on the "Counter" screen to display the "Alarm set" screen.
/ 4 A l a r m s e t

T C L A M
1 0 0 0 0 _
Σ I A y L M E 6
1 0 0 0 0
Y V L A U E
2 . 0
O P T A L M m s
1 0 0 0
• Enter the threshold settings.

4.2.6.6 Status
To set the status display described in Section 4.2.4, do the following:
Select "Status" on the "Set. (change)" sub-menu to display the "Status" screen.
/ 2 S t a t u s
• M e t e r i n g
• T i m e s y n c .

Setting the metering

• Select "Metering" to display the "Metering" screen.

/ 3 M e t e r i n g

D i s p l a y 1 _
P r i m . / S e c o n d .
P o w e r 0
S e n d / R e c e i v e
C u r r e n t 0
L a g / L e a d
• Enter 0(=Primary side) or 1(=Secondary side) for Display, 0(=Send) or 1(=Receive) for
Power, and 0(=Lag) or 1(=Lead) for Current, and press the ENTER key.

 134 
 6 F 2 S 0 7 5 8

By above settings, the active power and reactive power expressed as follows:
Active power Power Reactive power Power
(P) Send Receive (Q) Send Receive
Lead + − Lead + +
Current Current
Lag + − Lag − −

Setting the time synchronisation

The calendar clock can run locally or be synchronised with the binary input signal, RSM clock, or
by an IEC60870-5-103. This is selected by setting as follows.
• Select "Time sync." to display the "Time sync" screen.
/ 3 T i m e s y n c .

T i m e s y n c . 0 _
O f f / B I / R S M / I E C

• Enter 0, 1, 2 or 3 and press the ENTER key.

Enter 0(=off) not to be synchronised with any external signals.
Enter 1(=BI) to be synchronised with the binary input signal.
Enter 2(=RSM) to be synchronised with the RSM clock.
Enter 3(=IEC) to be synchronised with IEC60870-5-103.
Note: When selecting BI, RSM or IEC, check that they are active on the "Status" screen in "Status"
sub-menu.
If BI is selected, the BI command trigger setting should be “None” because event records will
become full soon. (See Section 4.2.6.5.)
If it is set to an inactive BI, RSM or IEC, the calendar clock runs locally.

4.2.6.7 Protection
The GRD140 can have 4 setting groups for protection in order to accommodate changes in the
operation of the power system, one setting group is assigned active. To set the protection, do the
following:
• Select "Protection" on the "Set. (change)" screen to display the "Protection" screen.
/ 2 P r o t e c t i o n
• C h a n g e a c t . g p .
• C h a n g e s e t .
• C o p y g p .

Changing the active group

• Select "Change act. gp." to display the "Change act. gp." screen.
/ 3 C h a n g e a c t .
g p .
A c t i v e g p . 1 _

• Enter the group number and press the ENTER key.

 135 
 6 F 2 S 0 7 5 8

Changing the settings

Almost all the setting items have default values that are set when the product is shipped. For the
default values, see Appendix H. To change the settings, do the following:
• Select "Change set." to display the "Act gp.= *" screen.
/ 3 A c t g p . = ∗
• C o m m o n
• G r o u p 1
• G r o u p 2
• G r o u p 3
• G r o u p 4

Changing the Common settings

• Select "Common" to set the current and voltage input state and input imbalance monitoring for
GRD140-400 and -420 and press the ENTER key.

/ 4 C o m m o n

A P P L C T 1 _
O f f / 3 P / 2 P / 1 P
A P P L V T 1
O f f / 3 P N / 3 P V
O p t i m e 0
N o r m a l / F a s t
C T F E N 0
O f f / O n / O P T - O n
V T F 1 E N 0
O f f / O n / O P T - O n
V T F 2 E N 0
O f f / O n / O P T - O n
C T S V E N 2
O f f / A L M & B L K / A L M
V 0 S V E N 2
O f f / A L M & B L K / A L M
V 2 S V E N 2
O f f / A L M & B L K / A L M
<APPLCT>
• Enter 0(=Off: not used), 1(=3P: 3 phase), 2(=2P: 2 phase) or 3(=1P: 1 pole) to set the current
input state and press the ENTER key.

<APPLVT>
• Enter 0(=Off: not used), 1(=3PN: three phase-to-neutral voltage input) or 2(=3PV: three
phase-to-neutral voltage and zero sequence voltage input) and press the ENTER key.

<Optime>
• Enter 0(=Normal : Transient free operation), 1(=Fast : High speed operation) to set the
operating time and press the ENTER key.
Note: If “Fast” selected, all OC and EF elements operate at high-speed ( approximately 20ms).

 136 
 6 F 2 S 0 7 5 8

<CTFEN, VTF1EN, VTF2EN>

To set CT failure function and VT failure function enable, do the following.
• Enter 0(=Off) or 1(=On) or 2(=OPT-On) by pressing the or key and press the ENTER
key.

< CTSVEN, V0SVEN, V2SVEN>

To set AC input imbalance supervision enable, do the following.
• Enter 0(=Off) or 1(=ALM&BLK) or 2(=ALM) by pressing the or key and press the
ENTER key.

Changing the Group settings

• Select the "Group∗" on the "Act gp.= *" screen to change the settings and press the ENTER
key.
/ 4 G r o u p ∗
• P a r a m e t e r
• T r i p
• A R C

Setting the parameter

Enter the line name, the CT/VT ratio and the fault locator as follows:
• Select "Parameter" on the "Group ∗" screen to display the "Parameter" screen.
/ 5 P a r a m e t e r
• L i n e n a m e
• C T / V T r a t i o
• F a u l t L o c a t o r

• Select "Line name" to display the "Line name" screen.

• Enter the line name as a text string and press the EN D key.
• Select "CT/VT ratio" to display the "CT/VT ratio" screen.
/ 6 C T / V T r a t i o

O C C T
4 0 0 _
E F C T
4 0 0
O C E F C T
4 0 0
S E F C T
4 0 0
P V T
1 0 0
R V T
1 0 0
Note: The "CT/VT ratio" screen depends on the APPLCT and APPLVT setting.

• Enter the CT/VT ratio and press the ENTER key.

• Select "Fault Locator" to display the "Fault Locator" screen.

 137 
 6 F 2 S 0 7 5 8

/ 6 F a u l t L o c .
X 1 O H M
1 0 . 0 _
X 0 O H M
3 4 . 0
R 1 O H M
1 . 0
R 0 O H M
3 . 5
K a b %
1 0 0
K b c %
1 0 0
K c a %
1 0 0
K a %
1 0 0
K b %
1 0 0
K c %
1 0 0
L I N E k m
5 0 . 0

• Enter the setting value and press the ENTER key.

Setting the trip function

To set the scheme switches and protection elements, do the following.
• Select "Trip" on the "Group ∗" screen to display the "Trip" screen.
/ 5 T r i p
• S c h e m e s w
• P r o t . e l e m e n t

Setting the scheme switch

• Select "Scheme sw" on the "Trip" screen to display the "Scheme sw" screen.
/ 6 S c h e me s w
• A p p l i c a t i o n
• O C
• E F
• S E F
• N O C
• M i s c
• C o l d L o a d
• O V
• U V
• Z O V
• N O V
• F R Q

Setting the application

To set the application setting, do the following.
• Select "Application" on the " Scheme sw" screen to display the "Application" screen.

 138 
 6 F 2 S 0 7 5 8

/ 7 A p p l i c a t i o n

M O C 1 1 _
D / I E C / I E E E / U S / C
M E F 1 1
D / I E C / I E E E / U S / C
M S E 1 1
D / I E C / I E E E / U S / C

<MOC1>, <MEF1>, <MSE1>

To set the OC1, EF1 and SEF1 time delay characteristic type, do the following.
• Enter 0(=D: DT) or 1(=IEC) or 2(=IEEE) or 3(=US) or 4(=C: CON) and press the ENTER
key.

Setting the OC protection

The settings for the OC protection are as follows:
• Select "OC" on the "Scheme sw" screen to display the "OC" screen.
/ 7 O C

O C 1 E N 1 _
O f f / O n
O C 1 - D I R 0
F W D / R E V / N O N
M O C 1 C - I E C 0 This setting is displayed if [MOC1] is 1(=IEC).
N I / V I / E I / L T I
M O C 1 C - I E E E 0 This setting is displayed if [MOC1] is 2(=IEEE).
M I / V I / E I
M O C 1 C - U S 0 This setting is displayed if [MOC1] is 3(=US).
C O 2 / C O 8
O C 1 R 0
D E F / D E P
V T F - O C 1 B L K 0
O f f / O n
O C 2 E N 0
O f f / O n
O C 2 - D I R 0
F W D / R E V / N O N
V T F - O C 2 B L K 0
O f f / O n
O C 3 E N 0
O f f / O n
O C 3 - D I R 0
F W D / R E V / N O N
V T F - O C 3 B L K 0
O f f / O n
O C 4 E N 0
O f f / O n
O C 4 - D I R 0
F W D / R E V / N O N
V T F - O C 4 B L K 0
O f f / O n
O C T P 0
3 P O R / 2 O U T O F 3

 139 
 6 F 2 S 0 7 5 8

<OC∗EN>
• Enter 1(=On) to enable the OC∗ and press the ENTER key. If disabling the OC∗, enter
0(=Off) and press the ENTER key.

<OC∗-DIR>
To set the OC∗ directional characteristic, do the following.
• Enter 0(=FWD) or 1(=REV) or 2(=NON) and press the ENTER key.

<MOC1C>
To set the OC1 Inverse Curve Type, do the following.
• If [MOC1] is 1(=IEC), enter 0(=NI) or 1(=VI) or 2(=EI) or 3(=LTI) and press the ENTER
key.
• If [MOC1] is 2(=IEEE), enter 0(=MI) or 1(=VI) or 2(=EI) and press the ENTER key.

• If [MOC1] is 3(=US), enter 0(=CO2) or 1(=CO8) and press the ENTER key.

<OC1R>
To set the Reset Characteristic, do the following.
• If [MOC1] is 2(=IEEE) or 3(=US), enter 0(=DEF) or 1(=DEP) and press the ENTER key.

<VTF-OC∗BLK>
To set the VTF block enable of OC∗, do the following.
• Enter 1(=On) to enable "Trip block" by the VTF function and press the ENTER key. If
disabling it, enter 0(=Off) and press the ENTER key.

<OCTP>
To set the trip mode, do the following.
• Enter 0(=3POR) or 1(=2OUTOF3) and press the ENTER key. If the “2OUTOF3” selected,
the trip signal is not issued when only one phase element operates.

• After setting, press the END key to display the following confirmation screen.

C h a n g e s e t t i n g s ?
E N T E R = Y C A N C E L = N

• Press the ENTER (=Y) key to change settings and return to the "Scheme sw" screen.

Setting the EF protection

The settings for the EF protection are as follows:
• Select the "EF" on the "Scheme sw" screen to display the "EF" screen.
/ 7 E F

E F 1 E N 1 _
O f f / O n / P O P

 140 
 6 F 2 S 0 7 5 8

E F 1 - D I R 0
F W D / R E V / N O N
M E F 1 C - I E C 0 This setting is displayed if [MEF1] is 1(=IEC).
N I / V I / E I / L T I
M E F 1 C - I E E E 0 This setting is displayed if [MEF1] is 2(=IEEE).
M I / V I / E I
M E F 1 C - U S 0 This setting is displayed if [MEF1] is 3(=US).
C O 2 / C O 8
E F 1 R 0
D E F / D E P
C T F - E F 1 B L K 0
O f f / O n
V T F - E F 1 B L K 0
O f f / O n
E F 2 E N 0
O f f / O n / P O P
E F 2 - D I R 0
F W D / R E V / N O N
C T F - E F 2 B L K 0
O f f / O n
V T F - E F 2 B L K 0
O f f / O n
E F 3 E N 0
O f f / O n / P O P
E F 3 - D I R 0
F W D / R E V / N O N
C T F - E F 3 B L K 0
O f f / O n
V T F - E F 3 B L K 0
O f f / O n
E F 4 E N 0
O f f / O n
E F 4 - D I R 0
F W D / R E V / N O N
C T F - E F 4 B L K 0
O f f / O n
V T F - E F 4 B L K 0
O f f / O n
C U R R E V 0
O f f / 1 / 2 / 3 / 4

<EF∗EN>
• Enter 1(=On) to use an earth fault protection or enter 2(=POP) to use the directional earth fault
command protection (POP scheme), and press the ENTER key. If disabling the EF∗, enter
0(=Off) and press the ENTER key.

<EF∗-DIR>
To set the EF∗ directional characteristic, do the following.
• Enter 0(=FWD) or 1(=REV) or 2(=NON) and press the ENTER key.

<MEF1C>
To set the EF1 Inverse Curve Type, do the following.
• If [MEF1] is 1(=IEC), enter 0(=NI) or 1(=VI) or 2(=EI) or 3(=LTI) and press the ENTER
key.

 141 
 6 F 2 S 0 7 5 8

• If [MEF1] is 2(=IEEE), enter 0(=MI) or 1(=VI) or 2(=EI) and press the ENTER key.

• If [MEF1] is 3(=US), enter 0(=CO2) or 1(=CO8) and press the ENTER key.

<EF1R>
To set the Reset Characteristic, do the following.
• If [MEF1] is 2(=IEEE) or 3(=US), enter 0(=DEF) or 1(=DEP) and press the ENTER key.

<CTF-EF∗BLK>, <VTF-EF∗BLK>
To set the CTF block and VTF block enable of EF∗, do the following.
• Enter 1(=On) to enable "Trip block" by the CTF function and VTF function, and press the
ENTER key. If disabling them, enter 0(=Off) and press the ENTER key.

<CURREV>
To set which stage is used for current reverse detection in the command protection, do the
following.
• Enter 1(=EF1), 2(=EF2), 3(EF3) or 4(=EF4) and press the ENTER key. If disabling them,
enter 0(=Off) and press the ENTER key.

• After setting, press the END key to display the following confirmation screen.

C h a n g e s e t t i n g s ?
E N T E R = Y C A N C E L = N

• Press the ENTER (=Y) key to change settings and return to the "Scheme sw" screen.

Setting the SEF protection

The settings for the SEF protection are as follows:
• Select "SEF" on the "Scheme sw" screen to display the "SEF" screen.
/ 7 S E F

S E 1 E N 1 _
O f f / O n
S E 1 - D I R 0
F W D / R E V / N O N
M S E 1 C - I E C 0 This setting is displayed if [MSE1] is 1(=IEC).
N I / V I / E I / L T I
M S E 1 C - I E E E 0 This setting is displayed if [MSE1] is 2(=IEEE).
M I / V I / E I
M S E 1 C - U S 0 This setting is displayed if [MSE1] is 3(=US).
C O 2 / C O 8
S E 1 R 0
D E F / D E P
S E 1 S 2 0
O f f / O n
V T F - S E 1 B L K 0
O f f / O n
S E 2 E N 0
O f f / O n
S E 2 - D I R 0

 142 
 6 F 2 S 0 7 5 8

F W D / R E V / N O N
V T F - S E 2 B L K 0
O f f / O n
S E 3 E N 0
O f f / O n
S E 3 - D I R 0
F W D / R E V / N O N
V T F - S E 3 B L K 0
O f f / O n
S E 4 E N 0
O f f / O n
S E 4 - D I R 0
F W D / R E V / N O N
V T F - S E 4 B L K 0
O f f / O n
R P E N
O f f / O n

<SE∗EN>
• Enter 1(=On) to enable the SEF∗ and press the ENTER key. If disabling the SEF∗, enter
0(=Off) and press the ENTER key.

<MSE1C>
To set the SEF1 Inverse Curve Type, do the following.
• If [MSE1] is 1(=IEC), enter 0(=NI) or 1(=VI) or 2(=EI) or 3(=LTI) and press the ENTER
key.
• If [MSE1] is 2(=IEEE), enter 0(=MI) or 1(=VI) or 2(=EI) and press the ENTER key.

• If [MSE1] is 3(=US), enter 0(=CO2) or 1(=CO8) and press the ENTER key.

<SE1R>
To set the Reset Characteristic, do the following.
• If [MSE1] is 2(=IEEE) or 3(=US), enter 0(=DEF) or 1(=DEP) and press the ENTER key.

<SE1S2>
To set the Stage 2 Timer Enable, do the following.
• Enter 1(=On) to enable the SE1S2 and press the ENTER key. If disabling the SE1S2, enter
0(=Off) and press the ENTER key.

<VTF-SE∗BLK>
To set the VTF block enable of SE∗, do the following.
• Enter 1(=On) to enable "Trip block" by the VTF function and press the ENTER key. If
disabling it, enter 0(=Off) and press the ENTER key.

<RPEN>
To set the residual power block enable of SE∗, do the following.
• Enter 1(=On) to enable "Trip block" by the residual power block function and press the

 143 
 6 F 2 S 0 7 5 8

ENTER key. If disabling it, enter 0(=Off) and press the ENTER key.

• After setting, press the END key to display the following confirmation screen.

C h a n g e s e t t i n g s ?
E N T E R = Y C A N C E L = N

• Press the ENTER (=Y) key to change settings and return to the "Scheme sw" screen.

Setting the NOC protection

The settings for the NOC protection are as follows:
• Select the "NOC" on the "Scheme sw" screen to display the "NOC" screen.
/ 7 N O C

N C 1 E N 1 _
O f f / O n
N C 1 - D I R 0
F W D / R E V / N O N
C T F - N C 1 B L K 0
O f f / O n
V T F - N C 1 B L K 0
O f f / O n
N C 2 E N 0
O f f / O n
N C 2 - D I R 0
F W D / R E V / N O N
C T F - N C 2 B L K 0
O f f / O n
V T F - N C 2 B L K 0
O f f / O n

<NC∗EN>
• Enter 1(=On) to enable the NC∗ and press the ENTER key. If disabling the NC∗, enter
0(=Off) and press the ENTER key.

<NC∗-DIR>
To set the NC∗ directional characteristic, do the following.
• Enter 0(=FWD) or 1(=REV) or 2(=NON) and press the ENTER key.

<CTF-NC∗BLK>, <VTF-NC∗BLK>
To set the CTF block and VTF block enable of NC∗, do the following.
• Enter 1(=On) to enable "Trip block" by the CTF function and VTF function, and press the
ENTER key. If disabling them, enter 0(=Off) and press the ENTER key.

• After setting, press the END key to display the following confirmation screen.

C h a n g e s e t t i n g s ?
E N T E R = Y C A N C E L = N

• Press the ENTER (=Y) key to change settings and return to the "Scheme sw" screen.

 144 
 6 F 2 S 0 7 5 8

Setting the Misc. protection

The settings for the miscellaneous protection are as follows:
• Select "Misc." on the "Scheme sw" screen to display the "Misc." screen.
/ 7 Mi s c .

U C 1 E N 0 _
O f f / O n
C T F - U C 1 B L K 0
O f f / O n
U C 2 E N 0
O f f / O n
C T F - U C 2 B L K 0
O f f / O n
T H M E N 0
O f f / O n
T H M A E N 0
O f f / O n
B C D E N 0
O f f / O n
B T C 0
O f f / O n
R T C 0
O f f / D I R / O C

<UC∗EN>
• Enter 1(=On) to enable the UC∗ and press the ENTER key. If disabling the UC∗, enter
0(=Off) and press the ENTER key.

<CTF-UC∗BLK>
To set the CTF block enable of UC∗, do the following.
• Enter 1(=On) to enable "Trip block" by the CTF function, and press the ENTER key. If
disabling it, enter 0(=Off) and press the ENTER key.

<THMEN>
• Enter 1(=On) to enable the Thermal OL and press the ENTER key. If disabling the Thermal
OL, enter 0(=Off) and press the ENTER key.

<THMAEN>
• Enter 1(=On) to enable the Thermal Alarm and press the ENTER key. If disabling the
Thermal Alarm, enter 0(=Off) and press the ENTER key.

<BCDEN>
• Enter 1(=On) to enable the Broken Conductor and press the ENTER key. If disabling the
Broken Conductor, enter 0(=Off) and press the ENTER key.

<BTC>
• Enter 1(=On) to set the Back-trip control and press the ENTER key. If not setting the

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 6 F 2 S 0 7 5 8

Back-trip control, enter 0(=Off) and press the ENTER key.

<RTC>
To set the Re-trip control, do the following.
• Enter 0(=Off) or 1(=Direct) or 2(=OC controlled) and press the ENTER key.

Setting the Cold Load protection

The settings for the Cold Load protection are as follows:
• Select "Misc." on the "Scheme sw" screen to display the "Misc." screen.
/ 7 C o l d L o a d

C L E N 0 _
O f f / O n
C L D O E N 0
O f f / O n

<CLEN>
To set the Cold load function enable, do the following.
• Enter 1(=On) to enable the Cold Load function and press the ENTER key. If disabling the
Cold Load, enter 0(=Off) and press the ENTER key.

<CLDOEN>
• Enter 1(=On) to enable the Cold Load drop-off and press the ENTER key. If disabling the
Cold Load drop-off, enter 0(=Off) and press the ENTER key.

• After setting, press the END key to display the following confirmation screen.

C h a n g e s e t t i n g s ?
E N T E R = Y C A N C E L = N

• Press the ENTER (=Y) key to change settings and return to the "Scheme sw" screen.

Setting the OV protection

The settings for the OV protection are as follows:
• Select "OV" on the "Scheme sw" screen to display the "OV" screen.
/ 7 O V

O V 1 E N 0 _
O f f / D T / I D M T
O V 2 E N 0
O f f / O n

<OV1EN>
To set the OV1 delay type, do the following.
• Enter 1 (=DT) or 2 (=IDMT) and press the ENTER key. If disabling the OV1, enter 0 (=Off)
and press the ENTER key.

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 6 F 2 S 0 7 5 8

<OV2EN>
• Enter 1 (=On) to enable the OV2 and press the ENTER key. If disabling the OV2, enter 0
(=Off) and press the ENTER key.

• After setting, press the END key to display the following confirmation screen.

C h a n g e s e t t i n g s ?
E N T E R = Y C A N C E L = N

• Press the ENTER (= Y) key to change settings and return to the "Scheme sw" screen.

Setting the UV protection

The settings for the UV protection are as follows:
• Select "UV" on the "Scheme sw" screen to display the "UV" screen.
/ 7 U V

U V 1 E N 1 _
O f f / D T / I D M T
V T F - U V 1 B L K 0
O f f / O n
U V 2 E N 0
O f f / O n
V B L K E N 0
O f f / O n
V T F - U V 2 B L K 0
O f f / O n

<UV1EN>
To set the UV1 delay type, do the following.
• Enter 1 (=DT) or 2 (=IDMT) and press the ENTER key. If disabling the UV1, enter 0 (=Off)
and press the ENTER key.

<UV2EN>
• Enter 1 (=On) to enable the UV2 and press the ENTER key. If disabling the UV2, enter 0
(=Off) and press the ENTER key.

<VBLKEN>
• Enter 1 (=On) to enable the UV blocking and press the ENTER key. If disabling the UV
blocking, enter 0 (=Off) and press the ENTER key.

<VTF-UV∗BLK>
To set the VTF block enable of UV∗, do the following.
• Enter 1(=On) to enable "Trip block" by the VTF function and press the ENTER key. If
disabling it, enter 0(=Off) and press the ENTER key.

• After setting, press the END key to display the following confirmation screen.

 147 
 6 F 2 S 0 7 5 8

C h a n g e s e t t i n g s ?
E N T E R = Y C A N C E L = N

• Press the ENTER (= Y) key to change settings and return to the "Scheme sw" screen.

Setting the ZOV protection

The settings for the ZOV protection are as follows:
• Select "ZOV" on the "Scheme sw" screen to display the "ZOV" screen.
/ 7 Z O V

Z O V 1 E N 1 _
O f f / D T / I D M T
V T F - Z V 1 B L K 0
O f f / O n
Z O V 2 E N 0
O f f / O n
V T F - Z V 2 B L K 0
O f f / O n

<ZOV1EN>
To set the ZOV1 delay type, do the following.
• Enter 1(=DT) or 2(=IDMT) and press the ENTER key. If disabling the ZOV1, enter 0(=Off)
and press the ENTER key.

< ZOV2EN >

• Enter 1(=On) to enable the ZOV2 and press the ENTER key. If disabling the ZOV2, enter
0(=Off) and press the ENTER key.

<VTF-ZV∗BLK>
To set the VTF block enable of ZOV∗, do the following.
• Enter 1(=On) to enable "Trip block" by the VTF function and press the ENTER key. If
disabling it, enter 0(=Off) and press the ENTER key.

• After setting, press the END key to display the following confirmation screen.

C h a n g e s e t t i n g s ?
E N T E R = Y C A N C E L = N

• Press the ENTER (= Y) key to change settings and return to the "Scheme sw" screen.

Setting the NOV protection

The settings for the NOV protection are as follows:
• Select "NOV" on the "Scheme sw" screen to display the "NOV" screen.
/ 7 N O V

N O V 1 E N 1 _
O f f / D T / I D M T
V T F - N V 1 B L K 0

 148 
 6 F 2 S 0 7 5 8

O f f / O n
N O V 2 E N 0
O f f / O n
V T F - N V 2 B L K 0
O f f / O n

<NOV1EN>
To set the NOV1 delay type, do the following.
• Enter 1(=DT) or 2(=IDMT) and press the ENTER key. If disabling the NOV1, enter 0(=Off)
and press the ENTER key.

< NOV2EN >

• Enter 1(=On) to enable the NOV2 and press the ENTER key. If disabling the NOV2, enter
0(=Off) and press the ENTER key.

<VTF-NV∗BLK>
To set the VTF block enable of NOV∗, do the following.
• Enter 1(=On) to enable "Trip block" by the VTF function and press the ENTER key. If
disabling it, enter 0(=Off) and press the ENTER key.

• After setting, press the END key to display the following confirmation screen.

C h a n g e s e t t i n g s ?
E N T E R = Y C A N C E L = N

• Press the ENTER (= Y) key to change settings and return to the "Scheme sw" screen.

Setting the FRQ protection

The settings for the FRQ (over/under frequency) protection are as follows:
• Select "FRQ" on the "Scheme sw" screen to display the "FRQ" screen.
/ 7 F R Q

F R Q 1 E N 0 _
O f f / O F / U F
F R Q 2 E N 0
O f f / O F / U F
F R Q 3 E N 0
O f f / O F / U F
F R Q 4 E N 0
O f f / O F / U F

<FRQ∗EN>
To set the FRQ∗ scheme enable, do the following.
• Enter 1(=OF, overfrequency) or 2(=UF, underfrequency) and press the ENTER key. If
disabling the FRQ∗, enter 0(=Off) and press the ENTER key.

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 6 F 2 S 0 7 5 8

Setting the protection elements

To set the protection elements, do the following.

• Select "Prot. element" on the "Trip" screen to display the "Prot. element" screen.
/ 6 P r o t . e l e m e n t
• O C
• E F
• S E F
• N O C
• M i s c
• C o l d L o a d
• O V
• U V
• Z O V
• N O V
• F R Q
• C T F / V T F

Setting the OC elements

• Select "OC" on the "Prot. element" screen to display the "OC" screen.
/ 7 O C

O C θ ° Directional characteristic setting

4 5 _
O C 1 A
1 . 0 0
T O C 1 M
1 . 0 0 0
T O C 1 s
1 . 0 0
T O C 1 R s
0 . 0
T O C 1 R M
1 . 0 0 0
O C 2 A
5 . 0 0
T O C 2 s
0 . 0 0
O C 3 A
1 0 . 0 0
T O C 3 s
0 . 0 0
O C 4 A
2 0 . 0 0
T O C 4 s
0 . 0 0
O C 1 - k OC1 User configurable IDMT curve setting
0 . 0 0 0
O C 1 - α ditto
0 . 0 0
O C 1 - C ditto
0 . 0 0 0
O C 1 - k r ditto
0 . 0 0 0
O C 1 - β ditto

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 6 F 2 S 0 7 5 8

0 . 0 0

• Enter the numerical value and press the ENTER key.

• After setting, press the END key to display the following confirmation screen.

C h a n g e s e t t i n g s ?
E N T E R = Y C A N C E L = N

• Press the ENTER (=Y) key to change settings and return to the "Prot. element" screen.

Setting the EF elements

• Select "EF" on the "Prot. element" screen to display the "EF" screen.
/ 7 E F

E F θ ° Directional characteristic setting

− 4 5 _
E F V V V0 threshold setting for directional characteristic
3 . 0
E F 1 A
0 . 3 0 _
T E F 1 M
1 . 0 0 0
T E F 1 s
1 . 0 0
T E F 1 R s
0 . 0
T E F 1 R M
1 . 0 0 0
E F 2 A
3 . 0 0
T E F 2 s
1 . 0 0
E F 3 A
5 . 0 0
T E F 3 s
0 . 0 0
E F 4 A
1 0 . 0 0
T E F 4 s
0 . 0 0
T R E B K s Delay time of current reverse detection
0 . 1 0
E F 1 - k EF1 User configurable IDMT curve setting
0 . 0 0 0
E F 1 - α ditto
0 . 0 0
E F 1 - C ditto
0 . 0 0 0
E F 1 - k r ditto
0 . 0 0 0
E F 1 - β ditto
0 . 0 0

• Enter the numerical value and press the ENTER key.

• After setting, press the END key to display the following confirmation screen.

 151 
 6 F 2 S 0 7 5 8

C h a n g e s e t t i n g s ?
E N T E R = Y C A N C E L = N

• Press the ENTER (=Y) key to change settings and return to the "Prot. element" screen.

Setting the SEF elements

• Select "SEF" on the "Prot. element" screen to display the "SEF" screen.
/ 7 S E F

S E θ ° Directional characteristic setting

+ 9 0 _
S E V V V0 threshold setting for directional characteristic
3 . 0
S E 1 A
0 . 0 1 0
T S E 1 M
1 . 0 0 0
T S E 1 s
1 . 0 0
T S E 1 R s
0 . 0
T S E 1 R M
1 . 0 0 0
T S 1 S 2 s
0 . 0 0
S E 2 A
0 . 0 1 0
T S E 2 s
1 . 0 0
S E 3 A
0 . 0 1 0
T S E 3 s
0 . 0 0
S E 4 A
0 . 0 10
T S E 4 s
0 . 0 0
S E 1 - k SE1 User configurable IDMT curve setting
0 . 0 0 0
S E 1 - α ditto
0 . 0 0
S E 1 - C ditto
0 . 0 0 0
S E 1 - k r ditto
0 . 0 0 0
S E 1 - β ditto
0 . 0 0

• Enter the numerical value and press the ENTER key.

• After setting, press the END key to display the following confirmation screen.

C h a n g e s e t t i n g s ?
E N T E R = Y C A N C E L = N

• Press the ENTER (=Y) key to change settings and return to the "Prot. element" screen.

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Setting the NOC elements

• Select "EF" on the "Prot. element" screen to display the "EF" screen.
/ 7 N O C

N C θ ° Directional characteristic setting

− 4 5 _
N C V V V0 threshold setting for directional characteristic
3 . 0
N C 1 A
0 . 2 0
T N C 1 s
1 . 0 0
T N C 1 R s
0 . 0
T N C 1 R M
1 . 0 0 0
N C 2 A
0 . 4 0
T N C 2 s
0 . 0 0

• Enter the numerical value and press the ENTER key.

• After setting, press the END key to display the following confirmation screen.

C h a n g e s e t t i n g s ?
E N T E R = Y C A N C E L = N

• Press the ENTER (=Y) key to change settings and return to the "Prot. element" screen.

Setting the Misc. protection elements

• Select "Misc." on the "Prot. element" screen to display the "Misc." screen.
/ 7 Mi s c .

U C 1 A
0 . 4 0 _
T U C 1 s
1 . 0 0
U C 2 A
0 . 2 0
T U C 2 s
1 . 0 0
T H M A
1 . 0 0
T H M I P A
0 . 0 0
T T H M m i n
1 0 . 0
T H M A %
8 0
B C D
0 . 2 0
T B C D s
0 . 0 0
C B F A

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 6 F 2 S 0 7 5 8

0 . 5 0
T B T C s
0 . 5 0
T R T C s
1 . 0 0

• Enter the numerical value and press the ENTER key.

• After setting, press the END key to display the following confirmation screen.

C h a n g e s e t t i n g s ?
E N T E R = Y C A N C E L = N

• Press the ENTER (=Y) key to change settings and return to the "Prot. element" screen.

Setting the Cold Load protection elements

• Select "Cold Load" on the "Prot. element" screen to display the "Cold Load" screen.
/ 7 Mi s c .

O C 1 A
2 . 0 0 _
O C 2 A
1 0 . 0 0
O C 3 A
2 0 . 0 0
O C 4 A
4 0 . 0 0
E F 1 A
2 . 0 0
E F 2 A
1 0 . 0 0
E F 3 A
2 0 . 0 0
E F 4 A
4 0 . 0 0
S E 1 A
0 . 0 2 0
S E 2 A
0 . 0 2 0
S E 3 A
0 . 0 2 0
S E 4 A
0 . 0 2 0
N C 1 A
0 . 8 0
N C 2 A
0 . 4 0
B C D
0 . 4 0
T C L E s
1 0 0
T C L R s
1 0 0
I C L D O A
0 . 5 0
T C L D O s
0 . 0 0

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 6 F 2 S 0 7 5 8

• Enter the numerical value and press the ENTER key.

• After setting, press the END key to display the following confirmation screen.

C h a n g e s e t t i n g s ?
E N T E R = Y C A N C E L = N

• Press the ENTER (=Y) key to change settings and return to the "Prot. element" screen.

Setting the OV elements

• Select "OV" on the "Prot. element" screen to display the "OV" screen.
/ 7 O V

O V 1 V OV1 Threshold setting.

1 2 0 . 0 _
T O V 1 M
1 . 0 0
T O V 1 s
0 . 0 0
T O V 1 R s OV1 Definite time reset delay.
0 . 0
O V 1 D P R % OV1 DO/PU ratio
9 5
O V 2 V OV2 Threshold setting.
1 4 0 . 0
T O V 2 s OV2 Definite time setting.
0 . 0 0
O V 2 D P R % OV2 DO/PU ratio
9 5

• Enter the numerical value and press the ENTER key.

• After setting, press the END key to display the following confirmation screen.

C h a n g e s e t t i n g s ?
E N T E R = Y C A N C E L = N

• Press the ENTER (= Y) key to change settings and return to the "Prot. element" screen.

Setting the UV elements

• Select "UV" on the "Prot. element" screen to display the "UV" screen.
/ 7 U V

U V 1 V UV1 Threshold setting.

6 0 . 0 _
T U V 1 M
1 . 0 0
T U V 1 s
0 . 0 0
T U V 1 R s UV1 Definite time reset delay.
0 . 0
U V 2 V UV2 Threshold setting.
4 0 . 0
T U V 2 s UV2 Definite time setting.
0 . 0 0

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 6 F 2 S 0 7 5 8

V B L K V UV Blocking threshold
1 0 . 0

• Enter the numerical value and press the ENTER key.

• After setting, press the END key to display the following confirmation screen.

C h a n g e s e t t i n g s ?
E N T E R = Y C A N C E L = N

• Press the ENTER (= Y) key to change settings and return to the "Prot. element" screen.

Setting the ZOV elements

• Select "ZOV" on the "Prot. element" screen to display the "ZOV" screen.
/ 7 Z O V

Z O V 1 V ZOV1 Threshold setting.

2 0 . 0 _
T Z O V 1 M
1 . 0 0
T Z O V 1 s
0 . 0 0
T Z O V 1 R s ZOV1 Definite time reset delay.
0 . 0
Z O V 2 V ZOV2 Threshold setting.
4 0 . 0
T Z O V 2 s ZOV2 Definite time setting.
0 . 0 0

• Enter the numerical value and press the ENTER key.

• After setting, press the END key to display the following confirmation screen.

C h a n g e s e t t i n g s ?
E N T E R = Y C A N C E L = N

• Press the ENTER (= Y) key to change settings and return to the "Prot. element" screen.

Setting the NOV protection elements

• Select "NOV" on the "Prot. element" screen to display the "NOV" screen.
/ 7 N O V

N O V 1 V NOV1 Threshold setting.

2 0 . 0 _
T N O V 1 M
1 . 0 0
T N O V 1 s
0 . 0 0
T N O V 1 R s NOV1 Definite time reset delay.
0 . 0
N O V 2 V NOV2 Threshold setting.
4 0 . 0
T N O V 2 s NOV2 Definite time setting.
0 . 0 0

 156 
 6 F 2 S 0 7 5 8

• Enter the numerical value and press the ENTER key.

• After setting, press the END key to display the following confirmation screen.

C h a n g e s e t t i n g s ?
E N T E R = Y C A N C E L = N

• Press the ENTER (= Y) key to change settings and return to the "Prot. element" screen.

Setting the FRQ elements

• Select "FRQ" on the "Prot. element" screen to display the "FRQ" screen.
/ 7 F R Q

F R Q 1 H z
− 1 . 0 0 _
T F R Q 1
1 . 0 0
F R Q 2 H z
− 1 . 0 0
T F R Q 2
1 . 0 0
F R Q 3 H z
− 1 . 0 0
T F R Q 3
1 . 0 0
F R Q 4 H z
− 1 . 0 0 _
T F R Q 4
1 . 0 0
F V B L K V UV Blocking threshold
4 0 . 0

• Enter the numerical value and press the ENTER key.

• After setting, press the END key to display the following confirmation screen.

C h a n g e s e t t i n g s ?
E N T E R = Y C A N C E L = N

• Press the ENTER (= Y) key to change settings and return to the "Prot. element" screen.

Setting the CTF/VTF elements

• Select "CTF/VTF" on the "Prot. element" screen to display the "CTF/VTF" screen.
/ 7 C T F / V T F

E F F A
0 . 2 0 _
Z O V F V
2 0 . 0
U V F V
5 1 . 0

• Enter the numerical value and press the ENTER key.

• After setting, press the END key to display the following confirmation screen.

 157 
 6 F 2 S 0 7 5 8

C h a n g e s e t t i n g s ?
E N T E R = Y C A N C E L = N

• Press the ENTER (=Y) key to change settings and return to the "Prot. element" screen.

Setting the autoreclose function

To set the autoreclose function, do the following.

• Select "ARC" on the "Group ∗" screen to display the "ARC" screen.
/ 5 A R C
• S c h e m e s w
• T i m e r s

Setting the scheme switch

• Select "Scheme sw" on the "ARC" screen to display the "Scheme sw" screen.
/ 6 S c h e me s w
• G e n e r a l
• O C
• E F
• S E F
• E X T

<General>
• Select "General" on the "Scheme sw" screen to set the autoreclose mode.
/ 7 G e n e r a l

A R C E N 0 _
O f f / O n
A R C - N U M 0
S 1 / S 2 / S 3 / S 4 / S 5
C O O R D - O C 0
O f f / O n
C O O R D - E F 0
O f f / O n
C O O R D - S E 0
O f f / O n
• Enter 1(=On) or 0(=Off) to enable or to disable the autoreclose.
• Enter 0 or 1 or 2 or 3 or 4 to set the number of shot.
Enter 0 (= S1) to perform single-shot autoreclosing.
Enter 1 (= S2) to perform two-shot autoreclosing..
Enter 2 (= S3) to perform three-shot autoreclosing.
Enter 3 (= S4) to perform four-shot autoreclosing.
Enter 4 (= S5) to perform five-shot autoreclosing.
• Enter 1(=On) or 0(=Off) to enable or to disable the co-ordination for "COOD-OC",
"COOD-EF" and "COOD-SE" and press the ENTER key.

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 6 F 2 S 0 7 5 8

<OC>, <EF>, <SEF>

• Select "OC" on the "Scheme sw" screen to set the autoreclose initiation and trip mode of OC
protection.
/ 7 O C

O C 1 - I N I T 0 _
N A / O n / B l o c k
O C 1 T P 1 0
O f f / I n s t / S e t
O C 1 T P 2 0
O f f / I n s t / S e t
O C 1 T P 3 0
O f f / I n s t / S e t
O C 1 T P 4 0
O f f / I n s t / S e t
O C 1 T P 5 0
O f f / I n s t / S e t
O C 1 T P 6 0
O f f / I n s t / S e t
:
:
O C 4 - I N I T 0
O C 4 T P 1 0
O f f / I n s t / S e t
O C 4 T P 2 0
O f f / I n s t / S e t
O C 4 T P 3 0
O f f / I n s t / S e t
O C 4 T P 4 0
O f f / I n s t / S e t
O C 4 T P 5 0
O f f / I n s t / S e t
O C 4 T P 6 0
O f f / I n s t / S e t
• Enter 1(=INIT) or 2(=Block) to initiate or to block the autoreclose by the OC1 trip in
"OC1-INIT". To neither initiate nor block it, enter 0(=NA).
• Enter 1(=Inst) or 2(=Set) to set the OC1 first trip to “Instantaneous trip” or “Set time delay trip”
in the "OC1-TP1". To not use the OC1 trip, enter 0(=Off).
Note: OC1-TP2 to OC1-TP6 show the OC1 second trip to OC1 sixth trip.

For OC2 to OC4, the settings are same as OC1. After changing settings, press the ENTER key.
The setting method for EF and SEF is same as that of OC above.

<EXT>
• Select "EXT" on the "Scheme sw" screen to set the external initiation of the autoreclose.
/ 7 E X T

E X T - I N I T 0 _
N A / O n / B l o c k
• Enter 1(=INIT) or 2(=Block) to initiate or to block the autoreclose by the external trip. To
neither initiate nor block it, enter 0(=NA).

 159 
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Setting the timers

• Select "Timers" on the "Group ∗" screen to set timer setting and the threshold setting of OC, EF
and SEF for co-ordination.
/ 6 T i m e r s

T R D Y s
6 0 . 0 _
T D 1 s
1 0 . 0 0
T D 2 s
1 0 . 0 0
T D 3 s
1 0 . 0 0
T D 4 s
1 0 . 0 0
T D 5 s
1 0 . 0 0
T W s
2 . 0 0
T S U C s
3 . 0 0
T R C O V s
1 0 . 0 0
T A R C P s
1 0 . 0 0
T R S E T s
3 . 0 0
O C A
1 . 0 0
E F A
0 . 3 0
S E
0 . 0 1 0

• Enter the numerical value and press the ENTER key.

• After setting, press the END key to display the following confirmation screen.

C h a n g e s e t t i n g s ?
E N T E R = Y C A N C E L = N

• Press the ENTER (=Y) key to change settings and return to the "ARC" screen.

Setting group copy

To copy the settings of one group and overwrite them to another group, do the following:
• Select "Copy gp." on the "Protection" screen to display the "Copy A to B" screen.
/ 3 C o p y A t o B

A _
B
• Enter the group number to be copied in line A and press the ENTER key.

 160 
 6 F 2 S 0 7 5 8

• Enter the group number to be overwritten by the copy in line B and press the ENTER key.

4.2.6.8 Binary Input

The logic level of binary input signals can be inverted by setting before entering the scheme logic.
Inversion is used when the input contact cannot meet the requirements described in Table 3.2.2.
• Select "Binary I/P" on the "Set. (change)" sub-menu to display the "Binary I/P" screen.
/ 2 B i n a r y I / P
. B I 1
. B I 2
. B I 3
. B I 4
. B I 5
. B I 6
. B I 7
. B I 8
. A l a r m 1 T e x t
. A l a r m 2 T e x t
. A l a r m 3 T e x t
. A l a r m 4 T e x t

Selection of Binary Input

• Select the input number (BI number) on the "Binary I/P" screen.

Setting Alarm ∗ Text

If the BI selected is used for an alarm, alarm message can be set.
• Select the Alarm∗ text and press the ENTER key to display the text input screen.

_
A B C D E F G
H I J K L M N
O P Q R S T U
V W X Y Z ←→
a b c d e f g
h i j k l m n
o p q r s t u
v w x y z ←→
0 1 2 3 4 5 6
7 8 9 ←→
( ) [ ] @_ {
} ∗ / + − < =
> ! “ # $ %&
‘ : ; , . ˆ `
• Enter the characters (up to 22 characters) according to the text setting method.
After setting, press the ENTER key to display the "BI∗" screen.

/ 3 B I ∗
• T i m e r s
• F u n c t i o n s

 161 
 6 F 2 S 0 7 5 8

Setting timers

• Select "Timers" on the "BI" screen to display the "Timers" screen.

/ 4 T i m e r s

B I 1 P U D s Pick-up delay setting

0 . 0 0 _
B I 1 D O D s Drop-off delay setting
0 . 0 0

• Enter the numerical value and press the ENTER key.

• After setting, press the END key to return to the "BI∗" screen.

Setting Functions

• Select "Functions" on the "BI" screen to display the "Functions" screen.

/ 4 F u n c t i o n s

B I 1 S N S 1 _
N o r m / I n v
B I 1 S G S 0
O f f / 1 / 2 / 3 / 4
O C 1 B L K 0
O f f / O n
O C 2 B L K 0
O f f / O n
O C 3 B L K 0
O f f / O n
O C 4 B L K 0
O f f / O n
E F 1 B L K 0
O f f / O n
E F 2 B L K 0
O f f / O n
E F 3 B L K 0
O f f / O n
E F 4 B L K 0
O f f / O n
E F 1 P E R 0
O f f / O n
E F 2 P E R 0
O f f / O n
E F 3 P E R 0
O f f / O n
E F 4 P E R 0
O f f / O n
S E 1 B L K 0
O f f / O n
S E 2 B L K 0
O f f / O n
S E 3 B L K 0
O f f / O n

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 6 F 2 S 0 7 5 8

S E 4 B L K 0
O f f / O n
N C 1 B L K 0
O f f / O n
N C 2 B L K 0
O f f / O n
U C 1 B L K 0
O f f / O n
U C 2 B L K 0
O f f / O n
C B F B L K 0
O f f / O n
T H M B L K 0
O f f / O n
T H M A B L K 0
O f f / O n
B C D B L K 0
O f f / O n
O V 1 B L K 0
O f f / O n
O V 2 B L K 0
O f f / O n
U V 1 B L K 0
O f f / O n
U V 2 B L K 0
O f f / O n
Z O V 1 B L K 0
O f f / O n
Z O V 2 B L K 0
O f f / O n
N O V 1 B L K 0
O f f / O n
N O V 2 B L K 0
O f f / O n
F R Q 1 B L K 0
O f f / O n
F R Q 2 B L K 0
O f f / O n
F R Q 3 B L K 0
O f f / O n
F R Q 4 B L K 0
O f f / O n
A R C B L K 0
O f f / O n
A R C R D Y 0
O f f / O n
A R C I N I 0
O f f / O n
M N L C L S 0
O f f / O n
A R C N A 0
O f f / O n
C T F B L K 0
O f f / O n

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 6 F 2 S 0 7 5 8

V T F B L K 0
O f f / O n
C T F E X T 0
O f f / O n
V T F E X T 0
O f f / O n
E X T A P H 0
O f f / O n
E X T B P H 0
O f f / O n
E X T C P H 0
O f f / O n
E X T 3 P H 0
O f f / O n
T C F A L M 0
O f f / O n
C B O P N 0
O f f / O n
C B C L S 0
O f f / O n
R M T R S T 0
O f f / O n
S Y N C L K 0
O f f / O n
S T O R C D 0
O f f / O n
A l a r m 1 0
O f f / O n
A l a r m 2 0
O f f / O n
A l a r m 3 0
O f f / O n
A l a r m 4 0
O f f / O n

<BI1SNS>
To set the Binary Input 1 Sense, do the following.
• Enter 0(=Normal) or 1(=Inverted) and press the ENTER key.

<BI1SGS>
To set the Binary Input 1 Settings Group Select, do the following.
• Enter 0(=Off) or 1(=1) or 2(=2) or 3(=3) or 4(=4) and press the ENTER key.

<Others>
• Enter 1(=On) to set the function and press the ENTER key. If not setting the function, enter
0(=Off) and press the ENTER key.

• After setting, press the END key to return to the "BI∗" screen.

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4.2.6.9 Binary Output

All the binary outputs of the GRD140 except the relay failure signal are user-configurable. It is
possible to assign one signal or up to four ANDing or ORing signals to one output relay. Available
signals are listed in Appendix C.
It is also possible to attach Instantaneous or delayed or latched reset timing to these signals.
Appendix H shows the factory default settings.

CAUTION
When having changed the binary output settings, release the latch state on a digest screen by
pressing the RESET key for more than 3 seconds.
To configure the binary output signals, do the following:

Selection of output relay

• Select "Binary O/P" on the "Set. (change)" screen to display the "Binary O/P" screen.
/ 2 B i n a r y O / P
• B O 1
• B O 2
• B O 3
• B O 4
• B O 5
• B O 6
• B O 7
Note: The setting is required for all the binary outputs. If any of the binary outputs are not used, enter
0 to logic gates #1 to #4 in assigning signals.

• Select the output relay number (BO number) and press the ENTER key to display the "BO∗"
screen.
/ 3 B O ∗
• L o g i c / R e s e t
• F u n c t i o n s

Setting the logic gate type and timer

• Select "Logic/Reset" to display the "Logic/Reset" screen.

/ 4 L o g i c / R e s e t

L o g i c 0 _
O R / A N D
R e s e t 0
I n s / D l / D w / L a t

• Enter 0(=OR) or 1(=AND) to use an OR gate or AND gate and press the ENTER key.

• Enter 0(=Instantaneous) or 1(=Delayed) or 2(=Dwell) or 3(=Latched) to select the reset timing

and press the ENTER key.

• Press the END key to return to the "BO∗" screen.

Note: To release the latch state, push the [RESET] key for more than 3 seconds.

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Assigning signals

• Select "Functions" on the "BO∗" screen to display the "Functions" screen.

/ 4 F u n c t i o n s

I n # 1
2 1 _
I n # 2
1 1
I n # 3
2 4
I n # 4
0
T B O s
0 . 2 0
• Assign signals to gates (In #1 to #4) by entering the number corresponding to each signal
referring to Appendix C. Do not assign the signal numbers 471 to 477 (signal names: "BO1
OP" to "BO7 OP"). And set the delay time of timer TBO.
Note: If signals are not assigned to all the gates #1 to #4, enter 0 for the unassigned gate(s).
Repeat this process for the outputs to be configured.

4.2.6.10 LEDs

Three LEDs of the GRD140 are user-configurable. A configurable LED can be programmed to
indicate the OR combination of a maximum of 4 elements, the individual statuses of which can be
viewed on the LED screen as “Virtual LEDs.” The signals listed in Appendix C can be assigned to
each LED as follows.

CAUTION
When having changed the LED settings, must release the latch state on a digest screen by
pressing the RESET key for more than 3 seconds.

Selection of LEDs

• Select "LED" on the "Set. (change)" screen to display the "LED" screen.
/ 2 L E D
• L E D
• V i r t u a l L E D

Selection of real LEDs

• Select "LED" on the "/2 LED" screen to display the "/3 LED" screen.
/ 3 L E D
• L E D 1
• L E D 2
• L E D 3
Note: The setting is required for all the LEDs. If any of the LEDs are not used, enter 0 to logic gates
#1 to #4 in assigning signals.

• Select the LED number and press the ENTER key to display the "LED∗" screen.

/ 4 L E D ∗

 166 
 6 F 2 S 0 7 5 8

• L o g i c / R e s e t
• F u n c t i o n s

Setting the logic gate type and timer

• Select "Logic/Reset" to display the "Logic/Reset" screen.

/ 5 L o g i c / R e s e t

L o g i c 0 _
O R / A N D
R e s e t 0
I n s t / L a t c h

• Enter 0(=OR) or 1(=AND) to use an OR gate or AND gate and press the ENTER key.

• Enter 0(=Instantaneous) or 1(=Latched) to select the reset timing and press the ENTER key.

• Press the END key to return to the "LED∗" screen.

Note: To release the latch state, push the [RESET] key for more than 3 seconds on a digest screen.

Assigning signals

• Select "Functions" on the "LED∗" screen to display the "Functions" screen.

/ 5 F u n c t i o n s

I n # 1
2 1 _
I n # 2
1 1
I n # 3
2 4
I n # 4
0
• Assign signals to gates (In #1 to #4) by entering the number corresponding to each signal
referring to Appendix C.
Note: If signals are not assigned to all the gates #1 to #4, enter 0 for the unassigned gate(s).

• Press the END key to return to the "LED∗" screen.

Repeat this process for the outputs to be configured.

Selection of virtual LEDs

• Select "Virtual LED" on the "/2 LED" screen to display the "Virtual LED" screen.
/ 3 V i r t u a l L E D
• I N D 1
• I N D 2

• Select the IND number and press the ENTER key to display the "IND∗" screen.

/ 4 I N D ∗
• R e s e t
• F u n c t i o n s

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 6 F 2 S 0 7 5 8

Setting the reset timing

• Select "Reset" to display the "Reset" screen.

/ 5 R e s e t

R e s e t 0 _
I n s t / L a t c h

• Enter 0(=Instantaneous) or 1(=Latched) to select the reset timing and press the ENTER key.

• Press the END key to return to the "IND∗" screen.

Note: To release the latch state, push the [RESET] key for more than 3 seconds.

Assigning signals

• Select "Functions" on the "IND∗" screen to display the "Functions" screen.

/ 5 F u n c t i o n s

B I T 1
5 1 _
B I T 2
5 4
B I T 8
7 8
• Assign signals to bits (1 to 8) by entering the number corresponding to each signal referring to
Appendix C.
Note: If signals are not assigned to all the bits 1 to 8, enter 0 for the unassigned bit(s).

• Press the END key to return to the "IND∗" screen.

Repeat this process for the outputs to be configured.

4.2.7 Testing

The sub-menu "Test" provides such functions as disabling the automatic monitoring function and
forced operation of binary outputs.
Note: When operating the "Test" menu, the "IN SERVICE" LED is flickering. But if an alarm occurs
during the test, the flickering stops. The "IN SERVICE" LED flickers only in a lighting state.

4.2.7.1 Scheme Switch

The automatic monitor function (A.M.F.) can be disabled by setting the switch [A.M.F] to "OFF".
Disabling the A.M.F. inhibits trip blocking even in the event of a failure in the items being
monitored by this function. It also prevents failures from being displayed on the "ALARM" LED
and LCD described in Section 4.2.1. No events related to A.M.F. are recorded, either.
Disabling A.M.F. is useful for blocking the output of unnecessary alarms during testing.
• Select "Test" on the top "MENU" screen to display the "Test" screen.
/ 1 T e s t
• S w i t c h
• B i n a r y O / P

 168 
 6 F 2 S 0 7 5 8

• L o g i c c i r c u i t

• Select "Switch" to display the "Switch" screen.

/ 2 S w i t c h

A . M . F . 1 _
O f f / O n
U V T S T 0
O f f / O n
C L P T S T 0
O f f / S 0 / S 3
T H M R S T 0
O f f / O n
S H O T N U M 0
O f f / S 1 - S 6
I E C T S T 0
O f f / O n

• Enter 0(=Off) to disable the A.M.F. and press the ENTER key.

• Enter 1(=On) to disable the UV block when testing UV elements and press the ENTER key.

• Enter 0(=Off) or 1(=State0) or 2(=State3) to set forcibly the test condition of the Cold Load
Protection (CLPTST) and press the ENTER key.
• Enter 1(=On) to reset forcibly the thermal overload element for testing (THMRST) and press
the ENTER key.
• Enter 0(=Off) or 1(=S1) or 2(=S2) or 3(=S3) or 4(=S4) or 5(=S5) to set shot number for
autoreclose test and press the ENTER key.
• Enter 1(=On) for IECTST to transmit ‘test mode’ to the control system by IEC60870-5-103
communication when testing the local relay, and press the ENTER key.

• Press the END key to return to the "Test" screen.

4.2.7.2 Binary Output Relay

It is possible to forcibly operate all binary output relays for checking connections with the external
devices. Forced operation can be performed on one or more binary outputs at a time.
• Select "Binary O/P" on the "Test" screen to display the "Binary O/P" screen. Then the LCD
displays the name of the output relay.
/ 2 B i n a r y O / P

B O 1 0 _
D i s a b l e / E n a b l e
B O 2 0
D i s a b l e / E n a b l e
B O 3 0
D i s a b l e / E n a b l e
B O 4 0
D i s a b l e / E n a b l e
B O 5 0
D i s a b l e / E n a b l e
B O 6 0
D i s a b l e / E n a b l e

 169 
 6 F 2 S 0 7 5 8

B O 7 0
D i s a b l e / E n a b l e

• Enter 1(=Enable) and press the ENTER key to operate the output relays forcibly.

• After completing the entries, press the END key. Then the LCD displays the screen shown
below.
O p e r a t e ?
E N T E R = Y C A N C E L = N

• Keep pressing the ENTER key to operate the assigned output relays.

• Release pressing the ENTER key to reset the operation.

• Press the CANCEL key to return to the upper "Binary O/P" screen.

4.2.7.3 Logic Circuit

It is possible to observe the binary signal level on the signals listed in Appendix C with monitoring
jacks A and B.
• Select "Logic circuit" on the "Test" screen to display the "Logic circuit" screen.
/ 2 L o g i c
c i r c u i t
T e r m A
1 _
T e r m B
4 8 _

• Enter a signal number to be observed at monitoring jack A and press the ENTER key.

• Enter the other signal number to be observed at monitoring jack B and press the ENTER key.
After completing the setting, the signals can be observed by the binary logic level at monitoring
jacks A and B or by the LEDs above the jacks.
On screens other than the above screen, observation with the monitoring jacks is disabled.

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4.3 Personal Computer Interface

The relay can be operated from a personal computer using an RS232C port on the front panel.
On the personal computer, the following analysis and display of the fault currents are available in
addition to the items available on the LCD screen.
• Display of current and voltage waveforms: Oscillograph display
• Symmetrical component analysis: On arbitrary time span
• Harmonic analysis: On arbitrary time span
• Frequency analysis: On arbitrary time span
For the details, see the separate instruction manual "PC INTERFACE RSM100".

4.4 Relay Setting and Monitoring System

The Relay Setting and Monitoring (RSM) system is a system that retrieves and analyses the data
on power system quantities, fault and event records and views or changes settings in individual
relays via a telecommunication network using a remote PC.
Figure 4.4.1 shows the configuration of the RSM system.
The relays are connected through twisted pair wires and up to 32 relays can be connected. The
total length of twisted pair wires should not exceed 1200 m.
Relays are mutually connected using an RS485 port and connected to a PC RS232C port via the
protocol converter G1PR2.

Twisted paired
cable

Figure 4.4.1 Relay Setting and Monitoring System

 171 
 6 F 2 S 0 7 5 8

4.5 IEC 60870-5-103 Interface

The GRD140 supports the IEC60870-5-103 communication protocol. This protocol is mainly
used when the relay communicates with a control system and is used to transfer the following
measurand and status data from the relay to the control system. (For details, see Appendix M.)
• Measurand data: current, voltage, active power, reactive power, frequency
• Status data: events, fault indications, etc.
The protocol can be used through the RS485 port on the relay rear panel.
The relay supports two baud-rates 9.6kbps and 19.2kbps, and supports two normalizing factors 1.2
and 2.4 for measurand. These are selected by setting. See Section 4.2.6.4.
The data transfer from the relay can be blocked by the setting.
For the settings, see the Section 4.2.6.

4.6 Clock Function

The clock function (Calendar clock) is used for time-tagging for the following purposes:
• Event records
• Disturbance records
• Fault records
The calendar clock can run locally or be synchronised with the external clock such as the binary
time standard input signal, RSM clock or IEC60870-5-103. This can be selected by setting.
The “clock synchronise” function synchronises the relay internal clock to the binary input signal
by the following method. Since the BI signal is an “ON” or “OFF” signal which cannot express
year-month-day and hour-minute-second etc, synchronising is achieved by setting the number of
milliseconds to zero. This method will give accurate timing if the synchronising BI signal is input
every second.
Synchronisation is triggered by an “OFF” to “ON” (rising edge) transition of the BI signal. When
the trigger is detected, the millisecond value of the internal clock is checked, and if the value is
between 0~500ms then it is rounded down. If it is between 500~999ms then it is rounded up (ie the
number of seconds is incremented).

n sec (n+1) sec

500ms
corrected to (n+1) sec
corrected to n sec
t
When the relays are connected with the RSM system as shown in Figure 4.4.1 and selected "RSM"
in the time synchronisation setting, the calendar clock of each relay is synchronised with the RSM
clock. If the RSM clock is synchronised with the external time standard, then all the relay clocks
are synchronised with the external time standard.

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5. Installation
5.1 Receipt of Relays
When relays are received, carry out the acceptance inspection immediately. In particular, check
for damage during transportation, and if any is found, contact the vendor.
Always store the relays in a clean, dry environment.

5.2 Relay Mounting

A flush mounting relay is included. Appendix F shows the case outline.
For details of relay withdrawal and insertion, see Section 6.7.3.

5.3 Electrostatic Discharge

CAUTION
Do not take out the relay unit outside the relay case since electronic components on the modules
are very sensitive to electrostatic discharge. If it is absolutely essential to take the modules out of
the case, do not touch the electronic components and terminals with your bare hands.
Additionally, always put the module in a conductive anti-static bag when storing it.

5.4 Handling Precautions

A person's normal movements can easily generate electrostatic potentials of several thousand
volts. Discharge of these voltages into semiconductor devices when handling electronic circuits
can cause serious damage. This damage often may not be immediately apparent, but the reliability
of the circuit will have been reduced.
The electronic circuits are completely safe from electrostatic discharge when housed in the case.
Do not expose them to risk of damage by withdrawing the relay unit unnecessarily.
The relay unit incorporates the highest practical protection for its semiconductor devices.
However, if it becomes necessary to withdraw the relay unit, precautions should be taken to
preserve the high reliability and long life for which the equipment has been designed and
manufactured.

CAUTION
• Before removing the relay unit, ensure that you are at the same electrostatic potential as the
equipment by touching the case.
• Use the handle to draw out the relay unit. Avoid touching the electronic components,
printed circuit board or connectors.
• Do not pass the relay unit to another person without first ensuring you are both at the same
electrostatic potential. Shaking hands achieves equipotential.
• Place the relay unit on an anti-static surface, or on a conducting surface which is at the same
potential as yourself.
• Do not place the relay unit in polystyrene trays.

 173 
 6 F 2 S 0 7 5 8

It is strongly recommended that detailed investigations on electronic circuitry should be carried

out in a Special Handling Area such as described in the aforementioned IEC 60747.

5.5 External Connections

External connections for each relay model are shown in Appendix G.

 174 
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6. Commissioning and Maintenance

6.1 Outline of Commissioning Tests
The GRD140 is fully numerical and the hardware is continuously monitored.
Commissioning tests can be kept to a minimum and need only include hardware tests and the
conjunctive tests. The function tests are at the user’s discretion.
In these tests, user interfaces on the front panel of the relay or local PC can be fully applied.
Test personnel must be familiar with general relay testing practices and safety precautions to avoid
personal injuries or equipment damage.

Hardware tests

These tests are performed for the following hardware to ensure that there is no hardware defect.
Defects of hardware circuits other than the following can be detected by monitoring which circuits
function when the DC power is supplied.
User interfaces
Binary input circuits and output circuits
AC input circuits

Function tests

These tests are performed for the following functions that are fully software-based.
Measuring elements
Metering and recording

Conjunctive tests

The tests are performed after the relay is connected with the primary equipment and other external
equipment.

The following tests are included:

On load test: phase sequence check and polarity check
Tripping circuit test
Reclosing circuit test

 175 
 6 F 2 S 0 7 5 8

6.2 Cautions
6.2.1 Safety Precautions

CAUTION
• The relay rack is provided with an earthing terminal.
Before starting the work, always make sure the relay rack is earthed.
• When connecting the cable to the back of the relay, firmly fix it to the terminal block and attach
the cover provided on top of it.
• Before checking the interior of the relay, be sure to turn off the power.

Failure to observe any of the precautions above may cause electric shock or malfunction.

6.2.2 Cautions on Tests

CAUTION
• While the power is on, do not drawout/insert the relay unit.
• Before turning on the power, check the following:
- Make sure the polarity and voltage of the power supply are correct.
- Make sure the CT circuit is not open.
- Make sure the VT circuit is not short-circuited.
• Be careful that the relay is not damaged due to an overcurrent or overvoltage.
• If settings are changed for testing, remember to reset them to the original settings.

Failure to observe any of the precautions above may cause damage or malfunction of the relay.

 176 
 6 F 2 S 0 7 5 8

6.3 Preparations
Test equipment

The following test equipment is required for the commissioning tests.

1 Single-phase current source
1 Three-phase current source
1 Single-phase voltage source
1 Three-phase voltage source
1 DC power supply
3 Phase angle meter
3 AC ammeter
3 AC voltmeter
1 Time counter, precision timer
1 PC (not essential)
Relay settings

Before starting the tests, it must be specified whether the tests will use the user’s settings or the
default settings.

For the default settings, see the Appendix H Relay Setting Sheet.

Visual inspection

After unpacking the product, check for any damage to the relay case. If there is any damage, the
internal module might also have been affected. Contact the vendor.

Relay ratings

Check that the items described on the nameplate on the front of the relay conform to the user’s
specification. The items are: relay type and model, AC current and frequency ratings, and
auxiliary DC supply voltage rating.

Local PC

When using a local PC, connect it with the relay via the RS232C port on the front of the relay.
RSM100 software is required to run the PC.
For the details, see the separate volume "PC INTERFACE RSM100".

 177 
 6 F 2 S 0 7 5 8

6.4 Hardware Tests

The tests can be performed without external wiring, but a DC power supply and AC current and
voltage sources are required.

6.4.1 User Interfaces

This test ensures that the LCD, LEDs and keys function correctly.

LCD display

• Apply the rated DC voltage and check that the LCD is off.
Note: If there is a failure, the LCD will display the "Err: " screen when the DC voltage is applied.

• Press the RESET key for one second or more and check that black dots appear on the whole
screen.

LED display

• Apply the rated DC voltage and check that the "IN SERVICE" LED is lit in green.
• Press the RESET key for one second or more and check that remaining five LEDs are lit in
red or yellow. (Programmable LEDs are yellow.)

VIEW and RESET keys

• Press the VIEW key when the LCD is off and check that the "Virtual LED" and "Metering"
screens are sequentially displayed on the LCD.
• Press the RESET key and check that the LCD turns off.

Other operation keys

• Press any key when the LCD is off and check that the LCD displays the "MENU" screen. Press
the END key to turn off the LCD.
• Repeat this for all keys.

6.4.2 Binary Input Circuit

The testing circuit is shown in Figure 6.4.1.

 178 
 6 F 2 S 0 7 5 8

GRD140
TB2 - A1
BI6
- B1 BI7
BI8
BI1
BI2
BI3
- A8 BI4
BI5
- B8
DC + TB2 -A9
power
supply − - B9

Note: Models 400 and 420 are not provided with BI6 to BI8.

Figure 6.4.1 Testing Binary Input Circuit

• Display the "Binary I/O" screen from the "Status" sub-menu.

/ 2 B i n a r y I / O
I P [ 0 0 0 0 0 0 0 0 ]
O P [ 0 0 0 0 0 0 0 0 ]

• Apply the rated DC voltage to terminal A1-B1, A2-B2, ..., A8-B8 of terminal block TB2.
Check that the status display corresponding to the input signal (IP) changes from 0 to 1. (For
details of the binary input status display, see Section 4.2.4.2.)
Note: Models 400 and 420 are not provided with BI6 to BI8.
The user will be able to perform this test for one terminal to another or for all the terminals at once.

6.4.3 Binary Output Circuit

This test can be performed by using the "Test" sub-menu and forcibly operating the relay drivers
and output relays. Operation of the output contacts is monitored at the output terminal. The output
contact and corresponding terminal number are shown in Appendix G.
• Select "Binary O/P" on the "Test" screen to display the "Binary O/P" screen. The LCD displays
the name of the output relay.
/ 2 B i n a r y O / P

B O 1 0 _
D i s a b l e / E n a b l e
B O 2 0
D i s a b l e / E n a b l e
B O 3 0
D i s a b l e / E n a b l e
B O 4 0
D i s a b l e / E n a b l e
B O 5 0
D i s a b l e / E n a b l e
B O 6 0
D i s a b l e / E n a b l e
B O 7 0
D i s a b l e / E n a b l e

 179 
 6 F 2 S 0 7 5 8

• Enter 1 and press the ENTER key.

• After completing the entries, press the END key. The LCD will display the screen shown
below. If 1 is entered for all the output relays, the following forcible operation can be
performed collectively.
O p e r a t e ?
E N T E R = Y C A N C E L = N

• Keep pressing the ENTER key to operate the output relays forcibly.

• Check that the output contacts operate at the terminal.

• Stop pressing the ENTER key to reset the operation

6.4.4 AC Input Circuits

This test can be performed by applying known values of voltage and current to the AC input
circuits and verifying that the values applied coincide with the values displayed on the LCD
screen.
The testing circuits are shown in Figures 6.4.2 and 6.4.3. A three-phase voltage source and a
single-phase current source are required.
GRD140-110
Single-phase V
TB1
voltage -1
source V

-2

A TB1 -5
Single-phase Ie
current -6
source
-7
Ise
-8

+ TB2 -A9
DC
power
supply − -B9

Figure 6.4.2 Testing AC Input Circuit for Model 110

 180 
 6 F 2 S 0 7 5 8

GRD140-400 or -420

Three-phase V V V
voltage TB 2 -A1 Va
a
source -B1
b Vb
c -A2 Vc
N -B2
-A3
φ φ φ VR
-B3

A TB1 -1
Ia
Single-phase
-2
current
source -3
Ib
-4
-5
Ic
-6

-7
Ie or I
-8 se

+ TB2 -A9
DC
power
supply − -B9

Figure 6.4.3 Testing AC Input Circuit for Models 400 and 420

• Check that the metering data is set to be expressed as secondary values on the "Metering switch"
screen.
"Settings" sub-menu → "Status" screen → "Metering switch" screen
If the setting is “Display Value = Primary”, change the setting in the "Metering switch".
Remember to reset it to the initial setting after the test is finished.
• Open the "Metering" screen in the "Status" sub-menu.
"Status" sub-menu → "Metering" screen
• Apply AC rated voltages and currents and check that the displayed values are within ± 5% of the
input values.

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6.5 Function Test

CAUTION
The function test may cause the output relays to operate including the tripping output relays.
Therefore, the test must be performed with tripping circuits disconnected.

6.5.1 Measuring Element

Measuring element characteristics are realized by software, so it is possible to verify the overall
characteristics by checking representative points.
Operation of the element under test is observed by the binary output signal at monitoring jacks A
or B or by the LED indications above the jacks. In any case, the signal number corresponding to
each element output must be set on the "Logic circuit" screen of the "Test" sub-menu.
/ 2 L o g i c
c i r c u i t
T e r m A
1 _
T e r m B
4 8 _

When a signal number is entered for the Term A line, the signal is observed at monitoring jack A
and when entered for the Term B line, it is observed at monitoring jack B.
Note: The voltage level at the monitoring jacks is +5V for logic level "1" and less than 0.1V for
logic level "0".

CAUTION
• Use test equipment with more than 1 kΩ of internal impedance when observing the output
signal at the monitoring jacks.
• Do not apply an external voltage to the monitoring jacks.
• Do not leave the A or B terminal shorted to 0V terminal for a long time.
In case of a three-phase element, it is sufficient to test for a representative phase. The A-phase
element is selected hereafter. Further, the [APPL-CT] and [APPL-VT] settings are selected “3P”
and “3PV”.
Note: Operating time test of measuring relay elements at monitoring jack A or B is not
including the operation of binary output. Whole the operating time test, if required,
should be measured at a binary output relay.

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 6 F 2 S 0 7 5 8

6.5.1.1 Overcurrent and undercurrent element OC1 to OC4, UC1, UC2 and CBF and Earth fault
element EF1 to EF4 and SEF1 to SEF4
The overcurrent element is checked on the operating current value and operating time for IDMT
curve.

Operating current check

Figure 6.5.1 shows a testing circuit. The operating current value is checked by increasing or
decreasing the magnitude of the current applied.
GRD140

+ A TB1 -(*)
Single-phase
current
source -(*)
−

A
Monitoring
jack
0V
+ TB2 -A9
DC
power
supply − -B9

DC +
voltmeter
0V
(∗): Connect the terminal number corresponding to the testing element. Refer to Table 3.2.1.

Figure 6.5.1 Operating Current Value Test

The output signal of testing element is assigned to the monitoring jack A.

The output signal numbers of the elements are as follows:

Element Signal No. Element Signal No. Element Signal No. Element Signal No.
OC1-A 101 EF1 131 SEF1 141 UC1-A 161
OC2-A 107 EF2 133 SEF2 143 UC2-A 164
OC3-A 113 EF3 135 SEF3 145 CBF-A 173
OC4-A 116 EF4 136 SEF4 146

• Enter the signal number to observe the operation at the LED as shown in Section 6.5.1 and
press the ENTER key.
• Set the scheme switches [∗∗∗-DIR] to “NON”.
• Apply a test current and change the magnitude of the current applied and measure the value
at which the element operates.
Check that the measured value is within 5% of the setting value.

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 6 F 2 S 0 7 5 8

Operating time check for IDMT curve

The testing circuit is shown in Figure 6.5.2.

GRD140

TB1 -
A (∗)
Single-phase
current
source - (∗)

A
Monitoring
jack
0V

+ TB2 -A9
DC
power
supply − -B9

Start

Time
counter

Stop
OV
(∗): Connect the terminal number corresponding to the testing element. Refer to Table 3.2.1.

Figure 6.5.2 Testing IDMT

One of the inverse time characteristics can be set, and the output signal numbers of the IDMT
elements are as follows:
Element Signal No.
OC1-A 101
EF1 131
SEF1 141

Fix the time characteristic to test by setting the scheme switch MOC1, MEF1 or MSE1 on the
"OC", "EF" or "SEF" screen.

Example: "Settings" sub-menu → "Protection" screen → "Group∗" screen → "OC" screen

The test procedure is as follows:

• Enter the signal number to observe the operating time at the monitoring jack A as shown in
Section 6.5.1.
• Apply a test current and measure the operating time. The magnitude of the test current should
be between 1.2 × Is to 20 × Is, where Is is the current setting.
• Calculate the theoretical operating time using the characteristic equations shown in Section
2.1.1. Check that the measured operating time is within IEC 60255-3 class 5.

 184 
 6 F 2 S 0 7 5 8

6.5.1.2 Directional characteristic test

The directional characteristic is checked as follows:

OC element for Models 400 and 420

The test circuit is shown in Figure 6.5.3.
GRD140-400 and -420
V
a TB2 -A1 Va
Three-phase
voltage
b -B1 Vb
source

c -A2 Vc
N -B2
A
Monitoring
φ jack
0V
TB1 -1 Ia
A
Single-phase
-2
current
source

+ TB2 -A9
DC
power
supply − -B9

(E)

DC
voltmeter

Figure 6.5.3 Testing OC Element

OC elements and their output signal number are shown in Section 6.5.1.1.
The following shows the case when testing OC1.
• Select "Logic circuit" on the Test screen to display the "Logic circuit" screen.
• Enter the signal number to be observed at monitoring jack as shown in Section 6.5.1.
• Set the scheme switch [OC1-DIR] to “FWD”.
• Apply three-phase rated voltage and single-phase test current IT (= Ia).
Set IT to lag Vbc by OC characteristic angle OC θ. (The default setting of OC θ is -45°.)
• Changing the magnitude of IT while retaining the phase angle with the voltages, and measure
the current at which the element operates. Check that the measured current magnitude is within
± 5% of the current setting.

EF element
The test circuit is shown in Figure 6.5.4.

 185 
 6 F 2 S 0 7 5 8

GRD140
V
TB1 or TB2 -(*)
Single-phase Residual voltage
voltage -(*)
source

A
φ Monitoring
jack
Single-phase TB1 -(*) 0V
current A Ie or Ise
source
-(*)

DC + TB2 -A9
power
supply − -B9

DC
voltmeter

Note: Connect the terminal number of residual voltage input and residual current
input or zero sequence current input for SEF as shown in Table 3.2.1.

Figure 6.5.4 Testing EF and SEF Elements

EF elements and their output signal number are shown in Section 6.5.1.1.
The following shows the case when testing EF1.
• Select “Logic circuit” on the “Test menu” screen to display the “Logic circuit” screen.
• Enter the signal number to be observed at monitoring jack A as shown in Section 6.5.1.
• Set the scheme switch [EF1-DIR] to “FWD”.
• Apply the rated voltage VT (= V0) and single-phase test current IT.
Set IT to lag V0 by EF characteristic angle EF θ. (The default setting of EF θ is -45°.)
• Changing the magnitude of IT while retaining the phase angle with the voltages, and measure
the current at which the element operates. Check that the measured current magnitude is within
± 5% of the current setting.

SEF element
The test circuit is shown in Figure 6.5.4.
SEF elements and their output signal number are shown in Section 6.5.1.1.
The following shows the case when testing SEF1.
• Select “Logic circuit” on the “Test menu” screen to display the “Logic circuit” screen.
• Enter the signal number to be observed at monitoring jack A as shown in Section 6.5.1.
• Set the scheme switch [SE1-DIR] to “FWD”.
• Apply the rated voltage VT (= V0) and single-phase test current IT (= Ise).
Set IT to lag V0 by SEF characteristic angle SE θ. (The default setting of SE θ is 0°.)
• Changing the magnitude of IT while retaining the phase angle with the voltages, and measure
the current at which the element operates. Check that the measured current magnitude is within
± 5% of the current setting.

 186 
 6 F 2 S 0 7 5 8

6.5.1.3 Thermal overload element THM-A and THM-T

The testing circuit is same as the circuit shown in Figure 6.5.2.
The output signal of testing element is assigned to the monitoring jack A.
The output signal numbers of the elements are as follows:
Element Signal No.
THM-A 167
THM-T 168

To test easily the thermal overload element, the scheme switch [THMRST] in the "Switch" screen
on the "Test" menu is used.
• Set the scheme switch [THMRST] to "ON".
• Enter the signal number to observe the operation at the monitoring jack A as shown in
Section 6.5.1.
• Apply a test current and measure the operating time. The magnitude of the test current
should be between 1.2 × Is to 10 × Is, where Is is the current setting.
CAUTION
After the setting of a test current, apply the test current after checking that the THM% has
become 0 on the "Metering" screen.
• Calculate the theoretical operating time using the characteristic equations shown in Section
2.1.5. Check that the measured operating time is within 5%.

6.5.1.4 Negative sequence overcurrent element NOC1 and NOC2

The testing circuit is shown in Figure 6.5.5.
The output signal of testing element is assigned to the monitoring jack A.
The output signal numbers of the elements are as follows:
Element Signal No.
NOC1 169
NOC2 171

• Enter the signal number to observe the operation at the monitoring jack A as shown in
Section 6.5.1.
• Apply the three-phase balance current and the operating current value is checked by
increasing the magnitude of the current applied.
Check that the measured value is within 5% of the setting value.

 187 
 6 F 2 S 0 7 5 8

GRD140
Ia TB1 -1
A
-2
Three-phase Ib
Current A -3
source -4
Ic
A -5
-6 A
Monitoring
jack
0V

+ TB2 -A9
DC
power
supply − -B9

DC +
voltmeter
0V

Figure 6.5.5 Testing NOC elements

Directional characteristic test of NOC element

The test circuit is shown in Figure 6.5.6.
GRD140
V
Va TB2 -A1

Three-phase Vb
-B1
voltage
source
Vc
-A2
-B2
A
Monitoring
φ jack
0V
Ia TB1 -1
A
-2
Three-phase Ib
Current A -3
source -4
Ic
A -5
-6

DC + TB2 -A9
power
supply − -B9

DC
voltmeter

Figure 6.5.6 Testing Directional Characteristic of NOC Element

The following shows the case when testing NOC1.

• Select "Logic circuit" on the Test screen to display the "Logic circuit" screen.
• Enter the signal number to be observed at monitoring jack as shown in Section 6.5.1.

 188 
 6 F 2 S 0 7 5 8

• Set the scheme switch [NC1-DIR] to “FWD”.

• Apply three-phase balance voltage (=30V) and three-phase balance current.
Set Ia to lag Va by NOC characteristic angle NC θ. (The default setting of NC θ is -45°.)
• Changing the magnitude of three-phase balance current while retaining the phase angle with
the voltages, and measure the current Ia at which the element operates. Check that the
measured current magnitude is within ± 5% of the current setting.

6.5.1.5 Broken conductor detection element BCD

The testing circuit is shown in Figure 6.5.7.
GRD140
Ia TB1 -1
A
-2
Three-phase Ib
Current A -3
source -4
Ic
A -5
-6
A
Monitoring
jack
0V
+ TB2 -A9
DC
power
supply − -B9

DC +
voltmeter
0V

Figure 6.5.7 Testing BCD element

The output signal of testing element is assigned to the monitoring jack A.

The output signal numbers of the elements are as follows:
Element Signal No.
BCD 172

• Enter the signal number to observe the operation at the monitoring jack A as shown in
Section 6.5.1.
• Apply the three-phase balance current at 10% of the rated current and interrupt a phase
current.
Then, check the BCD element operates.

6.5.1.6 Cold load protection

The testing circuit is same as the circuit shown in Figure 6.5.1.
To check the cold load protection function, the scheme switch [CLPTST] in the "Switch" screen
on the "Test" menu is used. Test the item of OC1 shown in Section 6.5.1.1.
• Set the scheme switch [CLPTST] to "S0".
Check that the OC1 operates at the setting value of normal setting group.
• Next, set the scheme switch [CLPTST] to "S3".

 189 
 6 F 2 S 0 7 5 8

Check that the OC1 operates at the setting value of cold load setting group [CLSG].

6.5.1.7 Overvoltage and undervoltage elements

The testing circuit is shown in Figure 6.5.8.
GRD140
V TB2
+ -(*)
Variable-
− A
-(*) Monitoring
Voltage source
jack
0V

+ TB2 -A9
DC
power
supply − -B9

DC +
voltmeter
0V
(∗): Connect the terminal number corresponding to the testing element. Refer to Table 3.2.1.

Figure 6.5.8 Operating Value Test Circuit

The output signal of testing element is assigned to the monitoring jack A.

Overvoltage and undervoltage elements and their output signal number are listed below.
Element Signal No.
OV1-A 191
OV2-A 197
UV1-A 201
UV2-A 207
ZOV1 211
ZOV2 213

• Enter the signal number to observe the operation at the monitoring jack A as shown in
Section 6.5.1.

Operating value test of OV1, OV2, ZOV1, ZOV2

• Apply a rated voltage as shown in Figure 6.5.8.
• Increase the voltage and measure the value at which the element operates. Check that the
measured value is within ± 5% of the setting.

Operating value test of UV1, UV2

• Apply a rated voltage and frequency as shown Figure 6.5.8.
• Decrease the voltage and measure the value at which the element operates. Check that the
measured value is within ± 5% of the setting.

Operating time check of OV1, UV1, ZOV1 IDMT curves

• Change the voltage from the rated voltage to the test voltage quickly and measure the
operating time.
• Calculate the theoretical operating time using the characteristic equations shown in Section
2.2.1 and 2.2.2. Check the measured operating time.

 190 
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6.5.1.8 Negative sequence overvoltage element NOV1 and NOV2

The testing circuit is shown in Figure 6.5.9.
GRD140
V
Va TB2 -A1

Three-phase Vb
Voltage -B1
source
Vc
-A2
VN
-B2
A
Monitoring
jack
0V
+ TB2 -A9
DC
power
supply − -B9

DC +
voltmeter
0V

Figure 6.5.9 Testing NOV elements

The output signal of testing element is assigned to the monitoring jack A.

The output signal numbers of the elements are as follows:
Element Signal No.
NOV1 214
NOV2 216

• Enter the signal number to observe the operation at the monitoring jack A as shown in
Section 6.5.1.
• Apply the three-phase balance voltage and the operating voltage value is checked by
increasing the magnitude of the voltage applied.
Check that the measured value is within 5% of the setting value.

Operating time check of NOV1 IDMT curve

• Change the voltage from the rated voltage to the test voltage quickly and measure the
operating time.
• Calculate the theoretical operating time using the characteristic equations shown in Section
2.2.4. Check the measured operating time.

 191 
 6 F 2 S 0 7 5 8

6.5.1.9 Frequency Elements

The testing circuit is shown in Figure 6.5.10.
GRD140
V f TB2
+ -A1
Variable- A
Monitoring
Frequency /
− -B2 jack
Voltage source 0V

+ TB2 -A9
DC
power
supply − -B9

+
DC
voltmeter
−

Figure 6.5.10 Operating Value Test Circuit

The output signal of testing element is assigned to the monitoring jack A.

Frequency elements and their output signal number are listed below.
Element Signal No.
FRQ1 218
FRQ2 219
FRQ3 220
FRQ4 221
FRQBLK 222

Overfrequency or underfrequency elements FRQ1 to FRQ4

• Enter the signal number to observe the operation at the monitoring jack A as shown in
Section 6.5.1.
• Apply a rated voltage and frequency as shown in Figure 6.5.10.
In case of overfrequency characteristic,
• Increase the frequency and measure the value at which the element operates. Check that the
measured value is within ± 0.005Hz of the setting.
In case of underfrequency characteristics,
• Decrease the frequency and measure the value at which the element operates. Check that
the measured value is within ± 0.005Hz of the setting.

Undervoltage block test, FRQBLK

• Apply a rated voltage and change the magnitude of frequency to operate an element.
• Keep the frequency that the element is operating, and change the magnitude of the voltage
applied from the rated voltage to less than FRQBLK setting voltage. And then, check that
the element resets.

 192 
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6.5.2 Protection Scheme

In the protection scheme tests, a dynamic test set is required to simulate power system pre-fault,
fault and post-fault conditions.
Tripping is observed with the tripping command output relays after a simulated fault occurs.

Circuit Breaker failure tripping

• Set the scheme switch [BTC] to "ON" and [RTC] to "DIR" or "OC".
• Apply a fault, retain it and input an external trip signal. Check that the retrip output relays
operate after the time setting of the TRTC and the adjacent breaker tripping output relay
operates after the time setting of the TBTC.

6.5.3 Metering and Recording

The metering function can be checked while testing the AC input circuit. See Section 6.4.4.
Fault recording can be checked while testing the protection schemes. Open the "Fault record"
screen and check that the descriptions are correct for the fault concerned.
Recording events are listed in Appendix D. There are internal events and external events by binary
input commands. Event recording on the external event can be checked by changing the status of
binary input command signals. Change the status in the same way as the binary input circuit test
(see Section 6.4.2) and check that the description displayed on the "Event record" screen is
correct. Some of the internal events can be checked in the protection scheme tests.
Disturbance recording can be checked while testing the protection schemes. The LCD display
only shows the date and time when a disturbance is recorded. Open the "Disturbance record"
screen and check that the descriptions are correct.
Details can be displayed on the PC. Check that the descriptions on the PC are correct. For details
on how to obtain disturbance records on the PC, see the RSM100 Manual.

 193 
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6.6 Conjunctive Tests

6.6.1 On Load Test

To check the polarity of the current and voltage transformers, check the load current, system
voltage and their phase angle with the metering displays on the LCD screen.
• Open the "Auto-supervision" screen check that no message appears.
• Open the following "Metering" screen from the "Status" sub-menu to check the above.
/ 3 C u r r e n t
I a ∗ ∗ . ∗ ∗ k A Not available for model 110 and APPL=1P setting in models 400 and 420.
∗ ∗ ∗ . ∗ °
I b ∗ ∗ . ∗ ∗ k A Not available for models 110 and APPL=1P and 2P settings in models 400 and 420.
∗ ∗ ∗ . ∗ °
I c ∗ ∗ . ∗ ∗ k A Not available for model 110 and APPL=1P setting in models 400 and 420.
∗ ∗ ∗ . ∗ °
I e ∗ ∗ . ∗ ∗ k A
∗ ∗ ∗ . ∗ °
I s e ∗ ∗ ∗ ∗ . ∗ A Not available for models 400.
∗ ∗ ∗ . ∗ °
I 1 ∗ ∗ . ∗ ∗ k A Not available for models 110 and APPL=1P and 2P settings in models 400 and 420.
∗ ∗ ∗ . ∗ °
I 2 ∗ ∗ . ∗ ∗ k A Not available for models 110 and APPL=1P and 2P settings in models 400 and 420.
∗ ∗ ∗ . ∗ °
I 2 / I 1 ∗ ∗ . ∗ ∗ Not available for models 110 and APPL=1P and 2P settings in models 400 and 420.
T H M ∗ ∗ ∗ . ∗ % Not available for model 110 and APPL=1P setting in models 400 and 420.
V a n ∗ ∗ ∗ . ∗ ∗ k V Not available for model 110 and APPL=3P and 2P setting in models 400 and 420.
∗ ∗ ∗ . ∗ °
V b n ∗ ∗ ∗ . ∗ ∗ k V Not available for model 110 and APPL=3P and 2P setting in models 400 and 420.
∗ ∗ ∗ . ∗ °
V c n ∗ ∗ ∗ . ∗ ∗ k V Not available for model 110 and APPL=3P and 2P setting in models 400 and 420.
∗ ∗ ∗ . ∗ °
V e ∗ ∗ ∗ . ∗ ∗ k V
∗ ∗ ∗ . ∗ °
V a b ∗ ∗ ∗ . ∗ ∗ k V Not available for model 110.
∗ ∗ ∗ . ∗ °
V b c ∗ ∗ ∗ . ∗ ∗ k V Not available for model 110.
∗ ∗ ∗ . ∗ °
V c a ∗ ∗ ∗ . ∗ ∗ k V Not available for model 110.
∗ ∗ ∗ . ∗ °
V 0 ∗ ∗ ∗ . ∗ ∗ k V Not available for model 110.
∗ ∗ ∗ . ∗ °
V 1 ∗ ∗ ∗ . ∗ ∗ k V Not available for model 110.
∗ ∗ ∗ . ∗ °
V 2 ∗ ∗ ∗ . ∗ ∗ k V Not available for model 110.
∗ ∗ ∗ . ∗ °
f ∗ ∗ . ∗ ∗ H z Not available for model 110.
P F - ∗ . ∗ ∗ ∗ Not available for model 110. Total 3 phase power factor.
P - ∗ ∗ ∗ ∗ ∗ ∗ k W Not available for model 110. Total 3 phase active power.
Q - ∗ ∗ ∗ ∗ ∗ ∗ k v a r Not available for model 110. Total 3 phase reactive power.
S - ∗ ∗ ∗ ∗ ∗ ∗ k V A Not available for model 110. Total 3 phase apparent power.

Note: The magnitude of current can be set in values on the primary side or on the secondary side by
the setting. (The default setting is the secondary side.)

 194 
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6.6.2 Tripping and Reclosing Circuit Test

The tripping circuit including the circuit breaker is checked by forcibly operating the output relay
and monitoring the circuit breaker to confirm that it is tripped. Forcible operation of the output
relay is performed on the "Binary O/P " screen of the "Test" sub-menu as described in Section
6.4.3.

Tripping circuit
• Set the breaker to be closed.
• Select "Binary O/P" on the "Test" sub-menu screen to display the "Binary O/P" screen.
/ 2 B i n a r y O / P

B O 1 0 _
D i s a b l e / E n a b l e
B O 2 0
D i s a b l e / E n a b l e
B O 3 0
D i s a b l e / E n a b l e
B O 4 0
D i s a b l e / E n a b l e
B O 5 0
D i s a b l e / E n a b l e
B O 6 0
D i s a b l e / E n a b l e
B O 7 0
D i s a b l e / E n a b l e
BO1 to BO7 are output relays with one normally open contact.

• Enter 1 for BO1 and press the ENTER key.

• Press the END key. Then the LCD displays the screen shown below.

O p e r a t e ?
E N T E R = Y C A N C E L = N

• Keep pressing the ENTER key to operate the output relay BO1 and check that the A-phase
breaker is tripped.
• Stop pressing the ENTER key to reset the operation.

• Repeat the above for BO2 to BO7.

Reclosing circuit
• Ensure that the circuit breaker is open.
• Select "Binary O/P" on the "Test" sub-menu screen to display the "Binary O/P" screen.
• Select the BO number which is an autoreclose command output relay with one normally open
contact.
Note: The autoreclose command is assigned to any of the output relays by the user setting
• Operate the BO by the same manner as above.

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6.7 Maintenance
6.7.1 Regular Testing
The relay is almost completely self-supervised. The circuits that can not be supervised are binary
input and output circuits and human interfaces.
Therefore, regular testing is minimised to checking the unsupervised circuits. The test procedures
are the same as described in Sections 6.4.1, 6.4.2 and 6.4.3.

6.7.2 Failure Tracing and Repair

Failures will be detected by automatic supervision or regular testing.
When a failure is detected by supervision, a remote alarm is issued with the binary output relay of
FAIL and the failure is indicated on the front panel with LED indicators or LCD display. It is also
recorded in the event record.
Failures detected by supervision are traced by checking the "Err: " screen on the LCD. Table 6.7.1
shows LCD messages and failure locations.
The locations marked with (1) have a higher probability than locations marked with (2).

Table 6.7.1 LCD Message and Failure Location

Message Failure location

Relay Unit AC cable CB or cable
Err: SUM ×(Flash memory)
Err: RAM ×(SRAM)
Err: BRAM ×(Backup RAM)
Err: EEP ×(EEPROM)
Err: A/D ×(A/D converter)
Err: DC ×(DC power supply circuit)
Err: TC ×(Tripping circuit)(1) × (2)
Err: CT, Err: V0, Err: V2 × (AC input circuit)(1) × (2)
Err: CB × (Circuit breaker)(1) × (2)
Err: CTF × (AC input circuit)(2) × (1)
Err: VTF1, Err: VTF2 × (AC input circuit)(2) × (1)

( ): Probable failure location in the relay unit including its peripheral circuits.

If no message is shown on the LCD, this means that the failure location is either in the DC power
supply circuit or in the microprocessors. If the "ALARM" LED is off, the failure is in the DC
power supply circuit. If the LED is lit, the failure is in the microprocessors. Replace the relay unit
in both cases after checking if the correct DC voltage is applied to the relay.

If a failure is detected by automatic supervision or regular testing, replace the failed relay unit.
Note: When a failure or an abnormality is detected during the regular test, confirm the following
first:
- Test circuit connections are correct.
- Modules are securely inserted in position.
- Correct DC power voltage is applied.

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- Correct AC inputs are applied.

- Test procedures comply with those stated in the manual.

6.7.3 Replacing Failed Relay Unit

If the failure is identified to be in the relay unit and the user has a spare relay unit, the user can
recover the protection by replacing the failed relay unit.
Repair at the site should be limited to relay unit replacement. Maintenance at the component level
is not recommended.
Check that the replacement relay unit has an identical Model Number and relay version (software
type form) as the removed relay.
The Model Number is indicated on the front of the relay. For the relay version, see Section 4.2.5.1.

Replacing the relay unit

CAUTION After replacing the relay unit, check the settings.

The procedure of relay withdrawal and insertion is as follows:

• Switch off the DC power supply.
WARNING Hazardous voltage may remain in the DC circuit just after switching off the
DC power supply. It takes about 30 seconds for the voltage to discharge.
• Disconnect the trip outputs.
• Short-circuit all AC current inputs. Open all AC voltage inputs.
• Unscrew the relay front cover.
• Unscrew the binding screw on the handle.
• To remove the relay unit from its case, pull up the handle and pull the handle towards you. (See
Figure 6.7.1.)
• Insert the (spare) relay unit in the reverse procedure.
CAUTION To avoid risk of damage:
• Keep the handle up when inserting the relay unit into the case.
• Do not catch the handle when carrying the relay unit.
• Check that the relay unit and its case have the identical Model Number
when inserting the relay unit.

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 6 F 2 S 0 7 5 8

IN SERVICE VIEW IN SERVICE VIEW

TRIP TRIP
ALARM ALARM

RESET RESET

A B 0V CAN ENTER A B 0V CAN ENTER

CEL CEL

END END
Handle
Pull up handle

Bind screw

Figure 6.7.1 Handle of Relay Unit

6.7.4 Resumption of Service

After replacing the failed relay unit or repairing failed external circuits, take the following
procedures to restore the relay to the service.
• Switch on the DC power supply and confirm that the "IN SERVICE" green LED is lit and the
"ALARM" red LED is not lit.
• Supply the AC inputs and reconnect the trip outputs.

6.7.5 Storage

The spare relay should be stored in a dry and clean room. Based on IEC Standard 60255-6 the
storage temperature should be −25°C to +70°C, but the temperature of 0°C to +40°C is
recommended for long-term storage.

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7. Putting Relay into Service

The following procedure must be adhered to when putting the relay into service after finishing the
commissioning tests or maintenance tests.
• Check that all the external connections are correct.
• Check the settings of all measuring elements, timers, scheme switches, recordings and clock
are correct.
In particular, when settings are changed temporarily for testing, be sure to restore them.
• Clear any unnecessary records on faults, alarms, events, disturbances and counters which are
recorded during the tests.
• Press the VIEW key and check that no failure message is displayed on the "Alarm view"
screen.
• Check that the green "IN SERVICE" LED is lit and no other LEDs are lit on the front panel.

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 200 
 6 F 2 S 0 7 5 8

Appendix A
Programmable Reset Characteristics
and Implementation of Thermal Model
to IEC60255-8

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Programmable Reset Characteristics

The overcurrent stages for phase and earth faults, OC1 and EF1, each have a programmable reset
feature. Resetting may be instantaneous, definite time delayed, or, in the case of IEEE/US curves,
inverse time delayed.
Instantaneous resetting is normally applied in multi-shot auto-reclosing schemes, to ensure correct
grading between relays at various points in the scheme. On the other hand, the inverse reset
characteristic is particularly useful to provide correct co-ordination with an upstream induction disc type
overcurrent relay.
The definite time delayed reset characteristic may be used to provide faster clearance of intermittent
(‘pecking’ or ‘flashing’) fault conditions. An example of where such phenomena may be experienced is
in plastic insulated cables, where the fault energy melts the cable insulation and temporarily
extinguishes the fault, after which the insulation again breaks down and the process repeats.
An inverse time overcurrent protection with instantaneous resetting cannot detect this condition until the
fault becomes permanent, thereby allowing a succession of such breakdowns to occur, with associated
damage to plant and danger to personnel. If a definite time reset delay of, for example, 60 seconds is
applied, on the other hand, the inverse time element does not reset immediately after each successive
fault occurrence. Instead, with each new fault inception, it continues to integrate from the point reached
during the previous breakdown, and therefore operates before the condition becomes permanent. Figure
A-1 illustrates this theory.

Intermittent
Fault Condition

TRIP LEVEL

Inverse Time Relay

with Instantaneous
Reset

TRIP LEVEL

Inverse Time Relay

with Definite Time
Reset
Delayed Reset

Figure A-1

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Implementation of Thermal Model to IEC60255-8

Heating by overload current and cooling by dissipation of an electrical system follow exponential time
constants. The thermal characteristics of the electrical system can be shown by equation (1).
I2  −t 
θ = 1 − e τ  × 100% (1)
I AOL 
2 

where:
θ = thermal state of the system as a percentage of allowable thermal capacity,
I = applied load current,
IAOL = allowable overload current of the system,
τ = thermal time constant of the system.
The thermal stateθis expressed as a percentage of the thermal capacity of the protected system, where
0% represents the cold state and 100% represents the thermal limit, that is the point at which no further
temperature rise can be safely tolerated and the system should be disconnected. The thermal limit for
any given electrical plant is fixed by the thermal setting IAOL. The relay gives a trip output when θ =
100%.
If current I is applied to a cold system, then θ will rise exponentially from 0% to (I2/IAOL2 × 100%), with time
constant τ, as in Figure A-2. If θ = 100%, then the allowable thermal capacity of the system has been reached.

θ (%)

100%

I2 2 × 100%
I AOL

2 − tτ 
θ = I I 2 1 − e 

× 100 %
AOL

t (s)
Figure A-2

A thermal overload protection relay can be designed to model this function, giving tripping times
according to the IEC60255-8 ‘Hot’ and ‘Cold’ curves.
 I2 
t =τ·Ln  2 2  (1) ····· Cold curve
 I − I AOL 

 I2 − I 2 
t =τ·Ln  2 2P  (2) ····· Hot curve
 I − I AOL 

where:

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IP = prior load current.

In fact, the cold curve is simply a special case of the hot curve where prior load current IP = 0, catering
for the situation where a cold system is switched on to an immediate overload.
Figure A-3 shows a typical thermal profile for a system which initially carries normal load current, and
is then subjected to an overload condition until a trip results, before finally cooling to ambient
temperature.

θ (%) Overload Current

Condition Trip at 100%

100%

Normal Load
Current Condition Cooling Curve

t (s)

Figure A-3

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Appendix B
Directional Earth Fault Protection and
Power System Earthing

 205 
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Directional Earth Fault Protection and Power System Earthing

Power systems may be solidly earthed, impedance earthed or unearthed (insulated). Depending
on the method used, faults to earth have widely differing characteristics, and so methods of earth
fault protection differ greatly between the various types of system.

1. Solidly earthed systems

In a solidly earthed system the neutral points of the power transformers are connected directly to
earth, for the purposes of reducing overvoltages and facilitating fault detection. The
disadvantage of solid earthing is that fault currents can be very high, and must be disconnected
quickly.
Since the impedance of the source is normally very low, fault current varies greatly in
magnitude depending on the location of the fault. Selective isolation of a faulty section is
therefore possible via time/current graded earth fault overcurrent protection. Fault current is
detected by measuring the system residual current.
On an interconnected system, where fault current can flow in either direction, then directional
earth fault relays are applied. The fault causes a residual voltage to be generated, and this can be
used for directional polarization. Residual current and voltage can be measured as shown in
Figure B1.
Residual current IR is equal in magnitude and direction to the fault current. It typically lags the
faulted phase voltage by a considerable angle due to the reactance of the source. Directional
control is achieved by polarising against the system residual voltage, which may be found either
by summating the phase voltages, or it may be extracted from the open delta connected
secondary (or tertiary) winding of a five limb VT, as shown in the diagram.
A directional earth fault relay protecting a solidly earthed system is normally connected to
measure VR inverted. If GRD140 is applied to derive residual voltage from the phase voltages
then the inversion of VR is performed internally.

A
F

51N

67

V an

IR
Pre- Ia V an Post-fault
fault Earth
n
n
V cn V bn V cn V bn
VR

Figure B1 - Directional Earth Fault Protection for Solidly Earthed Systems

 206 
 6 F 2 S 0 7 5 8

The relay characteristic angle setting is applied to compensate for lag of the fault current.
Generally accepted angle settings are -45° for solidly earthed distribution systems and -60° for
transmission systems.
Due to system imbalances and measuring tolerances, small levels of residual voltage can be
present during normal operating conditions. Therefore, GRD140 provides a voltage threshold
which must be exceeded before the directional protection will operate. Although this threshold is
user programmable, most applications will be satisfied by the default setting of 3V.

2. Unearthed (insulated) systems

An insulated system has no intentional connection to earth, although all systems are in fact
earthed by natural capacitive coupling. Fault current is very low, being made up of capacitive
charging currents, thus limiting damage to plant. However, high steady-state and transient
overvoltages are produced, and selective isolation of faults is difficult.
An earth fault on an ungrounded system causes a voltage shift between the neutral point and
earth, and the fault can be detected by measuring this shift. So called neutral voltage
displacement protection is commonly applied but, unfortunately, the shift in voltage is
essentially the same throughout the system and so this method cannot selectively isolate a
faulted section.
The method of directional earth fault protection described previously for solidly earthed systems
cannot be used in the case of insulated systems because of the absence of real fault current.
However, an alternative method can be applied, using GRD140 directional sensitive earth fault
protection. The relay must be connected using a core balance CT, to measure the flow of
capacitive charging currents, which become unbalanced in the event of a fault.
A phase to earth fault effectively short circuits that phase’s capacitance to earth for the whole
system, thus creating an unbalance in the charging currents for all feeders connected to the
system. The resulting fault current is made up of the sum of the combined residual charging
currents for both the faulty and healthy feeders.

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 6 F 2 S 0 7 5 8

51N 51N

IF

IU2 IU1

-VR
IU3+....

Healthy Faulty
feeder V an Earth (e) feeder

IR1
V an
Ib IU1
IU2(=IR2) IU1
n Ic IF=IU1+IU2+IU3+... n

V cn V bn V cn V bn

Figure B2 - Residual Current Flow in an Unearthed System

It can be shown that the residual current measured in the faulty feeder is 180° out of phase with
that in the healthy feeder, as illustrated in Figure B2 This fact can be used to apply a GRD140
directional sensitive earth fault relay. The polarising voltage used for directional earth fault
relays is normally -VR (the residual voltage inverted), and it can be seen that the residual current
(IR1) for the faulty feeder leads this voltage by 90°. For the healthy feeders the residual current
lags the voltage by 90°. Therefore, the GRD140 sensitive earth fault protection should be
applied with a characteristic angle of +90° so as to provide discriminatory protection.
The residual current in the faulted phase is equal to three times the per phase charging current,
and the sensitive earth fault element should be set well below this value to ensure operation
(30% of this value is typical).

3. Impedance earthing

In between the two extremes of solidly earthed and unearthed systems there are a variety of
compromise solutions, which normally involve connecting the system neutrals to earth via a
resistance or reactance.

3a. Resistance earthing

In the case of resistance earthed systems, GRD140 directional earth fault relays can normally be
applied in a similar manner to that for solidly earthed systems, with the exceptions that current
settings will be lower and the characteristic angle setting will probably be different. In the event
of a fault, it is the resistance in the neutral which predominates in the source impedance, and so
the residual current lags its polarising voltage by a much smaller angle. Characteristic angle

 208 
 6 F 2 S 0 7 5 8

settings of -15° or 0° are common.

3b. Reactance earthing

Reactance earthed systems are also common in many countries. A special case of this method is
known as Petersen coil, or resonant, earthing. The inductance in the neutral is chosen to cancel
the total capacitance of the system so that no current flows into an earth fault.
Directional sensitive earth fault protection can again be applied by detecting the unbalance in
charging currents. It can be shown that the residual current distribution for healthy and faulty
feeders is as illustrated in Figure B3.
In the case of the healthy feeder, the residual current lags the polarising voltage (-VR) by more
than 90°, while for the faulty feeder, the angle is less than 90°. GRD140 directional sensitive
earth fault protection can be applied, with a 0° characteristic angle. Note that the SEF boundary
of directional operation should be set to ±90°. The residual current for the healthy feeder then
falls in the restraint zone, while for the faulty feeder it lies in the operate zone, thus providing
selective isolation of the fault.

-V R -V R

Healthy Faulty
feeder Earth (e) feeder

V an V an IR1
Operate Zone
n Restraint Zone n
IR2
V cn V cn V bn
V bn

Figure B3 - Residual Current Flow in a Resonant Earthed System

3c. Reactance Earthing and Residual Power Control

GRD140 can provide an additional restraint on operation by the (optional) residual power
control feature. The active component of residual power can be calculated as follows:
ℜ(PR ) = I R × V R × cos φ
where φ is the phase angle between the residual current (IR) and the polarising voltage (-VR).
It is clear from Figure B3 that this value will be positive when measured at the faulty feeder and
negative anywhere else. GRD140 directional sensitive earth fault protection can be applied with
a power threshold such that operation is permitted when residual power exceeds the setting and
is in the operate direction.

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 210 
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Appendix C
Signal List

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 6 F 2 S 0 7 5 8

No. Signal Name Contents

0 Not in use
1 BI1 COMMAND Binary input signal of BI1
2 BI2 COMMAND Binary input signal of BI2
3 BI3 COMMAND Binary input signal of BI3
4 BI4 COMMAND Binary input signal of BI4
5 BI5 COMMAND Binary input signal of BI5
6 BI6 COMMAND Binary input signal of BI6
7 BI7 COMMAND Binary input signal of BI7
8 BI8 COMMAND Binary input signal of BI8
9
10
11
12
13
14
15
16
17
18
19
20
21 SET.GROUP1 BI command of change active setting group1
22 SET.GROUP2 BI command of change active setting group2
23 SET.GROUP3 BI command of change active setting group3
24 SET.GROUP4 BI command of change active setting group4
25 OC1 BLOCK BI command of OC1 protection scheme block
26 OC2 BLOCK BI command of OC2 protection scheme block
27 OC3 BLOCK BI command of OC3 protection scheme block
28 OC4 BLOCK BI command of OC4 protection scheme block
29 EF1 BLOCK BI command of EF1 protection scheme block
30 EF2 BLOCK BI command of EF2 protection scheme block
31 EF3 BLOCK BI command of EF3 protection scheme block
32 EF4 BLOCK BI command of EF4 protection scheme block
33 EF1 PERMIT BI command of EF1 protection scheme permission
34 EF2 PERMIT BI command of EF2 protection scheme permission
35 EF3 PERMIT BI command of EF3 protection scheme permission
36 EF4 PERMIT BI command of EF4 protection scheme permission
37 SEF1 BLOCK BI command of SEF1 protection scheme block
38 SEF2 BLOCK BI command of SEF2 protection scheme block
39 SEF3 BLOCK BI command of SEF3 protection scheme block
40 SEF4 BLOCK BI command of SEF4 protection scheme block
41 UC1 BLOCK BI command of UC1 protection scheme block
42 UC2 BLOCK BI command of UC2 protection scheme block
43 THM BLOCK BI command of Thermal overload protection scheme block
44 THMA BLOCK BI command of Thermal overload alarm scheme block
45 NOC1 BLOCK BI command of NOC1 protection scheme block
46 NOC2 BLOCK BI command of NOC2 protection scheme block
47 BCD BLOCK BI command of Broken Conductor protection scheme block
48 CBF BLOCK BI command of CBF protection scheme block
49 OV1 BLOCK BI command of OV1 protection scheme block
50 OV2 BLOCK BI command of OV2 protection scheme block
51 UV1 BLOCK BI command of UV1 protection scheme block
52 UV2 BLOCK BI command of UV2 protection scheme block
53 ZOV1 BLOCK BI command of ZOV1 protection scheme block
54 ZOV2 BLOCK BI command of ZOV2 protection scheme block
55 NOV1 BLOCK BI command of NOV1 protection scheme block
56 NOV2 BLOCK BI command of NOV2 protection scheme block
57 FRQ1 BLOCK BI command of FRQ1 protection scheme block
58 FRQ2 BLOCK BI command of FRQ2 protection scheme block
59 FRQ3 BLOCK BI command of FRQ3 protection scheme block
60 FRQ4 BLOCK BI command of FRQ4 protection scheme block
61 ARC BLOCK BI command of ARC scheme block
62 ARC READY BI command of ARC ready
63 ARC INIT BI command of ARC initiation
64 MANUAL CLOSE BI command of Manual close
65 ARC N/A BI command of ARC not applied
66 CTF BLOCK BI command of CTF blocking
67 EXT CTF BI command of External CTF
68 VTF BLOCK BI command of VTF blocking
69 EXT VTF BI command of External VTF
70 TC FAIL BI command of Trip circuit Fail Alarm
71 CB CONT OPN BI command of CB N/O contact
72 CB CONT CLS BI command of CB N/C contact
73 EXT TRIP-3PH BI command of External trip (3 Phase)
74 EXT TRIP-APH BI command of External trip (A Phase)
75 EXT TRIP-BPH BI command of External trip (B Phase)
76 EXT TRIP-CPH BI command of External trip (C Phase)
77 REMOTE RESET BI command of Remote reset
78 SYNC CLOCK BI command of Synchronise Clock
79 STORE RECORD BI command of Store Disturbance Record
80 ALARM1 BI command of Alarm1

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No. Signal Name Contents

81 ALARM2 BI command of Alarm2
82 ALARM3 BI command of Alarm3
83 ALARM4 BI command of Alarm4
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101 OC1-A OC1-A relay element output
102 OC1-B OC1-B relay element output
103 OC1-C OC1-C relay element output
104 OC1-A INST OC1-A relay element start
105 OC1-B INST OC1-B relay element start
106 OC1-C INST OC1-C relay element start
107 OC2-A OC2-A relay element output
108 OC2-B OC2-B relay element output
109 OC2-C OC2-C relay element output
110
111
112
113 OC3-A OC3-A relay element output
114 OC3-B OC3-B relay element output
115 OC3-C OC3-C relay element output
116 OC4-A OC4-A relay element output
117 OC4-B OC4-B relay element output
118 OC4-C OC4-C relay element output
119 OC1-A HS High speed output of OC1-A relay
120 OC1-B HS High speed output of OC1-B relay
121 OC1-C HS High speed output of OC1-C relay
122 OC1 INST OC1 relay element start (OR Logic of No. 104, 105 and 106)
123
124
125
126
127
128
129
130
131 EF1 EF1 relay element output
132 EF1 INST EF1 relay element start
133 EF2 EF2 relay element output
134
135 EF3 EF3 relay element output
136 EF4 EF4 relay element output
137 CUR-REV DET. Current reversal detection.
138 EF1 HS High speed output of EF1 relay
139
140
141 SEF1 SEF1 relay element output
142 SEF1 INST SEF1 relay element start
143 SEF2 SEF2 relay element output
144
145 SEF3 SEF3 relay element output
146 SEF4 SEF4 relay element output
147 SEF1 HS High speed output of SEF1 relay
148 RPF Residual power forward element
149 RPR Residual power reverse element
150
151
152
153
154
155
156
157
158
159
160

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No. Signal Name Contents

161 UC1-A UC1-A relay element output
162 UC1-B UC1-B relay element output
163 UC1-C UC1-C relay element output
164 UC2-A UC2-A relay element output
165 UC2-B UC2-B relay element output
166 UC2-C UC2-C relay element output
167 THM-A THERMAL Alarm relay element output
168 THM-T THERMAL Trip relay element output
169 NOC1 NOC1 relay element output
170
171 NOC2 NOC2 relay element output
172 BCD BCD relay element output
173 CBF-A CBF-A relay element output
174 CBF-B CBF-B relay element output
175 CBF-C CBF-C relay element output
176 ICLDO-A ICLDO-A relay (OC relay) element output used in "CLP scheme"
177 ICLDO-B ICLDO-B relay (OC relay) element output used in "CLP scheme"
178 ICLDO-C ICLDO-C relay (OC relay) element output used in "CLP scheme"
179 OC-A DIST OC-A relay for disturbance record
180 OC-B DIST OC-B relay for disturbance record
181 OC-C DIST OC-C relay for disturbance record
182 EF DIST EF relay for disturbance record
183 SEF DIST SEF relay for disturbance record
184 NOC DIST NOC relay for disturbance record
185
186
187
188
189
190
191 OV1-A OV1-1 relay element output
192 OV1-B OV1-2 relay element output
193 OV1-C OV1-3 relay element output
194 OV1-A INST OV1-1 relay element start
195 OV1-B INST OV1-2 relay element start
196 OV1-C INST OV1-3 relay element start
197 OV2-A OV2-1 relay element output
198 OV2-B OV2-2 relay element output
199 OV2-C OV2-3 relay element output
200
201 UV1-A UV1-1 relay element output
202 UV1-B UV1-2 relay element output
203 UV1-C UV1-3 relay element output
204 UV1-A INST UV1-1 relay element start
205 UV1-B INST UV1-2 relay element start
206 UV1-C INST UV1-3 relay element start
207 UV2-A UV2-1 relay element output
208 UV2-B UV2-2 relay element output
209 UV2-C UV2-3 relay element output
210
211 ZOV1 ZOV1 relay element ouput
212 ZOV1 INST ZOV1 relay element start
213 ZOV2 ZOV2 relay element ouput
214 NOV1 NOV1 relay element ouput
215 NOV1 INST NOV1 relay element start
216 NOV2 NOV2 relay element ouput
217 UVBLK UV blocked element operating
218 FRQ1 FRQ1 relay element ouput
219 FRQ2 FRQ2 relay element ouput
220 FRQ3 FRQ3 relay element ouput
221 FRQ4 FRQ4 relay element ouput
222 FRQBLK FRQ blocked element operating
223
224
225
226
227
228
229
230
231 EFCF EF element for CTF detection
232 ZOVCF ZOV element for CTF detection
233 UVVF-A UV-A element for VTF detection
234 UVVF-B UV-B element for VTF detection
235 UVVF-C UV-C element for VTF detection
236 UVVF-OR UV-OR element for VTF detection
237 OCDVF-A OCD-A element for VTF detection
238 OCDVF-B OCD-B element for VTF detection
239 OCDVF-C OCD-C element for VTF detection
240 OCDVF-OR OCD-OR element for VTF detection

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No. Signal Name Contents

241 ZOVVF ZOV element for VTF detection
242 EFVF EF element for VTF detection
243 OC COORD-A OC-A coordination element
244 OC COORD-B OC-B coordination element
245 OC COORD-C OC-C coordination element
246 EF COORD EF coordination element
247 SEF COORD SEF coordination element
248 ZOV DIST ZOV relay for disturbance record
249 NOV DIST NOV relay for disturbance record
250 OV-A DIST OV-A relay for disturbance record
251 OV-B DIST OV-B relay for disturbance record
252 OV-C DIST OV-C relay for disturbance record
253 UV-A DIST UV-A relay for disturbance record
254 UV-B DIST UV-B relay for disturbance record
255 UV-C DIST UV-C relay for disturbance record
256 (NOT USED, reserved for disturbance record)
257
258
259
260
261 OC1 TRIP OC1 trip command
262 OC1-A TRIP OC1 trip command (A Phase)
263 OC1-B TRIP OC1 trip command (B Phase)
264 OC1-C TRIP OC1 trip command (C Phase)
265 OC2 TRIP OC2 trip command
266 OC2-A TRIP OC2 trip command (A Phase)
267 OC2-B TRIP OC2 trip command (B Phase)
268 OC2-C TRIP OC2 trip command (C Phase)
269 OC3 TRIP OC3 trip command
270 OC3-A TRIP OC3 trip command (A Phase)
271 OC3-B TRIP OC3 trip command (B Phase)
272 OC3-C TRIP OC3 trip command (C Phase)
273 OC4 ALARM OC4 alarm command
274 OC4-A ALARM OC4 alarm command (A Phase)
275 OC4-B ALARM OC4 alarm command (B Phase)
276 OC4-C ALARM OC4 alarm command (C Phase)
277
278
279
280
281 EF1 TRIP EF1 trip command
282 EF2 TRIP EF2 trip command
283 EF3 TRIP EF3 trip command
284 EF4 ALARM EF4 alarm command
285 EF1 CARRIER EF1 carrier command
286 EF2 CARRIER EF2 carrier command
287 EF3 CARRIER EF3 carrier command
288 EF4 CARRIER EF4 carrier command
289
290
291 SEF1-S1 TRIP SEF1 Stage1 trip command
292 SEF1-S2 TRIP SEF1 Stage2 trip command
293 SEF2 TRIP SEF2 trip command
294 SEF3 TRIP SEF3 trip command
295 SEF4 ALARM SEF4 alarm command
296
297
298
299
300
301 UC1 TRIP UC1 trip command
302 UC1-A TRIP UC1 trip command (A Phase)
303 UC1-B TRIP UC1 trip command (B Phase)
304 UC1-C TRIP UC1 trip command (C Phase)
305 UC2 ALARM UC2 alarm command
306 UC2-A ALARM UC2 alarm command (A Phase)
307 UC2-B ALARM UC2 alarm command (B Phase)
308 UC2-C ALARM UC2 alarm command (C Phase)
309 THM ALARM Thermal alarm command
310 THM TRIP Thermal trip command
311 NOC1 TRIP NOC1 trip command
312 NOC2 ALARM NOC2 alarm command
313 BCD TRIP BCD trip command
314 CBF RETRIP CBF retrip command
315 CBF RETRIP-A CBF retrip command(A Phase)
316 CBF RETRIP-B CBF retrip command(B Phase)
317 CBF RETRIP-C CBF retrip command(C Phase)
318 CBF TRIP CBF back trip command
319 CBF TRIP-A CBF back trip command(A Phase)
320 CBF TRIP-B CBF back trip command(B Phase)

 215 
 6 F 2 S 0 7 5 8

No. Signal Name Contents

321 CBF TRIP-C CBF back trip command(C Phase)
322
323
324
325
326
327
328
329
330
331 OV1 TRIP OV1 trip command
332 OV1-A TRIP OV1 trip command(A Phase)
333 OV1-B TRIP OV1 trip command(B Phase)
334 OV1-C TRIP OV1 trip command(C Phase)
335 OV2 ALARM OV2 alarm command
336 OV2-A ALARM OV2 alarm command(A Phase)
337 OV2-B ALARM OV2 alarm command(B Phase)
338 OV2-C ALARM OV2 alarm command(C Phase)
339
340
341 UV1 TRIP UV1 trip command
342 UV1-A TRIP UV1 trip command(A Phase)
343 UV1-B TRIP UV1 trip command(B Phase)
344 UV1-C TRIP UV1 trip command(C Phase)
345 UV2 ALARM UV2 alarm command
346 UV2-A ALARM UV2 alarm command(A Phase)
347 UV2-B ALARM UV2 alarm command(B Phase)
348 UV2-C ALARM UV2 alarm command(C Phase)
349
350
351 ZOV1 TRIP ZOV1 trip command
352 ZOV2 ALARM ZOV2 alarm command
353 NOV1 TRIP NOV1 trip command
354 NOV2 ALARM NOV2 alarm command
355 FRQ TRIP FRQ trip command
356 FRQ1 TRIP FRQ1 trip command
357 FRQ2 TRIP FRQ2 trip command
358 FRQ3 TRIP FRQ3 trip command
359 FRQ4 TRIP FRQ4 trip command
360
361
362
363
364
365
366
367
368
369
370
371 GEN.TRIP General trip command
372 GEN.TRIP-A General trip command (A Phase)
373 GEN.TRIP-B General trip command (B Phase)
374 GEN.TRIP-C General trip command (C Phase)
375 GEN.TRIP-N General trip command (N Phase)
376 CLP STATE0 Cold Load Protection State
377 CLP STATE1 Cold Load Protection State
378 CLP STATE2 Cold Load Protection State
379 CLP STATE3 Cold Load Protection State
380 GEN.ALARM General alarm command
381 GEN.ALARM-A General alarm command (A Phase)
382 GEN.ALARM-B General alarm command (B Phase)
383 GEN.ALARM-C General alarm command (C Phase)
384 GEN.ALARM-N General alarm command (N Phase)
385 CTF CT failure detection
386 VTF VT failure detection
387 VTF1 VT failure detection 1
388 VTF2 VT failure detection 2
389
390
391
392
393
394
395
396
397
398
399
400

 216 
 6 F 2 S 0 7 5 8

No. Signal Name Contents

401 ARC READY T Auto-Reclosing ready condition
402 ARC IN-PROG Auto-Reclosing in-progress conditon
403 ARC SHOT Auto-Reclosing shot
404 ARC SHOT1 Auto-Reclosing shot of number1
405 ARC SHOT2 Auto-Reclosing shot of number2
406 ARC SHOT3 Auto-Reclosing shot of number3
407 ARC SHOT4 Auto-Reclosing shot of number4
408 ARC SHOT5 Auto-Reclosing shot of number5
409 ARC FT Auto-Reclosing failed (Final trip)
410 ARC SUCCESS Auto-Reclosing succeed
411 ARC COORD Auto-Reclosing coordination
412
413
414
415
416
417
418
419
420
421 A.M.F.OFF Automatic monitoring function off
422 RELAY FAIL Relay failure & trip blocked alarm
423 RELAY FAIL-A Relay failure alarm (Trip not blocked)
424 TCSV Trip circuit supervision failure
425 CBSV Circuit breaker status monitoring failure
426 TC ALARM Trip counter alarm
427 SGM I^y ALM ΣIY alarm
428 OT ALARM Operate time alarm
429 CT ERR CT circuit supervison
430 V0 ERR VT circuit supervison(V0)
431 V2 ERR VT circuit supervison(V2)
432 CTF ALARM CT failure detection
433 VTF1 ALARM VT failure detection 1
434 VTF2 ALARM VT failure detection 2
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451 F.RECORD CLR Fault record cleared
452 E.RECORD CLR Event record cleared
453 D.RECORD CLR Disturbance record cleared
454 TP COUNT CLR Trip counter cleared
455 I^y COUNT CLR SGM_I^y counter cleared
456 AR COUNT CLR ARC Counter CLR
457 DEMAND CLR Demand cleared
458 IND.RESET Indication reset
459 DATA LOST Data lost
460 SYS.CHANGE System setting changed
461 RLY.CHANGE Relay setting changed
462 GRP.CHANGE Group setting changed
463
464
465
466
467
468
469
470
471 BO1 OP Binary output 1
472 BO2 OP Binary output 2
473 BO3 OP Binary output 3
474 BO4 OP Binary output 4
475 BO5 OP Binary output 5
476 BO6 OP Binary output 6
477 BO7 OP Binary output 7
478
479
480

 217 
 6 F 2 S 0 7 5 8

No. Signal Name Contents

481
482
483
484
485
486
487
488
489
490
491 LCD IND. LCD indication(Virtual LED) command
492 LCD IND1. LCD indication1(Virtual LED) command
493 LCD IND2. LCD indication2(Virtual LED) command
494 TESTING Test LED ON
495 ARC.COM.ON Auto-recloser command ON
496
497 PROT.COM.ON Protection command ON
498 IECTST IEC60870-5-103 test mode
499 IECBLK IEC60870-5-103 monitor direction blocked
500

 218 
 6 F 2 S 0 7 5 8

Appendix D
Event Record Items

 219 
 6 F 2 S 0 7 5 8

Event Record Items

No. LCD indication Contents
1 GEN.trip Off/On General trip command
2 GEN.alarm Off/On General trip command
3 OC1 trip Off/On OC1 trip command
4 OC2 trip Off/On OC2 trip command
5 OC3 trip Off/On OC3 trip command
6 OC4 alarm Off/On OC4 alarm command
7 EF1 trip Off/On EF1 trip command
8 EF2 trip Off/On EF2 trip command
9 EF3 trip Off/On EF3 trip command
10 EF4 alarm Off/On EF4 alarm command
11 SEF1-S1 trip Off/On SEF1 Stage1 trip command
12 SEF1-S2 trip Off/On SEF1 Stage2 trip command
13 SEF2 trip Off/On SEF2 trip command
14 SEF3 trip Off/On SEF3 trip command
15 SEF4 alarm Off/On SEF4 alarm command
16 NOC1 trip Off/On NOC1 trip command
17 NOC2 alarm Off/On NOC2 alarm command
18 UC1 trip Off/On UC1 trip
19 UC2 alarm Off/On UC2 alarm
20 THM alarm Off/On Thermal alarm command
21 THM trip Off/On Thermal trip command
22 BCD trip Off/On BCD trip command
23 CBF retrip Off/On CBF retrip command
24 CBF trip Off/On CBF back trip command
25 OV1 trip Off/On OV1 trip command
26 OV2 alarm Off/On OV3 alarm command
27 UV1 trip Off/On UV1 trip command
28 UV2 alarm Off/On UV3 alarm command
29 ZOV1 trip Off/On ZOV1 trip command
30 ZOV2 alarm Off/On ZOV2 alarm command
31 NOV1 trip Off/On NOV1 trip command
32 NOV2 alarm Off/On NOV2 alarm command
33 FRQ1 trip Off/On FRQ1 trip command
34 FRQ2 trip Off/On FRQ2 trip command
35 FRQ3 trip Off/On FRQ3 trip command
36 FRQ4 trip Off/On FRQ4 trip command
37 ARC READY T Off/On Auto-Reclosing ready
38 ARC SHOT Off/On Auto-Reclosing shot of number
39 ARC IN-PROG Off/On Auto-Reclosing in progress
40 OC1-A Off/On OC1-A relay element operating
41 OC1-B Off/On OC1-B relay element operating
42 OC1-C Off/On OC1-C relay element operating
43 OC2-A Off/On OC2-A relay element operating
44 OC2-B Off/On OC2-B relay element operating
45 OC2-C Off/On OC2-C relay element operating
46 OC3-A Off/On OC3-A relay element operating
47 OC3-B Off/On OC3-B relay element operating
48 OC3-C Off/On OC3-C relay element operating
49 OC4-A Off/On OC4-A relay element operating
50 OC4-B Off/On OC4-B relay element operating
51 OC4-C Off/On OC4-C relay element operating
52 EF1 Off/On EF1 relay element operating
53 EF2 Off/On EF2 relay element operating
54 EF3 Off/On EF3 relay element operating
55 EF4 Off/On EF4 relay element operating
56 SEF1 Off/On SEF1 relay element operating
57 SEF2 Off/On SEF2 relay element operating
58 SEF3 Off/On SEF3 relay element operating
59 SEF4 Off/On SEF4 relay element operating
60 NOC1 Off/On NOC1 relay element operating
61 NOC2 Off/On NOC2 relay element operating
62 UC1-A Off/On UC1-A relay element operating
63 UC1-B Off/On UC1-B relay element operating
64 UC1-C Off/On UC1-C relay element operating
65 UC2-A Off/On UC2-A relay element operating
66 UC2-B Off/On UC2-B relay element operating
67 UC2-C Off/On UC2-C relay element operating
68 THM-A Off/On Thermal-Alarm operating
69 THM Off/On Thermal operating
70 BCD Off/On BCD relay element operating

 220 
 6 F 2 S 0 7 5 8

No. LCD indication Contents

71 CLP STATE0 Off/On Cold Load Protection State
72 CLP STATE1 Off/On ditto
73 CLP STATE2 Off/On ditto
74 CLP STATE3 Off/On ditto
75 RPF Off/On Residual power forward
76 RPR Off/On Residual Power reverse
77 OV1-A Off/On OV1-1 relay element operating
78 OV1-B Off/On OV1-2 relay element operating
79 OV1-C Off/On OV1-3 relay element operating
80 OV2-A Off/On OV2-1 relay element operating
81 OV2-B Off/On OV2-2 relay element operating
82 OV2-C Off/On OV2-3 relay element operating
83 UV1-A Off/On UV1-1 relay element operating
84 UV1-B Off/On UV1-2 relay element operating
85 UV1-C Off/On UV1-3 relay element operating
86 UV2-A Off/On UV2-1 relay element operating
87 UV2-B Off/On UV2-2 relay element operating
88 UV2-C Off/On UV2-3 relay element operating
89 UVBLK Off/On UV blocking element operationg
90 ZOV1 Off/On ZOV1 relay element operating
91 ZOV2 Off/On ZOV2 relay element operating
92 NOV1 Off/On NOC1 relay element operating
93 NOV2 Off/On NOC2 relay element operating
94 FRQ1 Off/On FRQ1 relay element operating
95 FRQ2 Off/On FRQ2 relay element operating
96 FRQ3 Off/On FRQ3 relay element operating
97 FRQ4 Off/On FRQ4 relay element operating
98 FRQBLK Off/On FRQ blockig element operating
99 BI1 command Off/On Binary input signal of BI1
100 BI2 command Off/On Binary input signal of BI2
101 BI3 command Off/On Binary input signal of BI3
102 BI4 command Off/On Binary input signal of BI4
103 BI5 command Off/On Binary input signal of BI5
104 BI6 command Off/On Binary input signal of BI6
105 BI7 command Off/On Binary input signal of BI7
106 BI8 command Off/On Binary input signal of BI8
107 SET.group1 Off/On BI command of change active setting group1
108 SET.group2 Off/On BI command of change active setting group2
109 SET.group3 Off/On BI command of change active setting group3
110 SET.group4 Off/On BI command of change active setting group4
111 OC1 block Off/On BI command of OC1 protection scheme block
112 OC2 block Off/On BI command of OC2 protection scheme block
113 OC3 block Off/On BI command of OC3 protection scheme block
114 OC4 block Off/On BI command of OC4 protection scheme block
115 EF1 block Off/On BI command of EF1 protection scheme block
116 EF2 block Off/On BI command of EF2 protection scheme block
117 EF3 block Off/On BI command of EF3 protection scheme block
118 EF4 block Off/On BI command of EF4 protection scheme block
119 EF1 permit Off/On BI command of EF1 protection scheme permission
120 EF2 permit Off/On BI command of EF2 protection scheme permission
121 EF3 permit Off/On BI command of EF3 protection scheme permission
122 EF4 permit Off/On BI command of EF4 protection scheme permission
123 SEF1 block Off/On BI command of SEF1 protection scheme block
124 SEF2 block Off/On BI command of SEF2 protection scheme block
125 SEF3 block Off/On BI command of SEF3 protection scheme block
126 SEF4 block Off/On BI command of SEF4 protection scheme block
127 NOC1 block Off/On BI command of NOC1 protection scheme block
128 NOC2 block Off/On BI command of NOC2 protection scheme block
129 UC1 block Off/On BI command of UC1 protection scheme block
130 UC2 block Off/On BI command of UC2 protection scheme block
131 THM block Off/On BI command of Thermal overload protection scheme block
132 THMA block Off/On BI command of Thermal overload alarm scheme block
133 CBF block Off/On BI command of CBF protection scheme block
134 BCD block Off/On BI command of Broken Conductor protection scheme block
135 OV1 block Off/On BI command of OV1 protection scheme block
136 OV2 block Off/On BI command of OV2 protection scheme block
137 UV1 block Off/On BI command of UV1 protection scheme block
138 UV2 block Off/On BI command of UV2 protection scheme block
139 ZOV1 block Off/On BI command of ZOV1 protection scheme block
140 ZOV2 block Off/On BI command of ZOV2 protection scheme block

 221 
 6 F 2 S 0 7 5 8

No. LCD indication Contents

141 NOV1 block Off/On BI command of NOV1 protection scheme block
142 NOV2 block Off/On BI command of NOV2 protection scheme block
143 FRQ1 block Off/On BI command of FRQ1 protection scheme block
144 FRQ2 block Off/On BI command of FRQ2 protection scheme block
145 FRQ3 block Off/On BI command of FRQ3 protection scheme block
146 FRQ4 block Off/On BI command of FRQ4 protection scheme block
147 ARC block Off/On BI command of ARC block
148 ARC ready Off/On BI command of ARC ready
149 ARC INIT Off/On BI command of ARC initiation
150 ARC N/A Off/On BI command of ARC no action
151 Manual CLS Off/On BI command of ARC initiation
152 EXT trip-3PH Off/On BI command of External trip (3 Phase)
153 EXT trip-APH Off/On BI command of External trip (A Phase)
154 EXT trip-BPH Off/On BI command of External trip (B Phase)
155 EXT trip-CPH Off/On BI command of External trip (C Phase)
156 EXT CTF Off/On BI command of External CTF
157 CTF block Off/On BI command of CTF scheme block
158 EXT VTF Off/On BI command of External VTF
159 VTF block Off/On BI command of VTF scheme block
160 TC fail Off/On BI command of Trip circuit Fail Alarm
161 CB CONT OPN Off/On BI command of CB N/O contact
162 CB CONT CLS Off/On BI command of CB N/C contact
163 Remote reset Off/On BI command of Remote reset
164 Store record Off/On BI command of Store Disturbance Record
165 Alarm1 Off/On BI command of Alarm1
166 Alarm2 Off/On BI command of Alarm2
167 Alarm3 Off/On BI command of Alarm3
168 Alarm4 Off/On BI command of Alarm4
169 CTF Off/On CTF detection
170 VTF1 Off/On VTF1 detection
171 VTF2 Off/On VTF2 detection
172 Relay fail Off/On Relay failure & trip blocked alarm
173 Relay fail-A Off/On Relay failure alarm (Trip not blocked)
174 TC err Off/On Trip circiut supervision failure
175 CB err Off/On Circuit breaker status monitoring failure
176 CT err Off/On CT circuit supervision failure
177 TP COUNT ALM Off/On Trip counter alarm
178 V0 err Off/On VT surpervision V0 error
179 V2 err Off/On VT supervision V2 error
180 ΣI^yA ALM Off/On ΣIY A-phase alarm
181 ΣI^yA ALM Off/On ΣIY B-phase alarm
182 ΣI^yA ALM Off/On ΣIY C-phase alarm
183 OP time ALM Off/On Operate time alarm
184 ARC SHOT1 On Auto-Reclosing shot of number1
185 ARC SHOT2 On Auto-Reclosing shot of number2
186 ARC SHOT3 On Auto-Reclosing shot of number3
187 ARC SHOT4 On Auto-Reclosing shot of number4
188 ARC SHOT5 On Auto-Reclosing shot of number5
189 ARC FT On Auto-Reclosing failed (Final trip)
190 ARC SUCCESS On Auto-Reclosing succeed
191 ARC RESET On Auto-Reclosing reset
192 ARC CRD RST On Auto-Reclosing coordination reset
193 ARC COORD On Auto-Reclosing coordination
194 F.record CLR On Clear Fault records
195 E.record CLR On Clear Event records
196 D.record CLR On Clear Disturbance records
197 TP COUNT CLR On Clear Trip counter
198 ΣI^y CLR On Clear ΣIY counter
199 AR COUNT CLR On Clear Autoreclose counter
200 Demand CLR On Clear demand
201 IND.reset On Reset the indication of Trip mode,Alarm etc
202 Data lost On Record and time date lost bye DC power supply off for a long time
203 Sys.change On Setting change command
204 Rly.change On ditto
205 Grp.change On ditto

 222 
 6 F 2 S 0 7 5 8

Appendix E
Details of Relay Menu

 223 
 6 F 2 S 0 7 5 8

MENU
xRecord
xStatus
xSet. (view)
xSet. (change)
xTest

/1 Record
xF. record
xE. record
xD. record
xCounter

/2 F.record /3 F.record /4 F.record #1

xDisplay 16/Jul/2002
xClear #1 16/Jul/2002
Refer to Section 18:13:57.031
4.2.3.1.
Clear records?
END=Y CANCEL=N

/2 E.record /3 E.record
xDisplay
xClear 16/Jul/2002 480
Refer to Section OC1-A trip On
4.2.3.2.
Clear records?
END=Y CANCEL=N

/2 D.record /3 D.record
xDisplay
xClear #1 16/Jul/2002
Refer to Section 18:13:57.401
4.2.3.3.
Clear records?
END=Y CANCEL=N

a-1 b-1

 224 
 6 F 2 S 0 7 5 8

a-1 b-1

/2 Counter /3 Counter
xDisplay Trips *****
xClear Trips TripsA *****
xClear Trips A TripsB *****
xClear Trips B TripsC *****
xClear Trips C Σ I^yA ******E6
xClear Σ I^yA Σ I^yB ******E6
xClear Σ I^yB Σ I^yC ******E6
xClear Σ I^yC ARCs ******
xClear ARCs
Refer to Section Clear Trips?
4.2.3.4. END=Y CANCEL=N

Clear Trips A?
END=Y CANCEL=N

Clear Trips B?
END=Y CANCEL=N

Clear Trips C?
END=Y CANCEL=N

Clear Σ I^yA?
END=Y CANCEL=N

Clear Σ I^yB?
END=Y CANCEL=N

Clear Σ I^yC?
END=Y CANCEL=N

Clear ARCs?
END=Y CANCEL=N

a-1

 225 
 6 F 2 S 0 7 5 8
a-1

/1 Status /2 Metering /3 Current

xMetering xCurrent la **.** kA
xBinary I/O xDemand
xRelay element /3 Demand
xDirection
lamax **.** kA
xTime sync.
xClock adjust. /2 Binary I/O
xLCD contrast IP [0000 0000] /3 Direction
la Forward
Refer to Section 4.2.4.
/2 Ry element
A OC1-4[0000 ]

/2 Time sync.
*BI: Act.

/2 12/Nov/2002
22:56:19

/2 LCD contrast
/1 Set. (view)
xVersion
xDescription
xComms
xRecord
xStatus
xProtection
xBinary I/P
xBinary O/P Refer to Section 4.2.5
xLED

/2 Version GRD140-110A-11
xRelay type -11
xSerial No.
xSoftware ∗∗∗∗∗∗∗∗∗∗∗∗∗∗
∗∗∗∗∗∗
/2 Description GS1DP1-04-*
xPlant name
xDescription

/2 Comms /3 Addr./Param.
xAddr./Param. HDLC 1
xSwitch
/3 Switch

a-1, b-1

 226 
 6 F 2 S 0 7 5 8
a-1 b-1

/2 Record /3 F.record
xF.record
xE.record Fault Loc. 0
xD.record Off/On
xCounter
/3 E.record

xBI1 comm. 3
N/O/R/B
: /4 Time/starter
: Time 2.0s

/3 D.record /4 Scheme sw
xTime/starter
xScheme sw
/4 Binary sig.
xBinary sig.
SIG1 ∗∗∗

/3 Counter /4 Scheme sw
xScheme sw
xAlarm set
/4 Alarm set
TCALM 10000
/2 Status /3 Metering
xMetering
xTime sync.
/3 Time sync.

/2 Act. gp. =*
xCommon
xGroup1
xGroup2
xGroup3
xGroup4

/3 Common

/3 Group1
xParameter
xTrip
xARC

a-1 b-1 c-1 d-1

 227 
 6 F 2 S 0 7 5 8
a-1 b-1 c-1 d-1

/4 Parameter ∗∗∗∗∗∗∗∗∗∗∗∗∗∗
xLine name ∗∗∗∗∗∗
xCT/VT ratio
/5 CT/VT ratio
xFault Locator
OCCT 400

/5 Fault Loc.
X1 10.0 OHM

/6 Application

/4 Trip
xScheme sw /6 OC
xProt.element

/5 Scheme sw /6 EF
xApplication
xOC
xEF /6 SEF
xSEF
xNOC
/6 NOC
xMisc.
xCold Load
xOV
/6 Misc.
xUV
xZOV
xNOV /6 Cold Load
xFRQ

/6 OV

/6 UV

/6 ZOV

/6 NOV

/6 FRQ

a-1 b-1 C-1 d-1 e-1

 228 
 6 F 2 S 0 7 5 8
a-1 b-1 c-1 d-1 e-1
/6 OC
OCθ −45°
/5 Prot.element /6 EF
xOC EFθ −45°
xEF /6 SEF
xSEF SEθ +90°
xNOC
xMisc. /6 NOC
xCold Load NCθ −45°
xOV
/6 Misc.
xUV
UC1 0.40A
xZOV
xNOV /6 Cold Load
xFRQ OC1 2.00A
xCTF/VTF
/6 OV
OV1 120.0V

/6 UV
UV1 60.0V

/6 ZOV
ZOV1 20.0V

/6 NOV
NOV1 20.0V

/6 FRQ
/4 ARC FRQ1 −1.00Hz
xScheme sw /6 CTF/VTF
xTimers EFF 0.20A

/5 Scheme SW /6 General
xGeneral
xOC /6 OC
xEF
xSEF
xEXT /6 EF

/5 Timers
TRDY 60.0s /6 SEF

/6 EXT

a-1 b-1 C-1

 229 
 6 F 2 S 0 7 5 8
a-1 b-1 c-1

/3 Group2
xParameter

/3 Group4
xParameter

/2 Binary I/P /3 BI1 /4 Timers

xBI1 xTimers BI1PUD 0.00s
xBI2 xFunctions
xBI3 /4 Functions
xBI4
xBI5
xBI6 /3 BI8
xBI7 xTimers
xBI8 xFunctions
xAlarm1 Text
xAlarm2 Text ∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗
xAlarm3 Text
xAlarm4 Text Alarm∗ Text

/2 Binary O/P

BO1 AND, D
1, 10, 29, 0

BO7 OR , L
1, 2, 3, 4
TBO1 0.20s

TBO7 0.20s

/2 LED /3 LED
xLED
xVirtual LED
/3 Virtual LED /4 LED1
xIND1 BIT1 I,O
xIND2
/4 LED2
BIT1 I,O

a-1 b-1

 230 
 6 F 2 S 0 7 5 8
a-1

/1 Set.(change)
xPassword
xDescription : Password trap
xComms
Password [_ ]
xRecord
1234567890←
xStatus
xProtection : Confirmation trap

xBinary I/P Change settings?

xBinary O/P ENTER=Y CANCEL=N
xLED
Input [_ ] Retype [_ ]
1234567890← 1234567890←
Refer to Section 4.2.6.2.
/2 Description _
xPlant name ABCDEFG
xDescription
_
Refer to Section
4.2.6.3. ABCDEFG

/2 Comms /3 Addr./Param.
xAddr./Param.
xSwitch
/3 Switch
Refer to Section
4.2.6.4.

/2 Record /3 F.record
xF.record
xE.record
/3 E.record
xD.record
xCounter
Refer to Section xBI1 comm. 3 _
4.2.6.5. N/O/R/B /4 Time/starter
:
/3 D.record /4 Scheme sw
xTime/starter
xScheme sw /4 Binary sig.
xBinary sig.

/3 Counter /4 Scheme sw
xScheme sw
xAlarm set
/4 Alarm set
a-1 b-2

 231 
 6 F 2 S 0 7 5 8
a-1 b-2

/2 Status /3 Metering
xMetering
xTime sync.
/3 Time sync.
Refer to Section
4.2.6.6.

/2 Protection
xChange act. gp.
xChange set. Refer to Section
4.2.6.7.
xCopy gp.

/3 Change act.
gp.

/3 Act gp.=1
xCommon
xGroup1
xGroup2
xGroup3
xGroup4

/4 Common

/4 Group1
xParameter
xTrip
xARC

/5 Parameter _
xLine name ABCDEFG
xCT/VT ratio
/6 CT/VT ratio
xFault Locator

/6 Fault Loc.
X1 OHM

a-1 b-2 c-2 d-2 e-2

 232 
 6 F 2 S 0 7 5 8
a-1 b-2 c-2 d-2 e-2

/5 Trip
xScheme sw
xProt.element

/6 Scheme sw /7 Application
xApplication
xOC
xEF /7 OC
xSEF
xNOC
/7 EF
xMisc.
xCold Load
xOV /7 SEF
xUV
xZOV
xNOV /7 NOC
xFRQ

/7 Misc.

/7 Cold Load

/7 OV

/7 UV

/7 ZOV

/7 NOV

/7 FRQ

a-1, b-2 c-2 d-2 e-2 f-2

 233 
 6 F 2 S 0 7 5 8

a-1 b-2 c-2 d-2 e-2 f-2

/7 OC

/6 Prot.element /7 EF
xOC
xEF /7 SEF
xSEF
xNOC
xMisc. /7 NOC
xCold Load
xOV
/7 Misc.
xUV
xZOV
xNOV /7 Cold Load
xFRQ
xCTF/VTF
/7 OV

/7 UV

/7 ZOV

/7 NOV

/7 FRQ
/5 ARC
xScheme sw /7 CTF/VTF
xTimers

/6 Scheme SW /7 General
xGeneral
xOC /7 OC
xEF
xSEF
xEXT /7 EF

/6 Timers
/7 SEF

/7 EXT
a-1, b-2 c-2 e-2

 234 
 6 F 2 S 0 7 5 8
a-1 b-2 c-2 d-2

/4 Group2
xParameter

/4 Group4
xParameter

/3 Copy A to B
A _
B _

/2 Binary I/P /3 BI1 /4 Timers

xBI1 xTimers
xBI2 xFunctions
xBI3 /4 Functions
xBI4
xBI5
xBI6 /3 BI8
xBI7 xTimers
xBI8 xFunctions
xAlarm1 Text
xAlarm2 Text ∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗∗
xAlarm3 Text ABCDEFG
xAlarm4 Text Alarm∗ Text
Refer to Section 4.2.6.8.

/2 Binary O/P /3 BO1 /4 Logic/Reset

xBO1 xLogic/Reset
xFunctions
/4 Functions
xBO7
Refer to Section /3 BO7
4.2.6.9. xLogic/Reset
/2 LED xFunctions
xLED
Refer to Section
xVirtual LED 4.2.6.10.

/3 LED /4 LED1 /5 Logic/Reset

xLED1 xLogic/Reset
xFunctions
/5 Functions
xLED3
/4 LED3
xLogic/Reset
a-1 c-3 xFunctions

 235 
 6 F 2 S 0 7 5 8
a-1 c-3

/3 Virtual LED /4 IND1 /5 Reset

xIND1 xReset
xIND2 xFunctions
/5 Functions
/4 IND2
xReset
xFunctions

/1 Test /2 Switch
xSwitch
xBinary O/P A.M.F. 1 _
xLogic circuit Off/On
Refer to Section 4.2.7. UVTST 0
Off/On
CLPTST 0
Off/S0/S3
THMRST 0
Off/On
CLPTST 0
Off/S1-S6
IECTST 0
Off/On

/2 Binary O/P Operate?

ENTER=Y CANCEL=N
BO1 0 _
Disable/Enable

FAIL 0
Disable/Enable

/2 Logic
circuit
TermA
1 _
TermB
48 _
1

 236 
 6 F 2 S 0 7 5 8

Appendix F
Case Outline

 237 
 6 F 2 S 0 7 5 8

IN SERVICE VIEW
TRIP
ALARM

25 8
RESET

A B 0V CAN
CEL ENTER

END

15.6 185.2 32
104
Side view
Front view

4 holes-φ4.5 4 holes-φ5.5

TB4
TB1 TB3

TB2

24 9
239

Rear view 56

102
TB4
A1 A3
B1 B3 Panel cut-out
TB3
TB1
A1 B1
1 2
3 4
5 6
7 8
TB2
A1 B1

TB1,TB2,TB3: Screw terminal

(M3.5 Ring)
TB4: Screw terminal
A10 B10
TB4 is provided only for RS485
two ports model.
A18 B18

Terminal block

Case Outline

 238 
 6 F 2 S 0 7 5 8

Appendix G
External Connection

 239 
 6 F 2 S 0 7 5 8

GRD140 - 110

A B C

OUTPUT CONTACTS
CT TB3- SIGNAL LIST (DEFAULT)
B4
BO1 GENERAL TRIP
A4
Core balance BO1 BO2 GENERAL TRIP
TB1- A5
CT 5 BO3 GENERAL TRIP
B5
6 Ie BO4 EF1 TRIP
A7
7 BO5 EF1 TRIP
8 Ise B7
BO2 BO6 SEF1-S1 TRIP
A6
BO7 ZOV1 TRIP
FRAME EARTH B6
B8
TB1- A8
1 BO3
2 Ve A9
B9
FRAME EARTH A10
B10
BO4
A11
B11
(P)
TB2- A13
A1 B13
BI1 COMMAND BI6 BO5
B1 A12
BI2 COMMAND A2 B12
BI7
B2
A14
BI3 COMMAND A3
BI8 B14
B3 BO6
A4 A15
BI4 COMMAND BI1
B4 B15
A5 A16
BI5 COMMAND BI2
B5 BO7 B16
A6
BI6 COMMAND BI3
B6
A7 B17
BI7 COMMAND BI4
B7
FAIL A17
A8 A18
BI8 COMMAND BI5
B8
B18

(N)

RELAY FAIL.
≥1
DD FAIL.
TB3-A2
TB2- A9 +5Vdc COM1-A
DC (+) B2 (∗)
SUPPLY DC-DC
(-) B9 A1
0V COM1-B
B1 (∗) RS485 I/F for RSM, IEC60870-5-103
A10 A3
COM1-0V
(∗) B10 B3 (∗)
FRAME EARTH
E TB4-A2
CASE EARTH COM2-A
B2
A1
COM2-B
B1 RS485 I/F for IEC60870-5-103
(Two ports model only)
A3
COM2-0V
B3

(∗)This connection is connected by short bar before shipment.

Typical External Connection

 240 
 6 F 2 S 0 7 5 8

GRD140 - 400

A B C OUTPUT CONTACTS
TB1-
TB3- SIGNAL LIST (DEFAULT)
1
B4
2 Ia BO1 GENERAL TRIP
3 A4
BO1 BO2 GENERAL TRIP
CT 4 Ib A5
5 BO3 GENERAL TRIP
B5
6 Ic BO4 OC1 TRIP
A7
7 BO5 EF1 TRIP
8 Ie B7
BO2 BO6 UV1 TRIP
A6
B6 BO7 ZOV1 TRIP
FRAME EARTH
B8
TB2- A8
A1 BO3
Va A9
B1 B9
Vb
A10
A2
B2 Vc B10
BO4
A11
B11
A3
B3 Ve A13
B13
BO5
FRAME EARTH A12
B12
(P) A14
TB2-
B14
A4 BO6
BI1 COMMAND BI1 A15
B4
B15
BI2 COMMAND A5
BI2
B5 A16
BI3 COMMAND A6 BO7 B16
BI3
B6
BI4 COMMAND A7
BI4
B7 B17
A8 A17
BI5 COMMAND BI5 FAIL
B8 A18
B18
(N)

RELAY FAIL.
≥1
DD FAIL.
TB3-A2
TB2- A9 +5Vdc COM1-A
DC (+) B2 (∗)
SUPPLY DC-DC
(-) B9 A1
0V COM1-B
B1 (∗) RS485 I/F for RSM, IEC60870-5-103
A10 A3
COM1-0V
(∗) B10 B3 (∗)
FRAME EARTH
E TB4-A2
CASE EARTH COM2-A
B2
A1
COM2-B
B1 RS485 I/F for IEC60870-5-103
(Two ports model only)
A3
COM2-0V
B3

(∗)This connection is connected by short bar before shipment.

APPL-CT = 3P, APPL-VT = 3PV Setting

Typical External Connection

 241 
 6 F 2 S 0 7 5 8

GRD140 - 420

A B C OUTPUT CONTACTS
TB1-
TB3- SIGNAL LIST (DEFAULT)
1
B4
2 Ia BO1 GENERAL TRIP
3 A4
BO1 BO2 GENERAL TRIP
CT 4 Ib A5
5 BO3 OC1 TRIP
B5
6 Ic BO4 EF1 TRIP
7 A7
Core balance BO5 SEF1-S1 TRIP
8 Ise B7
CT BO2 BO6 UV1 TRIP
A6
B6 BO7 ZOV1 TRIP
FRAME EARTH
B8
TB2- A8
A1 BO3
Va A9
B1 B9
Vb
A10
A2
B2 Vc B10
BO4
A11
B11
A3
B3 Ve A13
B13
BO5
FRAME EARTH A12
B12
(P) A14
TB2-
B14
A4 BO6
BI1 COMMAND BI1 A15
B4
B15
BI2 COMMAND A5
BI2
B5 A16
BI3 COMMAND A6 BO7 B16
BI3
B6
BI4 COMMAND A7
BI4
B7 B17
A8 A17
BI5 COMMAND BI5 FAIL
B8 A18
B18
(N)

RELAY FAIL.
≥1
DD FAIL.
TB3-A2
TB2- A9 +5Vdc COM1-A
DC (+) B2 (∗)
SUPPLY DC-DC
(-) B9 A1
0V COM1-B
B1 (∗) RS485 I/F for RSM, IEC60870-5-103
A10 A3
COM1-0V
(∗) B10 B3 (∗)
FRAME EARTH
E TB4-A2
CASE EARTH COM2-A
B2
A1
COM2-B
B1 RS485 I/F for IEC60870-5-103
(Two ports model only)
A3
COM2-0V
B3

(∗)This connection is connected by short bar before shipment.

APPL-CT = 3P, APPL-VT = 3PV Setting

Typical External Connection

 242 
 6 F 2 S 0 7 5 8

CT connection
Bus Bus
TB1 -1 TB1 -1

TB1 -2 Ia TB1 -2 Ia
TB1 -3 TB1 -3

TB1 -4 Ib TB1 -4 Ib
TB1 -5 TB1 -5

TB1 -6 Ic TB1 -6 Ic
TB1 -7 TB1 -7

TB1 -8 Ie(Io) TB1 -8 Ise(Io)

[APPL-CT] = 3P Setting for Model 400 [APPL-CT] = 3P Setting for Model 420

Bus Bus
TB1 -1 TB1 -1

TB1 -2 Ia TB1 -2 Ia
TB1 -3 TB1 -3

TB1 -4 Ic TB1 -4 Ic
TB1 -5 TB1 -5

TB1 -6 Ie(Io) TB1 -6

TB1 -7 TB1 -7

TB1 -8 TB1 -8 Ise(Io)

[APPL-CT] = 2P Setting for Model 400 [APPL-CT] = 2P Setting for Model 420

Bus Bus
TB1 -1 TB1 -1

TB1 -2 TB1 -2
TB1 -3 TB1 -3

TB1 -4 TB1 -4

TB1 -5 TB1 -5

TB1 -6 Ie(Io) TB1 -6 Ie(Io)

TB1 -7 TB1 -7

TB1 -8 TB1 -8 Ise(Io)

[APPL-CT] = 1P Setting for Model 400 [APPL-CT] = 1P Setting for Model 420

VT connection

Bus Bus
TB2–A1 TB2-A1

Va Va
TB2-B1 TB2-B1

Vb Vb
TB2-A2 TB2-A2

TB2-B2 Vc TB2-B2 Vc
TB2-A3 TB2-A3

TB2-B3 TB1-B3
Ve(Vo)

[APPL-VT] = 3PN Setting for Model 400 or 420 [APPL-VT] = 3PV Setting for Model 400 or 420

 243 
 6 F 2 S 0 7 5 8

 244 
 6 F 2 S 0 7 5 8

Appendix H
Relay Setting Sheet
1. Relay Identification
2. Line parameter
3. Binary output setting
4. Relay setting
5. Disturbance record signal setting
6. LED setting

 245 
 6 F 2 S 0 7 5 8

1. Relay Identification Date:

Relay type Serial Number
Frequency AC current
AC voltage DC supply voltage
Password
Active setting group

2. Line parameter
CT ratio OC: EF: SEF:
VT ratio PVT: RVT:

3. Binary output setting

Model 110
Setting range Default Setting
Setting
BO Logic Reset Functions 110
Logic BOTD Functions Logic BOTD Functions
BO1 OR / AND Ins/Dl/Dw /Lat In #1 0-500 OR Del In #1 371 GEN.TRIP In #1
In #2 0-500 In #2 0 In #2
In #3 0-500 In #3 0 In #3
In #4 0-500 In #4 0 In #4
Timer 0.00 - 10.00 0.20
BO2 OR / AND Ins/Dl/Dw /Lat In #1 0-500 OR Del In #1 371 GEN.TRIP In #1
In #2 0-500 In #2 0 In #2
In #3 0-500 In #3 0 In #3
In #4 0-500 In #4 0 In #4
Timer 0.00 - 10.00 0.20
BO3 OR / AND Ins/Dl/Dw /Lat In #1 0-500 OR Del In #1 371 GEN.TRIP In #1
In #2 0-500 In #2 0 In #2
In #3 0-500 In #3 0 In #3
In #4 0-500 In #4 0 In #4
Timer 0.00 - 10.00 0.20
BO4 OR / AND Ins/Dl/Dw /Lat In #1 0-500 OR Del In #1 281 EF1 TRIP In #1
In #2 0-500 In #2 0 In #2
In #3 0-500 In #3 0 In #3
In #4 0-500 In #4 0 In #4
Timer 0.00 - 10.00 0.20
BO5 OR / AND Ins/Dl/Dw /Lat In #1 0-500 OR Del In #1 281 EF1 TRIP In #1
In #2 0-500 In #2 0 In #2
In #3 0-500 In #3 0 In #3
In #4 0-500 In #4 0 In #4
Timer 0.00 - 10.00 0.20
BO6 OR / AND Ins/Dl/Dw /Lat In #1 0-500 OR Del In #1 291 SEF1-S1 TRIP In #1
In #2 0-500 In #2 0 In #2
In #3 0-500 In #3 0 In #3
In #4 0-500 In #4 0 In #4
Timer 0.00 - 10.00 0.20
BO7 OR / AND Ins/Dl/Dw /Lat In #1 0-500 OR Del In #1 351 ZOV1 TRIP In #1
In #2 0-500 In #2 0 In #2
In #3 0-500 In #3 0 In #3
In #4 0-500 In #4 0 In #4
Timer 0.00 - 10.00 0.20

 246 
 6 F 2 S 0 7 5 8

Model 400
Setting range Default Setting
Setting
BO Logic Reset Functions 400
Logic BOTD Functions Logic BOTD Functions
BO1 OR / AND Ins/Dl/Dw /Lat In #1 0-500 OR Del In #1 371 GEN.TRIP In #1
In #2 0-500 In #2 0 In #2
In #3 0-500 In #3 0 In #3
In #4 0-500 In #4 0 In #4
Timer 0.00 - 10.00 0.20
BO2 OR / AND Ins/Dl/Dw /Lat In #1 0-500 OR Del In #1 371 GEN.TRIP In #1
In #2 0-500 In #2 0 In #2
In #3 0-500 In #3 0 In #3
In #4 0-500 In #4 0 In #4
Timer 0.00 - 10.00 0.20
BO3 OR / AND Ins/Dl/Dw /Lat In #1 0-500 OR Del In #1 371 GEN.TRIP In #1
In #2 0-500 In #2 0 In #2
In #3 0-500 In #3 0 In #3
In #4 0-500 In #4 0 In #4
Timer 0.00 - 10.00 0.20
BO4 OR / AND Ins/Dl/Dw /Lat In #1 0-500 OR Del In #1 261 OC1 TRIP In #1
In #2 0-500 In #2 0 In #2
In #3 0-500 In #3 0 In #3
In #4 0-500 In #4 0 In #4
Timer 0.00 - 10.00 0.20
BO5 OR / AND Ins/Dl/Dw /Lat In #1 0-500 OR Del In #1 281 EF1 TRIP In #1
In #2 0-500 In #2 0 In #2
In #3 0-500 In #3 0 In #3
In #4 0-500 In #4 0 In #4
Timer 0.00 - 10.00 0.20
BO6 OR / AND Ins/Dl/Dw /Lat In #1 0-500 OR Del In #1 341 UV1 TRIP In #1
In #2 0-500 In #2 0 In #2
In #3 0-500 In #3 0 In #3
In #4 0-500 In #4 0 In #4
Timer 0.00 - 10.00 0.20
BO7 OR / AND Ins/Dl/Dw /Lat In #1 0-500 OR Del In #1 351 ZOV1 TRIP In #1
In #2 0-500 In #2 0 In #2
In #3 0-500 In #3 0 In #3
In #4 0-500 In #4 0 In #4
Timer 0.00 - 10.00 0.20

Model 420
Setting range Default Setting
Setting
BO Logic Reset Functions 420
Logic BOTD Functions Logic BOTD Functions
BO1 OR / AND Ins/Dl/Dw /Lat In #1 0-500 OR Del In #1 371 GEN.TRIP In #1
In #2 0-500 In #2 0 In #2
In #3 0-500 In #3 0 In #3
In #4 0-500 In #4 0 In #4
Timer 0.00 - 10.00 0.20
BO2 OR / AND Ins/Dl/Dw /Lat In #1 0-500 OR Del In #1 371 GEN.TRIP In #1
In #2 0-500 In #2 0 In #2
In #3 0-500 In #3 0 In #3
In #4 0-500 In #4 0 In #4
Timer 0.00 - 10.00 0.20
BO3 OR / AND Ins/Dl/Dw /Lat In #1 0-500 OR Del In #1 261 OC1 TRIP In #1
In #2 0-500 In #2 0 In #2
In #3 0-500 In #3 0 In #3
In #4 0-500 In #4 0 In #4
Timer 0.00 - 10.00 0.20
BO4 OR / AND Ins/Dl/Dw /Lat In #1 0-500 OR Del In #1 281 EF1 TRIP In #1
In #2 0-500 In #2 0 In #2
In #3 0-500 In #3 0 In #3
In #4 0-500 In #4 0 In #4
Timer 0.00 - 10.00 0.20
BO5 OR / AND Ins/Dl/Dw /Lat In #1 0-500 OR Del In #1 291 SEF1-S1 TRIP In #1
In #2 0-500 In #2 0 In #2
In #3 0-500 In #3 0 In #3
In #4 0-500 In #4 0 In #4
Timer 0.00 - 10.00 0.20
BO6 OR / AND Ins/Dl/Dw /Lat In #1 0-500 OR Del In #1 341 UV1 TRIP In #1
In #2 0-500 In #2 0 In #2
In #3 0-500 In #3 0 In #3
In #4 0-500 In #4 0 In #4
Timer 0.00 - 10.00 0.20
BO7 OR / AND Ins/Dl/Dw /Lat In #1 0-500 OR Del In #1 351 ZOV1 TRIP In #1
In #2 0-500 In #2 0 In #2
In #3 0-500 In #3 0 In #3
In #4 0-500 In #4 0 In #4
Timer 0.00 - 10.00 0.20

 247 
 6 F 2 S 0 7 5 8

4. Relay setting
Setting 1
Default Setting (5A rating / 1A rating)
Range
No. Name Units Contents Model Model Model User
5A rating 1A rating 110 400 420 Setting
1 APPL-CT Off / 3P / 2P / 1P -- Application setting of CT -- 3P
2 APPL-VT Off / 3PN / 3PV -- Application setting of VT -- 3PV
3 CTFEN Off / On / OPT-On -- CTF Enable -- Off
4 VTF1EN Off / On / OPT-On -- VTF1 Enable -- Off
5 VTF2EN Off / On / OPT-On -- VTF2 Enable -- Off
6 CTSVEN Off / ALM&BLK / ALM -- AC input imbalance Super Visor Eable -- ALM
7 V0SVEN Off / ALM&BLK / ALM -- ditto -- ALM
8 V2SVEN Off / ALM&BLK / ALM -- ditto -- ALM
9 MOC1 DT / IEC / IEEE / US / CON -- OC1 Delay Type (if OC1EN=On) -- DT
10 MEF1 DT / IEC / IEEE / US / CON -- EF1 Delay Type (if EF1EN=On) DT
11 MSE1 DT / IEC / IEEE / US / CON -- SEF1 Delay Type (if SE1EN=On) DT -- DT
12 OC OC1EN Off / On -- OC1 Enable -- On
13 OC1-DIR FWD / REV /NON -- OC1 Directional Characteristic (if OC1EN=On) -- FWD
14 MOC1C-IEC NI / VI / EI / LTI -- OC1 IEC Inverse Curve Type (if MOC1=IEC) -- NI
15 MOC1C-IEEE MI / VI / EI -- OC1 IEEE Inverse Curve Type (if MOC1=IEEE) -- MI
16 MOC1C-US CO2 / CO8 -- OC1 US Inverse Curve Type (if MOC1=US) -- CO2
17 OC1R DEF / DEP -- OC1 Reset Characteristic (if MOCI=IEEE,orUS) -- DEF
18 VTF-OC1BLK Off / On -- VTF block enable -- Off
19 OC2EN Off / On -- OC2 Enable -- Off
20 OC2-DIR FWD / REV /NON -- OC2 Directional Characteristic (if OC2EN=On) -- FWD
21 VTF-OC2BLK Off / On -- VTF block enable -- Off
22 OC3EN Off / On -- OC3 Enable -- Off
23 OC3-DIR FWD / REV /NON -- OC3 Directional Characteristic (if OC3EN=On) -- FWD
24 VTF-OC3BLK Off / On -- VTF block enable -- Off
25 OC4EN Off / On -- OC4 Enable -- Off
26 OC4-DIR FWD / REV /NON -- OC4 Directional Characteristic (if OC4EN=On) -- FWD
27 VTF-OC4BLK Off / On -- VTF block enable -- Off
28 OCTP 3POR / 2OUTOF3 -- OC trip mode (if OC1 or 2 or 3 or 3EN=On) -- 3POR
29 EF EF1EN Off / On / POP -- EF1 Enable On
30 EF1-DIR FWD / REV /NON -- EF1 Directional Characteristic (if EF1EN=On) FWD
31 MEF1C-IEC NI / VI / EI / LTI -- EF1 IEC Inverse Curve Type (if MEF1=IEC) NI
32 MEF1C-IEEE MI / VI / EI -- EF1 IEEE Inverse Curve Type (if MEF1=IEEE) MI
33 MEF1C-US CO2 / CO8 -- EF1 US Inverse Curve Type (if MEF1=US) CO2
34 EF1R DEF / DEP -- EF1 Reset Characteristic. (if MEFI=IEEE,orUS) DEF
35 CTF-EF1BLK Off / On -- CTF block enable -- Off
36 VTF-EF1BLK Off / On -- VTF block enable -- Off
37 EF2EN Off / On / POP -- EF2 Enable Off
38 EF2-DIR FWD / REV /NON -- EF2 Directional Characteristic (if EF2EN=On) FWD
39 CTF-EF2BLK Off / On -- CTF block enable -- Off
40 VTF-EF2BLK Off / On -- VTF block enable -- Off
41 EF3EN Off / On / POP -- EF3 Enable Off
42 EF3-DIR FWD / REV /NON -- EF3 Directional Characteristic (if EF3EN=On) FWD
43 CTF-EF3BLK Off / On -- CTF block enable -- Off
44 VTF-EF3BLK Off / On -- VTF block enable -- Off
45 EF4EN Off / On / POP -- EF4 Enable Off
46 EF4-DIR FWD / REV /NON -- EF4 Directional Characteristic (if EF4EN=On) FWD
47 CTF-EF4BLK Off / On -- CTF block enable -- Off
48 VTF-EF4BLK Off / On -- VTF block enable -- Off
49 CURREV Off / 1 / 2 / 3 / 4 -- Current reverse detection Off
50 SEF SE1EN Off / On -- SEF1 Enable On -- On
51 SE1-DIR FWD / REV /NON -- SEF1 Directional Characteristic (if SE1EN=On) FWD -- FWD
52 MSE1C-IEC NI / VI / EI / LTI -- SEF1 IEC Inverse Curve Type (if MSE1=IEC) NI -- NI
53 MSE1C-IEEE MI / VI / EI -- SEF1 IEEE Inverse Curve Type (if MSE1=IEEE) MI -- MI
54 MSE1C-US CO2 / CO8 -- SEF1 US Inverse Curve Type (if MSE1=US) CO2 -- CO2
55 SE1R DEF / DEP -- SEF1 Reset Characteristic. (if MSEI=IEEE,orUS) DEF -- DEF
56 SE1S2 Off / On -- SEF1 Stage 2 Timer Enable (if SE1EN=0m) Off -- Off
57 VTF-SE1BLK Off / On -- VTF block enable -- Off
58 SE2EN Off / On -- SEF2 Enable Off -- Off
59 SE2-DIR FWD / REV /NON -- SEF2 Directional Characteristic (if SE2EN=On) FWD -- FWD
60 VTF-SE2BLK Off / On -- VTF block enable -- Off
61 SE3EN Off / On -- SEF3 Enable Off -- Off
62 SE3-DIR FWD / REV /NON -- SEF3 Directional Characteristic (if SE3EN=On) FWD -- FWD
63 VTF-SE3BLK Off / On -- VTF block enable -- Off
64 SE4EN Off / On -- SEF4 Enable Off -- Off
65 SE4-DIR FWD / REV /NON -- SEF4 Directional Characteristic (if SE4EN=On) FWD -- FWD
66 VTF-SE4BLK Off / On -- VTF block enable -- Off
67 RPEN Off / On -- Residual Power block Enable. Off -- Off

 248 
 6 F 2 S 0 7 5 8

Default Setting (5A rating / 1A rating)

Range
No. Name Units Contents Model Model Model User
5A rating 1A rating 110 400 420 Setting
68 NOC NC1EN Off / On -- NOC1 Enable -- Off
69 NC1-DIR FWD / REV /NON -- NOC1 Directional Characteristic (if NC1EN=On) -- FWD
70 CTF-NC1BLK Off / On -- CTF block enable -- Off
71 VTF-NC1BLK Off / On -- VTF block enable -- Off
72 NC2EN Off / On -- NOC2 Enable -- Off
73 NC2-DIR FWD / REV /NON -- NOC2 Directional Characteristic (if NC2EN=On) -- FWD
74 CTF-NC2BLK Off / On -- CTF block enable -- Off
75 VTF-NC2BLK Off / On -- VTF block enable -- Off
76 UC UC1EN Off / On -- UC1 Enable -- Off
77 CTF-UC1BLK Off / On -- CTF block enable -- Off
78 UC2EN Off / On -- UC2 Enable -- Off
79 CTF-UC2BLK Off / On -- CTF block enable -- Off
80 Thermal THMEN Off / On -- Thermal OL Enable -- Off
81 THMAEN Off / On -- Thermal Alarm Enable -- Off
82 BCD BCDEN Off / On -- Broken Conductor Enable -- Off
83 CBF BTC Off / On -- Back-trip control -- Off
84 RTC Off / DIR / OC -- Re-trip control -- Off
85 Cold Load CLEN Off / On -- Cold Load Protection Enable -- Off
86 Load CLDOEN Off / On -- Cold Load drop-off Enable -- Off
87 OV OV1EN Off / DT / IDMT -- OV1 Enable -- Off
88 OV2EN Off / On -- OV2 Enable -- Off
89 UV UV1EN Off / DT / IDMT -- UV1 Enable -- DT
90 VTF-UV1BLK Off / On -- VTF block enable -- Off
91 UV2EN Off / On -- UV2 Enable -- Off
92 VTF-UV2BLK Off / On -- VTF block enable -- Off
93 VBLKEN Off / On -- UV Block Enable -- Off
94 ZOV ZOV1EN Off / DT / IDMT -- ZOV1 Enable DT
95 VTF-ZOV1BLK Off / On -- VTF block enable -- Off
96 ZOV2EN Off / On -- ZOV2 Enable Off
97 VTF-ZOV2BLK Off / On -- VTF block enable -- Off
98 NOV NOV1EN Off / DT / IDMT -- NOV1 Enable -- Off
99 VTF-NV1BLK Off / On -- VTF block enable -- Off
100 NV2EN Off / On -- NOV2 Enable -- Off
101 VTF-NV2BLK Off / On -- VTF block enable -- Off
102 FRQ FRQ1EN Off / OF / UF -- FRQ1 Enable -- Off
103 FRQ2EN Off / OF / UF -- FRQ2 Enable -- Off
104 FRQ3EN Off / OF / UF -- FRQ3 Enable -- Off
105 FRQ4EN Off / OF / UF -- FRQ4 Enable -- Off
106 ARC ARCEN Off / On -- Autoreclosing Enable. On
107 ARC-NUM S1 / S2 / S3 / S4 / S5 -- Reclosing shot max. number S1
108 COORD-OC Off / On -- OC relay for Co-ordination Enable -- Off
106 COORD-EF Off / On -- EF relay for Co-ordination Enable Off
105 COORD-SE Off / On -- SEF relay for Co-ordination Enable Off -- Off
106 OC1-INIT NA / On / Block -- Autoreclosing initiation by OC1 enable -- NA
107 OC1-TP1 Off / Inst / Set -- OC1 trip mode of 1st trip (if OC1EN=On) -- SET
108 OC1-TP2 Off / Inst / Set -- OC1 trip mode of 2nd trip (if OC1EN=On) -- SET
109 OC1-TP3 Off / Inst / Set -- OC1 trip mode of 3rd trip (if OC1EN=On) -- SET
110 OC1-TP4 Off / Inst / Set -- OC1 trip mode of 4th trip (if OC1EN=On) -- SET
111 OC1-TP5 Off / Inst / Set -- OC1 trip mode of 5th trip (if OC1EN=On) -- SET
112 OC1-TP6 Off / Inst / Set -- OC1 trip mode of 6th trip (if OC1EN=On) -- SET
113 OC2-INIT NA / On / Block -- Autoreclosing initiation by OC2 enable -- NA
114 OC2-TP1 Off / Inst / Set -- OC2 trip mode of 1st trip (if OC2EN=On) -- SET
115 OC2-TP2 Off / Inst / Set -- OC2 trip mode of 2nd trip (if OC2EN=On) -- SET
116 OC2-TP3 Off / Inst / Set -- OC2 trip mode of 3rd trip (if OC2EN=On) -- SET
117 OC2-TP4 Off / Inst / Set -- OC2 trip mode of 4th trip (if OC2EN=On) -- SET
118 OC2-TP5 Off / Inst / Set -- OC2 trip mode of 5th trip (if OC2EN=On) -- SET
119 OC2-TP6 Off / Inst / Set -- OC2 trip mode of 6th trip (if OC2EN=On) -- SET
120 OC3-INIT NA / On / Block -- Autoreclosing initiation by OC3 enable -- NA
121 OC3-TP1 Off / Inst / Set -- OC3 trip mode of 1st trip (if OC3EN=On) -- SET
122 OC3-TP2 Off / Inst / Set -- OC3 trip mode of 2nd trip (if OC3EN=On) -- SET
123 OC3-TP3 Off / Inst / Set -- OC3 trip mode of 3rd trip (if OC3EN=On) -- SET
124 OC3-TP4 Off / Inst / Set -- OC3 trip mode of 4th trip (if OC3EN=On) -- SET
125 OC3-TP5 Off / Inst / Set -- OC3 trip mode of 5th trip (if OC3EN=On) -- SET
126 OC3-TP6 Off / Inst / Set -- OC3 trip mode of 6th trip (if OC3EN=On) -- SET
127 OC4-INIT NA / On / Block -- Autoreclosing initiation by OC4 enable -- NA
128 OC4-TP1 Off / Inst / Set -- OC4 trip mode of 1st trip (if OC4EN=On) -- SET
129 OC4-TP2 Off / Inst / Set -- OC4 trip mode of 2nd trip (if OC4EN=On) -- SET
130 OC4-TP3 Off / Inst / Set -- OC4 trip mode of 3rd trip (if OC4EN=On) -- SET
131 OC4-TP4 Off / Inst / Set -- OC4 trip mode of 4th trip (if OC4EN=On) -- SET
132 OC4-TP5 Off / Inst / Set -- OC4 trip mode of 5th trip (if OC4EN=On) -- SET
133 OC4-TP6 Off / Inst / Set -- OC4 trip mode of 6th trip (if OC4EN=On) -- SET
134 EF1-INIT NA / On / Block -- Autoreclosing initiation by EF1 enable NA
135 EF1-TP1 Off / Inst / Set -- EF1 trip mode of 1st trip (if EF1EN=On) SET

 249 
 6 F 2 S 0 7 5 8

Default Setting (5A rating / 1A rating)

Range
No. Name Units Contents Model Model Model User
5A rating 1A rating 110 400 420 Setting
136 EF1-TP2 Off / Inst / Set -- EF1 trip mode of 2nd trip (if EF1EN=On) SET
137 EF1-TP3 Off / Inst / Set -- EF1 trip mode of 3rd trip (if EF1EN=On) SET
138 EF1-TP4 Off / Inst / Set -- EF1 trip mode of 4th trip (if EF1EN=On) SET
139 EF1-TP5 Off / Inst / Set -- EF1 trip mode of 5th trip (if EF1EN=On) SET
140 EF1-TP6 Off / Inst / Set -- EF1 trip mode of 6th trip (if EF1EN=On) SET
141 EF2-INIT NA / On / Block -- Autoreclosing initiation by EF2 enable NA
142 EF2-TP1 Off / Inst / Set -- EF2 trip mode of 1st trip (if EF2EN=On) SET
143 EF2-TP2 Off / Inst / Set -- EF2 trip mode of 2nd trip (if EF2EN=On) SET
144 EF2-TP3 Off / Inst / Set -- EF2 trip mode of 3rd trip (if EF2EN=On) SET
145 EF2-TP4 Off / Inst / Set -- EF2 trip mode of 4th trip (if EF2EN=On) SET
146 EF2-TP5 Off / Inst / Set -- EF2 trip mode of 5th trip (if EF2EN=On) SET
147 EF2-TP6 Off / Inst / Set -- EF2 trip mode of 6th trip (if EF2EN=On) SET
148 EF3-INIT NA / On / Block -- Autoreclosing initiation by EF3 enable NA
149 EF3-TP1 Off / Inst / Set -- EF3 trip mode of 1st trip (if EF3EN=On) SET
150 EF3-TP2 Off / Inst / Set -- EF3 trip mode of 2nd trip (if EF3EN=On) SET
151 EF3-TP3 Off / Inst / Set -- EF3 trip mode of 3rd trip (if EF3EN=On) SET
152 EF3-TP4 Off / Inst / Set -- EF3 trip mode of 4th trip (if EF3EN=On) SET
153 EF3-TP5 Off / Inst / Set -- EF3 trip mode of 5th trip (if EF3EN=On) SET
154 EF3-TP6 Off / Inst / Set -- EF3 trip mode of 6th trip (if EF1EN=On) SET
155 EF4-INIT NA / On / Block -- Autoreclosing initiation by EF4 enable NA
156 EF4-TP1 Off / Inst / Set -- EF4 trip mode of 1st trip (if EF4EN=On) SET
157 EF4-TP2 Off / Inst / Set -- EF4 trip mode of 2nd trip (if EF4EN=On) SET
158 EF4-TP3 Off / Inst / Set -- EF4 trip mode of 3rd trip (if EF4EN=On) SET
159 EF4-TP4 Off / Inst / Set -- EF4 trip mode of 4th trip (if EF4EN=On) SET
160 EF4-TP5 Off / Inst / Set -- EF4 trip mode of 5th trip (if EF4EN=On) SET
161 EF4-TP6 Off / Inst / Set -- EF4 trip mode of 6th trip (if EF1EN=On) SET
162 SE1-INIT NA / On / Block -- Autoreclosing initiation by SEF1 enable NA -- NA
163 SE1-TP1 Off / Inst / Set -- SEF1 trip mode of 1st trip (if SE1EN=On) SET -- SET
164 SE1-TP2 Off / Inst / Set -- SEF1 trip mode of 2nd trip (if SE1EN=On) SET -- SET
165 SE1-TP3 Off / Inst / Set -- SEF1 trip mode of 3rd trip (if SE1EN=On) SET -- SET
166 SE1-TP4 Off / Inst / Set -- SEF1 trip mode of 4th trip (if SE1EN=On) SET -- SET
167 SE1-TP5 Off / Inst / Set -- SEF1 trip mode of 5th trip (if SE1EN=On) SET -- SET
168 SE1-TP6 Off / Inst / Set -- SEF1 trip mode of 6th trip (if SE1EN=On) SET -- SET
169 SE2-INIT NA / On / Block -- Autoreclosing initiation by SEF2 enable NA -- NA
170 SE2-TP1 Off / Inst / Set -- SEF2 trip mode of 1st trip (if SE2EN=On) SET -- SET
171 SE2-TP2 Off / Inst / Set -- SEF2 trip mode of 2nd trip (if SE2EN=On) SET -- SET
172 SE2-TP3 Off / Inst / Set -- SEF2 trip mode of 3rd trip (if SE2EN=On) SET -- SET
173 SE2-TP4 Off / Inst / Set -- SEF2 trip mode of 4th trip (if SE2EN=On) SET -- SET
174 SE2-TP5 Off / Inst / Set -- SEF2 trip mode of 5th trip (if SE2EN=On) SET -- SET
175 SE2-TP6 Off / Inst / Set -- SEF2 trip mode of 6th trip (if SE2EN=On) SET -- SET
176 SE3-INIT NA / On / Block -- Autoreclosing initiation by SEF3 enable NA -- NA
177 SE3-TP1 Off / Inst / Set -- SEF3 trip mode of 1st trip (if SE3EN=On) SET -- SET
178 SE3-TP2 Off / Inst / Set -- SEF3 trip mode of 2nd trip (if SE3EN=On) SET -- SET
179 SE3-TP3 Off / Inst / Set -- SEF3 trip mode of 3rd trip (if SE3EN=On) SET -- SET
180 SE3-TP4 Off / Inst / Set -- SEF3 trip mode of 4th trip (if SE3EN=On) SET -- SET
181 SE3-TP5 Off / Inst / Set -- SEF3 trip mode of 5th trip (if SE3EN=On) SET -- SET
182 SE3-TP6 Off / Inst / Set -- SEF3 trip mode of 6th trip (if SE3EN=On) SET -- SET
183 SE4-INIT NA / On / Block -- Autoreclosing initiation by SEF4 enable NA -- NA
184 SE4-TP1 Off / Inst / Set -- SEF4 trip mode of 1st trip (if SE4EN=On) SET -- SET
185 SE4-TP2 Off / Inst / Set -- SEF4 trip mode of 2nd trip (if SE4EN=On) SET -- SET
186 SE4-TP3 Off / Inst / Set -- SEF4 trip mode of 3rd trip (if SE4EN=On) SET -- SET
187 SE4-TP4 Off / Inst / Set -- SEF4 trip mode of 4th trip (if SE4EN=On) SET -- SET
188 SE4-TP5 Off / Inst / Set -- SEF4 trip mode of 5th trip (if SE4EN=On) SET -- SET
189 SE4-TP6 Off / Inst / Set -- SEF4 trip mode of 6th trip (if SE4EN=On) SET -- SET
190 EXT-INIT NA / On / Block -- Autoreclosing initiation by External Trip Command enable NA
191 UVF 5.0 - 130.0 V UV(Ph-G) Threshold setting for VTF scheme. -- 51.0
192 VTF ZOVF 5.0 - 130.0 V ZOV Threshold setting for CTF/VTF scheme. -- 20.0
193 CTF OCDF 0.5(Fixed) 0.1(Fixed) A OCD Threshold setting for CTF/VTF scheme. -- --
194 EFF 0.05 - 25.00 0.01 - 5.00 A EF Threshold setting for CTF/VTF scheme. -- 1.00 / 0.20
195 OC OCθ -95 - 95 Degree OC Characteristic Angle (if OC1 or 2 or 3 or 4EN=On) -- -45
196 OC1 0.1 - 25.0 0.02 - 5.00 A OC1 Threshold setting (if OC1EN=On) -- 5.0 / 1.00
197 TOC1 0.00 - 300.00 s OC1 Definite time setting (if MOC1=DT) -- 1.00
198 TOC1M 0.010 - 1.500 -- OC1 Time multiplier setting (if MOC1=IEC,IEEE,US) -- 1.000
199 TOC1R 0.0 - 300.0 s OC1 Definite time reset delay (if OC1R =DEF) -- 0.0
200 TOC1RM 0.010 - 1.500 -- OC1 Dependent time reset time multiplier (if OC1R=DEP) -- 1.000
201 OC2 0.1 - 25.0 0.02 - 5.00 A OC2 Threshold setting (if OC2EN=On) -- 25.0 / 5.00
202 TOC2 0.00 - 300.00 s OC2 Definite time setting (if MOC2=DT) -- 1.00
203 OC3 0.1 - 250.0 0.02 - 50.00 A OC3 Threshold setting (if OC3EN=On) -- 50.0 / 10.00
204 TOC3 0.00 - 300.00 s OC3 Definite time setting (if OC3EN=On) -- 1.00
205 OC4 0.1 - 250.0 0.02 - 50.00 A OC4 Threshold setting (if OC4EN=On) -- 100.0 / 20.00
206 TOC4 0.00 - 300.00 s OC4 Definite time setting (if OC4EN=On) -- 1.00
207 OC1-k 0.000 - 30.000 -- Configurable IDMT Curve settig of OC1. -- 0.000
208 OC1-α 0.00 - 5.00 -- ditto -- 0.00

 250 
 6 F 2 S 0 7 5 8

Default Setting (5A rating / 1A rating)

Range
No. Name Units Contents Model Model Model User
5A rating 1A rating 110 400 420 Setting
209 OC1-C 0.000 - 5.000 -- ditto -- 0.000
210 OC1-kr 0.000 - 30.000 -- ditto -- 0.000
211 OC1-β 0.00 - 5.00 -- ditto -- 0.00
212 EF EFθ -95 - 95 Degree EF Characteristic Angle (if EF1 or 2 or 3 or 4EN=On) -45
213 EFV 0.5 - 100.0 V EF ZPS voltage level (if EF1 or 2 or 3 or 4EN=On) 3.0
214 EF1 0.1 - 25.0 0.02 - 5.00 A EF1 Threshold setting (if EF1EN=On) 1.50 / 0.30
215 TEF1 0.00 - 300.00 s EF1 EFinite time setting. (if MEF1=DT) 1.00
216 TEF1M 0.010 - 1.500 -- EF1 Time multiplier setting (if MEF1=IEC,IEEE,US) 1.000
217 TEF1R 0.0 - 300.0 s EF1 EFinite time reset delay. (if EF1R =DEF) 0.0
218 TEF1RM 0.010 - 1.500 -- EF1 Dependent time reset time multiplier. (if EF1R=DEP) 1.000
219 EF2 0.1 - 25.0 0.02 - 5.00 A EF2 Threshold setting (if EF2EN=On) 15.0 / 3.00
220 TEF2 0.00 - 300.00 s EF2 EFinite time setting. (if MEF2=DT) 1.00
221 EF3 0.1 - 250.0 0.02 - 50.00 A EF3 Threshold setting (if EF3EN=On) 25.0 / 5.00
222 TEF3 0.00 - 300.00 s EF3 EFinite time setting. (if EF3EN=On) 1.00
223 EF4 0.1 - 250.0 0.02 - 50.00 A EF4 Threshold setting (if EF4EN=On) 50.0 / 10.00
224 TEF4 0.00 - 300.00 s EF4 EFinite time setting. (if EF4EN=On) 1.00
225 TREBK 0.00 - 10.00 s Current reverse blocking time 0.10
226 EF1-k 0.000 - 30.000 -- Configurable IDMT Curve settig of EF1. 0.000
227 EF1-α 0.00 - 5.00 -- ditto 0.00
228 EF1-C 0.000 - 5.000 -- ditto 0.000
229 EF1-kr 0.000 - 30.000 -- ditto 0.000
230 EF1-β 0.00 - 5.00 -- ditto 0.00
231 SEF SEθ -95 - 95 Degree SEF Characteristic Angle (if DEF1 or 2 or 3 or 4EN=On) 0 -- 0
232 SEV 0.5 - 100.0 V SEF ZPS voltage level (if DEF1 or 2 or 3 or 4EN=On) 3.0 -- 3.0
233 SE1 0.01 - 1.00 0.002 - 0.200 A SEF1 Threshold setting (if SE1EN=On) 0.050 / 0.010 -- 0.050 / 0.010
234 TSE1 0.00 - 300.00 s SEF1 Definite time setting. (if MSE1=DT) 1.00 -- 1.00
235 TSE1M 0.010 - 1.500 -- SEF1 Time multiplier setting (if MSE1=IEC,IEEE,US) 1.000 -- 1.000
236 TSE1R 0.0 - 300.0 s SEF1 Definite time reset delay. (if SE1R =DEF) 0.0 -- 0.0
237 TSE1RM 0.010 - 1.500 -- SEF1 Dependent time reset time multiplier. (if SE1R=DEP) 1.000 -- 1.000
238 TS1S2 0.00 - 300.00 s SEF1 Stage 2 definite timer settings. (if SE1EN=0n and SE1S2=On) 1.00 -- 1.00
239 SE2 0.01 - 1.00 0.002 - 0.200 A SEF2 Threshold setting (if SE2EN=On) 0.050 / 0.010 -- 0.050 / 0.010
240 TSE2 0.00 - 300.00 s SEF2 Definite time setting. (if MSE2=DT) 1.00 -- 1.00
241 SE3 0.01 - 1.00 0.002 - 0.200 A SEF3 Threshold setting (if SE3EN=On) 0.050 / 0.010 -- 0.050 / 0.010
242 TSE3 0.00 - 300.00 s SEF3 Definite time setting. (if SE3EN=On) 1.00 -- 1.00
243 SE4 0.01 - 1.00 0.002 - 0.200 A SEF4 Threshold setting (if SE4EN=On) 0.050 / 0.010 -- 0.050 / 0.010
244 TSE4 0.00 - 300.00 s SEF4 Definite time setting. (if SE4EN=On) 1.00 -- 1.00
245 RP 0.00 - 100.00 0.00 - 20.00 W Residual Power Threshold. 0.00 / 0.00 -- 0.00 / 0.00
246 SE1-k 0.000 - 30.000 -- Configurable IDMT Curve settig of SEF1. 0.000 -- 0.000
247 SE1-α 0.00 - 5.00 -- ditto 0.00 -- 0.00
248 SE1-C 0.000 - 5.000 -- ditto 0.000 -- 0.000
249 SE1-kr 0.000 - 30.000 -- ditto 0.000 -- 0.000
250 SE1-β 0.00 - 5.00 -- ditto 0.00 -- 0.00
251 NOC NCθ -95 - 95 Degree NOC Characteristic Angle (if NC1 or 2 or 3 or 4EN=On) -- -45
252 NCV 0.5 - 25.0 V NOC NPS voltage level (if NC1 or 2 or 3 or 4EN=On) -- 3.0
253 NC1 0.5 - 10.0 0.10 - 2.00 A NOC1 Threshold setting (if NC1EN=On) -- 2.0 / 0.40
254 TNC1 0.00 - 300.00 s NOC1 Definite time setting. (if MNC1=DT) -- 1.00
255 NC2 0.5 - 10.0 0.10 - 2.00 A NOC2 Threshold setting (if NC2EN=On) -- 1.0 / 0.20
256 TNC2 0.00 - 300.00 s NOC2 Definite time setting. (if NC2EN=On) -- 1.00
257 UC UC1 0.5 - 10.0 0.10 - 2.00 A UC1 Threshold setting (if UC1EN=On) -- 1.0 / 0.20
258 TUC1 0.00 - 300.00 s UC1 Definite time setting. (if UC1EN=On) -- 1.00
259 UC2 0.5 - 10.0 0.10 - 2.00 A UC2 Threshold setting (if UC2EN=On) -- 2.0 / 0.40
260 TUC2 0.00 - 300.00 s UC2 Definite time setting. (if UC2EN=On) -- 1.00
261 Thermal THM 2.0 - 10.0 0.40 - 2.00 A Thermal overload setting (if OLTEN=On) -- 5.0 / 1.00
262 THMIP 0.0 - 5.0 0.00 - 1.00 A Pre Current value (if OLTEN=On) -- 0.0 / 0.00
263 TTHM 0.5 - 500.0 min Thermal Time Constant. (if OLTEN=On) -- 10.0
264 THMA 50 - 99 % Thermal alarm setting. (if OLTEN =On & ALTEN=On) -- 80
265 BCD BCD 0.10 - 1.00 -- Broken Conductor Threshold setting. (if BCDEN=On) -- 0.20
266 TBCD 0.00 - 300.00 s Broken Conductor Definite time setting. (if BCDEN=On) -- 1.00
267 CBF CBF 0.5 - 10.0 0.10 - 2.00 A CBF Threshold setting. (if CBFEN=On) -- 2.5 / 0.50
268 TBTC 0.00 - 300.00 s Back trip Definite time setting -- 0.50
269 TRTC 0.00 - 300.00 s Re-trip Definite time setting -- 0.40
270 Cold OC1 0.1 - 25.0 0.02 - 5.00 A OC1 Threshold setting in CLP mode. -- 10.0 / 2.00
271 Load OC2 0.1 - 25.0 0.02 - 5.00 A OC2 Threshold setting in CLP mode. -- 25.0 / 5.00
272 OC3 0.1 - 250.0 0.02 - 50.00 A OC3 Threshold setting in CLP mode. -- 100.0 / 20.00
273 OC4 0.1 - 250.0 0.02 - 50.00 A OC4 Threshold setting in CLP mode. -- 200.0 / 40.00
274 EF1 0.1 - 25.0 0.02 - 5.00 A EF1 Threshold setting in CLP mode. -- 10.0 / 2.00
275 EF2 0.1 - 25.0 0.02 - 5.00 A EF2 Threshold setting in CLP mode. -- 25.0 / 5.00
276 EF3 0.1 - 250.0 0.02 - 50.00 A EF3 Threshold setting in CLP mode. -- 100.0 / 20.00
277 EF4 0.1 - 250.0 0.02 - 50.00 A EF4 Threshold setting in CLP mode. -- 200.0 / 40.00
278 SE1 0.01 - 1.00 0.002 - 0.200 A SEF1 Threshold setting in CLP mode. -- 0.100 / 0.020
279 SE2 0.01 - 1.00 0.002 - 0.200 A SEF2 Threshold setting in CLP mode. -- 0.100 / 0.020
280 SE3 0.01 - 1.00 0.002 - 0.200 A SEF3 Threshold setting in CLP mode. -- 0.100 / 0.020
281 SE4 0.01 - 1.00 0.002 - 0.200 A SEF4 Threshold setting in CLP mode. -- 0.100 / 0.020

 251 
 6 F 2 S 0 7 5 8

Default Setting (5A rating / 1A rating)

Range
No. Name Units Contents Model Model Model User
5A rating 1A rating 110 400 420 Setting
282 NC1 0.5 - 10.0 0.10 - 2.00 A NOC1 Threshold setting in CLP mode. -- 4.0 / 0.80
283 NC2 0.5 - 10.0 0.10 - 2.00 A NOC2 Threshold setting in CLP mode. -- 2.0 / 0.40
284 BCD 0.１ 0 - 1.00 -- Broken Conductor Threshold setting in CLP mode. -- 0.40
285 TCLE 0 - 10000 s Cold load enable timer. (if CLEN=On) -- 100
286 TCLR 0 - 10000 s Cold load reset timer. (if CLEN=On) -- 100
287 ICLDO 0.5 - 10.0 0.10 - 2.00 A Cold load drop-out threshold setting. (if CLDOEN=On) -- 2.5 / 0.50
288 TCLDO 0.00 - 100.00 s Cold load drop-out timer. (if CLDOEN=1) -- 0.00
289 OV OV1 10.0 - 200.0 V OV1 Threshold setting. -- 120.0
290 TOV1 0.00 - 300.00 s OV1 Definite time setting. Display if [OV1EN] = 1. -- 1.00
291 TOV1M 0.05 - 100.00 -- OV1 Time multiplier setting. Display if [OV1EN] = 2. -- 1.00
292 TOV1R 0.0 - 300.0 s OV1 Definite time reset delay. -- 0.0
293 OV1DPR 10 - 98 % OV1 DO/PU ratio -- 95
294 OV2 10.0 - 200.0 V OV2 Threshold setting. -- 140.0
295 TOV2 0.00 - 300.00 s OV2 Definite time setting. -- 1.00
296 OV2DPR 10 - 98 % OV2 DO/PU ratio -- 95
297 UV UV1 5.0 - 130.0 V UV1 Threshold setting. -- 60.0
298 TUV1 0.00 - 300.00 s UV1 Definite time setting. Display if [UV1EN] = 1. -- 1.00
299 TUV1M 0.05 - 100.00 -- UV1 Time multiplier setting. Display if [UV1EN] = 2. -- 1.00
300 TUV1R 0.0 - 300.0 s UV1 Definite time reset delay. -- 0.0
301 UV2 5.0 - 130.0 V UV2 Threshold setting. -- 40.0
302 TUV2 0.00 - 300.00 s UV2 Definite time setting. -- 1.00
303 VBLK 5.0 - 20.0 V UV Blocking threshold -- 10.0
304 ZOV ZOV1 1.0 - 130.0 V ZOV1 Threshold setting. 20.0
305 TZOV1 0.00 - 300.00 s ZOV1 Definite time setting. Display if [ZOV1EN] = 1. 1.00
306 TZOV1M 0.05 - 100.00 -- ZOV1 Time multiplier setting. Display if [ZOV1EN] = 2. 1.00
307 TZOV1R 0.0 - 300.0 s ZOV1 Definite time reset delay. 0.0
308 ZOV2 1.0 - 130.0 V ZOV2 Threshold setting. 40.0
309 TZOV2 0.00 - 300.00 s ZOV2 Definite time setting. 1.00
310 NOV NOV1 1.0 - 130.0 V NOV1 Threshold setting. -- 20.0
311 TNOV1 0.00 - 300.00 s NOV1 Definite time setting. Display if [MNOV1] = 0. -- 1.00
312 TNOV1M 0.05 - 100.00 -- NOV1 Time multiplier setting. Display if [MNOV1] = 1. -- 1.00
313 TNOV1R 0.0 - 300.0 s NOV1 Definite time reset delay. -- 0.0
314 NOV2 1.0 - 130.0 V NOV2 Threshold setting. -- 40.0
315 TNOV2 0.00 - 300.00 s NOV2 Definite time setting. -- 1.00
316 FRQ FRQ1 -10.00 - +10.00 Hz FRQ1 Threshold setting. -- -1.00
317 TFRQ1 0.00 - 300.00 s FRQ1 Definite time setting. -- 1.00
318 FRQ2 -10.00 - +10.00 Hz FRQ2 Threshold setting. -- -1.00
319 TFRQ2 0.00 - 300.00 s FRQ2 Definite time setting. -- 1.00
320 FRQ3 -10.00 - +10.00 Hz FRQ3 Threshold setting. -- -1.00
321 TFRQ3 0.00 - 300.00 s FRQ3 Definite time setting. -- 1.00
322 FRQ4 -10.00 - +10.00 Hz FRQ4 Threshold setting. -- -1.00
323 TFRQ4 0.00 - 300.00 s FRQ4 Definite time setting. -- 1.00
324 FVBLK 40.0 - 100.0 V UV Blocking threshold -- 40.0
325 ARC TRDY 0.0 - 600.0 s Reclaim timer 60.0
326 TD1 0.01 - 300.00 s 1st shot Dead timer of Stage1 10.00
327 TD2 0.01 - 300.00 s 2nd shot Dead timer of Stage1 10.00
328 TD3 0.01 - 300.00 s 3rd shot Dead timer of Stage1 10.00
329 TD4 0.01 - 300.00 s 4th shot Dead timer of Stage1 10.00
330 TD5 0.01 - 300.00 s 5th shot Dead timer of Stage1 10.00
331 TW 0.01 - 10.00 s Out put pulse timer 2.00
332 TSUC 0.0 - 600.0 s Autoreclosing Pause Time after manualy close 3.0
333 TRCOV 0.1 - 600.0 s Autoreclosing Recovery time after Final Trip 10.0
334 TARCP 0.1 - 600.0 s Autoreclosing Pause Time after manualy close 10.0
335 TRSET 0.01 - 300.00 s ARC reset time in CB closing mode. 3.00
336 OC 0.1 - 250.0 0.02 - 50.00 A For Co-ordination -- 5.0 / 1.00
337 EF 0.1 - 250.0 0.02 - 50.00 A ditto 1.5 / 0.30
338 SE 0.01 - 1.00 0.002 - 0.200 A ditto 0.050 / 0.010 -- 0.050 / 0.010
339 FL X1 0.00 - 199.99 0.0 - 999.9 OHM ditto -- 2.00 / 10.0
340 X0 0.00 - 199.99 0.0 - 999.9 OHM ditto -- 6.80 / 34.0
341 R1 0.00 - 199.99 0.0 - 999.9 OHM ditto -- 0.20 / 1.0
342 R0 0.00 - 199.99 0.0 - 999.9 OHM ditto -- 0.70 / 3.5
343 Kab 80 - 120 % ditto -- 100
344 Kbc 80 - 120 % ditto -- 100
345 Kca 80 - 120 % ditto -- 100
346 Ka 80 - 120 % ditto -- 100
347 Kb 80 - 120 % ditto -- 100
348 Kc 80 - 120 % ditto -- 100
349 LINE 0.0 - 399.9 km ditto -- 50.0
350 Parameters OCCT 1-20000 -- Phase CT ratio -- 400
351 EFCT 1-20000 Residual CT ratio 400
352 SEFCT 1-20000 SEF CT ratio 400 -- 400
353 PVT 1-20000 Phase VT ratio -- 100
354 RVT 1 - 20000 -- Residual VT ratio 100
355 System Line name Specified by user -- Line name Specified by user
356 AG/Common Active gp. 1- 4 -- Active group 1

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Setting 2
Default Setting (5A rating / 1A rating)
Range
No. Name Units Contents Model Model Model User
5A rating 1A rating 110 400 420 Setting
1 Passwd Setting Password - -- Password for Setting menu 0000
2 Notes Plant name - -- Plant name no-name
3 Description - -- Description no-data
4 Records TCAEN Off / On -- Trip CounterAlarm Enable Off
5 TCSPEN Off / On / Opt-On -- Trip Circuit Supervision Enable Off
6 CBSMEN Off / On -- CB conditon super visor enable Off
7 ΣIyAEN Off / On -- ΣI^y Alarm Enable Off
8 OPTAEN Off / On -- Operate Time Alarm Enable Off
9 TCALM 1 - 10000 -- Trip Count Alarm Threshold 10000
10 ΣIyALM 10 - 10000 E6 ΣI^y Alarm 10000
11 YVALUE 1.0 - 2.0 -- Y value 2.0
12 OPTALM 100 - 5000 ms Operate Time Alarm Threshold 1000
13 Fault locator Off / On -- Fault Locator Enable Off
14 Time 0.1 - 3.0 s Record time 2.0
15 OC 0.1 - 250.0 0.02 - 50.00 A OC -- 10.0 / 2.00
16 EF 0.1 - 250.0 0.02 - 50.00 A EF 3.0 / 0.60
17 SEF 0.01 - 1.00 0.002 - 0.200 A SEF 1.00 / 0.200 -- 1.00 / 0.200
18 NC 0.5 - 10.0 0.10 - 2.00 A NOC -- 2.0 / 0.40
19 OV 10.0 - 200.0 V OV -- 120.0
20 UV 1.0 - 130.0 V UV -- 60.0
21 ZOV 1.0 - 130.0 V ZOV 20.0
22 NOV 1.0 - 130.0 V NOV -- 20.0
23 Trip Off / On -- Disturbance trigger Trip On
24 BI Off / On -- Disturbance trigger BI On
25 OC Off / On -- Disturbance trigger OC -- On
26 EF Off / On -- Disturbance trigger EF On
27 SEF Off / On -- Disturbance trigger SEF On -- On
28 NC Off / On -- Disturbance trigger NC -- On
29 OV Off / On -- Disturbance trigger OV -- On
30 UV Off / On -- Disturbance trigger UV -- On
31 ZOV Off / On -- Disturbance trigger ZOV On
32 NOV Off / On -- Disturbance trigger NOV -- On
33 SIG1 0 - 500 -- Disturbance record binary signal #1 (Refer to the "Disturbance" sheet.)
34 SIG2 0 - 500 -- Disturbance record binary signal #2 ditto
35 SIG3 0 - 500 -- Disturbance record binary signal #3 ditto
36 SIG4 0 - 500 -- Disturbance record binary signal #4 ditto
37 SIG5 0 - 500 -- Disturbance record binary signal #5 ditto
38 SIG6 0 - 500 -- Disturbance record binary signal #6 ditto
39 SIG7 0 - 500 -- Disturbance record binary signal #7 ditto
40 SIG8 0 - 500 -- Disturbance record binary signal #8 ditto
41 SIG9 0 - 500 -- Disturbance record binary signal #9 ditto
42 SIG10 0 - 500 -- Disturbance record binary signal #10 ditto
43 SIG11 0 - 500 -- Disturbance record binary signal #11 ditto
44 SIG12 0 - 500 -- Disturbance record binary signal #12 ditto
45 SIG13 0 - 500 -- Disturbance record binary signal #13 ditto
46 SIG14 0 - 500 -- Disturbance record binary signal #14 ditto
47 SIG15 0 - 500 -- Disturbance record binary signal #15 ditto
48 SIG16 0 - 500 -- Disturbance record binary signal #16 ditto
49 SIG17 0 - 500 -- Disturbance record binary signal #17 ditto
50 SIG18 0 - 500 -- Disturbance record binary signal #18 ditto
51 SIG19 0 - 500 -- Disturbance record binary signal #19 ditto
52 SIG20 0 - 500 -- Disturbance record binary signal #20 ditto
53 SIG21 0 - 500 -- Disturbance record binary signal #21 ditto
54 SIG22 0 - 500 -- Disturbance record binary signal #22 ditto
55 SIG23 0 - 500 -- Disturbance record binary signal #23 ditto
56 SIG24 0 - 500 -- Disturbance record binary signal #24 ditto
57 SIG25 0 - 500 -- Disturbance record binary signal #25 ditto
58 SIG26 0 - 500 -- Disturbance record binary signal #26 ditto
59 SIG27 0 - 500 -- Disturbance record binary signal #27 ditto
60 SIG28 0 - 500 -- Disturbance record binary signal #28 ditto
61 SIG29 0 - 500 -- Disturbance record binary signal #29 ditto
62 SIG30 0 - 500 -- Disturbance record binary signal #30 ditto
63 SIG31 0 - 500 -- Disturbance record binary signal #31 ditto
64 SIG32 0 - 500 -- Disturbance record binary signal #32 ditto
65 HDLC 1-32 Address for RSM100 1
66 IEC 0 - 254 Address for IEC103 2
67 IECB1 0 - 500 IEC user specified signal 1 1
68 IECB2 0 - 500 IEC user specified signal 2 2
69 IECB3 0 - 500 IEC user specified signal 3 3
70 IECB4 0 - 500 IEC user specified signal 4 4

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Default Setting (5A rating / 1A rating)

Range
No. Name Units Contents Model Model Model User
5A rating 1A rating 110 400 420 Setting
71 IECGT 0-7 IEC Trip A phase 1
72 IECAT 0-7 IEC Trip B phase 1
73 IECBT 0-7 IEC Trip C phase 1
74 IECCT 0-7 IEC General Trip 1
75 IECE1 0 - 500 IEC usr event 1 0
76 IECE2 0 - 500 IEC usr event 2 0
77 IECE3 0 - 500 IEC usr event 3 0
78 IECE4 0 - 500 IEC usr event 4 0
79 IECE5 0 - 500 IEC usr event 5 0
80 IECE6 0 - 500 IEC usr event 6 0
81 IECE7 0 - 500 IEC usr event 7 0
82 IECE8 0 - 500 IEC usr event 8 0
83 IECI1 0 - 255 IEC usr INF 1 0
84 IECI2 0 - 255 IEC usr INF 2 0
85 IECI3 0 - 255 IEC usr INF 3 0
86 IECI4 0 - 255 IEC usr INF 4 0
87 IECI5 0 - 255 IEC usr INF 5 0
88 IECI6 0 - 255 IEC usr INF 6 0
89 IECI7 0 - 255 IEC usr INF 7 0
90 IECI8 0 - 255 IEC usr INF 8 0
91 Protocol HDLC/IEC Switch for communications HDLC(0)
92 232C 9.6/19.2/57.6 ditto 9.6(0)
93 IECBR 9.6/19.2 ditto 19.2(1)
94 IECBLK Normal/Blocked ditto Normal(0)
95 IECNFI 1.2/2.4 ditto 2.4(1)
96 IECNFV 1.2/2.4 ditto 1.2(0)
97 IECNFP 1.2/2.4 ditto 2.4(1)
98 IECNFf 1.2/2.4 ditto 1.2(0)
99 IECFL Prim./Second/km ditto Prim.(0)
100 IECGI1 No/Yes IEC event type setting 1 No(0)
101 IECGI2 No/Yes IEC event type setting 2 No(0)
102 IECGI3 No/Yes IEC event type setting 3 No(0)
103 IECGI4 No/Yes IEC event type setting 4 No(0)
104 IECGI5 No/Yes IEC event type setting 5 No(0)
105 IECGI6 No/Yes IEC event type setting 6 No(0)
106 IECGI7 No/Yes IEC event type setting 7 No(0)
107 IECGI8 No/Yes IEC evnet type setting 8 No(0)
108 BI1 comm. None/Operate/Reset/Both BI 1 command trigger setting Both(3)
109 BI2 comm. None/Operate/Reset/Both BI 2 command trigger setting Both(3)
110 BI3 comm. None/Operate/Reset/Both BI 3 command trigger setting Both(3)
111 BI4 comm. None/Operate/Reset/Both BI 4 command trigger setting Both(3)
112 BI5 comm. None/Operate/Reset/Both BI 5 command trigger setting Both(3)
113 BI6 comm. None/Operate/Reset/Both BI 6 command trigger setting Both(3) --
114 BI7 comm. None/Operate/Reset/Both BI 7 command trigger setting Both(3) --
115 BI8 comm. None/Operate/Reset/Both BI 8 command trigger setting Both(3) --
116 Alarm1 Text Specified by user Alarm1 Text ALARM 1
117 Alarm2 Text Specified by user Alarm2 Text ALARM 2
118 Alarm3 Text Specified by user Alarm3 Text ALARM 3
119 Alarm4 Text Specified by user Alarm4 Text ALARM 4
120 BI1PUD 0.00 - 300.00 s Binary Input 1 Pick-up delay 0.00
121 BI1DOD 0.00 - 300.00 s Binary Input 1 Drop-off delay 0.00
122 BI2PUD 0.00 - 300.00 s Binary Input 2 Pick-up delay 0.00
123 BI2DOD 0.00 - 300.00 s Binary Input 2 Drop-off delay 0.00
124 BI3PUD 0.00 - 300.00 s Binary Input 3 Pick-up delay 0.00
125 BI3DOD 0.00 - 300.00 s Binary Input 3 Drop-off delay 0.00
126 BI4PUD 0.00 - 300.00 s Binary Input 4 Pick-up delay 0.00
127 BI4DOD 0.00 - 300.00 s Binary Input 4 Drop-off delay 0.00
128 BI5PUD 0.00 - 300.00 s Binary Input 5 Pick-up delay 0.00
129 BI5DOD 0.00 - 300.00 s Binary Input 5 Drop-off delay 0.00
130 BI6PUD 0.00 - 300.00 s Binary Input 6 Pick-up delay 0.00 --
131 BI6DOD 0.00 - 300.00 s Binary Input 6 Drop-off delay 0.00 --
132 BI7PUD 0.00 - 300.00 s Binary Input 7 Pick-up delay 0.00 --
133 BI7DOD 0.00 - 300.00 s Binary Input 7 Drop-off delay 0.00 --
134 BI8PUD 0.00 - 300.00 s Binary Input 8 Pick-up delay 0.00 --
135 BI8DOD 0.00 - 300.00 s Binary Input 8 Drop-off delay 0.00 --
Repeat Following Switches from Binary Input 2 to Binary Input 8.
136 BI1SNS Norm/Inv Binary Input 1 Sense Normal
137 BI1SGS Off/1/2/3/4 Binary Input 1 Settings Group Select Off
138 OC1BLK Off/On OC1 Block -- Off
139 OC2BLK Off/On OC2 Block -- Off
140 OC3BLK Off/On OC3 Block -- Off

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Default Setting (5A rating / 1A rating)

Range
No. Name Units Contents Model Model Model User
5A rating 1A rating 110 400 420 Setting
141 OC4BLK Off/On OC4 Block -- Off
142 EF1BLK Off/On EF1 Block Off
143 EF2BLK Off/On EF2 Block Off
144 EF3BLK Off/On EF3 Block Off
145 EF4BLK Off/On EF4 Block Off
146 EF1PER Off/On EF1 Permission Off
147 EF2PER Off/On EF2 Permission Off
148 EF3PER Off/On EF3 Permission Off
149 EF4PER Off/On EF4 Permission Off
150 SE1BLK Off/On SEF1 Block Off -- Off
151 SE2BLK Off/On SEF2 Block Off -- Off
152 SE3BLK Off/On SEF3 Block Off -- Off
153 SE4BLK Off/On SEF4 Block Off -- Off
154 NC1BLK Off/On NC1 Block -- Off
155 NC2BLK Off/On NC2 Block -- Off
156 UC1BLK Off/On Undercurrent 1 Block -- Off
157 UC2BLK Off/On Undercurrent 2 Block -- Off
158 CBFBLK Off/On CBF Block -- Off
159 THMBLK Off/On Thermal Protection Block -- Off
160 THMABLK Off/On Thermal Alarm Block -- Off
161 BCDBLK Off/On Broken Conductor Protection Block -- Off
162 OV1BLK Off/On OV1 Block -- Off
163 OV2BLK Off/On OV2 Block -- Off
164 UV1BLK Off/On UV1 Block -- Off
165 UV2BLK Off/On UV2 Block -- Off
166 ZOV1BLK Off/On ZOV1 Block Off
167 ZOV2BLK Off/On ZOV2 Block Off
168 NOV1BLK Off/On NOV1 Block -- Off
169 NOV2BLK Off/On NOV2 Block -- Off
170 FRQ1BLK Off/On FRQ1 Block -- Off
171 FRQ2BLK Off/On FRQ2 Block -- Off
172 FRQ3BLK Off/On FRQ3 Block -- Off
173 FRQ4BLK Off/On FRQ4 Block -- Off
174 ARCBLK Off/On Autoreclose Block Off
175 ARCRDY Off/On Autoreclose Ready Off
176 ARCINI Off/On Autoreclose Initiation Off
177 MNLCLS Off/On Manual Close Off
178 ARCNA Off/On Autoreclose Not Applicated Off
179 CTFBLK Off/On CTF Block -- Off
180 VTFBLK Off/On VTF Block -- Off
181 CTFEXT Off/On External CTF -- Off
182 VTFEXT Off/On External VTF -- Off
183 EXTAPH Off/On External Trip - Aphase Off
184 EXTBPH Off/On External Trip - Bphase Off
185 EXTCPH Off/On External Trip - Cphase Off
186 EXT3PH Off/On External Trip - 3phase Off
187 TCFALM Off/On Trip Circuit Fail Alarm Off
188 CBOPN Off/On Circuit Breaker Open Off
189 CBCLS Off/On Circuit Breaker Close Off
190 RMTRST Off/On Remote Reset Off
191 SYNCLK Off/On Synchronize clock Off
192 STORCD Off/On Store Disturbance Record Off
193 Alarm1 Off/On Alarm screen 1. Off
194 Alarm2 Off/On Alarm screen 2. Off
195 Alarm3 Off/On Alarm screen 3. Off
196 Alarm4 Off/On Alarm screen 4. Off
Repeat Following Switches from LED 2 to LED3.
197 Logic OR/AND LED1 Logic Gate Type OR
198 Reset Inst/Latch LED1 Reset operation Inst
199 In #1 0 - 500 LED Functions 0
200 In #2 0 - 500 ditto 0
201 In #3 0 - 500 ditto 0
202 In #4 0 - 500 ditto 0
Repeat Following Switches for IND2.
203 Reset Inst/Latch IND1 Reset operation Inst
204 BIT1 0 - 500 Virtual LED 0
205 BIT2 0 - 500 ditto 0
206 BIT3 0 - 500 ditto 0
207 BIT4 0 - 500 ditto 0
208 BIT5 0 - 500 ditto 0
209 BIT6 0 - 500 ditto 0
210 BIT7 0 - 500 ditto 0
211 BIT8 0 - 500 ditto 0

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Default Setting (5A rating / 1A rating)

Range
No. Name Units Contents Model Model Model User
5A rating 1A rating 110 400 420 Setting
212 Term A 0 - 500 Logic circuit Functions 0
213 Term B 0 - 500 ditto 0
214 Status Display Prim. / Second. -- metering Primary
215 Time sync. Off / BI / RSM / IEC -- time sync source Local
216 Power Send / Receive -- Send
217 Current Lag / Lead -- Lead
218 Serial Serial No. - -- Serial No. no-No
219 Main ROM No. - -- Main ROM Information no-name
220 Relay type all - -- Relay type all no-name
Repeat Following Switches for BO2-BO7
221 Binary Logic OR/AND BO logic See BO setting sheet
222 Output Reset INS/DL/DW/LAT BO time delay ditto
223 In #1 0 - 500 BO signal. ditto
224 In #2 0 - 500 ditto ditto
225 In #3 0 - 500 ditto ditto
226 In #4 0 - 500 ditto ditto
227 TBO 0.00 - 10.00 BO delay timer ditto

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5. Disturbance record setting

Def aul t s et t i ng
110 400 420 Set t i ng
Name Range Uni t
NO. Si gnal name NO. Si gnal name NO. Si gnal name
SI G1 0 - 500 － 131 EF1 101 OC1-A 101 OC1-A
SI G2 0 - 500 － 281 EF1 TRI P 102 OC1-B 102 OC1-B
SI G3 0 - 500 － 141 SEF1 103 OC1-C 103 OC1-C
SI G4 0 - 500 － 291 SEF1-S1 TRI P 261 OC1 TRI P 261 OC1 TRI P
SI G5 0 - 500 － 211 ZOV1 131 EF1 131 EF1
SI G6 0 - 500 － 351 ZOV1 TRI P 281 EF1 TRI P 281 EF1 TRI P
SI G7 0 - 500 － 0 201 UV1-A 141 SEF1
SI G8 0 - 500 － 0 202 UV1-B 291 SEF1-S1 TRI P
SI G9 0 - 500 － 0 203 UV1-C 201 UV1-A
SI G10 0 - 500 － 0 341 UV1 TRI P 202 UV1-B
SI G11 0 - 500 － 0 211 ZOV1 203 UV1-C
SI G12 0 - 500 － 0 351 ZOV1 TRI P 341 UV1 TRI P
SI G13 0 - 500 － 0 0 211 ZOV1
SI G14 0 - 500 － 0 0 351 ZOV1 TRI P
SI G15 0 - 500 － 0 0 0
SI G16 0 - 500 － 371 GEN. TRI P 371 GEN. TRI P 371 GEN. TRI P
SI G17 0 - 500 － 401 ARC READY T 401 ARC READY T 401 ARC READY T
SI G18 0 - 500 － 61 ARC BLOCK 61 ARC BLOCK 61 ARC BLOCK
SI G19 0 - 500 － 403 ARC SHOT 403 ARC SHOT 403 ARC SHOT
SI G20 0 - 500 － 0 0 0
SI G21 0 - 500 － 0 0 0
SI G22 0 - 500 － 0 0 0
SI G23 0 - 500 － 0 0 0
SI G24 0 - 500 － 0 0 0
SI G25 0 - 500 － 0 0 0
SI G26 0 - 500 － 0 0 0
SI G27 0 - 500 － 0 0 0
SI G28 0 - 500 － 0 0 0
SI G29 0 - 500 － 0 0 0
SI G30 0 - 500 － 0 0 0
SI G31 0 - 500 － 0 0 0

6. LED setting
LED1 - LED3 setting
Setting range Default Setting Setting
LED Logic Reset Functions Logic Reset Functions Logic Reset Functions
LED1 OR / AND Inst/Latch In #1 0-500 OR Inst In #1 0 In #1
In #2 0-500 In #2 0 In #2
In #3 0-500 In #3 0 In #3
In #4 0-500 In #4 0 In #4
LED2 OR / AND Inst/Latch In #1 0-500 OR Inst In #1 0 In #1
In #2 0-500 In #2 0 In #2
In #3 0-500 In #3 0 In #3
In #4 0-500 In #4 0 In #4
LED3 OR / AND Inst/Latch In #1 0-500 OR Inst In #1 0 In #1
In #2 0-500 In #2 0 In #2
In #3 0-500 In #3 0 In #3
In #4 0-500 In #4 0 In #4

User setting of Virtual LED

Setting range Default setting Setting
LED Reset Functions Reset Functions B IT1 B IT2 B IT3 B IT4 B IT5 B IT6 B IT7 B IT8
IND1 Inst / Latch 0 - 500 Inst BIT1 - BIT8 : 0

IND2 Inst / Latch 0 - 500 Inst BIT1 - BIT8 : 0

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Appendix I
Commissioning Test Sheet (sample)
1. Relay identification
2. Preliminary check
3. Hardware check
4. Function test
5. Protection scheme test
6. Metering and recording check
7. Conjunctive test

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1. Relay identification

Type Serial number

Model System frequency
Station Date
Circuit Engineer
Protection scheme Witness
Active settings group number

2. Preliminary check

Ratings
CT shorting contacts
DC power supply
Power up
Wiring
Relay inoperative
alarm contact
Calendar and clock

3. Hardware check
3.1 User interface check

3.2 Binary input/binary output circuit check

Binary input circuit

Binary output circuit

3.3 AC input circuit

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4. Function test
4.1 Overcurrent elements test
(1) Operating value test

Element Current setting Measured current Element Current setting Measured current
OC1-A UC1-A
OC2-A UC2-A
OC3-A THM-A
OC4-A THM-T
EF1 NOC1
EF2 NOC2
EF3 CBF-A
EF4
SEF1
SEF2
SEF3
SEF4

(2) Operating time test (IDMT)

Element Curve setting Multiplier setting Changed current Measured time

OC1-A × Current setting
× Current setting
× Current setting
EF1 × Current setting
× Current setting
× Current setting
SEF1 × Current setting
× Current setting
× Current setting

(3) Directional operate characteristic test

Element Current setting Measured current Element Current setting Measured current
OC1-A SEF1
OC2-A SEF2
OC3-A SEF3
OC4-A SEF4
EF1 NOC1
EF2 NOC2
EF3
EF4

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4.2 Overvoltage and undervoltage elements test

(1) Operating value test

Element Voltage Measured Element Voltage Measured

setting voltage setting voltage
OV1 ZOV1
OV2 ZOV2
UV1 NOV1
UV2 NOV2

(2) Operating time test (IDMT)

Element Voltage setting Multiplier setting Changed voltage Measured time

OV1 × Voltage setting
× Voltage setting
× Voltage setting
UV1 × Voltage setting
× Voltage setting
× Voltage setting
ZOV1 × Voltage setting
× Voltage setting
× Voltage setting
NOV1 × Voltage setting
× Voltage setting
× Voltage setting

4.3 BCD element check

4.4 Cold load function check

4.5 Frequency elements test

Element Frequency setting Measured frequency

FRQ1
FRQ2
FRQ3
FRQ4

5. Protection scheme test

6. Metering and recording check

7. Conjunctive test

Scheme Results
On load check
Tripping circuit
Reclosing circuit

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Appendix J
Return Repair Form

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RETURN / REPAIR FORM

Please fill in this form and return it to Toshiba Corporation with the GRD140 to be repaired.

TOSHIBA CORPORATION FUCHU WORKS

1,Toshiba-cho, Fuchu-shi, Tokyo, Japan
For: Power System Control Department
Quality Assurance Group

Type: GRD140 Model:

(Example: Type: GRD140 Model: 400A )

Product No.:
Serial No.:
Date:

1. Reason for returning the relay

† mal-function
† does not operate
† increased error
† investigation
† others

2. Fault records, event records or disturbance records stored in the relay and relay settings are
very helpful information to investigate the incident.
Please provide relevant information regarding the incident on floppy disk, or fill in the
attached fault record sheet and relay setting sheet.

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Fault Record
Date/Month/Year Time / /
/ : : .
(Example: 04/ Jul./ 2002 15:09:58.442)
Faulty phase:
Prefault values
Ia: A Van : V
Ib : A Vbn : V
Ic: A Vcn : V
Ie: A Ve: V
Ise: A Vab: V
I1 : A Vbc: V
I2 : A Vca: V
I2 / I1 : V0: V
V1: V
V2: V
f: Hz

Fault values
Ia: A Van : V
Ib : A Vbn : V
Ic: A Vcn : V
Ie: A Ve: V
Ise: A Vab: V
I1 : A Vbc: V
I2 : A Vca: V
I2 / I1 : V0: V
THM: % V1: V
V2: V
f: Hz

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3. What was the message on the LCD display at the time of the incident?

4. Describe the details of the incident:

5. Date incident occurred

Day/Month/Year: / / /
(Example: 10/July/2002)

6. Give any comments about the GRD140, including the documents:

Customer

Name:
Company Name:
Address:

Telephone No.:
Facsimile No.:
Signature:

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Appendix K
Technical Data

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TECHNICAL DATA
Ratings
AC current In: 1A or 5A
AC voltage Vn: 100V to 120 V
Frequency: 50Hz or 60Hz
DC auxiliary supply: 110/125Vdc (Operative range: 88 - 150Vdc)
220/250Vdc (Operative range: 176 - 300Vdc)
48/54/60Vdc (Operative range: 38.4 - 72Vdc)
Superimposed AC ripple on DC supply: maximum 12%
DC supply interruption: maximum 50ms at 110V
Binary input circuit DC voltage: 110/125Vdc (Operative range: 88 - 150Vdc)
220/250Vdc (Operative range: 176 - 300Vdc)
48/54/60Vdc (Operative range: 38.4 - 72Vdc)
Overload Ratings
AC current inputs: 3 times rated current continuous
100 times rated current for 1 second
AC voltage inputs: 2 times rated voltage continuous
Burden
AC phase current inputs: ≤ 0.1VA (1A rating)
≤ 0.2VA (5A rating)
AC earth current inputs: ≤ 0.3VA (1A rating)
≤ 0.4VA (5A rating)
AC sensitive earth inputs: ≤ 0.3VA (1A rating)
≤ 0.4VA (5A rating)
AC voltage inputs: ≤ 0.1VA (at rated voltage)
DC power supply: ≤ 10W (quiescent)
≤ 15W (maximum)
Binary input circuit: ≤ 0.5W per input at 110Vdc
Current Transformer Requirements
Phase Inputs Typically 5P20 with rated burden according to load.
Standard Earth Inputs: Core balance CT or residual connection of phase CTs.
Sensitive Earth Inputs: Core balance CT.
Directional Phase Overcurrent Protection
P/F 1st Overcurrent threshold: OFF, 0.02 – 5.00A in 0.01A steps (1A rating)
OFF, 0.1 – 25.0A in 0.1A steps (5A rating)
Delay type: DTL, IEC NI, IEC VI, IEC EI, UK LTI, IEEE MI,
IEEE VI, IEEE EI, US CO8 I, US CO2 STI
IDMTL Time Multiplier Setting TMS: 0.010 – 1.500 in 0.001 steps
DTL delay: 0.00 – 300.00s in 0.01s steps
Reset Type: Definite Time or Dependent Time
Reset Definite Delay: 0.0 – 300.0s in 0.1s steps
Reset Time Multiplier Setting RTMS: 0.010 – 1.500 in 0.001 steps
P/F 2nd Overcurrent threshold: OFF, 0.02 – 5.00A in 0.01A steps (1A rating)
OFF, 0.1 – 25.0A in 0.1A steps (5A rating)
P/F 3rd, 4th Overcurrent thresholds: OFF, 0.02 – 50.00A in 0.01A steps (1A rating)
OFF, 0.1 – 250.0A in 0.1A steps (5A rating)
DTL delay: 0.00 – 300.00s in 0.01s steps
P/F Characteristic Angle: −95° to +95° in 1° steps

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Directional Earth Fault Protection

E/F 1st Overcurrent threshold: OFF, 0.02 – 5.00A in 0.01A steps (1A rating)
OFF, 0.1 – 25.0A in 0.1A steps (5A rating)
Delay type: DTL, IEC NI, IEC VI, IEC EI, UK LTI, IEEE MI,
IEEE VI, IEEE EI, US CO8 I, US CO2 STI
IDMTL Time Multiplier Setting TMS: 0.010 – 1.500 in 0.001 steps
DTL delay: 0.00 – 300.00s in 0.01s steps
Reset Type: Definite Time or Dependent Time
Reset Definite Delay: 0.0 – 300.0s in 0.1s steps
Reset Time Multiplier Setting RTMS: 0.010 – 1.500 in 0.001 steps
E/F 2nd threshold: OFF, 0.02 – 5.00A in 0.01A steps (1A rating)
OFF, 0.1 – 25.0A in 0.1A steps (5A rating)
E/F 3rd, 4th thresholds: OFF, 0.02 – 50.00A in 0.01A steps (1A rating)
OFF, 0.1 – 250.0A in 0.1A steps (5A rating)
DTL delay: 0.00 – 300.00s in 0.01s steps
E/F Characteristic angle: −95° to +95° in 1° steps
E/F directional voltage threshold: 0.5 – 100.0V in 0.1V steps
Directional Sensitive Earth Fault Protection
SEF 1st Overcurrent threshold: OFF, 0.002 – 0.200A in 0.001A steps (1A rating)
OFF, 0.01 – 1.00A in 0.01A steps (5A rating)
Delay Type: DTL, IEC NI, IEC VI, IEC EI, UK LTI, IEEE MI,
IEEE VI, IEEE EI, US CO8 I, US CO2 STI
IDMTL Time Multiplier Setting TMS: 0.010 – 1.500 in 0.001 steps
DTL delay: 0.00 – 300.00s in 0.01s steps
Reset Type: Definite Time or Dependent Time
Reset Definite Delay: 0.0 – 300.0s in 0.1s steps
Reset Time Multiplier Setting RTMS: 0.010 – 1.500 in 0.001 steps
DTL delay (back-up timer): 0.00 – 300.00s in 0.01s steps
SEF 2nd, 3rd, 4th threshold: OFF, 0.002 – 0.200A in 0.001A steps (1A rating)
OFF, 0.01 – 1.00A in 0.01A steps (5A rating)
DTL delay: 0.00 – 300.00s in 0.01s steps
SEF Characteristic angle: −95° to +95° in 1° steps
SEF Boundary of operation: ±87.5°, ±90°
SEF directional voltage threshold: 0.5 – 100.0V in 0.1V steps
Residual power threshold: OFF, 0.00 – 20.00W in 0.01W steps (1A primary)
OFF, 0.0 – 100.0W in 0.1W steps (5A primary)
Phase Undercurrent Protection
Undercurrent 1st, 2nd threshold: OFF, 0.10 – 2.00A in 0.01A steps (1A rating)
OFF, 0.5 – 10.0A in 0.1A steps (5A rating)
DTL Delay: 0.00 – 300.00s in 0.01s steps
Thermal Overload Protection
Iθ = k.IFLC (Thermal setting): OFF, 0.40 – 2.00A in 0.01A steps (1A rating)
OFF, 2.0 – 10.0A in 0.1A steps (5A rating)
Previous load current (IP) 0.00 – 1.00A in 0.01A steps (1A rating)
0.0 – 5.0A in 0.1A steps (5A rating)
Time constant (τ): 0.5 – 500.0mins in 0.1min steps
Thermal alarm: OFF, 50% to 99% in 1% steps

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Directional Negative Phase Sequence Overcurrent Protection (NOC)

NOC 1st, 2nd threshold: OFF, 0.10 – 2.00A in 0.01A steps (1A rating)
OFF, 0.5 – 10.0A in 0.1A steps (5A rating)
DTL delay: 0.00 – 300.00s in 0.01s steps
NOC Characteristic angle: −95° to +95° in 1° steps
NOC Directional voltage threshold 0.5 – 25.0V in 0.1V steps
Overvoltage Protection
1st, 2nd Overvoltage thresholds: OFF, 10.0 – 200.0V in 0.1V steps
Delay type (1st threshold only): DTL, IDMTL
IDMTL Time Multiplier Setting TMS: 0.05 – 100.00 in 0.01 steps
DTL delay: 0.00 – 300.00s in 0.01s steps
DO/PU ratio 10 – 98% in 1% steps
Reset Delay (1st threshold only): 0.0 – 300.0s in 0.1s steps
Undervoltage Protection
1st, 2nd Undervoltage thresholds: OFF, 5.0 – 130.0V in 0.1V steps
Delay type (1st threshold only): DTL, IDMTL
IDMTL Time Multiplier Setting TMS: 0.05 – 100.00 in 0.01 steps
DTL delay: 0.00 – 300.00s in 0.01s steps
st
Reset Delay (1 threshold only): 0.0 – 300.0s in 0.1s steps
Undervoltage Block 5.0 – 20.0Vin 0.1V steps
Zero Phase Sequence Overvoltage Protection (ZOV)
1st, 2nd ZOV Overvoltage thresholds: OFF, 1.0 – 130.0V in 0.1V steps
Delay type (1st threshold only): DTL, IDMTL
IDMTL Time Multiplier Setting TMS: 0.05 – 100.00 in 0.01 steps
DTL delay: 0.00 – 300.00s in 0.01s steps
st
Reset Delay (1 threshold only): 0.0 – 300.0s in 0.1s steps
Negative Phase Sequence Overvoltage Protection (NOV)
1st, 2nd NOV Overvoltage thresholds: OFF, 1.0 – 130.0V in 0.1V steps
Delay type (1st threshold only): DTL, IDMTL
IDMTL Time Multiplier Setting TMS: 0.05 – 100.00 in 0.01 steps
DTL delay: 0.00 – 300.00s in 0.01s steps
st
Reset Delay (1 threshold only): 0.0 – 300.0s in 0.1s steps
Under/Over Frequency Protection
1st - 4th under/overfrequency threshold (Fnom − 10.00Hz) – (Fnom + 10.00Hz) in 0.01Hz steps
Fnom: nominal frequency
DTL delay: 0.00 – 300.00s in 0.01s steps
Frequency UV Block 40.0 – 100.0V in 0.1V steps
Broken Conductor Protection
Broken conductor threshold (I2/I1): OFF, 0.10 – 1.00 in 0.01 steps
DTL delay: 0.00 – 300.00s in 0.01s steps
CBF Protection
CBF threshold: OFF, 0.10 – 2.00A in 0.01A steps (1A rating)
OFF, 0.5 – 10.0A in 0.1A steps (5A rating)
CBF stage 1 (Backup trip) DTL: 0.00 – 300.00s in 0.01s steps
CBF stage 2 (Re-trip) DTL: 0.00 – 300.00s in 0.01s steps

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Autoreclose
ARC Reclaim Time 0.0– 600.0s in 0.1s steps
Close Pulse Width 0.01 – 10.00s in 0.01s steps
Lock-out Recovery Time OFF, 0.1 – 600.0s in 0.1s steps
Sequences 1 – 5 Shots to Lock-out, each trip programmable for inst or
Delayed operation
Dead Times(programmable for each shot) 0.01 – 300.00s in 0.01s steps
Accuracy
Overcurrent Pick-ups: 100% of setting ± 5%
Overcurrent PU/DO ratio: ≥100%
Undercurrent Pick-up: 100% of setting ± 5%
Undercurrent PU/DO ratio: ≤100%
Overvoltage Pick-ups: 100% of setting ± 5%
Undervoltage Pick-ups: 100% of setting ± 5%
Inverse Time Delays: ± 5% or 30ms (1.5 to 30 times setting)
Definite Time Delays: ± 1% or 10ms
Transient Overreach for instantaneous elements: <−5% for X/R = 100.
Front Communication port - local PC (RS232)
Connection: Point to point
Cable type: Multi-core (straight)
Cable length: 15m (max.)
Connector: RS232C 9-way D-type female
Rear Communication port - remote PC (RS485)
Connection: Multidrop (max. 32 relays)
Cable type: Twisted pair
Cable length: 1200m (max.)
Connector: Screw terminals
Isolation: 1kVac for 1 min.
Transmission rate: 64kpbs for RSM system
9.6, 19.2kbps for IEC60870-5-103
Rear Communication port - remote PC (Fibre Optic for IEC60870-5-103: option)
Cable type: 50/125 or 62.5/125µm fibre
Cable length: 1000m (max.)
Connector: ST
Transmission rate: 9.6, 19.2kbps for IEC60870-5-103
Binary Inputs
Operating voltage Typical 74Vdc(min. 70Vdc) for 110V/125Vdc rating
Typical 138Vdc(min. 125Vdc) for 220V/250Vdc rating
Typical 31Vdc(min. 28Vdc) for 48V/54V/60Vdc rating
Binary Outputs
Number 8
Ratings: Make and carry: 4A continuously
Make and carry: 20A, 290Vdc for 0.5s (L/R≥5ms)
Break: 0.1A, 290Vdc (L/R=40ms)
Durability: Loaded contact: 10000 operations
Unloaded contact: 100000 operations

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Mechanical design
Weight 4.5kg
Case colour Munsell No. 10YR8/0.5
Installation Flush mounting

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ENVIRONMENTAL PERFORMANCE

Test Standards Details

Atmospheric Environment
Temperature IEC60068-2-1/2 Operating range: -10°C to +55°C.
Storage / Transit: -25°C to +70°C.
Humidity IEC60068-2-3 56 days at 40°C and 93% relative humidity.
Enclosure Protection IEC60529 IP51
Mechanical Environment
Vibration IEC60255-21-1 Response - Class 1
Endurance - Class 1
Shock and Bump IEC60255-21-2 Shock Response Class 1
Shock Withstand Class 1
Bump Class 1
Seismic IEC60255-21-3 Class 1
Electrical Environment
Dielectric Withstand IEC60255-5 2kVrms for 1 minute between all terminals and earth.
2kVrms for 1 minute between independent circuits.
1kVrms for 1 minute across normally open contacts.
High Voltage Impulse IEC60255-5 Three positive and three negative impulses of
5kV(peak), 1.2/50µs, 0.5J between all terminals and
between all terminals and earth.
Electromagnetic Environment
High Frequency IEC60255-22-1 Class 3, 1MHz 2.5kV applied to all ports in common mode.
Disturbance / Damped IEC61000-4-12 / EN61000-4-12 1MHz 1.0kV applied to all ports in differential mode.
Oscillatory Wave
Electrostatic IEC60255-22-2 Class 3, 6kV contact discharge, 8kV air discharge.
Discharge IEC61000-4-2 / EN61000-4-2
Radiated RF IEC60255-22-3 Class 3, Field strength 10V/m for frequency sweeps of 80MHz to
Electromagnetic IEC61000-4-3 / EN61000-4-3 1GHz and 1.7GHz to 2.2GHz. Additional spot tests at
Disturbance 80, 160, 450, 900 and 1890MHz.
Fast Transient IEC60255-22-4, IEC61000-4-4 / 4kV, 2.5kHz, 5/50ns applied to all inputs.
Disturbance EN61000-4-4
Surge Immunity IEC60255-22-5, 1.2/50µs surge in common/differential modes:
IEC61000-4-5 / EN61000-4-5 HV ports: 4kV/2kV (peak)
PSU and I/O ports: 2kV/1kV (peak)
RS485 port: 1kV/0.5kV (peak)
Conducted RF IEC60255-22-6 Class 3, 10Vrms applied over frequency range 150kHz to
Electromagnetic IEC61000-4-6 / EN61000-4-6 100MHz. Additional spot tests at 27 and 68MHz.
Disturbance
Power Frequency IEC60255-22-7, IEC61000-4-16 300V 50Hz for 10s applied to ports in common mode.
Disturbance / EN61000-4-16 150V 50Hz for 10s applied to ports in differential mode.
Not applicable to AC inputs.
Conducted and IEC60255-25, Conducted emissions:
Radiated Emissions EN55022 Class A, 0.15 to 0.50MHz: <79dB (peak) or <66dB (mean)
IEC61000-6-4 / EN61000-6-4 0.50 to 30MHz: <73dB (peak) or <60dB (mean)
Radiated emissions (at 30m):
30 to 230MHz: <30dB
230 to 1000MHz: <37dB

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European Commission Directives

89/336/EEC Compliance with the European Commission
Electromagnetic Compatibility Directive is
demonstrated according to EN 61000-6-2 and
EN 61000-6-4.

73/23/EEC Compliance with the European Commission Low

Voltage Directive is demonstrated according to
EN 50178 and EN 60255-5.

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Appendix L
Symbols Used in Scheme Logic

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Symbols used in the scheme logic and their meanings are as follows:

Signal names
Marked with : Measuring element output signal
Marked with : Binary signal input from or output to the external equipment
Marked with [ ] : Scheme switch
Marked with " " : Scheme switch position
Unmarked : Internal scheme logic signal

AND gates

A A B C Output

B & Output 1 1 1 1

C Other cases 0

A A B C Output

B & Output 1 1 0 1
C Other cases 0

A A B C Output
B Output 1 0 0 1
&
C Other cases 0

OR gates

A
A B C Output
B ≥1 Output
0 0 0 0
C
Other cases 1

A A B C Output
B ≥1 Output 0 0 1 0
C Other cases 1

A A B C Output
B ≥1 Output 0 1 1 0
C Other cases 1

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Signal inversion
A Output
A 1 Output 0 1
1 0

Timer

t
Delayed pick-up timer with fixed setting
0
XXX: Set time
XXX

0
Delayed drop-off timer with fixed setting
t
XXX: Set time
XXX

t 0 Delayed pick-up timer with variable setting

XXX - YYY: Setting range
XXX - YYY

0 t Delayed drop-off timer with variable setting

XXX - YYY: Setting range
XXX - YYY

One-shot timer

A
A Output

Output
XXX - YYY

XXX - YYY: Setting range

Flip-flop
S R Output
S
0 0 No change
F/F Output
R 1 0 1
0 1 0
1 1 0
Scheme switch
A Switch Output
A Output
ON 1 ON 1
Other cases 0

Switch Output
+ Output
ON ON 1
OFF 0

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Appendix M
IEC60870-5-103: Interoperability

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IEC60870-5-103: Interoperability
1. Physical Layer
1.1 Electrical interface: EIA RS-485
Number of loads, 32 for one protection equipment
1.2 Optical interface
Glass fibre (option)
ST type connector (option)
1.3 Transmission speed
User setting: 9600 or 19200 bit/s
2. Application Layer
COMMON ADDRESS of ASDU
One COMMON ADDRESS OF ASDU (identical with station address)

3. IEC60870-5-103 Interface
3.1 Spontaneous events
The events created by the relay will be sent using Function type (FUN) / Information numbers
(INF) to the IEC60870-5-103 master station. 8 wide-use events are provided.
3.2 General interrogation
The GI request can be used to read the status of the relay, the Function types and Information
numbers that will be returned during the GI cycle are shown in the table below.
3.3 Cyclic measurements
The relay will produce measured values using Type ID=3 and 9 on a cyclical basis, this can be
read from the relay using a Class 2 poll. The rate at which the relay produces new measured
values is 2 seconds.
It should be noted that the measurands transmitted by the relay are sent as a proportion of either
1.2 or 2.4 times the rated value of the analog value. Either 1.2 or 2.4 can be selected by the
“IECNF∗” setting.
3.4 Commands
A list of the supported commands is contained in the table below. The relay will respond to
other commands with an ASDU 1, with a cause of transmission (COT) of negative
acknowledgement of a command.
3.5 Test mode
In test mode, both spontaneous messages and polled measured values, intended for processing in
the control system, are designated by means of the CAUSE OF TRANSMISSION ‘test mode’.
This means that CAUSE OF TRANSMISSION = 7 ‘test mode’ is used for messages normally
transmitted with COT=1 (spontaneous) or COT=2 (cyclic).
For details, refer to the standard IEC60870-5-103.

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3.6 Blocking of monitor direction

If the blocking of the monitor direction is activated in the protection equipment, all indications
and measurands are no longer transmitted.
For details, refer to the standard IEC60870-5-103.

4. List of Information

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List of Information
Type
INF Description Contents GI COT FUN
ID
Standard Information numbers in monitor direction
System Function
0 End of General Interrogation Transmission completion of GI items. -- 8 10 255
0 Time Synchronization Time Synchronization ACK. -- 6 8 255
2 Reset FCB Reset FCB(toggle bit) ACK -- 5 3 219
3 Reset CU Reset CU ACK -- 5 4 219
4 Start/Restart Relay start/restart -- 5 5 219
5 Pow er On Relay pow er on. Not supported

Status Indications
If it is possible to use auto-recloser, this item is set active, if 1, 7, 9, 11,
16 Auto-recloser active GI 1 219
impossible, inactive. 12, 20, 21
If protection using telecommunication is available, this item is set to
17 Teleprotection active Not supported
active. If not, set to inactive.
If the protection is available, this item is set to active. If not, set to 1, 7, 9, 12,
18 Protection active GI 1 219
inactive. 20, 21
1, 7, 11, 12,
19 LED reset Reset of latched LEDs -- 1 219
20, 21
Block the 103 transmission from a relay to control system. IECBLK:
20 Monitor direction blocked GI 1 9, 11 219
"Blocked" setting.
Transmission of testmode situation froma relay to control system.
21 Test mode GI 1 9, 11 219
IECTST: "ON" setting.
When a setting change has done at the local, the event is sent to
22 Local parameter Setting Not supported
control system.
1, 7, 9, 11,
23 Characteristic1 Setting group 1 active GI 1 219
12, 20, 21
1, 7, 9, 11,
24 Characteristic2 Setting group 2 active GI 1 219
12, 20, 21
1, 7, 9, 11,
25 Characteristic3 Setting group 3 active GI 1 219
12, 20, 21
1, 7, 9, 11,
26 Characteristic4 Setting group 4 active GI 1 219
12, 20, 21
27 Auxiliary input1 User specified signal 1 (Signal specified by IECB1: ON) (*1) GI 1 1, 7, 9 219
28 Auxiliary input2 User specified signal 2 (Signal specified by IECB2: ON) (*1) GI 1 1, 7, 9 219
29 Auxiliary input3 User specified signal 3 (Signal specified by IECB3: ON) (*1) GI 1 1, 7, 9 219
30 Auxiliary input4 User specified signal 4 (Signal specified by IECB4: ON) (*1) GI 1 1, 7, 9 219

Supervision Indications
32 Measurand supervision I Zero sequence current supervision GI 1 1, 7, 9 219
33 Measurand supervision V Zero sequence voltage supervision GI 1 1, 7, 9 219
35 Phase sequence supervision Negative sequence voltage supevision GI 1 1, 7, 9 219
36 Trip circuit supervision Output circuit supervision GI 1 1, 7, 9 219
37 I>>backup operation Not supported
38 VT fuse failure VT failure GI 1 1, 7, 9 219
39 Teleprotection disturbed CF(Communication system Fail) supervision Not supported
46 Group w arning Only alarming GI 1 1, 7, 9 219
47 Group alarm Trip blocking and alarming GI 1 1, 7, 9 219

Earth Fault Indications

48 Earth Fault L1 A phase earth fault (*2) GI 1 1, 7, 9 219
49 Earth Fault L2 B phase earth fault (*2) GI 1 1, 7, 9 219
50 Earth Fault L3 C phase earth fault (*2) GI 1 1, 7, 9 219
51 Earth Fault Fw d Earth fault forw ard (*2) (*3) GI 1 1, 7, 9 219
52 Earth Fault Rev Earth fault reverse (*2) (*3) GI 1 1, 7, 9 219

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Type
INF Description Contents GI COT FUN
ID
Fault Indications
64 Start/pick-up L1 A phase, A-B phase or C-A phase element pick-up GI 2 1, 7, 9 219
65 Start/pick-up L2 B phase, A-B phase or B-C phase element pick-up GI 2 1, 7, 9 219
66 Start/pick-up L3 C phase, B-C phase or C-A phase element pick-up GI 2 1, 7, 9 219
67 Start/pick-up N Earth fault element pick-up GI 2 1, 7, 9 219
68 General trip BO status specified by IECGT: ON (*1) -- 2 1, 7 219
69 Trip L1 BO status specified by IECAT: ON (*1) -- 2 1, 7 219
70 Trip L2 BO status specified by IECBT: ON (*1) -- 2 1, 7 219
71 Trip L3 BO status specified by IECCT: ON (*1) -- 2 1, 7 219
72 Trip I>>(back-up) Back up trip Not supported

73 Fault location X In ohms Fault location (prim. [ohm] / second. [ohm] / km selectable by IECFL) -- 4 1, 7 219

74 Fault forw ard/line Forw ard fault (*2) (for OC, EF, SEF) -- 2 1, 7 219
75 Fault reverse/Busbar Reverse fault (*2) (for OC, EF, SEF) -- 2 1, 7 219

76 Teleprotection Signal transmitted Carrier signal sending Not supported

77 Teleprotection Signal received Carrier signal receiving Not supported

78 Zone1 Zone 1 trip Not supported

79 Zone2 Zone 2 trip Not supported
80 Zone3 Zone 3 trip Not supported
81 Zone4 Zone 4 trip Not supported
82 Zone5 Zone 5 trip Not supported
83 Zone6 Zone 6 trip Not supported
84 General Start/Pick-up Any elements pick-up GI 2 1, 7, 9 219
85 Breaker Failure CBF trip or CBF retrip -- 2 1, 7 219
86 Trip measuring system L1 Not supported
87 Trip measuring system L2 Not supported
88 Trip measuring system L3 Not supported
89 Trip measuring system E Not supported
90 Trip I> Inverse time OC trip (OC1 trip) -- 2 1, 7 219
91 Trip I>> Definite time OC trip (OR logic of OC1 to OC3 trip) -- 2 1, 7 219

92 Trip IN> Inverse time earth fault OC trip (OR logic of EF1 and SEF1 trip) -- 2 1, 7 219

Definite time earth fault OC trip (OR logic of EF1 to EF3 and SEF1 to
93 Trip IN>> -- 2 1, 7 219
SEF3 trip)
Autoreclose indications
128 CB 'ON' by Autoreclose CB close command output -- 1 1, 7 219
CB 'ON' by long-time
129 -- 1 1, 7 219
Autoreclose
130 Autoreclose Blocked Autoreclose block GI 1 1, 7, 9 219

Note (*1): Not available if the setting is "0".

(*2): Not available when neither EF nor SEF element is used.
(*3): Not available when directional operate characteristic is not used.

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Type
INF Description Contents GI COT FUN
ID
IECG1
IECI1 User specified 1 Signal specified by IECE1: ON (*1) 2 1, 7 219
(yes/no)
IECG2
IECI2 User specified 2 Signal specified by IECE2: ON (*1) 2 1, 7 219
(yes/no)
IECG3
IECI3 User specified 3 Signal specified by IECE3: ON (*1) 2 1, 7 219
(yes/no)
IECG4
IECI4 User specified 4 Signal specified by IECE4: ON (*1) 2 1, 7 219
(yes/no)
IECG5
IECI5 User specified 5 Signal specified by IECE5: ON (*1) 2 1, 7 219
(yes/no)
IECG6
IECI6 User specified 6 Signal specified by IECE6: ON (*1) 2 1, 7 219
(yes/no)
IECG7
IECI7 User specified 7 Signal specified by IECE7: ON (*1) 2 1, 7 219
(yes/no)
IECG8
IECI8 User specified 8 Signal specified by IECE8: ON (*1) 2 1, 7 219
(yes/no)
Measurands(*4)
144 Measurand I Ib meaurand -- 3.1 2, 7 219
145 Measurand I,V Ib, Vab measurand -- 3.2 2, 7 219
146 Measurand I,V,P,Q Ib, Vab, P, Q measurand -- 3.3 2, 7 219
147 Measurand IN,VEN Ie, Ve measurand -- 3.4 2, 7 219
Measurand IL1,2,3, VL1,2,3,
148 Ia, Ib, Ic, Va, Vb, Vc, P, Q, f measurand -- 9 2, 7 219
P,Q,f
Generic Function
240 Read Headings Not supported
Read attributes of all entries of
241 Not supported
a group
243 Read directory of entry Not supported
244 Real attribute of entry Not supported
245 End of GGI Not supported
249 Write entry w ith confirm Not supported
250 Write entry w ith execute Not supported
251 Write entry aborted Not supported

Note (∗4): depends on relay model as follows:

Type ID=3.1 Type ID=3.2 Type ID=3.3 Type ID=3.4

Model (INF=144) (INF=145) (INF=146) (INF=147)
IL2 IL2 VL1-VL2 IL2 VL1-VL2 3-phase P 3-phase Q IN VEN
Model 110 0 0 0 0 0 0 0 Ie Ve
Model 400 Ib Ib Vab Ib Vab P Q Ie Ve
Model 420 Ib Ib Vab Ib Vab P Q Ie Ve

Type ID=9
Model (INF=148)
IL1 IL2 IL3 VL1 VL2 VL3 3-phase P 3-phase Q f
Model 110 0 0 0 0 0 0 0 0 0
Model 400 Ia Ib Ic Van Vbn Vcn P Q f
Model 420 Ia Ib Ic Van Vbn Vcn P Q f

Above values are normalized by IECNF∗.

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Type
INF Description Contents COM COT FUN
ID
Selection of standard information numbers in control direction
System functions

0 Initiation of general interrogation -- 7 9 255

0 Time synchronization -- 6 8 255

General commands
16 Auto-recloser on/off ON/OFF 20 20 219
17 Teleprotection on/off ON/OFF 20 20 219
18 Protection on/off (*5) ON/OFF 20 20 219
19 LED reset Reset indication of latched LEDs. ON 20 20 219
23 Activate characteristic 1 Setting Group 1 ON 20 20 219
24 Activate characteristic 2 Setting Group 2 ON 20 20 219
25 Activate characteristic 3 Setting Group 3 ON 20 20 219
26 Activate characteristic 4 Setting Group 4 ON 20 20 219

Generic functions
Read headings of all defined
240 Not supported
groups
Read values or attributes of all
241 Not supported
entries of one group

243 Read directory of a single entry Not supported

Read values or attributes of a

244 Not supported
single entry
General Interrogation of generic
245 Not supported
data
248 Write entry Not supported
249 Write entry w ith confirmation Not supported
250 Write entry w ith execution Not supported
251 Write entry abort Not supported

Note (∗5): While the relay receives the "Protection off" command, " IN SERVICE LED" is off.

Description Contents GRD140 supported Comment

Basic application functions

Test mode Yes
Blocking of monitor direction Yes
Disturbance data No
Generic services No
Private data Yes

M iscellaneous
Max. MVAL = rated value
Measurand
times
Current L1 Ia 1,2 or 2,4 IECNFI setting
Current L2 Ib 1,2 or 2,4 IECNFI setting
Current L3 Ic 1,2 or 2,4 IECNFI setting
Voltage L1-E Va 1,2 or 2,4 IECNFV setting
Voltage L2-E Vb 1,2 or 2,4 IECNFV setting
Voltage L3-E Vc 1,2 or 2,4 IECNFV setting
Active pow er P P 1,2 or 2,4 IECNFP setting
Reactive pow er Q Q 1,2 or 2,4 IECNFP setting
Frequency f f 1,2 or 2,4 IECNFf setting
Voltage L1 - L2 Vab 1,2 or 2,4 IECNFV setting

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[Legend]
GI: General Interrogation
Type ID: Type Identification (refer to IEC60870-5-103 section 7.2.1)
1 : time-tagged message
2 : time-tagged message with relative time
3 : measurands I
4 : time-tagged measurands with relative time
5 : identification
6 : time synchronization
8 : general interrogation termination
9 : measurands II
10: generic data
11: generic identification
20: general command
23: list of recorded disturbances
26: ready for transmission for disturbance data
27: ready for transmission of a channel
28: ready for transmission of tags
29: transmission of tags
30: transmission of disturbance values
31: end of transmission
COT: Cause of Transmission (refer to IEC60870-5-103 section 7.2.3)
1: spontaneous
2: cyclic
3: reset frame count bit (FCB)
4: reset communication unit (CU)
5: start / restart
6: power on
7: test mode
8: time synchronization
9: general interrogation
10: termination of general interrogation
11: local operation
12: remote operation
20: positive acknowledgement of command
21: negative acknowledgement of command
31: transmission of disturbance data
40: positive acknowledgement of generic write command
41: negative acknowledgement of generic write command
42: valid data response to generic read command
43: invalid data response to generic read command
44: generic write confirmation

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Appendix N
Inverse Time Characteristics

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IEC/UK Inverse Curves (NI) IEC/UK Inverse Curves (VI)

(Time Multiplier TMS = 0.1 - 1.5) (Time Multiplier TMS = 0.1 - 1.5)
100 100

10

10

Operating Time (s)

Operating Time (s)

TMS TMS

1.5 1 1.5
1.0
1.

0.5
0.5
1
0.2
0.1
0.2 0.1

0.1

0.1 0.01
1 10 100 1 10 100
Current (Multiple of Setting) Current (Multiple of Setting)

Normal Inverse Very Inverse

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IEC/UK Inverse Curves (EI)

(Time Multiplier TMS = 0.1 - 1.5)
1000

100

UK Inverse Curves (LTI)

(Time Multiplier TMS = 0.1 - 1.5)
1000

10
Operating Time (s)

100
Operating Time (s)

1
TMS

TMS
10 1.5

1.5 1.0

1.0
0.5

0.1 0.5
0.2
1
0.1
0.2

0.1

0.01 0.1
1 10 100 1 10 100
Current (Multiple of Setting) Current (Multiple of Setting)

Extremely Inverse Long Time Inverse

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IEEE Inverse Curves (MI) IEEE Inverse Curves (VI)

(Time Multiplier TMS = 0.1 - 1.5) (Time Multiplier TMS = 0.1 - 1.5)
100 100

10 10

Operating Time (s)

Operating Time (s)

TMS
TM
1.5
1 1
1.0 1.5

1.0
0.5
0.5

0.2

0.1 0.1 0.2

0.1
0.1

0.01 0.01
1 10 100 1 10 100
Current (Multiple of Setting) Current (Multiple of Setting)

Moderately Inverse Very Inverse

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IEEE Inverse Curves (EI)

(Time Multiplier TMS = 0.1 - 1.5)
100

10
Operating Time (s)

TMS

1.5
1.0
0.1
0.5

0.2

0.1
0.01
1 10 100
Current (Multiple of Setting)

Extremely Inverse

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US Inverse Curves (CO8) US Inverse Curves (CO2)

(Time Multiplier TMS = 0.1 - 1.5) (Time Multiplier TMS = 0.1 - 1.5)
100 10

10

1
TMS

Operating Time (s)

Operating Time (s)

1.5

1 1.0

TMS
0.5
1.5
0.1
1.0
0.2
0.1 0.5

0.1
0.2

0.1

0.01 0.01
1 10 100 1 10 100
Current (Multiple of Setting) Current (Multiple of Setting)

CO8 Inverse CO2 Short Time Inverse

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Appendix O
Ordering

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Ordering
Directional Overcurrent Relay A
GRD140

Type:
Directional Overcurrent Relay GRD140
Model:
-Model 110: Directional earth fault and directional 110
sensitive earth fault
-Model 400: Directional 3 phase + earth fault 400
-Model 420: Directional 3 phase + earth + sensitive earth 420
CT Rating:
1A 1
5A 2
Frequency:
50Hz 1
60Hz 2
DC auxiliary supply rating:
110V/125V 1
220V/250V 2
48V 3
Rear communication port:
RS485 1
Fibre optic 2
Dual RS485 3

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Version-up Records
Version Date Revised Section Contents
No.
0.0 Apr. 12, 2004 -- First issue
0.1 Apr. 23, 2004 2.1.2 Modified the description of sections 2.1.2.1 and 2.1.2.2.
2.1.3 Modified the description of sections 2.1.3.1 to 2.1.3.6.
2.1.8 Modified the description.
2.3 Modified the description.
2.5, 2.5.1 Modified the description.
3.3 Modified the descriptions of sections 3.3.3 and 3.3.4.
4.2.6.7 Modified the description.
0.2 Aug. 19, 2004 3.2.2 Modified the description.
Appendices Modified the Appendix K and M.
0.3 Sep. 01,2005 2.1.1.1 Modified the configurable curve setting range. (k and kr corrected.)
2.1.3.4 Modified the description of setting table.
2.1.6 Modified the description.
2.1.7 Modified the description.
3.3.6 Modified the description.
3.3.7 Modified Table 3.3.1.
4.2.6.8 Modified the description.
Appendices Modified Appendix M.

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