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204 Tutorial 2 Solution

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18 views

204 Tutorial 2 Solution

comp204 questions and answers

Uploaded by

cjhxh2z6nt
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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COMP204 Tutorial 2 Model Solutions Aug 2024

Computer Function and Interconnection

1. What general categories of functions are specified by computer


instructions?
Processor-memory: Data may be transferred from processor to memory or from
memory to processor.
Processor-I/O: Data may be transferred to or from a peripheral device by transferring
between the processor and an I/O module.
Data processing: The processor may perform some arithmetic or logic operation on
data.
Control: An instruction may specify that the sequence of execution be altered.

2. List and briefly define the possible states that define an instruction
execution.
Instruction address calculation (iac): Determine the address of the next instruction to
be executed.
Instruction fetch (if): Read instruction from its memory location into the processor.
Instruction operation decoding (iod): Analyze instruction to determine type of
operation to be performed and operand(s) to be used.
Operand address calculation (oac): If the operation involves reference to an operand
in memory or available via I/O, then determine the address of the operand.
Operand fetch (of): Fetch the operand from memory or read it in from I/O.
Data operation (do): Perform the operation indicated in the instruction.
Operand store (os): Write the result into memory or out to I/O.

3. List and briefly define two approaches to dealing with multiple interrupts.
(1) Disable all interrupts while an interrupt is being processed.
(2) Define priorities for interrupts and to allow an interrupt of higher priority to cause a
lower-priority interrupt handler to be interrupted.

4. What types of transfers must a computer’s interconnection structure (e.g.,


bus) support?
Memory to processor: The processor reads an instruction or a unit of data from
memory.
Processor to memory: The processor writes a unit of data to memory.
I/O to processor: The processor reads data from an I/O device via an I/O module.
Processor to I/O: The processor sends data to the I/O device.
COMP204 Tutorial 2 Model Solutions Aug 2024

I/O to or from memory: For these two cases, an I/O module is allowed to exchange
data directly with memory, without going through the processor, using direct memory
access (DMA).

5. List and briefly define the QPI protocol layers.


Physical - Consists of the actual wires carrying the signals, as well as circuitry and
logic to support ancillary features required in the transmission and receipt of the 1s and
0s.
Link - Responsible for reliable transmission and flow control.
Routing - Provides the framework for directing packets through the fabric.
Protocol - The high-level set of rules for exchanging packets of data between devices.

6. List and briefly define the PCIe protocol layers.


Physical - Consists of the actual wires carrying the signals, as well as circuitry and
logic to support ancillary features required in the transmission and receipt of the 1s and
0s.
Data link - Is responsible for reliable transmission and flow control.
Transaction - Generates and consumes data packets used to implement load/store
data transfer mechanisms and also manages the flow control of those packets
between the two components on a link.
7. Answer:
a. 2^(32-8) = 2^24 = 16,777,216 bytes = 16 MB ,(8 bits = 1 byte for the opcode)
b. 1. A 32-bit local address bus and a 16-bit local data bus.
Instruction and data transfers would take three bus cycles each, one for the
address and two for the data. Since if the address bus is 32 bits, the whole
address can be transferred to memory at once and decoded there; however,
since the data bus is only 16 bits, it will require 2 bus cycles (accesses to
memory) to fetch the 32-bit instruction or operand.
2. A 16-bit local address bus and a 16-bit local data bus.
Instruction and data transfers would take four bus cycles each, two for the
address and two for the data.
c. The program counter must be at least 24 bits. Typically, a 32-bit microprocessor
will have a 32-bit external address bus and a 32-bit program counter.
If the instruction register is to contain the whole instruction, it will have to be 32-
bits long.
COMP204 Tutorial 2 Model Solutions Aug 2024

8.
Memory CPU Memory CPU
Registers Registers
300 3005 300 PC 300 3005 301 PC
301 5940 AC 301 5940 0003 AC
302 7006 3005 IR 302 7006 3005 IR
I/O Devices I/O Devices
940 0002 005 0003 940 0002 005 0003
941 006 941 006

Memory CPU Memory CPU


Registers Registers
300 3005 301 PC 300 3005 302 PC
301 5940 0003 AC 301 5940 0005 AC
302 7006 5940 IR 302 7006 5940 IR
I/O Devices I/O Devices
940 0002 005 0003 940 0002 005 0003
941 006 941 006
Memory CPU Memory CPU
Registers Registers
300 3005 302 PC 300 3005 303 PC
301 5940 0005 AC 301 5940 0005 AC
302 7006 7006 IR 302 7006 7006 IR
I/O Devices I/O Devices
940 0002 005 0003 940 0002 005 0003
941 006 941 006 0005

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