2019 4th International Conference on Recent Trends on Electronics, Information, Communication & Technology (RTEICT-2019), MAY 17th &

18th 2019

Implementing Image Processing Algorithms using

Xilinx System Generator with Real Time
Constraints
Bhagyashree Shridhar Durgakeri Chiranjeevi G.N.
Student, Department of Electronics and Communication Engineering Assi.Professor, Department of Electronics and Communication
PES University, Electronic City Campus Engineering
Bangalore, India PES University, Electronic City Campus
[email protected] Bangalore, India
[email protected]

Abstract— Image Processing is used to modify pictures to substantially greater performance than programmable DSPs
improve their quality and extract structured information. The [8]. There are lot of challenges when hardware and software
need to process them in real time has lead to implement them are designed separately. With different teams involved in
in hardware. To implement image processing algorithms using
hardware and software design we may end up in developing
high level languages requires thousands of lines of code which is
inefficient as it takes more time. Alternate solution is using Xilinx different test bench which may not map correctly. The
System Generator, which is a modeling tool where design is difference between fixed point and floating point implantation
captured by using xilinx blockset from library environment. The is another concern. It is hard to verify the operations on chip
main advantage of system generator is Xilinx blocksets provide against the algorithm specification. In addition the merger can
close integration with MATLAB Simulink that helps in co- be difficult if we purchase from different vendors because of
simulating FPGA module with pixel vector provided by version change. So a model based approach has been suggested
MATLAB Simulink blocks. The image analysis plays an
important role in medical imaging. This paper provides image which provides a platform for design, simulate and validation of
analysis of a CT scan image. The algorithms are performed on an algorithm and system model in MATLAB and Simulink. There
image to extract significant features such as image enhancement, are number of well defined processes which go to make up a
contrast stretching, negative of image, image segmentation and typical image application. Acquisition, Enhancement,
detecting the edges for a CT scan image. The area and power Restoration, Segmentation and Analysis are the steps needed by
parameters are evaluated using reconfigurable platform -Artix-7 just about every application which involves image processing
FPGA.
[7].
Keywords— Xilinx System Generator, FPGA, Xilinx block- sets,
Simulink, Image processing II. LITERATURE SURVEY

I. INTRODUCTION The basic algorithms of image processing have been im-

plemented on some random images. Matthew Ownby, Dr.
Image processing is the analysis of digitized image in Wagdy, H. Mahmoud worked on DSP applications. This
order to improve the quality of image. The implementation paper gave a brief description of using the DSP algorithms
of algorithms in real time is a tedious process as it involves using MATLAB and Xilinx Systtem Generator [1]. Ankita
writing codes of thousand lines. The processing of image Gupta, Himanshu Vaishnav, Himanshu Garg gave a
in real time means implementing them on hardware which fundamental idea of point processing algorithms. The paper
is inefficient as it takes much time with these high level presents an efficient architecture for various image
language codes. Instead a block presentation of components processing application such as brightness correction, image
for the algorithms is defined and is fed to the Xilinx negative, edge detection, range highlighting, contrast
blocksets. Once the algorithm meets its agenda it can be stretching etc. [2]. Mohammed Alareqi, R. Elgouri, M.
dumped on FPGA hence its takes less time. Xilinx System Tarhda, K. Mateur presented the design and the
Generator is a tool which is used to analyze the design, implementation of real-time hardware enhancement digital
design the design and check the design. FPGA takes only image processing techniques for biomedical applications in a
fixed points as a result floating point processing is a spatial domain on FPGA. These techniques are applied to
difficult task but the Xilinx blocksets make this process easy the hand image with veins using Open Access Biomedical
and hence an image processing algorithm can be easily Image Search Engine. The result shows the brightness
implemented on FPGA. FPGAs provide a better platform for controlling addition technique provides better enhancement
real-time algorithms on application-specific hardware with of a biomedical image. The purpose of this work is to

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 achieve a real time hardware implementation with higher B. Algorithms performed on Image
execution in both size and speed [3]. Deepesh Prakash
Guragain, Pramod Ghimire, Kapil Budhathoki whose paper In order to reduce the processing, the analysis for an
provides the method of image processing using Xilinx image is performed with respect to a grayscale image. Set of
algorithms are performed on image such as enhancement,
System Generator. Xilinx System Generator has necessary
libraries to assist various types of algorithms. It is integrated image negative, contrast stretching, image segmentation,
edge detection.
with MATLAB Simulink environment in this work. Model
based design approach is used to imple- ment various kinds 1) Image Enhancement: Enhancement is performed to
of image processing algorithms. Hardware co-simulation is in- crease the quality of image by manipulating the
done to verify the results [4]. Maleeha Kiran, Kan Mei War, pixels of the image. In order to get brighter image, a
Lim Mei Kuan, Liang Kim Meng, Lai Weng Kin suggested a constant factor is added to the present pixel while if
paper that gives an overview of different languages and the an image has to be moved towards the darker shade a
comparison between different coding styles performed. The constant is subtracted from present pixel. It finds
results obtained indicated that the processing speed of the large application in medical imaging as particular
component was constantly faster on the FPGA platform as region has to be enhanced for proper analysis.
compared to MATLAB or C++ environment [5]. Ravi S., 2) Image negative: Image negative is an important
Abdul Rahim B. and Fahimuddin Shaik proposed system for algorithm through which individual information can
edge detection using canny algorithm, canny edge detection be extracted to greater extent. Image negative is
can produce good detection of the edge with the thin and performed by just inverting the image by subtracting
smooth edges its very useful for further study of image from maximum pixel value in grayscale.
segmentation [9]. 3) Contrast stretching: Contrast stretching is the
distribution of pixel intensity for entire range in
III. METHODOLOGY defined scale. In histogram, some regions are defined
for range of intensity but for processing an image it is
The method of processing an image needs to be imple- required to extend the range.
mented in hardware in order to get a detailed view with 4) Image segmentation: Segmentation is the process of
regard to the real-time applications. FPGA implementation separating the foreground and background from the
can be performed using Matlab/Simulink and Xilinx System image. There are different methods defined for image
Generator (XSG) tool which involves set of processing to segmentation, however background subtraction is an
be performed on image. The main tasks include: Capturing important method. For detailed analysis of organs in
the image, pre processing the image, algorithm definition medical field, it is required to perform
on image, post processing and display of image. Once the segmentation.
result is obtained in MATLAB, the algorithm is implemented 5) Edge detection: Detecting edges indicate the
using Vivado to get the power and area requirement for each prominent bones and also a particular region
algorithm. boundary based on threshold defined on the image.
Edge detection algorithms are widely used in
A. Image pre processing stage medical imaging.
Figure 1 gives block diagram of pre-processing stage. The C. Image post-processing stage
pre processing of image is the basic task to be per- formed as
FPGA deals with fixed point processing. The image has to be
converted from 2D to 1D form so that matrix form is
converted to text form. Frame conversion blockset is added to
increase the throughput. However the usage of it is not
mandatory. The next step is to unbuffer the data as input to Figure 2 Post processing stage
gateway in block. The gateway in a block which inputs
converted data to FPGA.
Figure 2 gives the block diagram of post-processing stage.
After performing a set of tasks on image in fixed point form,
its required to convert the result to 2D to display the image.
The data conversion is performed on the result to get uint8
image. It is then buffered to form a text and is converted back
to 2D and the result is displayed. The pins in and out are
Figure 1 Pre processing stage created as a result of subsystem defined for the processing
stages.

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D. Xilinx System Generator (XSG)
Xilinx System Generator is a tool used to design, analyze
and target the design. It is the design methodology for
creating DSP designs targeted for FPGA. It unifies
MATLAB and Xilinx ISE suite. The design flow of XSG is
as follows: Develop an executable simulink design and add
the system generator icon. The system generator will
automatically generate the RTL using Xilinx Core
Generator and test bench for the created simulink design. It
will automatically generate the .ucf and thus helps in testing
the algorithm. The System Generator block defines which Figure 4 Image Negative
type of FPGA board will be used, as well as provide several
additional options for clock speed, compilation type and C. Contrast Stretching
analysis [2]. Figure 5 gives the result of contrast stretching. In contrast
stretching the image that is restricted to certain intensity
E. Vivado Implementation band is made to spread through entire range of intensity
The obtained file from XSG can be synthesized and scale. Contrast stretching is performed using a set of adder,
implemented to get the power and area utilization report. The scaling factor and few constant terms. Minute human organs
obtained bit file is dumped on to FPGA to get the output, that are not recognized easily can undergo contrast
thus implanting in real time. In order to implement the design stretching.
it is required to add .ngc file in addition to design file. The
System Generator token available along with Xilinx has to
be configured to MATLAB. This result in addition of Xilinx
Block set to the MATLAB Simulink environment which can
be directly utilized for building algorithmic model [8]

IV. MATLAB SIMULATION RESULTS

A. Image Enhancement
Figure 3 gives the image enhancement result. Image
enhancement is performed to enhance and sharpen the image
features in order to have more information about the image. Figure 5 Contrast Stretching
The algorithm is performed using blocksets such as an adder,
a constant (20). The constant value is added to the image D. Image Segmentation
pixels to obtain the output image pixels.
Figure 6 gives the output image for background
subtraction. Image segmentation is an important analysis
that is performed mainly to detect the boundaries. However
the analysis is difficult because of variations in images. The
segmentation performed is background subtraction method
in which subtraction of two successive frames is considered.
For example a normal image when is subtracted from
another image it can be easily recognized that a defect is
detected if the two images does not match in terms of error.

Figure 3 Image Enhancement

B. Image Negative
. Figure 4 is image negative output. Image negative is an
important feature in medical image as it is possible to detect
the tumors. Image negative is performed just by inverting a
grayscale image. The input image pixels are subtracted from Figure 6 Background Subtraction
maximum grayscale value to obtain output image pixels.

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E. Edge Detection using Canny filter role in area measurement. The total on-chip power for this
Figure 7 is the result of edge detection using canny filter. algorithm is 0.08W.
Edge detection is detecting the edges in an image. The
performance in edge detection varies based on type of filter B. Image Negative
used. The canny filter is more accurate in detecting the edges
that form the boundary while sobel filter detects the edges that
are prominent inside an edge boundary as well. The threshold
value is defined to get the result based on organ features to
be identified.

Figure 10 Synthesis Report

Figure 7 Edge Detection using Canny filter with threshold 0.30 Figure 11 Implementation Report

V. VIVADO IMPLEMENTATION REPORT Figures 10 and 11 give synthesis and implementation

report for image negative. Image Negative algorithm uses 8-
The generated design and test bench files are simulated bit input and a control pin to get a 8-bit output. The number
using vivado and the synthesis, implementation reports are of LUT’s used for the algorithms is 39 and one flip-flop is
obtained which gives power and area estimation for each used for synchronization. These number play an important
algorithm. Hence with this report its possible to get the real role in area measurement. The total on-chip power for this
time implementation of algorithms without any errors. The algorithm is 0.08W.
following figures are the results obtained using Artix-7
FPGA. C. Contrast Stretching

A. Image Enhancement

Figure 12 Synthesis Report

Figure 8 Synthesis Report

Figure 13 Implementation Report

Figures 12 and 13 give synthesis and implementation

Figure 9 Implementation Report report for contrast stretching. Image Contrast algorithm uses
8-bit input and a control pin to get a 8-bit output. The
number of LUT’s used for the algorithms is 39 and one flip-
Figures 8 and 9 give synthesis and implementation report flop is used for synchronization. These number play an
for image enhancement. Image Enhancement algorithm uses important role in area measurement. The total on-chip
8-bit input and a control pin to get a 8-bit output. The number power for this algorithm is 0.087W.
of LUT’s used for the algorithms is 39 and one flip-flop is
used for synchronization. These number play an important

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 D. Image Segmentation defected and normal region of interest so that understanding
of exact problem can be picturised easily.

FUTURE SCOPE

Image analysis is not only restricted to above implemented

algorithms, there are morphological algorithms that are per-
Figure 14 Synthesis Report formed on region of interest so that a detailed understanding
is performed. In this paper the human brain is taken into con-
sideration however it can be extended to all CT scan images
thus getting detailed information about region of interest. The
similar analysis is performed for other algorithms to generate
power and area report. The hardware is chosen based on user
requirements and constraints.

Figure 15 Implementation Report REFERENCES

[1] Matthew Ownby and Dr. Wagdy H. Mahmoud, A Design Methodology
for Implementing DSP with Xilinx@ System Generator for Matlab@ in
proceedings of IEEE, 0-7803-7339-1/02/2002.
Figures 14 and 15 give synthesis and implementation [2] Ankita Gupta, Himanshu Vaishnav, Himanshu Garg, Image Processing
report for image segmentation using background subtraction. using Xilinx System Generator (XSG) in FPGA, IJRSI, Volume II, Issue
IX, September 2015, ISSN 2321 2705.
Background Subtraction algorithm uses two 8-bit input ports
and a control pin to get a 8-bit output. The number of LUT’s [3] Mohammed Alareqi, R. Elgouri, M. Tarhda and K. Mateur, Design and
FPGA Implementation of Real-Time Hardware Co-Simulation
used for the algorithms is 21 and one flip-flop is used for
International Journal on Electrical Engineering and Informatics -
synchronization. These number play an important role in area Volume 7, Number 4, Desember 2015.
measurement. The total on-chip power for this algorithm is
[4] Deepesh Prakash Guragain, Pramod Ghimire and Kapil Budhathoki,
0.09W. Implementation of FPGA Based Image Processing Algorithm Using
Xilinx System Generator, International Research Journal of Engineering
Table 1 Comparison based on Hardware Used
and Technology (IRJET), Volume: 05 Issue: 01 — Jan-2018, e-ISSN:
2395-0056.
Algorithms
Hardware Image Contrast Image [5] Maleeha Kiran, Kan Mei War, Lim Mei Kuan, Liang Kim Meng and Lai
Used Image Weng Kin, Implementing image processing algorithms using Hardware in
Enhancem Stretching Segmentat
Negative
ent ion the loop approach for Xilinx FPGA, IEEE Xplore Electronic Design,
2008.
Power (W) 0.08 0.08 0.087 0.09
[6] Xilinx System Generator User Guide
Artix-7
[7] Alareqi Mohammed, Elgouri Rachid and Hlou Laamari, ” High Level
Area* 39 36 39 21 FPGA Modeling for Image Processing Algorithms Using Xilinx System
Generator ”. International Journal of Computer Science and Telecom-
Virtex-7 munications, Volume 5, Issue 6, June 2014.
Power(W) 0.078 0.076 0.087 0.09
[8] Ms.Dipikas.Warkar and Dr.U.A.Kshirsagar ”FPGA Implementation of
Point Processing Operation using Hardware Simulation”, International
Area* 21 20 39 21 Journal of Advanced Research in Computer and Communication Engi-
neering Vol. 4, Issue 4, April 2015.
*Area in terms of LUTs utilisation [9] A. R. S. Ravi.S, ”FPGA Based Design and Implementation of Image
Edge Detection Using Xilinx System Generator,” International Journal
CONCLUSION of Engineering Trends and Technology (IJETT), vol. 4, no. 10, pp. 4657-
4660, Oct 2013.
This paper mainly describes the algorithms for medical [10] S. S. D. Praveen Vanaparthy, ”FPGA Implementation of Image Enhance-
imaging. The recognition of tumours is an important aspect in ment Algorithms for Biomedical Image Processing,” International Jour-
medical field. This paper describes few algorithms that help nal of Advanced Research in Electrical, Electronics and Instrumentation
in detection of tumours and gives a significance description. Engineering , vol. 2, no. 11, pp. 5747 - 5753, November 2013.
The report of power and area utilization used to implement
them in real time. The hardware employed in this paper is a
Artix-7 and Virtex-7 FPGA. The analysis is performed with

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