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FET6 MOSCAPs CVAnalysis Current

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11 views15 pages

FET6 MOSCAPs CVAnalysis Current

Uploaded by

Tarun Pratap Singh
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Electronic Devices

MOSCAPs

BITS Pilani, K K Birla Goa Campus


Small Signal CV of MOSCAPs

BITS Pilani, K K Birla Goa Campus


MOS C-V analysis

CV is very sensitive to any variation in charges → ideal analysis tool


What factors can we find out?
1. Oxide thickness
2. Substrate doping ?
3. Flat band voltage ?
4. Threshold Voltage?
5. Fixed charge density ?
6. Fast interface trap density?
7. Mobile charge density ?
BITS Pilani, K K Birla Goa Campus
Oxide charges and CV of MOSCAPs

CV with fixed oxide charge CV with interface charges

BITS Pilani, K K Birla Goa Campus


MOS C-V analysis: 5. Fast Interface trap density
Interface states → distributed over 𝐸𝑔 at the interface
Any states with energy below the 𝐸𝐹 → filled with electron
Any states above the 𝐸𝐹 → empty
As 𝑉𝐺 is varied → the energy bands will bend while 𝐸𝐹 remains unchanged → states
will be charged/discharged with 𝑉𝐺 → a capacitor in parallel to the 𝐶𝑑

𝐸𝐶 𝐸𝐶

𝐸𝐹 𝐸𝐹
𝐸𝑉 𝐸𝑉
O S O S
BITS Pilani, K K Birla Goa Campus
MOS C-V analysis: 6. Fast Interface trap density

What are fast interface states? The interface states that can change their ionization
relatively fast as compared to the applied ac gate
voltage → can be detected !!
Effect observed in low frequency CV C
Low frequency

1 𝐶𝑖 𝐶𝐿𝐹 𝐶𝑖 𝐶𝐻𝐹
𝐷𝑖𝑡 = − 𝑐𝑚−2 𝑒𝑉 −1
𝑞 𝐶𝑖 − 𝐶𝐿𝐹 𝐶𝑖 − 𝐶𝐻𝐹
Difference gives 𝐶𝐿𝐹
𝐷𝑖𝑡 High frequency
𝐶𝐻𝐹
VG
BITS Pilani, K K Birla Goa Campus
MOS C-V analysis: 7. Mobile charge density

These are the mobile ionic charges → can move in presence of electric field →
situation gets worst at high temperatures due to increased movement

Bias Temperature Stress test is used to measure the mobile charges


1. Heat the device (∼200-300 °C)
2. Apply a bias on the gate
3. Cool the capacitor to room temperature and do a CV measurement

BITS Pilani, K K Birla Goa Campus


MOS C-V analysis: 7. Mobile charge density
Positive Bias Temperature Stress Negative Bias Temperature Stress
1. Heat the device (∼200-300 °C) 1. Heat the device (∼200-300 °C)
2. Apply a positive bias on the gate 2. Apply a positive bias on the gate
3. CV measurement at room temperature 3. CV measurement at room temperature

BITS Pilani, K K Birla Goa Campus


MOS C-V analysis: 7. Mobile charge density

+ −
𝑄𝑚 = 𝐶𝑖 (𝑉𝐹𝐵 − 𝑉𝐹𝐵 )
BITS Pilani, K K Birla Goa Campus
Time dependent capacitance measurement

Till now, we were focusing on the frequency of the small ac signal


Let us now see how the sweep rate of the dc gate voltage can affect the CV

Let us say for this case we sweep dc gate voltage


from accumulation to depletion at a very fast rate
M O S
+Q
dQ
Deep Depletion Wd,max

-qNA Fast
Qinv
Slow Speed of
operation
BITS Pilani, K K Birla Goa Campus
Time dependent capacitance measurement

Used to determine the lifetime of the minority


carriers → Zerbst technique
The gate voltage is abruptly switched from
accumulation to depletion mode
→ Device enters the deep depletion mode
→ Minority carriers are slowly generated
according to the minority carrier lifetime
→ The depletion width slowly collapses to
the theoretical maximum
The 𝐶 − 𝑡 data provides information on 𝜏
BITS Pilani, K K Birla Goa Campus
The current-voltage characteristics of MOS
Ideally no current should flow → gate oxides are thin and sustain high electric fields

Case 1: Gate oxide is thick enough to restrict any tunneling from gate to
substrate
The bending can be sharp near the gate metal-oxide
interface → possible tunneling
→ Electron enters the 𝐸𝐶 of oxide → further transport within
the oxide is known as “hopping”
→ This transport model is known as Fowler Nordheim (FN)
tunneling
2 𝐵 𝐵 depends on barrier
𝐼𝐹𝑁 ∝ 𝐸𝑜𝑥 exp −
𝐸𝑜𝑥 height and 𝑚𝑛∗
BITS Pilani, K K Birla Goa Campus
The current-voltage characteristics of MOS
Case 2: Gate oxide is thin
Electron can tunnel directly to the semiconductor
→ “Direct Tunneling”

Overall physics is similar in FN and direct tunneling, the


only difference being
FN → triangular barrier
Direct → trapezoidal barrier

BITS Pilani, K K Birla Goa Campus


The high-𝜅 oxides

As MOSFET technology progresses, the gate capacitance is required to be higher to


achieve high drain currents → thinner oxides → more probable tunneling
Solution: Use of oxides with high dielectric constant or high-𝜅 oxides → similar
capacitance for higher thickness → reduced tunneling probability
Hafnium di oxide (HfO2) is commonly used

BITS Pilani, K K Birla Goa Campus


Time Dependent Dielectric Breakdown
Prolonged charge transport through the oxide/dielectric → can lead to oxide
breakdown or failure
One such process is through avalanche and tunneling
positive feedback
• Tunneled electron → high energy → hot e-
→ impact ionization → separation of charged in the
applied electric field
→ Very low mobility → charge trapping at defect sites
→ modulates energy barrier → enhances tunneling →
enhances impact ionization (positive feedback)

BITS Pilani, K K Birla Goa Campus

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