DIGITAL ELECTRONICS & COMPUTER ORGANIZATION

For

Bachelor of Computer Applications

Module Manual

Instructors:
Prof. Shweta Kumar/Dr. Vidushi Singh
[email protected]/[email protected]

Second Semester
Session 2023-24
Sections (A, B, C, D, E, F, G)

@Institute of Technology and Science

 Index

S. No. Contents

1 Module Descriptor

2 Introduction and Learning Objectives

3 Mode of Assessment

4 University Syllabus

5 Module Format

6 Suggested Readings

7 Key Dates

8 Lecture Timetable and Pedagogy

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1. Module Descriptor:

Module Title: Digital Electronics & Computer Organization

Academic Year: 2024 Total Sessions: 32

Time (Per Lecture): 55 minutes Paper ID: BCA-204

Semester: II

2. Introduction/ Description:
The digital techniques and systems are tremendously seen in a wide variety of
applications like computers, microprocessors, household appliances etc and also
increasing at a great pace. The emergence of various programmable logic devices has
resulted in significant changes in the design methodologies of digital systems. Thus, it is
essential to have a strong foundation of the basic digital techniques for making effective
use of automation in digital design and therefore is the importance of this course.

Course Objective:

 To familiar the students about the basic concepts used in the design and analysis
of digital systems.
 To introduces the concepts of digital computer organization.
 To understand the concepts of how does computer works and how are they made.

Learning Objectives:

After taking this subject, the students should be able to:

 Understand how are computer made and how does it works.
 Learnt about the various methods and techniques suitable for a variety of digital
systems design applications.
 Learns various aspects of Logic gates, circuit designing, combinational circuits,
sequential circuits and memory organizations would be able to understand the
application of digital electronics in real world.

3. Mode of Assessment:

A Internal Examinations Duration (Mins)

First (Written) 90 min

Second(Written) 120 min

B Continuous Class assessment Assignments, Quizzes, Class Test & Presentations

Marks for attendance are strictly based upon actual

C Attendance
presence in class.

TOTAL (A+B+C) 25 Marks

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 PO1 : Students will be Able to Understand and apply mathematical foundation, computing and domain
knowledge to solve complex computing problems
PO2: Students will be Able to understand the nature, scope and application of computer and computer
languages.
PO3: Students will be Able to develop essential skills to create interactive software as demanded by the
global software industry.
PO4: Students will be able to develop Professional ethics and human values to serve the society.
PO5: Students will be Able to Develop Leadership skills and communicate effectively with the
computing community as well as society.

Code Course Name Course Objectives

BCA-204 Digital Electronics CO1: To introduce basic postulates of Boolean algebra and shows the
& Computer correlation between Boolean expressions
Organization CO2: To outline the formal procedures for the analysis and design of
combinational circuits
CO3: To introduce the concept of computer memories
C04: To outline the formal procedures for the analysis and design of
sequential circuits
CO5: To study the hierarchical memory system including cache
memories and virtual memory.

CO- PO Mapping for BCA 106

On scale of 1-3
Level 3: Substantially (High), Level 2: Moderately (Medium), Level 1: Slightly
(Low)
Course Code CO/PO PO1 PO2 PO3 PO4 PO5
CO1 2 1
CO2 2 1
CO3 1
BCA- 106
CO4 2 1
CO5 1 1
Average 1.4 1 1

4.University Prescribed Syllabus:

Digital Electronics & Computer Organization

UNIT-I
Logic gates and circuit, Gates (OR, AND, NOR, NAND, XOR & XNOR), Demorgan’s laws,
Boolean laws, Circuit designing techniques (SOP, POS, K-Map) .

UNIT-II
Combinational Building Blocks, Multiplexers, Decoder, Encoder, Adder and Subtractor.

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UNIT-III
Memories: ROMs, PROMs, EPROMs, RAMs, Hard Disk, Floppy Disk and CD-ROM.

UNIT-IV
Sequential Building Blocks, Flip-Flop (RS, D, JK, Master-slave & & T flip-flops), Registers
& Shift registers, Counters, Synchronous and Asynchronous Designing method.

UNIT-V
Memory Organization: Basic cell of static and dynamic RAM, Building large memories using
chips, Associative memory, Cache memory organization and Virtual memory organization.

4. Module Format:

This module is taught via a series of lectures, case studies, Brainstorming, real life examples.
In addition to lectures, students are expected to have read the chapters from the required text.

5. Suggested Reading:

1) Digital Logic and Computer design (PHI) 1998: M.M. Mano

2) Computer system Architecture (PHI) third edition 2007: M.M. Mano
3) 3. Digital Design and Computer Organisation (University Science Press) 2009: Dr.
Nasib S. Gill, J.B Dixit
4) Digital Electronics (Oxford university Press) 2010: G.K Kharate
5) Digital Electronics (Umesh Publications) 2009: P. Raja

Other Reading:

1) Digital Electronics (TMH) 1998: Malvino and Leach

2) Computer Organization and Architecture: William Stallings
3) Digital fundamentals (Universal Book Stall) 1998: Floyd, L.Thomas
4) Computer Organization (MC Graw-Hill, Signapore): Hamcher, Vranesic and Zaky 5.
An Introduction to digital Computer design (fourth Edition) (PHI): V. Rajaraman

Student could also refer Internet for tutorial, handouts, test series and other related course
material. There are numbers of web portals where you can find the material. Some of them
are listed below:
1) Tutorial for Boolean algebra and combinational circuits
http://www.asic-world.com/digital/tutorial.html
2) K-map tutorial http://people.exeter.ac.uk/mmaziz/ecm1106/tutorial_kmaps.pdf
3) Notes for Digital Electronics
www.watson.ibm.com/leo/introelect/IntroElectro_handout.pdf
http://smendes.com/el10b/lectures.html,zebu.uoregon.edu/~rayfrey/432/
DigitalNotes.pdf
4) Test Series for Digital electronics
http://www.indiabix.com/digital-electronics/questions-and-answers/

6. Key Dates:

Assignments Details of Assignments Submission Deadline

1 Logic Gates, Boolean Laws and K-maps(Unit-1) Third Week of February, 2024

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 2. Multiplexes; Decoder; Encoder; Adder and First Week of March, 2024
Subtractor, Flip Flop, counters (Unit-2)

3. Flip Flop, counters (Unit-4) Fourth Week of March, 2024

4. Memories and its organisation (Unit- 3,5) Third Week of April, 2024

Model Question paper/Question Bank After completion of each unit

Unit wise Quiz on Google Form After completion of each unit

Class tests Two Surprise Tests

Guest To be informed Later Date will be informed

Lecture

7. Lecture Plan:

Essential Reading
S.No Lecture Pedagogy Details
Topic
No
Introduction to digital An Introduction to
electronics, Digital Digital Computer
1 1 Discussion -
systems and its Design(fourth
application areas Edition) (PHI):
V.Rajaraman pg:3-5

UNIT-I
Digital Electronics
Logic gates and circuit : Through
2 2 Lecture (Oxford
Introduction LCD
university Press) 2010:
Projector
G.K Kharate pg:129
Gates (OR, AND,
Digital Electronics
NOR): Truth table, Designing, Board and
3 3 (Oxford
logic diagram, Boolean Illustrations, Marker
university Press) 2010:
expression
G.K Kharate pg:131
NAND, XOR & Digital Electronics
XNOR: Truth table, Designing, Board and
4 4,5 (Umesh
logic diagram, Boolean Illustrations, Marker
expression Publications) 2009:
P.Raja
pg: 91
Digital Design and
Boolean laws: Board and Computer
Postulates and Marker Organisation (University
5 6,7 Lecture
Theorem, Demorgan’s Science Press) 2009:
law , Associative laws Dr. Nasib S. Gill, J.B
Dixit pg: 75-87

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 Circuit designing
techniques: Sum of Board and Digital Electronics
Products(SOP), Marker
6 8,9 Lecture (Umesh
Product of Sum(POS),
Minterms and Publications) 2009:
Maxterms P.Raja
pg: 91, 112
Designing, Board and Digital Electronics
Karnaugh Map Illustrations, Marker
7 10,11 (Oxford University
(K-Map) Problem
Press) 2010: G.K
solving
Kharate pg:145
Discussion of Note: Question bank-
Discussion & Board and
Previous year Marker unit 1 is already
8 12 Problem
question paper- given as
solving
Unit 1 Assignment 1 and
solutions to be
discussed in this
lecture

UNIT-II Through Digital Logic and

Combinational LCD Computer design (PHI)
Building Blocks: Projector 1998 : M.M. Mano pg:
9 Difference between 13 Lecture 175
Sequential and
Combinational Logic

Mind Maps,
Lecture, through Digital Logic and
10 Multiplexer 14 Designing, LCD Computer
Illustrations Projector, design (PHI) 1998 :
M.M.
Mind Maps, Digital Logic and
Lecture, through LCD Computer design
11 Decoder 15 Designing, Projector,
Illustrations, (PHI) 1998 : M.M.
Mano pg: 167
CLASS TEST 1 All students Based on University
12 16 --
BASED ON UNIT 1 Pattern
Mind Maps Digital Logic and
Lecture, through LCD Computer design
13 Encoder 17 Designing, Projector,
Illustrations (PHI) 1998 : M.M.
Mano pg: 174
Mind Maps,, Digital Electronics
Lecture,
Adder: full Adder, through LCD (Oxford university
14 18 Designing,
Subtractor Projector, Press) 2010: G.K
Illustrations
Kharate pg:202, 173
Mind Maps, Digital Electronics
Lecture,
through LCD (Oxford university
15 Half Adder 19 Designing,
Projector, Press) 2010: G.K
Illustrations
Kharate pg: 204
Note: Question
Board and bank- unit 2 is
Discussion of
Discussion & Marker already given as
Previous year
16 20 Problem Assignment 2 and
question paper-
solving solutions to be
Unit 2
discussed in this
lecture

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 UNIT-III Presentations (4 Computer system
Memories: Primary groups Architecture (PHI)
17 Memories( ROMs, 21 Group comprising of 5
PROMs, EPROMs, activity team members third edition 2007:
RAMs) each) M.M. Mano pg: 59
Presentations (4 Computer system
Secondary Memories: groups
Architecture (PHI)
18 Hard Disk, Floppy 22 Group comprising of 5
Disk and CD-ROM activity team members third edition 2007:
each) M.M. Mano pg:59
UNIT-IV Digital Logic and
Sequential Building Board and Computer design
19 23 Lecture Marker
Blocks: Latch, (PHI) 1998 : M.M.
Flip-Flop (RS, D) Mano pg: 202-207
Board and Digital Logic and
JK, Master-slave flip Marker Computer design
20 24 Lecture
flop, T flip-flops (PHI) 1998 : M.M.
Mano pg: 208- 211
Board and Digital Logic and
Registers & Shift Marker Computer design
21 25,26 Lecture
Registers (PHI) 1998 : M.M.
Mano pg: 256-263
Board and Digital Logic and
Counters, Marker Computer design
22 Synchronous & 27 Lecture
Asynchronous (PHI) 1998 : M.M.
designing Mano pg: 272
methods
Note: Question
Board and bank- unit 4 is
23 Discussion of 28 Discussion & Marker already given as
Assignment 3 and
Previous year Problem
solutions to be
question paper- solving discussed in this
lecture
Unit 4

Computer system
UNIT-V Through LCD Architecture (PHI)
24 Memory 29 Lecture Projector third edition 2007:
Organization: M.M. Mano pg: 447, pg:
450-
Static and Dynamic
451
Memories, Basic cell
of static and
dynamic RAM,
Building large
memories using
chips
Computer system
Through LCD Architecture (PHI)
25 Associative memory, 30 Lecture Projector third edition 2007:
M.M. Mano pg: 458,
Cache memory 464
Organization

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 Virtual Computer system
memory in Architecture (PHI)
26 Virtual memory 31 Case Study2 UNIX third edition 2007:
M.M. Mano pg:471
Organization
Note: Question
Board and bank- unit 3,5 is already
27 Discussion of 32 Discussion & Marker given as
Assignment 4 and
Previous year Problem
solutions to be
question paper- solving discussed in this
lecture
Unit 3,5

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