KIIT Deemed to be University

Online End Semester Examination(Spring Semester-2021)

Subject Name & Code: Microprocessors, Microcontrollers & Interfacing

(EC 2020)
Applicable to Courses: ETC, ECSc

Full Marks=50 Time:2 Hours

SECTION-A(Answer All Questions. Each question carries 2 Marks)

Time:30 Minutes (7×2=14 Marks)

Question Answer Key

No Question Type CO
Question (For MCQ
(MCQ/SAT) Mapping
Questions only)

Q.No:1 Choose the 8085 MP

instructions which will be
used in memory mapped
I/O scheme:

MCQ A. STA 5000H 1 A

B. IN 20H
C. OUT 20H
D. None of the above
MCQ Choose the 8085 MP 1 B
instruction(s) which will
be used in I/O mapped
I/O scheme:
A. LDA 2000H
B. OUT 40H
 C. SUB M
D. None of the above
In a 8085 MP system,
which of the following
control signal(s) will be
used in memory mapped
I/O scheme:

MCQ A. 1 A

B.

C.
D. None of the above
In a 8085 MP system,
which of the following
control signal(s) will be
used in I/O mapped I/O
scheme:

MCQ A. 1 C

B.

C.
D. None of the above
Q.No:2 What would be the status
of and A0 to transfer
one byte of the data from
even address in 8086 MP
system?
MCQ A. = 0 and A0 = 0 2 C

B. = 0 and A0 = 1

C. = 1 and A0 = 0

D. = 1 and A0 = 1
MCQ What would be the status 2 A
of and A0 to transfer
one word of the data from
even address in 8086 MP
system?

A. = 0 and A0 = 0

B. = 0 and A0 = 1
 C. = 1 and A0 = 0

D. = 1 and A0 = 1
What would be the status
of and A0 to transfer
one byte of the data from
odd address in 8086 MP
system?
MCQ A. = 0 and A0 = 0 2 B

B. = 0 and A0 = 1

C. = 1 and A0 = 0

D. = 1 and A0 = 1
How many number of bus
cycles required to transfer
one word of the data from
odd address in 8086 MP
system?
MCQ A. 1 2 B

B. 2
C. 3
D. 4
Q.No:3 The following program is
implemented in a 8086
MP:
MOV AH,00H ;
MOV AL,38H ;
MOV BL,34H ;
ADD AL, BL ;

MCQ AAA ; 3 C
After executing the above
program, what would be
the content of register AX.
A. [AX] = 0072H
B. [AX] = 7200H
C. [AX] = 0102H
D. [AX] = 0201H
MCQ The following program is 3 D
 implemented in a 8086
MP:
MOV AH,00H ;
MOV AL,36H ;
MOV BL,36H ;
ADD AL, BL ;
AAA ;
After executing the above
program, what would be
the content of register AX.
A. [AX] = 0071H
B. [AX] = 7100H
C. [AX] = 0201H
D. [AX] = 0102H
The following program is
implemented in a 8086
MP:
MOV AH,00H ;
MOV AL,35H ;
MOV BL,39H ;
ADD AL, BL ;

MCQ AAA ; 3 A
After executing the above
program, what would be
the content of register AX.
A. [AX] = 0104H
B. [AX] = 4010H
C. [AX] = 0074H
D. [AX] = 7400H
MCQ The following program is 3 B
implemented in a 8086
MP:
MOV AH,00H ;
MOV AL,34H ;
MOV BL,33H ;
ADD AL, BL ;
 AAA ;
After executing the above
program, what would be
the content of register AX.
A. [AX] = 0067H
B. [AX] = 0007H
C. [AX] = 6700H
D. [AX] = 7000H
Q.No:4 How many address lines
are available in a 4K x 8
EPROM chip?
A. 10
MCQ 4 C
B. 11
C. 12
D. 13
How many address lines
are available in a 8K x 8
RAM chip?
A. 13
MCQ 4 A
B. 14
C. 15
D. 16
How many address lines
are available in a 2K x 8
RAM chip?
A. 10
MCQ 4 B
B. 11
C. 12
D. 13
How many address lines
are available in a 16K x 8
EPROM chip?
A. 11
MCQ 4 D
B. 12
C. 13
D. 14
Q.No:5 If the BSR mode control
word in 8255 PPI is 0CH,
then specify which port C
bit is reset?
A. PC6
MCQ 5 A
B. PC1
C. PC0
D. PC4

If the BSR mode control

word in 8255 PPI is 07H,
then specify which port C
bit is set?

MCQ A. PC0 5 D
B. PC1
C. PC2
D. PC3
If the I/O mode control
word in 8255 PPI is A2H,
then specify configuration
of port A and port B?
A. Port A as input port
and port B as input port
MCQ 5 B
B. Port A as output port
and port B as input port
C. Port A as input port
and port B as output port
D. Port A as output port
and port B as output port
MCQ If the I/O mode control 5 C
word in 8255 PPI is
11xxx000 (in Binary), then
specify configuration of
port A and port B?
Assume ‘x’ is don’t care.
A. Port A as input port
and port B as output port
B. Port A as input port
and port B as input port
C. Port A as bidirectional
port and port B as output
port
 D. Port A as bidirectional
port and port B as input
port
Q.No:6 Out of IR0, IR1, ……IR7,
which IR input(s) is/are
masked if the OCW1 for a
8259 is 45H?

MCQ A. IR0, IR1, IR2 5 C

B. IR0, IR2, IR7
C. IR0, IR2, IR6
D. IR0, IR1, IR7
Out of ICWs (ICW1, ICW2,
ICW3, ICW4) which of the
ICWs will be required if
more than one 8259s are
used in a 8086 MP system
and AEOI (Automatic End
of Interrupt) feature is
MCQ also going to be 5 B
implemented?
A. ICW3, ICW4
B. ICW1, ICW2, ICW3, ICW4
C. ICW1, ICW2
D. ICW2, ICW3, ICW4
How many minimum
number of 8259 chips are
required to service up to
25 number of interrupt
devices ?
MCQ A. 4 5 A

B. 5
C. 6
D. 7
MCQ Determine OCW1 in 8259 5 D
PIC to unmask only IR2
and IR7, and mask the rest
of interrupt inputs?
A. B7H
B. 48H
 C. 84H
D. 7BH
Q.No:7 Which register bank is
selected in the 8051
Microcontroller after
RESET?

MCQ A. Register bank 0 6 A

B. Register bank 1
C. Register bank 2
D. Register bank 3
What would be the
content of stack pointer
(SP) register in the 8051
Microcontroller after
RESET?
MCQ A. 00H 6 B

B. 07H
C. 14H
D. 12H
What would be the status
of RS1 and RS0 bits of the
program status word
(PSW) register in the 8051
Microcontroller after
RESET?
MCQ 6 A
A. RS1=0 and RS0=0
B. RS1=0 and RS0=1
C. RS1=1 and RS0=0
D. RS1=1 and RS0=1
Which register bank is
selected in the 8051
Microcontroller if RS1=1
and RS0=1?

MCQ A. Register bank 0 6 D

B. Register bank 1
C. Register bank 2
D. Register bank 3
 SECTION-B(Answer Any Three Questions. Each Question carries 12
Marks)

Time: 1 Hour and 30 Minutes (3×12=36 Marks)

Question Question CO
No Mappi
ng
(Each
questi
on
should
be
from
the
same
CO(s))
Q. No:8 A) Draw the internal architecture of 8085 MP and explain 1,3
about Accumulator and stack pointer registers.
[2+1+1]
Ans:

Accumulator (A) Register: It is an 8-bit register. In most of

the arithmetic & logical operations, Accumulator is used as
one of the source operand and the result will also be stored in
the Accumulator.
Stack Pointer (SP): It is a 16-bit register, stores the address of
the top memory location of the Stack.
SP is initialized by the instruction: LXI SP, XXXX ; [SP] =
XXXX.
In PUSH & POP operations, [SP] = [SP] - 2 & [SP] = [SP] + 2
respectively.
B) Identify the addressing mode and name the machine
cycles used to fetch and execute each of the following
instructions in 8085 MP. [4]
(i) ORA M (ii) STA 5000H (iii) INR B (iv) MVI C,20H
Ans:
Instructi Machine cycles Addressing
on Mode
ORA M Opcode Fetch, Memory Indirect
Read
STA Opcode Fetch, Memory Direct
5000H Read, Memory Read,
Memory Write
INR B Opcode Fetch Register
MVI Opcode Fetch, Memory Immediate
C,20H Read

C) What is the use of XLAT instruction and what would be the

status of Zero flag and Parity flag after execution of the
following instructions in a 8086 MP system?
MOV AX, 00C1H;
SAHF; [2+2]
Ans: XLAT instruction is used to translate a byte in AL using
a table (Look-UP table) in memory.

Mnemonic Description Operation

XLAT Translate a byte in [AL] <= [[DS]:[AL]+[BX]]

AL using a table in
memory ≡ MOV AL, [AL][BX]

MOV AX, 00C1H; [AH] = 00H, [AL] = C1H

SAHF; [AH]=>[FL]
So,
SF ZF - AF - PF - CF
0 0 0 0 0 0 0 0
Zero flag = 0
Parity flag = 0
A) Identify the appropriate control signals that would be
generated at the outputs of the following 3-to-8
Decoder (Figure 1) in 8085 MP system. [4]

Figure 1
Control Signal

0 0 1

0 1 0

1 0 1

1 1 0

B) Explain the operation of LOOPE instruction and write an

8086 assembly language program with suitable comments to
find all the elements of an array (of 100 bytes) are same or
not. The program should be halted as soon as a mismatch is
found or the end of string is reached. Assume [DS] = 4000H
and offset = 6000H [1+3]
Ans: LOOPE label instruction, decrements [CX] by 1 and
jumps to label if [CX] is not equal to zero and ZF = 1.
MOV AX, 4000H ;
MOV DS, AX ; [DS] = 4000H
MOV BX, 6000H ;
DEC BX ;
MOV CX, 0064H ; [CX] = 0064H=100 (in Decimal)
BACK:INC BX ;
 CMP [BX], 2FH ; Comparing all the elements are “2F”
LOOPE BACK ;
C) What is the significance of Interrupt Vector/Pointer Table
(IVT/IPT) of 8086 MP system and discuss IVT in brief with a
suitable diagram. [4]
Ans: Interrupt Pointer Table(IPT) or Interrupt Vector
Table(IVT):

 In a 8086 system, the first 1K byte of memory space

(0000H to 003FFH) is set aside as a table to store the
starting addresses of Interrupt Service Procedures, known
as Interrupt Pointer Table/Interrupt Vector Table. Since 4
bytes are required to store CS & IP values for the starting
address of each interrupt procedure, thus this 1K byte
table can store starting addresses of 256 interrupt
procedures.
 Each double word interrupt pointer is identified by a type
number 0 to 255.
 The lowest 5 types(Type 0 to Type 4) are dedicated
interrupt pointers for specific interrupts like divide by
zero, non-maskable, single step etc.
 The next 27 interrupt type pointers(Type 5 to Type 31) are
reserved for Intel for use in future microprocessors.
 The upper 224 interrupt type pointers(Type 32 to Type
255) are available interrupt pointers.
 Any interrupt on 8086, whether external or internal has a
Type number(N), which may be implicit (like NMI, Divide
by zero, etc), or specified in the instruction INT N, or in
the case of external interrupt as in INTR, the type number
is passed on to 8086 by the 8259(PIC).
 Once the type number (N) is obtained, new IP value is
available at 0000:4N and new CS value is available at
0000: 4N+2 in the Interrupt Pointer Table.
 A) A 4 MHz crystal is connected between pins X1 and X2 of a
8085 Microprocessor. Find out the exact time delay
implemented with the following DELAY sub-routine.
[4]
T-
STATES
DELAY:MVI B,32H 7T
GO:DCR B 4T
JNZ GO 10T/7T
RET 10T
N = 50(10) (32H)
fcry = 4MHz, fclk = 2MHz, T = 0.5 µs
TDELAY = 14×T×(N+1) = 14×0.5×10-6×(51)
=357µs
B) Determine the effect of the following 8086 instructions:
(i) CWD (ii) DIV BH
Assume that following data prior to execution of each one of
the above instructions independently.
[AX] = 0060H; [BX] = 6000H; [DX] = 0200H [2+2]
Ans: (i) [DX] = 0000H ; [AX] = 0060H
(ii) [AX] = 0001H
C) Which addresses in Interrupt Vector Table (IVT or IPT)
does 8086 MP access for single step interrupt and interrupt
on overflow? [2+2]
Ans: :
Addresses in Interrupt
Vector Table
Single Step interrupt (Type 0004H, 0005H, 0006H,
number = 1) 0007H
Overflow interrupt (Type 0010H, 0011H, 0012H,
number = 4) 0013H

Q.No:9 A) Explain the role of Instruction Queue in 8086 MP. State 2,3,4
what happens in the Instruction Queue when the 8086 MP
encounters a Jump/Call instruction. [3+1]
Ans:

 BIU prefetches six bytes of instructions from memory

ahead of time for the EU to work on and these are
 held in FIFO group of registers called instruction
queue.
 Prefetching the instructions speeds up processing,
because EU after completing the execution of an
instruction will not have to wait for the next, which is
already available in the queue in BIU.
 Only in the case of JUMP or CALL instruction, the
queue may have to be flushed and to be loaded with
new instructions from a new address.
 This fetching of next instruction while the current
instruction is being executed is known as 'pipelining'.

B) Explain the function of , , and ALE pins in 8086

MP. [4]
Ans: In maximum mode, the 8288 bus controller decodes the
status information from S0, S1, S2 to generate bus timing and
control signals required for a bus cycle.

ALE pin is used to demultiplex AD15-AD0 and A19/S6-A16/S3

lines with help of octal latches.
C) Design a 8086 system to interface 32K x 8 RAM using 3 to
8 decoder. The starting address for RAM is 80000H. Draw
the memory map also. [4]
Ans:
A) If a crystal of 15 MHz is connected at X1 and X2 in a 8284
clock generator chip connected to a 8086 MP, then what will
be the frequency at CLK pin of the 8086 MP?
Draw the timing diagram of Read cycle for a minimum mode
8086 MP system. [1+3]
Ans: The clock frequency = 15MHz/3 = 5MHz
B) Differentiate between SAL and SHL instructions of 8086
MP. Write an assembly language program to multiply AL by
35 using shift instruction. [4]
Ans:

Program to multiply AL by 35:

MOV AL, 01H ; [AL] = 01
MOV BL, AL ;[BL] = 01
MOV DL, AL ;[DL] = 01
MOV CL, 05H ;
SHL AL, CL ; [AL]<<5-bits ; [AL] = 32
SHL BL, 01 ; [AL]<<1-bit = 02
ADD AL, BL ;[AL] = 32+2=34
ADD AL, DL ;[AL] = 34+1=35
C) Design a 8086 system to interface 64K x 8 EPROM using 3
to 8 decoder. The starting address for EPROM is 40000H.
Draw the memory map also. [4]
Ans:

A) Explain the function of pin of 8086 MP and Draw

the timing diagram of Write cycle for a minimum mode 8086
MP system. [1+3]

is used to differentiate the operation of 8086 MP as

I/O related operation or Memory related operation.

= 1 ; Memory related operation

= 0; I/O related operation

 B) Write an 8086 assembly language program with suitable
comments to find a data string of 36H present in a 100 (in
Decimal) bytes from the string starting at 4000H in ES. The
program should be halted as soon as the data string 36H is
found or the end of string is reached. Assume [ES] to be
9000H. [4]
MOV AX, 9000H ;
MOV ES, AX ; [ES] = 9000H
MOV DI, 4000H ; [DI] = 4000H
MOV CX, 0064H ;[CX] = 0064H=100(10)
CLD ; DF = 0
MOV AL, 36H ; [AL] = 36H
REPNE : SCASB ; Scan each byte pointed by [ES]:[DI], [ES]:[DI+1]
……………………
C) Design a 8086 system to interface 16K x 8 EPROM using 3
to 8 decoder. The starting address for EPROM is C0000H.
Draw the memory map also. [4]
Ans:
Q.No:10 A) 5
 Identify the port addresses in Figure 2.

Figure 2
 Identify the Mode 0 control word to configure port B as
input port and port C as output port.
 Write a program to read the switches and display the
 reading from port B at port C of 8255 PPI in a 8086 MP
system. [6]
Sol:

A7 A A5 A A3 A2 A1 A Sele Addre
6 4 0 cted ss

1 0 0 0 0 0 0 0 Por 80H
tA
1 0 0 0 0 0 1 0 Por 82H
tB
1 0 0 0 0 1 0 0 Por 84H
tC
1 0 0 0 0 1 1 0 Con 86H
trol
Reg
iste
r (C
R)

Control word for I/O mode:

1 0 0 0 0 0 1 0 = 82H

PORTC EQU 84H ; Address of port C

PORTB EQU 82H ; Address of port B
CNTRL EQU 86H ; Address of CR
MOV AL, 82H ; [AL] <== Control Word
OUT CNTRL, AL ; CR <== Control Word
IN AL, PORTB ; Read switches
OUT PORTC, AL ; display the reading on LEDs
B) Discuss the sequence of operations as to how a 8086
responds to an interrupt on its INTR pin and how the Type
number of the interrupt is passed on to 8086 MP? [6]
Ans: If the 8086 interrupt flag is set and the INTR input
receives a high signal, then the 8086 will
 send out two interrupt acknowledge pulses on its INTA
pin to the 8259 PIC. The INTA pulses tell the 8259 to
send the desired interrupt Type number (n) to the 8086
on the data bus as shown in below figure .
 Compute (4 × n), (4 × n + 1), (4 × n + 2) & (4 × n + 3) to
produce an address in the interrupt vector table (IVT or
 IPT).
 Push the flags on the stack.
 Clear IF and TF.
 Push the return address on the stack.
 Get the starting address for the ISS (or ISR) from the IVT
and load that address in CS and IP.
 Execute the ISS (or ISR).

A) Frame a control word for the following configuration of

ports in 8255:

 Port A as input port in mode 0

 Port B as output port in Mode 1
 Port C as input port
Write an 8086 MP assembly language program to store above
control word in control register. Assume the address of the
control register is 86H. [2+2]
Sol: Control word:
1 0 0 1 1 1 0 1 =9DH

Initialization instructions:
CNTRL EQU 86H ; Address of CR
MOV AL, 9DH ; [AL] <== Control Word
OUT CNTRL, AL ; CR <== Control Word
B) Determine ICW1 and ICW2 for a single 8259 chip in a
8086 system with the following parameters. [2+2]
 Edge triggered
 Type number of interrupt for IR0 is Type 32 (in Decimal)
Ans:
 Icw1:
0 0 0 1 0 0 1 1 =13H
Icw2:
0 0 1 0 0 0 0 0 =20H
C) Explain the Fully nested mode and automatic rotation
mode in 8259 PIC with suitable example. [2+2]
Ans: Fully nested mode:
This is a general purpose mode in which all Interrupt
Requests (IRs) are arranged from highest to lowest, with IR0
as the highest and IR7 as the lowest.

Automatic rotation mode:

In this mode, a device, after being serviced, receives the
lowest priority. Assuming IR4 has the highest priority
requiring service, then after it has been serviced, it will
receive the lowest priority, as shown below.

A) In a 8086 MP system, write a BSR control word

subroutine to set bits PC0 and PC5 of 8255 PPI and reset them
after 20ms. Assume that delay subroutine is available and
address of control register is 96H. [4]
Ans:
BSR control word subroutine to set bit PC0
BSR control word subroutine to set bit
0 0 0 0 0 0 1 = 01H
PC5
0 0 0 0 1 0 1 1 = 0BH
BSR control word subroutine to reset bit PC0
0 0 0 0 0 0 0 0 = 00H

BSR control word subroutine to reset bit PC5

0 0 0 0 1 0 1 0 = 0AH
 CNTRL EQU 96H; Address of CONTROL REGISTER (CR)
MOV AL, 01H ; [AL] <== Control Word to set bit PC0
OUT CNTRL, AL ; CR <== Control Word
MOV AL, 0BH ; [AL] <== Control Word to set bit PC5
OUT CNTRL, AL ; CR <== Control Word
CALL DELAY ; Dealy 20 msec
MOV AL, 00H ; [AL] <== Control Word to reset bit PC0
OUT CNTRL, AL ; CR <== Control Word
MOV AL, 0AH ; [AL] <== Control Word to reset bit PC5
OUT CNTRL, AL ; CR <== Control Word
B) Explain briefly about the different modes of operation of
I/O ports of 8255 PPI in I/O mode. [4]
Ans:

C) What is the function of In-service register (ISR) and

priority resolver in 8259 PIC? If an I/O device has sent an
interrupt request through IR3 line of 8259 PIC, then what
would be the Type number (in Decimal) to be sent by the
8259A PIC to 8086 MP. Given that, 8259 PIC has been
initialized with ICW1 = 13H and ICW2 = 40H. [1+1+2]
Ans: In-Service Register: It keeps track of which interrupts
are currently being serviced. For each input that is currently
being serviced, the corresponding bit will be set in the ISR
register.
Given that, ICW1 = 13H and ICW2 = 40H
Type number for IR0 = 64 (in Decimal)
So, the Type number for IR3 = 67 (in Decimal)
Q.No:11 A) Write a small program to configure port P0 as input port 6
and port P3 as output port in 8051 Microcontroller. [2+2]
Ans:
Configuring port P0 as input port
MOV A, #FFH
MOV P0, A
Configuring port P3 as output port
MOV A, #00H
MOV P3, A
B)Explain about lower 128 bytes of internal RAM in 8051
Microcontroller system. [4]
Ans: The below figure shows a mapping of lower 128 bytes of
internal Data Memory.

There are four register banks occupying locations 00H to 1FH

in the lower most
RAM area. Only one of these banks may be enabled at a
time(through RS1 and
RS0 bits in the PSW register). Each bank contains 8 general
purpose registers (R0
to R7).
RS1 RS0 Select
0 0 Register Bank 0 (Default)
0 1 Register Bank 1
1 0 Register Bank 2
1 1 Register Bank 3

The next 16 bytes location 20H to 2FH contains 128-bit

addressable locations (starting from 00H to 7FH).
Memory locations 30H to 7FH are for general purpose use for
internal RAM operation and these bytes are not bit
addressable. These are used for read and write operations,
known as 'Scratch pad memory'.
C)If the content of Interrupt Priority (IP) register is 16H, then
discuss about the priorities of the interrupts in 8051
Microcontroller. [4]
Ans:
- - PT2 PS PT1 PX1 PT0 PX0
0 0 0 1 0 1 1 0 =16H
From the IP register, Serial port interrupt, external interrupt
1 & Timer 0 (TF0) have the highest priority out of 5
interrupts.
Again out of these three interrupts, the priorities are as
follows: Timer 0 (TF0) > External interrupt 1 > Serial
port interrupt
A) What is the purpose of DPTR, Program Counter (PC)
registers in 8051 Microcontroller? [2+2]
Ans: Data Pointer (DPTR): It is a 16-bit register, which is
used to access the external memory to transfer the data.
Eg. MOVX A,@DPTR
MOVC A, @A+DPTR
Program Counter (PC): It is a 16-bit register and is used to
sequence the execution of the instructions. PC always points
to the memory address from which the next byte is to be
fetched. When a byte is being fetched, PC is incremented by
one to point to the next memory location. After reset, the PC
will set to 0000H.
B) Identify the Addressing mode for the following
instructions of 8051 Microcontroller individually: [4]
 MOV R1, 50H
 ADD A, @R0
 MOV B, #10H
 SETB P1.2
Ans:
Instruction Addressing Mode
MOV R1, 50H Direct
ADD A, @R0 Register Indirect
MOV B, #10H Immediate
SETB P1.2 Bit
C) Explain about Interrupt Enable (IE) register and if the
content of IE register is 8EH, then find out which interrupts
are enabled and disabled in 8051 Microcontroller. [2+2]
Ans: Upon reset, all interrupts are disabled meaning that
none of the interrupts will respond if they are activated. The
interrupts must be enabled by software in order for the
Microcontroller to respond to them.
There is a register called IE (Interrupt Enable register), which
is responsible for enabling or disabling the interrupts.
IE.7 IE.6 IE.5 IE.4 IE.3 IE.2 IE.1 IE.0
EA -- ET2 ES ET1 EX1 ET0 EX0
 EA IE.7 Disables all interrupts. If EA = 0, no
interrupt is acknowledged. If EA = 1, each
interrupt source is individually enabled or
disabled by setting or clearing its enable
bit.
-- IE.6 Not implemented, reserved for future use.

ET2 IE.5 Enables or disables timer 2 overflow or

capture interrupt (8952) (reserved).

ES IE.4 Enables or disables the serial port

interrupt.
ET1 IE.3 Enables or disables timer 1 overflow
interrupt.
EX1 IE.2 Enables or disables external interrupt 1.

ET0 IE.1 Enables or disables timer 0 overflow

interrupt.
EX0 IE.0 Enables or disables external interrupt 0

IE register: Given that, [IE] = 8EH

EA - PT2 PS PT1 PX1 PT0 PX0
1 0 0 0 1 1 1 0 = 8EH
From IE register, Timer 0 (TF0), external interrupt 1, and
Timer 1 (TF1) are enabled.
A) Explain the function of the following pins of 8051
Microcontroller: [2+2]
 XTAL1, XTAL2


Ans: XTAL1, XTAL2
A 12 MHz crystal oscillator is connected between XTAL2 and
XTAL1 to provide the clock frequency of 1MHz to the 8051
Microcontroller.

: When pin is held HIGH, then 8051 executes instruction

from internal program memory from 0000H to 0FFFH(4K)
and from 1000H to FFFFH of external program memory. If
pin is held LOW then all instructions are fetched from
external program memory.
B) Discuss about any four Addressing modes of 8051
Microcontroller with suitable examples. [4]
Ans: 1. Register addressing; Eg.
2. Direct addressing; Eg.
3. Register indirect addressing; Eg.
4. Immediate addressing; Eg.
5. Base register plus index register addressing; Eg.
6. Relative addressing; Eg.
7. Absolute addressing; Eg.
8. Bit addressing; Eg.
C) Explain about significance of each bit of the Program
Status Word (PSW) register in 8051 Microcontroller. [4]

RS1 RS0 Selected

0 0 Register Bank 0
0 1 Register Bank 1
1 0 Register Bank 2
1 1 Register Bank 3