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Analog Ics and Applications Dec 2023

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0% found this document useful (0 votes)
83 views7 pages

Analog Ics and Applications Dec 2023

Uploaded by

bublu
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Code No: R2031041 R20 SET - 1

III B. Tech I Semester Regular/Supplementary Examinations, December -2023


ANALOG ICS AND APPLICATIONS
(Electronics and Communication Engineering)
Time: 3 hours Max. Marks: 70
Answer any FIVE Questions ONE Question from Each unit
All Questions Carry Equal Marks
*****
UNIT-I
1. a) Derive the AC performance close loop Characteristics of Op-amp to discuss on [7M]
the circuit Bandwidth,and slew rate.
b) Draw and explain the equivalent circuit of an operational amplifier. [7M]
(OR)
2. a) Explain all the DC characteristics of an ideal op-amp with relevant expressions. [7M]
b) Describe the features of 79xx IC series dual power supply. [7M]
UNIT-II

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3. a) With a neat sketch explain about voltage to current converter using op-amp. [7M]
b) Explain the function of op-amp as differentiator and draw the waveforms. [7M]

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(OR)
4. a) Explain the operation of op-amp current to voltage converter circuit. [7M]
b)
pd
Explain the application of op-amp as integrator and differentiator. [7M]
UNIT-III
U
5. a) If a band pass filter has a lower cut-off frequency fL=250Hz and a higher cut- [7M]
off frequency fH = 2500Hz, then find its bandwidth and the resonant frequency.
st

b) Design a wide-band reject filter having fh=400 Hz, fl=2 kHz and pass band gain [7M]
of 2.
Fa

(OR)
6. a) Design a wide band reject filter having fH=200 Hz and fL=1kHz. [7M]
b) Design a high pass filter at a cut-off frequency of 1 kHz with a passband gain [7M]
of 2.
tu

UNIT-IV
7. a) What is 555 timer? Explain the working of 555 timer asMonostable [7M]
Jn

Multivibrator.
b) Draw the circuit of a PLL AM detector and explain its operation. [7M]
(OR)
8. a) Briefly explain the use of PLL for the process of FSK demodulation. [7M]
b) Draw and explain the functional diagram of 555 timer. [7M]
UNIT-V
9. a) With a neat circuit diagram, explain the operation of inverted R-2R digital-to- [7M]
analog converter.
b) Explain the operation of dual slope analog-to-digital converter. [7M]
(OR)
10. a) Explain the following characteristics of analog-to-digital converter: Resolution, [7M]
Accuracy, Settling time, Linearity.
b) Explain the working principle of Successive approximation type analog-to- [7M]
digital converter.
1 of 1

|'''|'|'|''||'''||||
Code No: R2031041
R2031011 R20 SET - 2

III B. Tech I Semester Regular/Supplementary Examinations, December -2023


ANALOG ICS AND APPLICATIONS
(Electronics and Communication Engineering)
Time: 3 hours Max. Marks: 70
Answer any FIVE Questions ONE Question from Each unit
All Questions Carry Equal Marks
*****
UNIT-I
1. a) List the six characteristics of an ideal op-amp and explain in detail. [7M]
b) Explain in detail the AC characteristics of an ideal op-amp with relevant [7M]
expressions.
(OR)
2. a) Use appropriate block diagram, explain the general stages of an [7M]

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op-amp IC.
b) What is a switching regulator? With a neat block diagram, explain the internal [7M]
diagram of IC 78XX.

at
UNIT-II
3. a) With a neat circuit diagram, explain the working of Schmitt trigger using op- [7M]

b)
amp. pd
Draw the circuit of op-amp Monostable multivibrator and obtain expression for
pulse width.
[7M]
U
(OR)
4. a) Explain the operating principle of an instrumentation amplifier with a suitable [7M]
st

circuit diagram and derive its gain.


b) What is a comparator? Explain the characteristics of a comparator with a neat [7M]
Fa

diagram.
UNIT-III
5. a) Design a low pass filter with a cut off frequency of 1 kHz and with a pass band [7M]
gain of 2.
tu

b) Design a notch filter so that f0=8 kHz, Q=10. Choose C=500pF. [7M]
(OR)
Jn

6. a) Design a second order Butterworth LPF having upper cut-off frequency of 1 [7M]
kHz.
b) The following specifications are given for a certain wide-band pass filter: [7M]
fL=400 Hz, fH=1kHz, and passband gain=1. Calculate the value of Q for the
filter.
UNIT-IV
7. a) Draw the circuit of a Schmitt trigger using 555 timer and explain its operation. [7M]
b) Explain the application of PLL as a frequency multiplier with a neat sketch. [7M]
(OR)
8. a) With the help of a neat internal function diagram explain the working of IC 555 [7M]
as a astable multivibrator.
b) Determine how the IC 565 PLL can be used as a frequency multiplier/divider. [7M]

1 of 2

|'''|'|'|''||'''||||
Code No: R2031041 R20 SET - 2

UNIT-V
9. a) With a neat circuit diagram, explain the operation of weighted resistor digital- [7M]
to-analog converter.
b) What is the use of an analog-to-digital converter? Explain the Dual slope type [7M]
of analog-to-digital converter.
(OR)
10. a) Explain the operation of a parallel comparator type analog-to-digital converter [7M]
with a neat diagram.
b) Describe the terms settling time and conversion time related to digital-to- [7M]
analog converters. Determine how many resistors are required in a 12-bit
weighted resistor digital-to-analog converter.

es
at
2 of 2

pd
U
st
Fa
tu
Jn

|'''|'|'|''||'''||||
Code No: R2031041
R2031011 R20 SET - 3

III B. Tech I Semester Regular/Supplementary Examinations, December -2023


ANALOG ICS AND APPLICATIONS
(Electronics and Communication Engineering)
Time: 3 hours Max. Marks: 70
Answer any FIVE Questions ONE Question from Each unit
All Questions Carry Equal Marks
*****
UNIT-I
1. a) Explain in detail, the DC characteristics of op-amp with the help of neat [7M]
diagrams.
b) Describe the principle of a three-terminal 78xx series voltage regulator. [7M]
(OR)
2. a) Determine the output voltage of the differential amplifier having input voltages [7M]
V1=1 mV and V2 =2 mV, the amplifier has a differential gain of 5000 and
CMRR of 1000.

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b) Explain the functions of all the basic building blocks of an op-Amp. [7M]
UNIT-II

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3. a) Draw the block diagram of four quadrant multiplier and explain its operation [7M]
in detail.
b) Sketch the op-amp Integrator circuit and explain the working principle in [7M]
detail. pd (OR)
U
4. a) Draw and explain the operation of op-amp triangular wave generator. [7M]
b) With a suitable circuit diagram, explain the operating principle of [7M]
st

aninstrumentation amplifier and derive its gain.


UNIT-III
Fa

5. a) Discuss the second order high pass filter with its frequency response and [7M]
design the circuit with the cut-off frequency of 5 kHz.
b) Draw the circuit of a second order Butterworth low pass filter and explain its [7M]
operation.
tu

(OR)
6. a) Design a wide-band pass filter having fl=400 Hz, fh=2 kHz and pass band gain [7M]
Jn

of 4, find the value of Q of the filter.


b) A low pass Butterworth filter is to be designed to have a 3-dB bandwidth of [7M]
200 Hz and an attenuation of 50 dB at 400 Hz. Find the order of the filter.
UNIT-IV
7. a) In the astable multivibrator using 555 timer, RA=2.2 KΩ, RB=6.8 KΩ and [7M]
C=0.01 µF. Calculate tHIGH, tLOW, free running frequency and Duty cycle.
b) Explain the use of PLL for FM detection with a neat diagram. [7M]
(OR)
8. a) Draw the circuit diagram of a 555 timer connected for astable multivibrator and [7M]
explain its operation.
b) Draw the block diagram of IC 566 VCO and explain its operation. [7M]

1 of 2

|'''|'|'|''||'''||||
Code No: R2031041 R20 SET - 3

UNIT-V
9. a) Draw the circuit diagram of 5-bit inverted R-2R ladder DAC. How many levels [7M]
are possible in this DAC. What is its resolution if the output range is 0-10V.
b) Explain the operation of counter type analog-to-digital converter with a neat [7M]
diagram.
(OR)
10. a) Illustrate the working principle of dual slope type analog-to-digital converter. [7M]
Write its advantages and limitations.
b) Explain the operation of R-2R Ladder type digital-to-analog converter. [7M]

es
2 of 2

at
pd
U
st
Fa
tu
Jn

|'''|'|'|''||'''||||
Code No: R2031041
R2031011 R20 SET - 4

III B. Tech I Semester Regular/Supplementary Examinations, December -2023


ANALOG ICS AND APPLICATIONS
(Electronics and Communication Engineering)
Time: 3 hours Max. Marks: 70
Answer any FIVE Questions ONE Question from Each unit
All Questions Carry Equal Marks
*****
UNIT-I
1. a) Draw the block diagram of a typical op-amp and explain each block in detail. [7M]
b) Define slew rate, CMRR and PSRR with respect to an op-amp and describe [7M]
their significance.
(OR)
2. a) What is slew rate? What is the slew rate if the output voltage of a certain op- [7M]
amp circuit changes by 24 V in 4 microseconds.

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b) Explain the features and principle of current booster with a neat diagram. [7M]
UNIT-II

at
3. a) With a neat circuit diagram, explain the working of Sample and Hold circuit [7M]
using op-amp.

4.
b)

a)
pd
Draw the circuit of antilog amplifier using op-amp and explain its operation.
(OR)
Explain the operation of an op-amp square wave generator with a neat diagram.
[7M]

[7M]
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b) Draw the circuit of log amplifier using op-amp and explain its operation. [7M]
UNIT-III
st

5. a) Design a band pass filter so that f0=2 kHz, Q=20 and A0=10. Choose C=1 µF. [7M]
Fa

b) Design a second order Butterworth HPF with cut-off frequency of 4 kHz and [7M]
draw the designed circuit.
(OR)
6. a) Design a second order Butterworth low-pass filter having upper cut-off [7M]
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frequency of 2.1961 kHz.


b) Explain in detail, the first order low pass Butterworth filter with a neat circuit [7M]
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diagram.
UNIT-IV
7. a) Draw and explain the functional diagram of 555 timer. [7M]
b) List one application of PLL and then describe the role of PLL in that [7M]
application.
(OR)
8. a) Draw the circuit diagram of a 555 timer connected for monostable [7M]
multivibrator and explain its operation.
b) Describe the basic building blocks of a PLL. Define capture range and lock-in [7M]
range of a PLL.

1 of 2

|'''|'|'|''||'''||||
Code No: R2031041 R20 SET - 4

UNIT-V
9. a) Define Monotonocity with respect to data converters and explain the important [7M]
digital-to-analog converter specifications.
b) Explain a R-2R ladder type digital-to-analog converter. [7M]
(OR)
10. a) Explain the working principle of successive approximation type analog-to- [7M]
digital converter with a neat diagram.
b) With a neat circuit diagram, explain the operation of weighted resistor digital- [7M]
to-analog converter.

2 of 2

es
at
pd
U
st
Fa
tu
Jn

|'''|'|'|''||'''||||

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