2023 4th IEEE Global Conference for Advancement in Technology (GCAT)

Bangalore, India. Oct 6-8, 2023

Designing Bandgap Reference Circuit and Sub-

Bandgap Reference Circuit with Low Temperature
Coefficient
2023 4th IEEE Global Conference for Advancement in Technology (GCAT) | 979-8-3503-0525-8/23/$31.00 ©2023 IEEE | DOI: 10.1109/GCAT59970.2023.10353391

Preeti C. Deshmukh Dr. Vanita Agarwal Dr. Vaishali Ingale

Dept. of Electronics and Telecomm. Dept. of Electronics and Telecomm. Dept. of Electronics and Telecomm.
COEP Technological University COEP Technological University COEP Technological University
Pune, India Pune, India Pune, India
[email protected] [email protected] [email protected]

Abstract—This paper presents low power Bandgap

Reference and Sub-Bandgap Reference circuit with low
temperature coefficient. PTAT, CTAT circuit and a startup
circuit are required for designing a Bandgap Reference circuit.
The PTAT and CTAT circuit comprises of BJT, OPAMP and
resistor.Design of Bandgap and Sub-bandgap voltage reference
circuit for low noise with low temperature coefficient is
discussed in this paper. The performance of BGR depends on
the type of Operational amplifier we are using. The supply
voltage given to proposed BGR circuit is 3.3 V. And the supply
voltage for Sub- Bandgap Reference circuit is 1.2V. 180nm
CMOS technology is used for designing the proposed circuits.
The BGR circuit generates a reference voltage in the range of
1.186V to 1.190V. And the Sub- BGR circuit generates voltage Fig. 1. Concept of BGR
in the range of 0.560V to 0.561V. The minimum TC achieved
for the BGR circuit is around 21ppm/°C and for sub-BGR it is dependent resistor ratio compensation, piecewise-linear
14ppm/°C in the temperature range of -40°C to 80°C. The curvature correction, logarithmic curvature compensation,
output noise generated by the BGR circuit in this paper is quadratic temperature compensation, exponential
equal to 45uV/sqrt (Hz) at 1Hz frequency and output noise of temperature compensation, Subthreshold MOSFET
sub-BGR is 60uV/sqrt (Hz). compensation, Piecewise compensation that has been
adjusted; and so forth.
Index Terms—PTAT, CTAT, BGR, sub-BGR, TC.
To remove non- linear temperature dependence of Vbe of
I. INTRODUCTION BJT many circuits have been designed in recent years. Vbe is
Bandgap Reference (BGR) circuits are used in analog an important factor in generating reference voltage. The
and mixed signal circuits IC like A/D converters, DRAMS, curvature compensation method is in trouble due to process
flash memory circuits, LDOs, Buk-Boost Converters, PLLs variation and therefore it requires complex trimming process.
and other circuits. BGRs are widely used in SoCs since they The non-linear term in Vbe and the DC non voltage of
generates a constant reference voltage/current. This voltage/ Operational Amplifier (OPAMP) causes the non-linear
current is independent of PVT variations i.e., supply voltage, temperature dependency. [3], [5] discusses curvature
temperature, and process variation. Bandgap voltage compensation techniques. [1], [4], [7] discusses about the
reference circuits are fundamental blocks in system on chip designing low power bandgap reference. [2], [15], [7]
(SoCs) used in the generation of various internal supply discusses about the startup circuit used in BGR. After
voltage. The Vref – Reference voltage component permits us connecting the supply voltage, a startup circuit ensures that a
to supply a stable and accurate reference voltage for analog bandgap reference circuit starts up and achieves the correct
resources in the design. For Bandgap Reference circuits the DC operating point. In the absence of a startup circuit, the
supply voltage required is greater than 1.3V and that for Sub- bandgap voltage and current can remain at 0 if all of the
Bandgap reference circuit is less than or equal to 1.2V. This PMOS current sources are turned off. Noise suppression
circuit is a game- changer for low-power sensors, providing a technique is described in [6].
robust and temperature insensitive reference volt- age. Low Resistor compensation technique is generally used in
temperature drift is also crucial for obtaining a precise BGR most of the compensation methodologies as it gives benefits
voltage. To obtain low temperature coefficients, numerous in various factors like chip area reduction, noise coupling
studies have suggested temperature compensation methods. from substrate. Depending on the factors to be monitored the
The Bandgap reference circuit’s design is optimized for high circuit is designed accordingly. In low noise applications like
precision, power supply independence and temperature sensing circuits, usually resistor-less circuit is preferred.
independence. It is called as “bandgap” reference because it Resistor-less BGRs are proposed in [8], [9]. So instead of
uses energy gap between the valence and conduction bands using resistor in BGR, MOS Transistors which are biased
in a semiconductor material to generate a stable voltage or either in subthreshold region or active region are used in the
current output. Designing a temperature-compensated circuit. But the resistor- less BGRs faces a challenge that it
bandgap reference circuit can be done using a variety of does not give accurate reference voltage. Also, the
ways. the following are the techniques: Temperature- Temperature coefficient is higher in such cases because

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without a resistor, achieving high order temperature
compensation is challenging. As temperature coefficient
reduction is the main aim in this paper, we have used
resistors in the circuit designed. Along with BGRs, there are
some non-bandgap designs as well to generate reference
voltage. There are various high order compensation
techniques which tries to remove the non-linearity. Using the
bandgap voltage reference, a reference current can also be
generated.
This paper is structured as follows. Basic principle of
bandgap reference circuit and its designing is covered in
Section II. The operating method and design of the proposed
circuit is described in Section III. The implementation of
circuits using 180nm CMOS process technology with simu-
lation and experimental results is presented in Section IV. Fig. 2. Slope Comparison
The paper’s conclusion is in Section V.
II. BASIC PRINCIPLE OF BGR
In order to remove the temperature dependence, the BGR
often uses PN diodes to produce both proportional to
absolute temperature (PTAT) and complementary to absolute
temper- ature (CTAT) quantities. From fig 1, we can see that
when PTAT and CTAT are multiplied with some constant
and then both the terms are added to generate a reference
voltage. α and β are the constant terms multiplied with PTAT
and CTAT voltages respectively in order to adjust the slope
of individual quantities. α and β is usually the ratio of
value of resistors used in the circuit. If the ratio between the
first and second resistor is adjusted correctly, then the first
order effects of the temperature dependency of the diode
CTAT and the PTAT will cancel out. Fig. 3. PTAT, CTAT and BGR Circuit

A PTAT circuit gives a positive slope with respect to

temperature and a CTAT circuit gives a negative slope with
respect to temperature as shown in fig.2. When both the
slopes are added, the resultant slope is zero and this is how
we get a reference voltage which is constant with
temperature. So the BGRs are designed in order to have
minimum voltage change through a wide range of
temperature, i.e. to achieve minimum temperature
coefficient.
ூ௢
ܸ݀ ൌ ܸ‫Ž כ ݐ‬ሺ ሻ (1)
ூ௦

In the above equation we can see Vt is thermal voltage,

Io is the collector current, Is is the saturation current
of BJT. Vd is the voltage across diode. To obtain the above
equation we use BJT as a diode, with base and collector Fig. 4. Conventional Bandgap Voltage reference Circuit
terminal shorted so as to get the voltage across the BJT as
Vd. Here Vt is proportional to temperature so its slope
will be positive. Io is collector current. And Is is proportional
to temperature, bandgap voltage of semiconductor. When we
take a derivative of Vd we get a negative slope so we can
conclude that the voltage across a diode is CTAT voltage.
ௗ௏ௗ ଵ ௏௕௚
ൌ ‫ כ‬ሾܸ݀ െ ሺͶ ൅ ݉ሻܸ‫ ݐ‬െ ሿ (2)
ௗ௧ ் ௤

PTAT circuit is also called as Vt generator as we try to

design a circuit in such a way that we get Vt term in voltage
equation. This gives us a positive slope w.r.t temperature. In
equation 3. The Voltage across single diode is Vd and Vd1 is
voltage across n stacked diodes.
ܸ݀ െ ܸ݀ͳ ൌ ܸ‫Ž כ ݐ‬ሺ݊ሻ (3)

Fig. 5. Two stage OPAMP with PMOS input pair used in BGR

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 When we add both the PTAT and CTAT circuit we get a
reference circuit giving a slope zero voltage ideally. The
reference circuit is called as Bandgap reference because our
target is to use the Vbg term in generating the reference as it
is temperature independent. Bandgap voltage of
semiconductor is intrinsic property of semiconductor, so it
does not depend much on (PVT) process, supply and
temperature variation. Usually, BGR circuit is designed in
two ways. a) Using current mirror, b) Using OPAMP as
shown in fig 4. OPAMP and current mirror is used to adjust
the voltage between two branches. As in fig3, Left branch in
BGR is CTAT and right branch is PTAT and a OPAMP is
connected in between point A and B so as to adjust the Fig. 6. Proposed Bandgap Reference Circuit
voltages in both the branches. Similarly, a current mirror
can be used in place of OPAMP.
III. PROPOSED BGR AND SUB-BGR CIRCUIT
There are several techniques to design BGR. The
technique used in this paper is first order temperature
compensation technique. In this method we try to eliminate
the 1st order temperature dependency of the voltage. The
objective in this paper is to design BGR with minimum
temperature coefficient. The BGR circuit is designed using
OPAMP in this paper. Banba’s topology is used to design Fig. 7. Gain and Phase of OPAMP
Sub-BGR circuit. OTA is used in Sub-BGR design. The
components used in the circuit are OPAMP, BJTs, resistors. B. BGR
A. OPAMP The designed OPAMP is now used in designing of BGR.
The important part of designing BGR circuit is the selec- The circuit uses PN diode in the form of BJT which
tion of OPAMP. Various types of OPAMPs like Operational generates CTAT and PTAT quantities. One arm of BGR
Transconductance Amplifier (OTA), 2-stage OPAMP, generates CTAT voltage and other arm generates PTAT plus
Folded Cascode OPAMP, Symmetrical OPAMP, etc can be CTAT voltage. The base- emitter voltage Vbe of BJT (Vbe)
used in BGR designing depending on our specifications. The is approximately equal to 0.6V to 0.85V. As the basic
factors that needs to be taken care of, while designing concept of BGR is based on CTAT and PTAT voltage
OPAMP for BGR circuit are- a) Input common mode range generation, a voltage across diode has a negative slope. This
(ICMR), b) Gain of OPAMP, c) Bandwidth of OPAMP, d) diode is used for generation of CTAT voltage. When base
Slew rate of OPAMP. PMOS input paired OPAMP can also and collector of BJT are connected together it forms a diode.
be used, so as to reduce the input common mode range Hence, we get Vbe voltage at Vd point which is equal to
(ICMR). The BGR circuit needs OPAMP of high gain, high 0.7V. To adjust the voltage Vd and Vp, we used OPAMP of
bandwidth and higher slew rate. OPAMP guarantees that the 64dB gain. A 3.3V voltage supply is used. Two BJTs
X and Y have same potential voltage and same current connected in parallel with each other are used on the right
flowing through the arms as in fig4. As illustrated in fig. 5 a arm of BGR as in fig 6. The voltage across R2 resistor is a
two-stage miller OPAMP with PMOS input pair is used in PTAT voltage which in between Vp point and 2 parallel
the proposed BGR circuit. In terms of DC error and output BJTs. The voltage across resistor is proportional to
noise voltage, for instance, OPAMP is crucial to the temperature (PTAT) voltage.
performance of BGR. ܸ‫ ݂݁ݎ‬ൌ ܸܴʹ ൅ ܸ݀ (4)
It is easy to get high gain with this topology. There is Here Vref is the generated reference voltage, Vd is the
direct relation of power supply rejection ratio (PSRR) with voltage across diode connected BJT in left side. Vp is the
the open loop gain at low frequencies. With higher gains we voltage on right arm of BGR circuit. Vd and Vp voltages are
get higher PSRR value. So this topology also helps to connected to the OPAMP so as to make both the points at
improve the PSRR of BGR which is an important factor to equal voltage.
be measured. This OPAMP is good stability wise as it has
miller compensation capacitor of 440fF.
The designed operational amplifier is a 2-stage
OPAMP which achieves a gain of approximately 72dB. The
input common mode range of OPAMP is 0.2V to 0.9V. The
Biasing current used in OPAMP is 10uA. Bandwidth of
OPAMP is 20MHz and its achieved phase margin is 64ͼ.
This OPAMP gives us high gain with good bandwidth and
good stability as the phase margin is greater than 60ͼ. The
OPAMP is designed in the 180nm process technology. Fig. 7
shows the gain and phase plot of OPAMP achieved.
Fig. 8. OPAMP for Sub-BGR Gain and Phase

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C. OPAMP for Sub-BGR Supply voltage of 3.3V, f) load capacitance of 1pF. As
Two stage OPAMP is a usually preferred amplifier used discussed in Section 3 we got the results for OPAMP within
in BGR. OPAMP gives higher bandwidth which improves specified limits. OPAMP with gain 72dB is achieved and
the speed of BGR circuit. This OPAMP is used in Sub- phase margin is greater than 60 which is equal to 64, as
Bandgap voltage reference circuit. If there is any disturbance shown in fig. 7. The Bandwidth obtained is almost equal to
in the circuit connected with amplifier then amplifiers cannot 26MHz. The fig. 11, shows the temperature dependency of
maintain constant output hence high speed OPAMPs are reference voltage (Vref). The obtained Vref is observed for
required. The noise and mismatch will be low in OPAMP. the temperature range from -40°C to 80°C. Table 1 shows
Using OPAMP in Sub- BGR gave expected results as it had the comparison of the work in this paper with the literature
good gain and stability as the phase margin is greater than work.
60ͼ. For the proposed BGR design the range of Vref is
Here OPAMP is designed for low ICMR. Specifications 1.186V to 1.190V. The total power consumption for
of OPAMP is a) ICMR of range 0.5V to 0.9V, b) Bandwidth designed circuit is 181μW. The power supply rejection ratio
is equal to 3MHz, since larger Bandwidth is not required, c) achieved in the simulation is around -42dB at the frequency
Slew rate is 10V/us, d) the gain achieved here is 70dB. Fig 9. of 10Hz for Sub-BGR. The output noise achieved in the
Represents OPAMP used in Sub-BGR. simulation of BGR is around 45.3uV/sqrt (Hz). Fig. 12
represents the output noise of BGR. It is observed that the
simulated results are as expected with very low temperature
coefficient compared with other designs. The TC of BGR is
21ppm/°C. The temperature coefficient is calculated as in
equation 6.
TC = ((Vf −Vi)) / (Nominal Voltage * (Tf −Ti)) (6)
Here Tf= 80°C. and Ti= -40°C. Vf is voltage at
80°C, and Vi is the voltage at -40°C. The OPAMP designed
for Sub- BGR gives 3 MHz of Bandwidth. Its gain is equal to
72 dB. fig 8, represents the gain and phase of the designed
OPAMP for Sub-BGR. The noise generated by Sub-BGR is
60uV/sqrt (Hz). The power consumption of Sub-BGR is very
low, equal to 84uW. The reference voltage generated by
Sub-BGR lies in the range of 0.560V to 0.561V. The TC of
Fig. 9. OPAMP for Sub-BGR. sub-BGR is approximately 14ppm/°C. fig 13 shows the
reference voltage of Sub-BGR circuit. Fig 14, represents the
D. Sub-Bandgap Reference Circuit PSRR of Sub-BGR.
The sub BGR circuit is designed using Dr.H.Banba
topology which is used for generating low voltage reference.
Here above designed OPAMP is used for balancing the
voltage in both the arms of BGR. To make the voltage at
point Vd and Vp we used OPAMP. On the left arm there is
one diode connected BJT. On the right arm there is one
stack of 2 BJTs connected in parallel. Instead of using
resistors at the output of OPAMP, PMOS is used so as to
reduce the output impedance of the OPAMP and OPAMP
would be able to supply high current in the arms. To generate
reference voltage below 1.2V we will require scaling factor
which will multiply CTAT voltage as well. So therefore,
resistors of same value are placed across the points Vd and
Vp. The bandgap reference voltage generated is as below Fig. 10. Sub-BGR with startup circuit.
equation 5, whereR3 is the resistor connected to the 3rd arm
at Vref point, PTAT voltage is generated across R2 resistor
and R1 resistor is connected on both arms of Sub- BGR. fig.
10 represents the proposed Sub- BGR circuit.
ோଷ ோଵ
: ܸ‫ ݂݁ݎ‬ൌ ሼܸܾ݁ ൅ ቀ ቁ ‫Ž כ ݐܸ כ‬ሺ݊ሻሽ (5)
ோଵ ோଶ

IV. SIMULATION RESULTS AND ANALYSIS

The simulation results for designed BGR are
presented in this section. The BGR design is implemented
in a 180nm CMOS technology. The tool used for designing
and simulation of circuits is Cadence Virtuoso. The
specifications defined for OPAMP so as to get high gain and
stability were as follows- a) DC gain > 1000 which is equal
to 72dB, b) Gain Bandwidth = 20MHz, c) Phase margin Fig. 11. BGR Reference Voltage
greater than or equal to 60, d) Slew rate= 10V/μsec, e)

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 satisfies the defined specifications. The best Temperature
Coefficient obtained for the designed BGR circuit minimum,
which is almost equal to 21ppm/°C for the temperature range
of -40°C to 80°C, and that of Sub-BGR is 14ppm/°C. This
circuit could be used in low noise applications as well. The
proposed BGR has a power consumption of 181uW. Sub-
Bandgap Reference circuit gives low power consumption of
84uW. The reference voltage generated by sub-bgr circuit is
around 0.56V. The BGR circuits designed in this paper is
Fig. 12. Output noise of BGR.
micropower voltage reference with Vref almost equal to
1.19V can be used in battery operated equipments, battery
operated systems, handheld equipments, Data Acquisition
System and Industrial and Process- Control System. Here
PMOS pair OPAMP is required in design of BGR, since
BGR is used at the input of OPAMP.
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