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Important Interview Questions Solutions 02

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58 views1 page

Important Interview Questions Solutions 02

Uploaded by

cottilard1995
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Sixth_Part

Q What is the target skew and latency value in your project?

Ans:-

There is no congestion in the placement stage, then what will be the reason for shorts in the routing
stage?

Ans:-

Q Tell any name of a cell?

Ans:-

From which foundry have you got the 7nm files?

Ans:-

Q Tell the reference name of the buffer you have used to fix timing?

Ans:-

Q Have you worked on synthesis?

Ans:- Yes

Q Have you worked on low power design?

Ans:- Yes

Q What did you observe B/W low power & normal design?

Ans:-

Q What is a multibit flip flop? If you have timing violations b/w muiltibit flop, how will you fix it?

Ans:-

Explain PD flow?

Ans:- Flow is:

Import Design

Do sanity Checks

Floorplan

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