‫كــلــيـــة هندسة الحاسوب والمعلوماتية واالتصاالت‬

Faculty of Computer & Informatics

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and Communications Engineering

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Logic Circuits

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Dr. Eng.
Hassan M. Ahmad
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[email protected], [email protected]
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Lecture _08
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Combinational Logic Circuits
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&
its Implementing
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Dr. Eng. Hassan Ahmad 23 July 2018 2

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AND-OR Logic

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 In Sum-of-Products (SOP) form, basic combinational circuits can be directly

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implemented with AND-OR combinations if the necessary complement terms
are available.

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Dr. Eng. Hassan Ahmad 23 July 2018 3

 AND-OR circuit consists of two 2-input AND gates and one 2-input OR gate,

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as shown in Figure-Logic diagram.

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 In general, an AND-OR circuit can have any number of AND gates each with
any number of inputs.
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 The truth table for a 4-input AND-OR logic circuit is shown.

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 The operation of the AND-OR circuit in Fig. is stated as follows:
For a 4-point AND-OR logic circuit, the output X is HIGH (1) if both input
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A and B are HIGH (1) or both input C and D are HIGH (1).

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AND-OR-Invert Logic

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 When the output of an AND-OR is complemented (inverted), it results in an

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AND-OR Invert circuit.
 The logic diagram in Figure shows an AND-OR Invert circuit and

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development of the POS output expression.
 An example of an AOI implementation is shown. The output expression can
be changed to a POS expression by applying DeMorgan’s theorem twice.

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AND-OR-Invert Logic

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 In general, an AND-OR Invert circuit can have any number of AND gates

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each with any number of inputs.
 The operation of the AND-OR Invert circuit in Fig. is stated as follows:

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For a 4-point AND-OR Invert logic circuit, the output X is LOW (0) if
both input A and B are HIGH (1) or both input C and D are HIGH (1).
 A truth table can be developed from truth table for a 4-input AND-OR logic

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circuit by simply changing all 1s to 0s and all 0s to 1s in the output column.
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Exclusive-OR Logic

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 The exclusive-OR gate is actually a combination of two AND gates, one OR
gate, and two invertors, as shown in Figure.

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
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The truth table for an exclusive-OR gate is
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 Notice that the output is HIGH whenever A and B disagree (opposite levels).

 A special exclusive OR operator  is often used, so the output expression

can be stated as X  AB  AB
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o X is equal to A exclusive-OR B” and can be written as X  A B

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Exclusive-NOR Logic

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 The complement of exclusive-OR function is exclusive-NOR, which is

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derived as follows:
X  AB  AB  ( AB ) ( AB )  ( A  B)( A  B)  AB  AB

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 The exclusive-NOR can be implemented by simply inverting the output of an
exclusive-OR, as shown in Fig. (a), or by directly implementing the
expression AB  AB , as show in Fig. (b).

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From a Boolean Expression to a Logic Circuit
Let’s examine the following Boolean expression: X  AB  CDE

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 This expression is composed of two terms, AB and CDE, with a domain of five
variables.
 The first term is formed by ANDing A with B, and the second term is formed by

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ANDing C, D and E.

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 Given the Boolean expression X  AB(C D  EF )
Implement the corresponding logic circuit.

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The structure that indicated in relation to the expression is as follows:

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Before we can implement the final expression, we must create the sum term C D  EF ;
but before we can get this term, we must create the product terms C D and EF ;

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but before we can get the term C D , we must create D .
So, as we can see, the logic operations must be done in the proper order.
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The logic gates required to implement X  AB(CD  EF ) are as follows:
1. One invertor to form D .
2. Two 2-input AND gates to form C D and EF .
3. One 2-input OR gate to form CD  EF .
4. One 3-input AND gate to form X.
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The resulting logic circuit for given expression is shown in Fig.

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The expression is converted to SOP as follows: X  AB(C D  EF )  ABC D  ABEF
and the resulting circuit is shown in Fig.

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From a Truth Table to a Logic Circuit

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 Let the following table specifies a logic function.

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 The Boolean SOP expression obtained from the truth table ORing the
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product terms for which X = 1 is: X  ABC  ABC
 The first term in the expression is formed by ANDing the three variables
A, B, and C
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 The second term is formed by ANDing the three variables A, B, and C

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 The logic gates required to implement this expression are as follows:

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• Three invertors to form A, B, and C variables; X  ABC  ABC
• Two 3-inputs AND gates to form terms ABC and ABC ;

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• One 2-input OR gate to form the final output function, ABC  ABC .

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 The implementation of logic function X  ABC  ABC is illustrated in Fig.

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 Design a logic circuit to implement the operation specified in
following given truth table.

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Notice that X = 1 for only three of the input conditions. Therefore, the logic expression is
X  ABC  ABC  ABC

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The logic gates required are three inverters, three 3-input AND gates and one 3-input OR
gate. The logic circuit is shown in Fig.
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 Develop a logic circuit with four input variables that will only
produce a 1 output when exactly three input variables are 1s.

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The combinations in which there are
exactly three 1s are listed in Table.
The product terms are Ored

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to get the following expression:
X  ABCD  ABCD  ABCD  ABC D
This expression is implemented in Fig.
with AND-OR logic.
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 Reduce the combinational logic circuit in Fig. to a minimum
form.

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The expression for the output of the circuit is:

 
X  A BC C  A BC  D

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Applying DeMorgan’s theorem and Boolean algebra,
X  ( A  B  C )C  A  B  C  D (rul _ 9)
 AC  BC  CC  A  B  C  D

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 AC  BC  C  A  B  C  D
 AC  BC  C  A  B  D
 C ( A  B  1)  A  B  D
(rul _ 7)
(rul _ 5)
(rul _ 2)
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 C ( A  1)  A  B  D (rul _ 2)
 A B C  D (rul _ 4)
The simplified circuit is a 4-input OR gate as shown in Fig.
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 The operation of any gate is the same regardless (‫ )بغض النظر‬of whether its

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inputs are pulsed or constant levels.
 The nature of the inputs (pulsed or constant levels) does not alter (‫ )يغيّر‬the

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truth table of a circuit.
 The following is a review of the operation of individual gates for use in
analyzing combinational circuits with pulse waveform inputs:

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1. The output of an AND gate is HIGH only when all inputs are HIGH at
the same time.
2. The output of an OR gate is HIGH only when at least one of its inputs
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is HIGH.
3. The output of a NAND gate is LOW only when all inputs are HIGH at
the same time.
4. The output of a NOR gate is LOW only when at least one of its inputs
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is HIGH.

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 Determine the final output waveform X for the circuit in following
Fig., with input waveforms A, B, and C as shown.

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 The output expression, AB  AC , indicates that the output X is LOW when:
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• both A and B are HIGH or
• both A and C are HIGH or
• all inputs are HIGH.
 The output waveform X is shown in the timing diagram of given Fig.
 The intermediate waveform Y at the output of the OR gate is also shown.
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 Draw the timing diagram for the circuit in following Fig. showing the
outputs of G1 , G2 , and G3 with the input waveforms, A, and B, as indicated.

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When both inputs are HIGH or when both inputs are LOW, the output X is HIGH as shown
in following Fig.

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Notice that this is an exclusive-NOR circuit.
The intermediate outputs of gates G2 , and G3 are also shown in Fig.
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 Determine the output waveform X for the logic circuit with input
waveforms in Figure by first finding the intermediate waveform at each of points Y1, Y2, Y3,

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and Y4.

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Universal gate Either a NAND or a NOR gate. The term universal refers to a
property of a gate that permits any logic function to be implemented

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by that gate or by a combination of gates of that kind.
Negative-OR The dual operation of a NAND gate when the inputs are active-LOW.
Negative-AND

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The dual operation of a NOR gate when the inputs are active-LOW.
Node A common connection point in a circuit in which a gate output is
connected to one or more
gate inputs.

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1. AND-OR logic can have only two 2-input AND gates.

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2. AOI is an acronym for AND-OR-Invert.
3. If the inputs of an exclusive-OR gate are the same, the output is LOW (0).

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4. If the inputs of an exclusive-NOR gate are different, the output is HIGH (1).
5. A parity generator cannot be implemented using exclusive-OR gates.
6. NAND gates can be used to produce the AND functions.
7.

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NOR gates cannot be used to produce the OR functions.
8. Any SOP expression can be implemented using only NAND gates.
9. Negative-OR is equivalent to NAND.
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Answers:
1. b 5. c

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2. d 6. b
3. c 7. c

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9. c
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Write the output expression for each circuit in Figure.

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Write the output expression for each circuit in Figure.

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Develop the truth table for each circuit in Figure.

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 Use AND gates, OR gates, and inverters as needed to implement the
following logic expressions as stated

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 Use NAND gates, NOR gates, or combinations of both to
implement the following logic expressions as stated:

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 Using Karnough map, implement a logic circuit for the truth table
in Table.

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 Implement the logic circuits in Figure using only NAND gates,
and also using only NOR gates.

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NAND:

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NOR:
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 Determine the output waveform X for the circuit in Fig., directly from the
output expression.

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 The output expression for the circuit is developed in following Fig.

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 Result: The SOP form indicates that the output is HIGH when A is LOW and C is HIGH
or when B is LOW and C is HIGH or when C is LOW and D is HIGH, regardless ( ‫بغض‬
‫ )النظر‬of values of another variables in each state.
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 The result is shown in following Fig. and is the same as the one obtained by the
intermediate-waveform method in Example 8-7.

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 The corresponding product terms for each waveform condition that results in a HIGH
output are indicated.
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