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ES Unit 1 QBWA

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ES Unit 1 QBWA

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CHRIST

COLLEGE OF ENGINEERING & TECHNOLOGY, PUDUCHERRY


DEPARTMENT OF ECE
EC T72 – EMBEDDED SYSTEMS
Unit-1 Introduction to Embedded Processors, Devices and Communication Buses

1. Define embedded system.


 An embedded system is a system that has embedded software and computer hardware, which makes
it a system dedicated for an application or specific part of an application or product or part of a
larger system.
 It is any device that includes a programmable computer but is not itself intended to be a general
purpose computer.
2. Draw the components of embedded system hardware.

3. Mention the constraints in designing embedded system.


 An embedded system is designed keeping in view three constraints. They are
 Available system memory
 Available processor speed
 The need to limit power dissipation.
4. Enumerate the main components of embedded system.
 An embedded system is a system that has three main components embedded in to it.
 It embeds hardware similar to computer.
 It embeds main application software.
 It embeds RTOS (Real Time Operating System) that supervises the application software
running on hardware.
5. How an embedded system is characterized?
 An embedded system is characterized by the following.
 Real – time and multirate operations define the ways in which system works.
 Complex algorithms
 Complex graphic user interfaces
 Dedicated functions.
6. What do you mean by formalization of system design? (Apr’15)
 Formalization of a system design is done using top-down approach by abstraction and by
 Detailing requirements and specifications of hardware and software.
 Defining architectures of hardware and software.
 Coding and implementation as per architecture
 Testing, validation and verification of system.
7. Give the classification of embedded system. (Apr’15)
 We can classify embedded systems in to three types as follows.
 Small scale embedded systems
 Medium scale embedded systems.
 Sophisticated embedded systems.
8. What is meant by RISC? (Nov’14)
 A RISC (Reduced Instruction Set Computer) microprocessor provides the speedy processing of
instructions, each in a single clock-cycle. This facilitates pipelining and superscalar processing.
 There is great enhancement of speed by which an instruction set is processed. RISCs are used when
the system needs to perform intensive computation.
9. Define embedded system processor. (Nov’14)
 An embedded processor is a processor with special features that allow it to embed multiple
processes into the system.
 An embedded processor is term used for processors with fast processing, fast-context switching and
automatic ALU operations.
10. Give any two VLIW and DSP processors advantages. (Nov’13)
VLIW Processor Advantages
 Pure VLIW machines do not need complicated logic to check for dependencies.
 Eliminates complicated instruction scheduling and parallel dispatch associated with superscalar
approach
 Compiler is critical to performance: better compiler technology can result in improved performance
on the same hardware
DSP Processor Advantages
 No engineering cost involved for designing the signal processor.
 Used with signal-processing related instructions for filters, image, audio and CODEC operations.
11. List the challenges faced in designing an embedded system. (Nov’13)
 Amount and type of hardware needed.
 Optimizing power dissipation.
 Optimizing power consumption.
12. Elucidate CODEC.
 CODEC is coder and decoder. A CODEC is a processor circuit that encodes input and decodes the
encoded information or bits or signals into a complete set of bits or original signal.
 Voice, speech, image, video signals and bits are encoded for storing and decode from stored for
displaying or playing.
13. Define Bus.
 A bus consists of a common set of lines to connect multiple devices, hardware units and systems for
communication between any two of these at any given instance.
 A bus communication protocol specifies how signals communicate on the bus. A bus may be serial
or parallel that transfers one or multiple data bits at an instance.
14. Give examples for embedded system.
 A few examples of embedded system applications are
 Automatic chocolate vending machine.
 Washing or cooking system and Multitasking toys.
 Stepper motor controller for robotics system.
15. What is SoC?
 SoC is a system on a VLSI chip that has all necessary analog as well digital circuits, processors and
softwares. An SoC may be embedded with the following components. They are
 Embedded processor GPP or ASIP.
 A network bus protocol core.
 An encryption function unit.
 Memories
 Programmable logic devices (PLD) and FPGA.
16. Write short notes on ASIC.
 ASICs are designed using VLSI design tools with the processor GPP or ASIP and analog
circuits embedded into the design.
 The designing is done using the Electronic Design Automation tool. For design of an ASIC, a High
- level Design Language is used.
17. Enumerate the steps in design of embedded system.
 The concepts used during design process are as follows.
 Abstraction
 Hardware and software architecture
 Extra functional properties.
 Mapping and refinement
 User interface design
18. List the single purpose processor used in embedded system.
 Single purpose processor used in embedded systems include
 Coprocessor
 Graphics processor
 Pixel processor
 Encryption and decryption engine
 DCT and DCIT processor
19. Mention the two types of communication ports for IO devices.
 There are two types of communication ports for IOs. They are
 Serial line communication port and
 Parallel line communication port.
20. Elucidate synchronous communication.
 When a byte (character) or frame (a collection of bytes) of data is received or transmitted at
constant time intervals with uniform phase differences, the communication is called synchronous.
 Bits of a data frame are sent in a fixed maximum time interval. An example is inter-processor
communication in a multiprocessor system.
21. Define Iso-synchronous communication.
 Iso-synchronous is a special case when the maximum time interval can be varied.
 Communication in which a constant phase difference is not maintained between the frames but
maintained within a frame.
 Only the maximum time interval is not prefixed between which a frame of bytes transmits that is,
it can be variable
22. State Asynchronous communication.
 When a byte (characters) or frame (a collection of bytes) of data is received or transmitted at
variable time intervals, communication is called asynchronous.

 Voice data on the line is sent in asynchronous mode. Over a telephone line the communication is
asynchronous.

23. Define serial and parallel communication.


 Serial communication means that over a given line or channel one bit can communicate and the bits
transmit at periodic intervals generated by a clock.
 A serial communication is over short or long distances. A serial port is a port used for serial
communication.
24. Enumerate the classification of serial and parallel ports of IO Devices.
 Serial and parallel ports of IO Devices can be classified into following IO types. They are
 Synchronous serial input and output
 Parallel port input and output
 Asynchronous serial UART input and output
 Parallel port one bit input and output.
25. List the considerations for selecting a processor.
 A system designer should consider the following important constraints when selecting a processor.
 Instruction set
 Maximum bits in an operand(8 or 16 or 32) in a single arithmetic or logical operations.
 Clock frequency in MHz and processing speed in MIPS.
 Processor ability to solve complex algorithms while meeting deadlines for processing.
2
26. Define I C, CAN and USB Bus.
2
 I C- A standard bus that follows a communication protocol and is used between multiple ICs. It
permits a system to get data and send data to multiple compatible ICs connected on bus.
 CAN- A standard bus used at the control area network generally in automotive and industrial
electronics.
 USB Bus- A standard plug and play bus for fast serial transmission and reception.
27. Mention the protocols used for synchronous and asynchronous transmission.
 A communication system may use the following protocols for synchronous or asynchronous
transmission from a device port.
 RS232C, UART, HDLC, X.25, Frame Relay, ATM, DSL and ADSL. These are protocols for
networking the physical devices in telecommunication and computer networks.
28. Define Bluetooth.
 Bluetooth is an IEEE Standard 802.15.1 protocol. The physical layer radio communicates at carrier
frequencies in 2.4 GHz band with FHSS.
 It supports range up to 10m low power and up to 100m high power.
 A self-discovery and self-organizing network protocol for the wireless personal area network and
popularly used in mobile handheld devices.
29. Elucidate IrDA.
 IrDA is Infrared Data Association. IrDA recommends a protocol suite as standard. It supports data
transfer rates of up to 4Mbps.
 It supports bi-directional serial communication it supports 5 levels of communication.
 Level 1 is minimum required communication.
 Level 2 is access-based communication.
 Level 3 is index-based communication.
 Level 4 is synchronized communication.
 Level 5 is SyncML-(synchronization markup language) based communication.
30. Enumerate the three ways of communication.
 The three ways of communication are
 Synchronous communication
 Asynchronous communication
 Iso-synchronous communication.
31. Compare synchronous, Iso-synchronous and Asynchronous communication.
Synchronous communication Asynchronous Iso-Synchronous
communication communication
Communication in which Communication in which a Communication in which a
a
constant phase difference constant phase difference is not
constant phase difference
between the transmitter clock maintained between the frames but
is maintained between
and bit recovery clock need not maintained within frames.
clocks.
to be maintained
The clock that guides the The clock that guides the The clock that guides the
transmitter and receiver are transmitter and receiver are not transmitter and receiver are not
constant. synchronized. separate.
A maximum time interval is Time interval between which a The maximum time interval is not
pre-fixed between which a set or frame of bytes transmits pre-fixed between which a frame
frame of bytes transmits. is not pre-fixed. of bytes transmits.

32. Define System.


 A system is a way of working, organizing or doing one or many tasks according to a fixed plan,
program, or set of rules.
 A system is also an arrangement in which all its units assemble and work together according to the
plan or program.
PART - B ANSWERS
1. Explain about various challenges in embedded system design. (Apr’15)
The following are the challenges that arise during the design process.
Amount and type of hardware needed:
 Optimizing the requirement of microprocessors, ASIPs and single purpose processors in the system
on the basis of performance, power dissipation, cost and other design metrics are the challenges in a
system design.
 A designer also chooses the hardware (memory RAM, ROM or internal and external flash or
secondary memory, buses and power source or battery).
Optimizing Power Dissipation and Consumption:
 Power, consumption during the operational and idle state of system.
Clock Rate Reduction
 Power dissipation typically r educ es 2.5μ W per 1 00 kHz of reduc ed clock rate . So
reduction from
8000 kHz to 100kHz reduces power dissipation by about 200 μW.
Voltage Reduction
 Voltage Reduction in devices such as a cellular phone, compared to 5V operation a CMOS circuit
power dissipation reduces by one sixth, in 2.0V operation.
Wait, Stop and Cache Disable instruction
 An embedded system may be needed to be run continuously without being switched off.

 Total power consumption by the system while in running, waiting and idle states should be limited.
Process Deadlines
 Meeting the deadline of all processes in the system while keeping the memory, power dissipation,
processor clock rate and cost at minimum is a challenge.
Flexibility and upgrade ability
 Flexibility and upgrade ability in design while keeping the cost minimum and advanced versions
of a product to be introduced in the market later on.
Reliability
 Designing a reliable product by design, testing and verification is a challenge.

 The goal of testing is to find error.

 Verification refers to an activity to ensure that specific functions are correctly implemented.
2. Define embedded system. Explain its architecture with neat diagram. (Nov’14)
 An embedded system is a system that has embedded software and computer hardware, which makes
it a system dedicated for an application or specific part of an application or product or part of a
larger system.
 It is any device that includes a programmable computer but is not itself intended to be a general
purpose computer.
 Program Flow and data path Control Unit (CU) —includes a fetch unit for fetching instructions
from the memory.
 Execution Unit (EU) —includes circuits for arithmetic and logical unit (ALU), and for
instructions for a program control task, say, data transfer instructions, halt, Interrupt, or jump to
another set of instructions or call to another routine or sleep or reset
General purpose microprocessor
 For example, Intel 80x86, Sparc, or Motorola 68HCxxx
Embedded general purpose processor
 Fast context switching features, use of on-chip Compilers, for example, Intel XScale Applications
Personal Internet Client Architecture-based PDAs, cell phones and other wireless devices,
Application Specific Instruction-Set Processor (ASIP)
 Microcontroller — Intel, Motorola, Hitachi, TI, Philips and ARM , for example, an Intel MCS51,
Philips 51XA, 51MX, or Motorola — 68HC11, 68HC12, 68HC16
 DSP or Typically a Texas Instruments- C28xSeries, C54xx or C64xx or Analog Devices SHARC
or
Tiger SHARC, Motorola 5600xx
 Media processor TI DSP TMS320DM310 or Trimedia Phillips Media Processor 1x00series for
Processing Streaming and Data Networks and Image, Video and Speech: PNX 1300, PNX
1500(2002)
 IO processor or Network processor or A domain specific processor
GPP or ASIP core (s)
 GPP or ASIP integrated into either an Application Specific Integrated Circuit (ASIC), or a Very
Large Scale Integrated Circuit (VLSI) circuit or a FPGA core integrated with processor unit(s) in
a VLSI (ASIC) chip
Application Specific System Processor (ASSP)
 Typically a set top box processor or mpeg video-processor or network application processor or
mobile application processor
Single purpose processor or Application Specific Instruction processor
 Floating point Coprocessor
 Pixel coprocessor and image codec in digital camera
 Graphic processor, Speech processor
 Adaptive filtering processor, Communication protocol stack processor
 Encryption engine, Decryption engine
Multi core processors or multiprocessor system using GPPs
 Multiprocessor system for Real time performance in a video-conference system,
 Embedded firewall cum router, High-end cell phone.
Hardware Elements in the Embedded Systems Power Source
 System own supply with separate supply rails for IOs, clock, basic processor and memory and
analog units
 Supply from a system to which the embedded system interfaces, for example in a network card,
 Charge pump concept used in a system of little power needs, for examples, in the mouse or
contact- less smart card.
Power Dissipation Management
 Clever real-time programming by Wait and Stop instructions
 Clever reduction of the clock rate during specific set of instructions
 Optimizing the codes and
 Clever enabling and disabling of use of caches or cache blocks
Clock Oscillator Circuit and Clocking Units
 Appropriate clock oscillator circuit
 Real Time Clock (System Clock) and Timers driving hardware and software
Reset Circuit
 Reset on Power-up
 External and Internal Reset circuit
 Reset on Timeout of Watchdog timer
Memory
a. Functions Assigned to the ROM or EPROM or Flash
 Storing 'Application' program from where the processor fetches the instruction codes
 Storing codes for system booting, initializing, initial input data and Strings.
 Storing Codes for RTOS.
 Storing Pointers (addresses) of various service routines.
b. Functions Assigned to the Internal, External and Buffer RAM
 Storing the variables during program run,
 Storing the stacks,
 Storing input or output buffers for example, for speech or image
c. Functions Assigned to the EEPROM or Flash
 Storing non-volatile results of processing
d. Functions Assigned to the Caches
 Storing copies of the instructions, data and branch-transfer instructions in advance from external
memories
 Storing temporarily the results in write back caches during fast processing
Interrupts Handler
 Interrupt Handling element for the external port interrupts, IO interrupts, timer and
 RTC interrupts, software interrupts and Exceptions
Linking Embedded System Hardware
 Linking and interfacing circuit for the Buses by using the appropriate multiplexers, and decoders,
demultiplexers Interface the various system units
3. Elaborate in detail about Very Large Instruction Word (VLIW) Architecture. (Nov’14)
 The new architecture that has attracted a great deal of attention in the DSP community is the Very
Long Instruction Word (VLIW).
 The very long instruction word processing increases the number of instructions processed per cycle.
 It is essentially a concatenation of several short instructions and requires multiple execution units,
running in parallel, to carry out the instructions in a single cycle.
 The new architecture makes use of extensive parallelism whilst retaining some of the good features
of previous DSP processors. VLIW architecture executes multiple instructions/cycle and use
simple, regular instruction sets.
 The very long instruction word processor consists of architecture that reads a relatively large group
of instructions and executes them at the same time.
 The VLIW processor combines many simple instructions into a single long instruction word that
uses different registers.
 A language complier or pre-processor separates program instructions into basic operations that are
performed by the processor in parallel.
 These ope rati ons ar e pl aced int o a “ve r y lon g inst ructi on word” that the
processor can then disassemble, and then transfer each operation to an appropriate execution unit.
 For example, the group might contain four instructions are not dependent on each other so they can
be executed simultaneously.

Advantages of VLIW Architecture


 Increased performance
 Better complier targets
 Potentially scalable and easy to program.
Disadvantages of VLIW Architecture
 Complier complexity
 Increased memory use.
 High power consumption
4. Discuss in detail about single purpose processors.
Single purpose used in embedded systems include:
 Coprocessor: for example, for floating point processing.
 Graphics processor: An image consists of a number of pixels. For examples, Quarter common
intermediate format-Quarter CIF images have 144 X 176(horizontal x-axis X vertical y-axis) pixels.
 Pixel coprocessor: High-resolution pictures have formats: 2592 X 1944 pixels = 5,038,848 pixels.
A pixel coprocessor is required in digital cameras for displaying images directly or after operations
such as rotate right, rotate left, rotate up, rotate down.
 Encryption engine: A suitable algorithm runs in this processor to encrypt data to secure
transmission.
 Decryption engine: A suitable algorithm runs in this processor to decrypt the encrypted data at
receiv er’s end.
 A discrete cosine transformation (DCT) and inverse transformation (DCIT) processor is required
in speech and video processing.
 Protocol stack processor: A protocol stack, which has a number of header words, is prepared
before an application data is sent to a network. At the receiver’s end, the protocol stack is received
and application data is accepted accordingly.
 Network processor: A network processor’s functions are to establish a connection, finish, send and
receive acknowledgements, send and receive retransmission requests and check and correct
received data frame errors.
 Accelerator: This accelerator is a coprocessor that accelerates computations by taking advance
actions that are just-in-time compilations of the next object in Java programs.
 CODEC(Coder and Decoder): A CODEC is a processor circuit that encodes input and decodes
the encoded information or bits or signals into a complete set of bits or original signal.
 Voice, speech, image, video signals and bits are encoded for storing or transmission and decoded
from the stored or received bits or signal for display or playing.
 The CODEC function as a compression and decompression unit for voice, speech, image or video
signals.
 JPEG CODEC: This is a processor for jpg compression and decompression.
 MPEG CODEC: The Motion Pictures Experts Group (MPEG) recommends CODEC standards for
video.
 Controller: e.g., direct memory access or bus.
5. With neat diagram, explain RISC Architecture. (Nov’13)
 Computer architecture was defined as the attributes of a computer seen by the machine language
programmer as described in the Principles of Operation.
 Principles of Operation are used to define the functions that the implementation should provide.
 Instruction set and Instruction format
 Operation codes and Addressing modes
 All registers and memory locations that may be directly manipulated or tested by a machine
language program and Formats for data representation
 Machine Implementation was defined as the actual system organization and hardware structure
encompassing the major functional units, data paths, and control.
RISC ARCHITECTURE
 RISC architecture starts with a small set of most frequently used an instruction which
determines the pipeline structure of the machine enabling fast execution of those instructions in one
cycle.
 One cycle per instruction is achieved by exploitation of parallelism through the use of pip elining. It
is parallelism through pipelining that is the single most important characteristic of RISC
architecture from which all the remaining features of the RISC architecture are derived.
 Basically we can characterize RISC as a performance oriented architecture based on exploitation of
parallelism through pipelining.
 Those include SPARC, MIPS, and a super-scalar implementation of RISC architecture, IBM (also
known as PowerPC architecture).
RISC Performance

 IF – Instruction Fetch
 ID – Instruction Decode
 EX - Execute
 MEM – Memory Access
 WB – Write Back
 There are several ways to achieve performance: technology advances, better machine organization,
better architecture, and also the optimization and improvements in compiler technology.
 By technology, machine performance can be enhanced only in proportion to the amount
of technology improvements and this is, more or less, available to everyone.
 It is in the machine organization and the machine architecture where the skills and experience of
computer design are shown. RISC deals with these two levels - more precisely their interaction and
trade-off.
 Typically the instruction execution time is divided in five stages, machine cycles, and as soon as
processing of one stage is finished, the machine proceeds with executing the second stage.
 However, when the stage becomes free it is used to execute the same operation that belongs to the
next instruction.
 The operation of the instructions is performed in a pipeline fashion, similar to the assembly line in
the factory process.
6. Describe in detail about three ways of communication.
Synchronous Communication
 When a byte (character) or frame (a collection of bytes) of data is received or transmitted at
constant time intervals with uniform phase differences, the communication is called synchronous.
 Bits of a data frame are sent in a fixed maximum time interval. Iso-synchronous is a special case
when the maximum time interval can be varied.
 Two characteristics of synchronous communication are as follows:
 Bytes (or frames) maintain a constant phase difference. It means they are synchronous, that is,
in synchronization. There is no permission for sending either bytes or the frames at random
time intervals; this mode therefore does not provide for handshaking during the
communication interval. The master is the one whose clock pulses guide the transmission and
slave is the one which synchronizes the bits as per the master clock.
 A clock ticking at a certain rate must always be there to serially transmit the bits of all the
bytes. The clock is not always implicit to the synchronous data receiver. The transmitter
generally transmits the clock rate information in the synchronous communication of the data.
 There are two separate lines for the data bits and clock. The parallel-in serial-out (PISO) and serial-
in parallel-out (SIPO) are used for transmitting and receiving the signals for data, respectively.
 There is a common line and the clock information is encoded by modulating the clock with the
stream of bits. There are preceding and succeeding additional synchronizing and signalling bits.
 There are five common methods of encoding the clock information into a serial stream of the bits:
 Frequency Modulation (FM)

 Mid Frequency Modulation (MFM)

 Manchester coding

 Quadrature amplitude modulation (QAM)


 Bi-phase coding
Iso-Synchronous Communication
 Communication in which a constant phase difference is not maintained between the frames but
maintained within a frame.
 Clocks that guide the transmitter and receiver are not separate.
 Only the maximum time interval is not prefixed between which a frame of bytes transmits that is, it
can be variable.
 Between the frames, there is handshaking between the two ends or there may be a pause.
 Uses are for transmission on a LAN or between two processors.
Asynchronous Communication

 When a byte (characters) or frame (a collection of bytes) of data is received or transmitted at


variable time intervals, communication is called asynchronous.

 Voice data on the line is sent in asynchronous mode.

 Over a telephone line the communication is asynchronous.

 Another example is keypad communication.

 Two characteristics of asynchronous communication are as follows:


 Bytes (frames) need not maintain a constant phase difference and are asynchronous, that is,
not in synchronization.
 Though the clock must tick at a certain rate to transmit bits of a single byte (or frame) serially,
it is always implicit to the asynchronous data receiver. The transmitter does not transmit along
with serial stream of bits any clock rate information in asynchronous communication.
7. Write a detailed note on Application Specific Instruction set Processor (ASIP).
 Application Specific Instruction Set Processors is a programmable microprocessor where hardware
and instruction set are designed together for one special application.
 An ASIP is typically a programmable architecture that is designed in a specific way to
perform certain tasks more efficiently. This extra efficiency is not exclusively associated
with faster performance.
 Other factors like reduced production costs, simplified manufacturing process and less power
consumption can all be considered efficiency qualities for ASIP.
 The term “Applicati on” in ASIP is not necessarily related to software applications, it
actually
describe the class of tasks the ASIP platform was designed to efficiently accomplish.
 As the name suggests, the Instruction set seems to be the core characteristic of any ASIP based
platform; but this is entirely not true.
 For example, if the load/store unit cannot handle data processing as quick, there will be a
performance bottle-neck due to system interfaces.
 Similarly for the micro-architecture, the pipeline of the ASIP must be designed in a specific way
that optimizes the performance of the whole system.
 A traditional RISC stages (Fetch, Decode, Execute, memory & write -back) might not be the
optimal pipeline for the application.
Instructions Set
 An ASIP instruction is usually different than a normal instruction. It doesn’t have to be composed
of a mnemonic and register/memory operands.
 The design of the architecture – which is controlled by the application of the ASIP -, shapes
the instruction-set format.
 ASIPs as more of a hardwired block than a processor from an architectural and interface
perspective.
 Instructions set in ASIPs can be divided into two parts, Static logic which defines a minimum ISA
and configurable logic which can be used to design new instructions.
Network Processors
 A network processor is a special-purpose, programmable hardware device that combines the low
cost and flexibility of a RISC processor with the speed and scalability of custom silicon (i.e., ASIC
chips).
 Network processors are building blocks used to construct network systems.
Automating application-specific instruction-set processor design – ASIP Designer
 ASIPs rely on similar techniques as used in the design of hardware accelerators to reach high
performance and low power: heavy use of parallelism and specialized data path elements.
 ASIPs retain software programmability within their application domain, resulting in C/C++
programmable processors and accelerators with the lowest power possible.
2
8. Describe about I C, USB and CAN bus in detail.
2
I C Bus
2 2
 I C is a serial bus for interconnecting ICs. It has a start bit and a stop bit like in a UART. I C (Inter
IC connect) bus is a popular bus for these circuits.
 It has seven fields for the start, 7-bit address, defining a read or write, defining a byte as an
acknowledging byte, data byte, NACK and end.
2
 These ICs are mutually network through a common synchronous serial bus. There are three I C
bus standards:
2
 Industrial 100kbps I C
2
 100 kbps SM I C
2
 400 kbps I C
2
 The I C bus has two lines that carry its signals – one line is for clock and one is for
2
bidirectional data. There is a protocol for I C bus.
2
 Each device has an address using which the data transfers take place. The I C was originally
developed at Philips Semiconductors.
2
 Each slave can also optionally have an I C bus controller and processing element. A number of
masters can also connect to the bus.
 The disadvantage of this bus is the time taken by algorithm in the master hardware that analyses the
bits through I2C in case the slave hardware does not provide for the hardware that supports it. Some
ICs support the protocol and some do not.
CAN Bus
 CAN is a serial bus for interconnecting a central control network. It is widely used in automobiles.
Number of devices and controllers are located and are distributed in a car. Embedded controllers
must network through a bus.
 The CAN bus network has a serial line, which is bi-directional. CAN bus has multimaster and
multicast features.
 An automobile uses number of distributed embedded controllers, including those for the brakes,
engine, electric power, lamps, inside temperature control, air-conditioning, gate, front dash board
display, meter display panel and cruising control.
 A CAN device using CAN controller receives or sends a bit at any instance by operating at the
maximum rate of 1Mbps. It employs a twisted pair connection of120 ohm line impedance a teach
controller node. The pair can run up to a maximum length of 40m.
Application
 CAN (Controller Area Network) bus is a standard bus in distributed network.
 It is mainly used in automobile electronics. It is also used medical electronics and industrial plant
controllers.
USB BUS
 USB is a serial bus that interconnects a system. It attaches a device from the network.
 Universal Serial Bus (USB) is a bus between host system and number of interconnected peripheral
devices. A maximum 127 devices can connect to a host.
 It provides a fast (up to 12 Mbps) and as well as a low speed (up to 1.5 Mbps) serial transmission
and reception between host and serial devices.
 A USB host, which includes controller for function as bus master can connect flash memory cards,
pen-like memory devices, digital camera printer, mice, Pocket PC and video games.
 There are three standards:
 USB 1.1
 USB 2.0
 Wireless USB
 USB protocol has this feature – a USB device can be hot plugged, configured and used, reset,
reconfigured and used; it can share bandwidth with other devices, detached and reattached.
Attaching and detaching can be done without rebooting.
 USB bus cable has four wires, one for +5V, two for twisted pairs and one for ground. There are
termination impedances at each end that are as per the device speed.
 The data transfer is of four types:
 Controlled data transfer
 Bulk data transfer
 Interrupt driven data transfer
 Iso-synchronous transfer
Application
 It is mostly used in networking the IO devices like scanner in a computer system.
 Wireless USB is used for remote connections without wires.
9. Explain in detail about design metrics in embedded system.
Design Metrics: Description
Power Dissipation  For many systems, particularly battery operated systems, such as
mobile phone or digital camera the power consumed by the system is
an important feature.
 The battery needs to be recharged less frequently if power dissipation
is small.
Performance  Instructions execution time in the system measures the performance.
Smaller execution time means higher performance.
 For example a mobile phone, voice signals processed between antenna
and speaker in 0.1s shows phone performance.
Process deadlines  There are number of processes in the system, For example
 Keypad input processing
 Audio signals processing
 Video signals processing
User Interfaces  These include keypad GUIs.
Size  Size of the system is measured in terms of
 Physical space is required,
 RAM in KB and internal flash memory requirements in MB or GB
for running the software and for data storage and
 Number of million logic gates in the hardware.
Engineering Cost  Initial cost of developing, debugging and testing the hardware and
software is called engineering cost.
Manufacturing Cost  Cost of manufacturing each unit.
Flexibility  Flexibility in design enables development of different versions of a
product and advanced versions later on.
Prototype  Time taken in days or months for developing the prototype.
Development time  Functionalities. It includes engineering time and making the prototype
time.
Time-to-market  Time taken in days or months after prototype development to put a
product for users and consumers.
System and user safety  System safety in terms of accidental fall from hand or table, theft(e.g.,
a phone locking ability and tracing ability) and in terms of user safety.
Maintenance  Maintenance means changeability and additions to the system.
 For example, adding or updating software, data and hardware.
 Example of software maintenance is additional service or functionality
software.
 Example of data maintenance is additional ring-tones, wallpapers etc.

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