Activity 1.2.

4 Introduction to Sequential Logic

Design: Counters (DMS)
Introduction
Along with combinational logic, sequential logic is a fundamental building block of digital
electronics. The output values of sequential logic depend not only on the current input values
(i.e., combinational logic), but also on previous output values. Thus, sequential logic requires
a clock signal to control sequencing and memory and to retain previous outputs.

In this activity we will use the D flip-flop introduced in Activity 1.1.6 Component Identification:
Digital. We are limiting our use to this type of flip-flop in this introductory unit because of its
simplicity and ease of use. The D flip-flop is just one of many different types of flip-flops that
can be used to implement sequential logic circuits.

Equipment
● Circuit Design Software (CDS)

● (2) - 74LS74 Integrated Circuits (ICs)

● #22 Gauge solid wire

● Breadboard

D Flip-Flop Example Circuit: Binary Counter

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Digital Electronics Activity 1.2.4 Introduction to Sequential Logic Design: Counters (DMS) – Page 1
Procedurel
Let’s begin the study of sequential logic by reviewing the basic operations of the D flip-flop.
1. Using the Circuit Design Software (CDS), create the circuit below.

a) Start the simulation.

b) Set the input switches P and C to 5v. Again, since PR and CLR are active low
inputs, this will make them both inactive. Toggle the input T several times. The
circuit should behave exactly like the circuit in Activity 1.1.6,

c) Set the input switch P to GROUND and C to 5v.

What is the state of the two outputs?

when only the que is on

d) Toggle the input T several times.

Record what effect this has on the two outputs.

It doesn't have an effect to the output

e) Set the input switch P to 5v and C to GROUND.

What is the state of the two outputs?

not_que is now on .

f) Toggle the input T several times.

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Digital Electronics Activity 1.2.4 Introduction to Sequential Logic Design: Counters (DMS) – Page 2
 Record what effect this has on the two outputs.
not_que persist to be on and que is off.

2. Let us examine a simple binary counter. Counters are one of the most common
applications of flip-flops. The circuit that we will be observing is called a two-bit binary
counter. The counter will count from zero (00 in binary) to three (11 in binary).

3. Using the Circuit Design Software (CDS), enter the two-bit binary counter shown
below. Use a switch for the input Clock-In and probes for the outputs A and B.

a) Start the simulation.

b) In Activity 1.1.6 we learned that the output on the first flip-flop (A) changes only
when the Clock-In goes from low to high. Toggle the input Clock-In (switch T)
until both outputs A and B are both low and switch T is low. Now cycle
switch T (Cycle means to toggle from low to high back to low) and record what
effect this has on the two outputs in the table below.

Clock-In A B
Initial Values 1 0
st
1 Cycle of switch T 1 1
2nd Cycle of switch T 0 0
3rd Cycle of switch T 0 1
4th Cycle of switch T 1 0
5th Cycle of switch T 1 1
6th Cycle of switch T 0 0
7th Cycle of switch T 0 1
8th Cycle of switch T 1 0
9th Cycle of switch T 1 1

Based on these results, explain the pattern that you observe in the two outputs.
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Digital Electronics Activity 1.2.4 Introduction to Sequential Logic Design: Counters (DMS) – Page 3
 begins with A on and then B is off then turns on then off

4. Using the Circuit Design Software (CDS), modify the circuit used in step (1) so that it
matches that shown below.

a. The first modification is to replace the switch input with a CLOCK_VOLTAGE.

This change will result in the input being continuously toggled. Be sure the
CLOCK_VOLTAGE is set to 5 volts, 50% duty cycle, 60 Hz.

b. The second modification is to add a four-channel oscilloscope set up to view the

three signals A, B, and Clock-In.

c. Be sure to set the oscilloscope’s time-base to 20ms/div and the vertical bases
of the four channels to 10 volts/div. Also, adjust the Y position of the three
channels such that the four signals are all clearly visible.

CLK

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Digital Electronics Activity 1.2.4 Introduction to Sequential Logic Design: Counters (DMS) – Page 4
 d. Start the simulation and let it run until you have captured several periods of
each signal.

e. Using the oscilloscope’s markers, measure the period of the three signals. Use
this data to calculate the frequency for each signal. Record your data in the
table below. Be sure to use the correct units.

Freq
u
e
Signal Period
n
c
y
Clock 16.609
60.208 Hz
-In ms
33.219
B 30.104 Hz
ms
A

f. Based on these results, explain the relationship of the period and frequency
between the three signals. Was this expected?

A larger period gives us a smaller frequency. A larger frequency is supposed to mean that it
is faster, and a larger period means there is more time in between.

5. Analyze the 4-bit binary counter shown below to determine the frequency and period
for the signals A, B, C, and D. Use the table shown below to record your answers.

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Digital Electronics Activity 1.2.4 Introduction to Sequential Logic Design: Counters (DMS) – Page 5
 Frequ
Perio
Signal en
d
cy
Clock
1.003ms 1000 Hz
-In
D 2.076ms 481.696 Hz
C 3.114ms 321.13 Hz
B 8.997ms 111.148 Hz
A 13.149ms 76.05 Hz

6. With such a fast clock speed (1kHz) it is very difficult to see the binary count. Change
the clock frequency to something that allows you to see the 4 probes transition more
slowly in the simulation. Can you count to 15 in binary? What was the clock frequency
that was best for you?

7. Using the pin diagram on the datasheet for the 74LS74 D flip-flop, create the 4-Bit
counter you explored in this activity on your protoboard. Wire the four outputs to (Y3,
Y2, Y1, Y0) of your protoboard. Wire the DIO3 to the CLK input of the first flip-flop.

Using the myDAQ to generate a clock signal.

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Digital Electronics Activity 1.2.4 Introduction to Sequential Logic Design: Counters (DMS) – Page 6
8. With the protoboard plugged into the myDAQ, the myDAQ provides a number of
instruments that assist with design and measurement. We will use the NI ELVISmx
Digital Writer “DigOut” to generate a clock signal
9. Open National Instruments > NI ELVISmx Instrument Launcher. Select “DigOut”.

10. Settings:
a. Lines to Write (0-3)
b. Pattern (Ramp 0-15)
c. Run Continuously
11. When you select “Run” the Digital Writer will
send a signal that can be used as a clock signal to DIO3.
12. To utilize a faster frequency, switch to DIO2 DIO1 or DIO0.
13. Have your instructor verify the counter is functioning.

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Digital Electronics Activity 1.2.4 Introduction to Sequential Logic Design: Counters (DMS) – Page 7