University Institute of Engineering & Technology
(Recognised Under Section 2(f) and 12B of UGC)
Kurukshetra University, Kurukshetra
THEORY EXAMINATION – FEB 2022 TIME – 4 Hrs.
B.TECH - CSE SEMESTER – V
M.M. - 75
PAPER - PC-CS-307 SUBJECT- Computer Organization and Architecture
INSTRUCTIONS TO BE FOLLOWED
The candidates will be required to attempt All questions in Part-A and Part-B
(Compulsory Sections). Attempt any four questions from Part-C selecting at least one
from each unit.
Allotted time for examination is 4 hours that includes time for downloading the
question paper, writing answers, scanning of answer sheets and uploading the sheets
on the Attendance Sheet Cum Answer Sheet Uploading google form.
The PDF files should be saved as Roll No. and Subject Code.
Maximum Page Limit should be 36 (Thirty Six) for attempting the question paper on
A4 sheets which could be downloaded and printed from the sample sheets given in
the UIET Website.
Over-attemptation should be avoided.
Handwriting should be neat and clean and diagrams should be clear and contrasted.
The candidate should not write their Mobile No. otherwise Unfair Means Case will
be made.
While attempting the paper, the candidate will use blue/black pen only.
Before attempting the paper, the candidate will ensure that he/she has downloaded
the correct question paper. No complaint for attempting wrong question paper by the
candidate will be entertained.
Candidate must ensure that he/she has put his/her signature on each page of the
answer sheet used by him/her. Answer sheet without the signature of the candidate
will not be evaluated.
Candidate should ensure before submitting the google form that the correct answer
sheet has been uploaded.
Attempt parts A, B & C separately. Do not inter-mix them. Write neatly & mention the
question number clearly.
PART-A (15 Marks)
Q. No. – 1 Answer the following questions. 15x1=15
(i) Program always deal with…………… address.
(ii) The address of a page table in memory is pointed by ……………
(iii) Run time mapping from virtual space to logical address is done by …………….
(iv) Address generated by CPU is called…………….
(v) The branch logic that provides decision making capabilities in the control unit is
called…….. transfer.
(vi) CPU does not perform……………….. operation.
(vii) Data hazards occurs when pipeline ………………………………………… operands.
(viii) In reverse polish notations, expression A*B+C*D is written as ……………………
(ix) …………… register keeps track of instructions stored in program stored in memory.
(x) Status bit is also called ……….
(xi) An n bit microprocessor has …………….. registers.
(xii) The circuit conversing binary data to decimal is ……………
(xiii) The maximum capacity of microprocessor which uses 16 Bit database and 32 bit address
base is ……….
(xiv) MRI stands for ………………
(xv) Logic X-OR operation of (4AC0)16 and (B53F)16 results ………….
PART-B (20 Marks)
UNIT-I
2 Discuss the role of Von Neumann Architecture in Computer organization. 5
UNIT-II
3 Distinguish Horizontal and Vertical micro-programming with example. 5
UNIT-III
4 Illustrate Flynn’s taxonomy with suitable example. 5
UNIT-IV
5 Classify and explain different modes of data transfer. 5
PART-C (40 Marks)
UNIT-I
6 Distinguish Associative memory, Cache Memory, Virtual Memory with example. 10
7 Illustrate division using restoring and non restoring algorithms with example. Write 10
various steps involved in non restoring algorithm.
UNIT-II
8 Design and explain the working of control unit in detail. 10
9 i) Distinguish Horizontal and Vertical micro-programming, 10
ii) Distinguish Hardwired and Micro-programmed Control Unit.
UNIT-III
10 Analyse the role of vector processing and Array Processor. 10
11 Illustrate and differentiae CISC and RISC architecture with suitable example. 10
UNIT-IV
12 Classify and explain interrupt handling techniques. 10
13 Explain DMA driven data transfer technique. 10
