Traffic Light Controller Using FPGA

A Project Report Submitted in the partial fulfilment the award ofdegree of

BACHELOR OF TECHNOLOGY

IN

ELECTRONICS AND COMMUNICATION ENGINEERING

BY

CH. ROSHITHA CHARAN SAI (211801130011)

P. GANESH (211801130018)

G. CHANDANA (211801130002)

K.SAI POORNIMA DEVI (211801130012)

CH.PRANEETH (211801131002)

Under the esteemed guidance of

Mr.K. JOGINAIDU,

Assistant professor

DEPARTMENT OF

ELECTRONICS AND COMMUNICATION ENGINEERING

CENTURION UNIVERSITY OF TECHNOLOGY & MANAGEMENT

Vizianagaram, Andhra Pradesh

2022-2023
CENTURION UNIVERSITY OF TECHNOLOGY & MANAGEMENT

Vizianagaram, Andhra Pradesh

BONAFIDE CERTIFICATE

This is to certify that the project work entitled “Traffic Light Controller Using
FPGA” is a fulfillment of project work done by students, P. Ganesh
(211801130018), CH. Roshitha Charan Sai (211801130011), G. Chandana
(211801130002) ,K. Sai Poornima (211801130012) , CH. Praneeth
(211801131002) for the award the degree of BACHELOR OF TECHNOLOGY in
ELECTRONICS AND COMMUNICATION ENGINEERING, during academic
year 2023-2024.

Mr. K. JOGI NAIDU Mr. K. JOGI NAIDU

PROJECT GUIDE HEAD OF THE DEPARTMENT
 ACKNOWLEDGEMENT

I am immensely thankful to Assistant Professor K.Joginaidu, of the Department of Electronics

and Communication Engineering at SoET, Vizianagaram Campus. K.Joginaidu sir led me through
the complexities of this project effortlessly, displaying unparalleled generosity and guidance.
I wish to express my profound and sincere gratitude to Associate Professor, K. Ramya mam,
Department of Electronics and Communication Engineering, SoET, Vizianagaram Campus, who
guided me into the intricacies of this project nonchalantly with matchless magnanimity.
I thank Dr. P. A. Sunny Dayal, Dean of SoET, Vizianagaram Campus for their invaluable
guidance, insightful feedback, and continuous support throughout the course of this project. Your
expertise and mentorship have been invaluable.
I thank Dr. P. Pallavi, Registrar, CUTM, Vizianagaram Campus for their assistance and
cooperation in facilitating the necessary resources and administrative support essential for the
successful execution of this project.
I thank P. Prasanta Kumar Mohanty, Vice Chancellor, CUTM, Vizianagaram Campus for fostering
an environment that encourages academic excellence and innovation. Your vision has been a
constant source of inspiration.
I also express my deepest appreciation to my parents for their unconditional love, encouragement,
and belief in my abilities. Their unwavering support has been the cornerstone of my achievements.
I am sincerely grateful to each one of you for your contributions, guidance, and unwavering
support, without which this project would not have been possible.
 DECLARATION

We hereby declare that the project entitled “ Traffic Lignt Controller Using FPGA " submitted for
the fulfilment of the award of the degree of B. TECH (ECE) at CENTURION UNIVERSITY OF
TECHNOLOGY AND MANAGEMENT (A.P) is our original work and has not been submitted in
any part or full for the award of any other degree or diploma at any other university or institute.
We certify that all the sources of information and material used in the preparation of this project
have been duly acknowledged.

CH. Roshitha Charan Sai (211801130011),

P. Ganesh (211801130018),

G. Chandana (211801130002),

K. Poornima (211801130012),

CH. Praneeth (211801131002)

 LIST OF ACRONYMS

1. ASIC - Application-Specific Integrated Circuit

2. RTL - Register Transfer Level
3. FPGA - Field-Programmable Gate Array
4. GDSII - Graphic Data System II (a file format used in IC design)
5. DRC - Design Rule Check
6. LVS - Layout versus Schematic
7. STA - Static Timing Analysis
8. EDA - Electronic Design Automation
9. SoC - System on Chip
10. IP - Intellectual Property (blocks/modules used in chip design)
11. HDL- Hardware descriptive language
 LIST OF FIGURES

Fig No Description Page No

Fig 1.2 Image of FPGA 1
Fig 1.3 FPGA Design flow 2
Fig 1.3.1 Design entry 3
Fig 1.4 Synthesis 4
Fig 1.4.1 Translate 5
Fig 1.4.2 Map 6
Fig 1.4.3 Place and Route 7
Fig 1.5 Design flow 8
Fig 1.5.3 Timing Stimulation 9
Fig 1.6 Static time analysis step-1 11
Fig 1.6 Static time analysis step-2 11
Fig 2.1 Design flow of Traffic Controller 12
Fig2.2 Traffic controller system 13
Fig2.3 Requirements 15
Fig2.4 Process in software 16
Fig2.5 Traffic Light Control 17
Fig2.6 FSM Machines 18
Fig2.6.1 Moore &Mealy Machines 18
Fig3.2 Debug structure 26
Fig3.3 Debug Design Flow 27
Fig3.3 RTL Schematic 27
Fig4.1 RTL Schematic of Traffic Light Controller 29
Fig4.2 RTL Schematic 30
Fig4.3 Clock source - 31
Fig4.3.1 Clock Source-2 31
Fig4.3.1 Clock Source-2 32
Fig4.4 Wave Forms 33
Fig4.5 Schematic 34
Fig4.6 Equations 34
Fig4.7 Truth Table 35
Fig4.8 Input and Output Pins 35
 TABLE OF CONTENTS

CHAPTER NO. TITLE PAGE NO.

CERTIFICATE i

DECLARATION ii
ACKNOWLEDGEMENT iii
LIST OF ACRONYMS iv

LIST OF FIGURES

ABSTRACT

1. CHAPTER – 1 INTRODUCTION 1-11

1.1. “Traffic controller” 1

1.2. “Introduction of FPGA” 2

1.3. “FPGA Design Flow” 3

1.3.1. “Design Entry” 3

1.4. “Synthesis” 4

1.4.1.“translate” 5

1.4.2 “Map” 6

1.4.3.“Place and Route” 7

1.4.4.Device programming 7

1.5. “Design verification” 7

1.5.1. Behavioural Simulation 7

1.5.2. “Functional Simulation” 8

1.5.3. “Timing Simulation” 8

1.6. “Static timing Analysis” 9
2. CHAPTER – 2 FORMULATION OF PROJECT / IDENTIFICATION OF THE PROBLEM

12-18

2.1. “Design of Traffic Controller” 12

2.2. “Explanation of traffic controller System” 13
2.3. “Define Requirements” 14
2.4. “Choose FPGA board and development environment” 15
2.5. “Understand the traffic controller logic” 16
2.6. “Develop finite state machine” 17
3. CHAPTER 3 PROJECT WORK PART-I 19-28

3.1. “Implementation” 19
3.2. “Source code for Testbench” 22

3.3. “Document and Optimize” 26

4. CHAPTER – 4 PROJECT WORK PART 29-35

4.1. “Simulation Results” 29

4.2. “RTL Schematic” 30
4.3. “Technology Schematic” 30

4.4. “Wave Forms” 33

4.5. “Schematic diagram with inner gates” 34
4.6. “Equations” 34

4.7. “Truth table” 35

4.8. Input and Output Pins 35

5. CHAPTER – 5 SUMMARY, CONCLUSIONS & SCOPE FOR FURTHER STUDY

5.1. “Summary” 36

5.2. “Future Scope” 37

5.3. “Conclusion” 38

5.4. “References” 39
 FPGA BASED TRAFFIC CONTROLLING SYSTEM

ABSTRACT:

The traffic in road crossings /junctions is controlled by switching ON/OFF

Red, Green & Amber lights in a particular sequence. The Traffic Light Controller is
designed to generate a sequence of digital data called switching sequences that can be used
to control the traffic lights of a typical four roads junction in a fixed sequence. It is also
proposed to implement the day mode and night mode operations. It plays more and more
important role in modern management and control of urban traffic to reduce the accident
and traffic jam in road. It is a sequential machine to be analyzed and programmed through
a multistep process. The device that involves an analysis of existing sequential machines
in traffic lights controllers, timing and synchronization and introduction of operation and
flashing light synthesis sequence. The methods that are used in this project are design the
circuit, write a coding, simulation, synthesis and implement in hardware. In this project,
XILINX Software was chosen to design a schematic using schematic edit, writes a coding
using Verilog HDL (Hardware Description Language) text editor.

Traffic light controller is a set of rules and instructions that drivers, pilots, train engineer,
and ship captains rely on to avoid collisions and other hazards. Traffic control systems
include signs, lights and other devices that communicate specific directions, warnings, or
requirements. Traffic light controller (TLC) has been implemented using verilog HDL. It
has many advantages over other with reference to the speed, number of input/output ports
and performance which are all very important in design. This paper concerns with an
design implementation of an advanced traffic light controller system that was built as a
term project of a VLSI design subject using VHDL. The system has been successfully
tested and implemented in hardware using Xilinx Spartan 3 FPGA. The system has many
advantages over the other exciting Traffic Light Controller. The VHDL code is being used
in order to implement the design and the simulation is being tested using the Isim
Simulator.

Keywords: Xilinx,Traffic controlling System, Verilog,VHDL,FPGA,Timing,collision.