OPERATIONAL AMPLIFIERS: nr ina

OPERATIONAL
T
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Practical instrumentation appli-
cations are given with analysis Edward Bannon OPERATIONAL
AMPLIFIERS:
of each circuit. A book that covers the theory and practical aspects of opera-

AMPLIFIERS:
Analysis of op amp generating tional amplifiers and the circuits that use them. The aim of this
circuits and troubleshooting book is to provide high level motivation for both the student and
in-service professional and to give a thorough state of the art
methods are presented.
Specialized applications such as
introduction to op amps.
Theory and
Table of Contents
automobile speed control, fuel
Servicing
Theory and
1 Basic Operational Amplifiers
injection, and non-skid circuits General Considerations. Basic Applications. Basic Stability Considerations.
are covered. Operating Conditions and Component Values. Basic Low- Pass and High.
Pass Filters. Basic Bandpass and Notch Filters Multiloop Feedback Filters.

Servicing
The text is illustrated with many Logarithmic Amplifier. Basic Troubleshooting Approach

MU"
schematic diagrams as well as photo- 2 Linear and Nonlinear Op- Amp Applications
graphs of instruments. Each chapter General Considerations. Application Notes. Input and Output Resistance
Characteristics. Basic Nonlinear Responses. Bias Current Offset Considera-
EDWARD BANNON
concludes with a series of Review
tions. Troubleshooting Techniques.
Questions. 3 Inductance Simulation by Operational Amplifiers
This text is acomplete introduc-
General Considerations. Phase Relations in LC Circuits. Simulation of L by
C in Filters. Phase Relations in Two-Terminal and Four- Terminal Circuits. tion to operational amplifiers and
Principles of Inductance Simulation. ITA Gyrator Arrangements. Frequen- to the circuits that use operational
cy- Dependent Negative- Resistance Circuits. Basic Op- Amp Test Pro-
amps. It presents a thorough state
cedures.
of the art coverage with emphasis
4 Op- Amp Instrumentation Applications
General Considerations. Digital Voltmeter Arrangements. Op Amp Trig- on practical circuit analysis, design,
gered Time Base. Current Mirror Action. Operational Voltage- Amplifier and application of both linear and
Test Procedures.
non-linear circuits. Theory is pre-
5 Op-Amp Generating Applications
sented along with the practical as-
General Considerations. Op- Amp Sine Wave Generators Variable -
Frequency Sine-Wave Oscillators. Square-Wave Generators. Triangular -
pects in amanner designed to pro-
Wave Generators. Ramp ( Sawtooth) Generators. Operational Voltage vide high level motivation for both
Amplifier Test Procedures.
student and in-service professional.
6 Specialized Amplifier Arrangements
Circuit theory and troubleshooting
General Considerations. Digital Pulse Amp. Wide- Band Amp. Narrow- Band
Tuned Amp. Scaling Adder. Regenerative Amplification. Differential Input are presented in a format that
and Differential Output Amplification. Amp with Automatic Gain requires a minimum of technical
Control. Op- Amp Modulator Arrangement. Bootstrapped Amp Operation.
background for successful applica-
Jacket design by Dennis Holm DC Level-Shifting Principles. Mounting and Handling Op- Amps.
tion. It permits the reader to
7 Specialized Op-Amp Applications
Time- Division Multiplexing. Sample- Hold Read Configuration. Sample - analyze, design, and troubleshoot
Hold Compare Configuration. Four-Quadrant Multiplier Configuration. most operational amplifier circuits.
Chopper- Stabilized Op-Amp. Varactor Type of Op-Amp. Bode Plots.
Avoidance of Damage to Op- Amps. Some other special features of
8 Principles of Negative Feedback the book:
General Considerations. Basic Negative- Feedback Analysis. Equivalent
Inductor simulation by opera-
Circuit for Op-Amp Low- Pass Filter. Equivalent Circuit for Op- Amp
High- Pass Filter. Bode Plot for Op- Amp Integrator. Op- Amp Output
tional amplifier circuits is pre-
Impedance and PP Negative Feedback. Constant Gain Bandwidth Product. sented in an understandable
RESTON PUBLISHING COMPANY, INC.
A Prentice -
Hall Company RESTON PUBLISHING COMPANY, INC. Reston, Virginia
II EDWARD BANNON
4
manner.
(Continued on back flap)
Reston, Virginia .4 Prentice- Hall Company 0-87909 -585 -7 RESTON
 OPERATIONAL AMPLIFIERS: e
cc

OPERATIONAL
T r
cY
ina
gnd
Practical instrumentation appli-
cations are given with analysis Edward Bannon OPERATIONAL
AMPLIFIERS:
of each circuit. A book that covers the theory and practical aspects of opera-

AMPLIFIERS:
Analysis of op amp generating tional amplifiers and the circuits that use them. The aim of this
book is to provide high level motivation for both the student and
circuits and troubleshooting
in-service professional and to give a thorough state of the art
methods are presented.
Specialized applications such as
introduction to op amps.
Theory and
Table of Contents
automobile speed control, fuel
Servicing
Theory and
1 Basic Operational Amplifiers
injection, and non-skid circuits General Considerations. Basic Applications. Basic Stability Considerations.
are covered. Operating Conditions and Component Values. Basic Low- Pass and High -
Pass Filters. Basic Bandpass and Notch Filters. Multiloop Feedback Filters.

Servicing
The text is illustrated with many Logarithmic Amplifier. Basic Troubleshooting Approach
schematic diagrams as well as photo- 2 Linear and Nonlinear Op- Amp Applications
graphs of instruments. Each chapter General Considerations. Application Notes. Input and Output Resistance
Characteristics. Basic Nonlinear Responses. Bias Current Offset Considera- EDWARD BANNON
concludes with a series of Review
tions. Troubleshooting Techniques.
Questions. 3 Inductance Simulation by Operational Amplifiers
This text is acomplete introduc-
General Considerations. Phase Relations in LC Circuits. Simulation of L by
C in Filters. Phase Relations in Two-Terminal and Four- Terminal Circuits. tion to operational amplifiers and
Principles of Inductance Simulation. ITA Gyrator Arrangements. Frequen- to the circuits that use operational
cy- Dependent Negative- Resistance Circuits. Basic Op- Amp Test Pro-
amps. It presents a thorough state
cedures.
of the art coverage with emphasis
4 Op- Amp Instrumentation Applications
General Considerations. Digital Voltmeter Arrangements. Op Amp Trig- on practical circuit analysis, design,
gered Time Base. Current Mirror Action. Operational Voltage- Amplifier and application of both linear and
Test Procedures. non-linear circuits. Theory is pre-
5 Op-Amp Generating Applications
sented along with the practical as-
General Considerations. Op- Amp Sine Wave Generators Variable -
Frequency Sine-Wave Oscillators. Square- Wave Generators. Triangular.
pects in amanner designed to pro-
Wave Generators. Ramp ( Sawtooth) Generators. Operational Voltage vide high level motivation for both
Amplifier Test Procedures. student and in-service professional.
6 Specialized Amplifier Arrangements
Circuit theory and troubleshooting
General Considerations. Digital Pulse Amp. Wide- Band Amp. Narrow- Band
Tuned Amp. Scaling Adder. Regenerative Amplification. Differential Input are presented in a format that
and Differential Output Amplification. Amp with Automatic Gain requires a minimum of technical
Control. Op- Amp Modulator Arrangement. Bootstrapped Amp Operation.
background for successful applica-
Jacket design by Dennis Holm DC Level-Shifting Principles. Mounting and Handling Op- Amps.
tion. It permits the reader to
7 Specialized Op- Amp Applications
Time- Division Multiplexing. Sample- Hold Read Configuration. Sample. analyze, design, and troubleshoot
Hold Compare Configuration. Four-Quadrant Multiplier Configuration. most operational amplifier circuits.
Chopper- Stabilized Op-Amp. Varactor Type of Op-Amp. Bode Plots.
Avoidance of Damage to Op-Amps. Some other special features of
8 Principles of Negative Feedback the book:
General Considerations. Basic Negative- Feedback Analysis. Equivalent
Inductor simulation by opera-
Circuit for Op-Amp Low-Pass Filter. Equivalent Circuit for Op- Amp
High- Pass Filter. Bode Plot for Op-Amp Integrator. Op- Amp Output
tional amplifier circuits is pre-
Impedance and PP Negative Feedback. Constant Gain Bandwidth Product. sented in an understandable
RESTON PUBLISHING COMPANY, INC. manner.
A Prentice -
Hall Company RESTON PUBLISHING COMPANY, INC. Reston, Virginia
RESTON
EDWARD BANNON (Continued on back flap)
Reston, Virginia A Prentice-
Hall Company 0-87909 -585 -7
 • OPERATIONAL AMPLIFIERS: :i
la

OPERATIONAL
T
sh
ee
r r gnd
Practical instrumentation appli-
cations are given with analysis Edward Bannon
OPERATIONAL
AMPLIFIERS:
of each circuit. A book that covers the theory and practical aspects of opera-

AMPLIFIERS:
Analysis of op amp generating tional amplifiers and the circuits that use them. The aim of this
circuits and troubleshooting book is to provide high level motivation for both the student and
in-service professional and to give a thorough state of the art
methods are presented.
Specialized applications such as
introduction to op amps.
Theory and
Table of Contents
automobile speed control, fuel
Servicing
Theory and
1 Basic Operational Amplifiers
injection, and non-skid circuits General Considerations. Basic Applications. Basic Stability Considerations.
are covered. Operating Conditions and Component Values. Basic Low- Pass and High -
Pass Filters. Basic Bandpass and Notch Filters. Multiloop Feedback Filters.

Servicing
The text is illustrated with many Logarithmic Amplifier. Basic Troubleshooting Approach
schematic diagrams as well as photo- 2 Linear and Nonlinear Op- Amp Applications
graphs of instruments. Each chapter General Considerations. Application Norec. Input and Output Resistance
Characteristics. Basic Nonlinear Responses. Bias Current Offset Considera- EDWARD BANNON
concludes with a series of Review tions. Troubleshooting Techniques.
Questions. 3 Inductance Simulation by Operational Amplifiers
This text is acomplete introduc-
General Considerations. Phase Relations in LC Circuits. Simulation of L by
C in Filters. Phase Relations in Two-Terminal and Four- Terminal Circuits. tion to operational amplifiers and
Principles of Inductance Simulation, ITA Gyrator Arrangements. Frequen- to the circuits that use operational
cy- Dependent Negative- Resistance Circuits. Basic Op- Amp Test Pro- -12
amps. It presents a thorough state
cedures. r
-
of the art coverage with emphasis
4 Op- Amp Instrumentation Applications
General Considerations. Digital Voltmeter Arrangements. Op Amp Trig-
on practical circuit analysis, design,
gered Time Base. Current Mirror Action. Operational Voltage- Amplifier and application of both linear and
Test Procedures. non-linear circuits. Theory is pre-
5 Op- Amp Generating Applications sented along with the practical as-
General Considerations. Op- Amp Sine Wave Generators. Variable -
Frequency Sine-Wave Oscillators. Square-Wave Generators. Triangular -
pects in amanner designed to pro-
Wave Generators. Ramp ( Sawtooth) Generators Operational Voltage vide high level motivation for both
Amplifirr Test Procedures. student and in-service professional.
6 Specialized Amplifier Arrangements
Circuit theory and troubleshooting
General Considerations. Digital Pulse Amp. Wide Band Amp. Narrow- Band
Tuned Amp. Scaling Adder. Regenerative Amplification. Differential Input
are presented in a format that
and Differential Output Amplification. Amp with Automatic Gain requires a minimum of technical
Control. Op- Amp Modulator Arrangement. Bootstrapped Amp Operation.
background for successful applica-
Jacket design by Dennis Holm DC Level-Shifting Principles. Mounting and Handling Op- Amps.
tion. It permits the reader to
7 Specialized Op-Amp Applications
Time- Division Multiplexing. Sample- Hold Read Configuration. Sample. analyze, design, and troubleshoot
Hold Compare Configuration. Four-Quadrant Multiplier Configuration. most operational amplifier circuits.
Chopper- Stabilized Op-Amp. Varactor Type of Op-Amp. Bode Plots.
Avoidance of Damage to Op-Amps.
Some other special features of
8 Principles of Negative Feedback the book:
General Considerations. Basic Negative- Feedback Analysis. Equivalent Inductor simulation by opera-
Circuit for Op- Amp Low-Pass Filter. Equivalent Circuit for Op- Amp
High- Pass Filter. Bode Plot for Op-Amp Integrator. Op- Amp Output
tional amplifier circuits is pre-
Impedance and PP Negative Feedback. Constant Gain Bandwidth Product. sented in an understandable
RESTON PUBLISHING COMPANY, INC. manner.
A Prentice -
Hall Company RESTON PUBLISHING COMPANY, INC. Reston, Virginia
RESTON
EDWARD BANNON (Continued on back flap)
Reston, Virginia A Prentice- Hall Company 0-87909-585-7
 I 'Jr

OPERATIONAL AMPLIFIERS: :ir

OPERATIONAL
T
sh
ee
r cY
ina
gnd
Practical instrumentation appli-
OPERATIONAL
cations are given with analysis Edward Bannon
19
AMPLIFIERS:
of each circuit. A book that covers the theory and practical aspects of opera-

AMPLIFIERS:
Analysis of op amp generating tional amplifiers and the circuits that use them. The aim of this
circuits and troubleshooting book is to provide high level motivation for both the student and
in-service professional and to give a thorough state of the art
methods are presented.
Specialized applications such as
introduction to op amps.
Theory and
Table of Contents
automobile speed control, fuel
Servicing
Theory and
1 Basic Operational Amplifiers
injection, and non-skid circuits General Considerations. Basic Applications. Basic Stability Considerations.
are covered. Operating Conditions and Component Values. Basic Low- Pass and High - 3:11
Pass Filters. Basic Bandpass and Notch Filters. Multiloop Feedback Filters.

c=4 Servicing
The text is illustrated with many Logarithmic Amplifier. Basic Troubleshooting Approach
schematic diagrams as well as photo- 2 Linear and Nonlinear Op- Amp Applications
graphs of instruments. Each chapter General Considerations. Application Notes. Input and Output Resistance
Characteristics. Basic Nonlinear Responses. Bias Current Offset Considera-
EDWARD BANNON
concludes with a series of Review
tions. Troubleshooting Techniques.

De.
Questions. 3 Inductance Simulation by Operational Amplifiers
This text is acomplete introduc-
General Considerations. Phase Relations in LC Circuits. Simulation of L by
C in Filters. Phase Relations in Two-Terminal and Four- Terminal Circuits. tion to operational amplifiers and
Principles of Inductance Simulation. ITA Gyrator Arrangements. Frequen- to the circuits that use operational
cy- Dependent Negative- Resistance Circuits. Basic Op- Amp Test Pro-
amps. It presents a thorough state
cedures.
of the art coverage with emphasis
4 Op-Amp Instrumentation Applications
General Considerations. Digital Voltmeter Arrangements. Op Amp Trig-
on practical circuit analysis, design,
gered Time Base. Current Mirror Action. Operational Voltage- Amplifier and application of both linear and
Test Procedures.
non-linear circuits. Theory is pre-
5 Op-Amp Generating Applications C/3
u. sented along with the practical as-
General Considerations. Op- Amp Sine Wave Generators Variable -
Frequency Sine Wave Oscillators. Square-Wave Generators. Triangular -
pects in amanner designed to pro-
Wave Generators. Ramp ( Sawtooth) Generators. Operational Voltage vide high level motivation for both
Amplifier Test Procedures.
student and in-service professional.
6 Specialized Amplifier Arrangements
Ze.
CD Circuit theory and troubleshooting
General Considerations. Digital Pulse Amp. Wide- Band Amp. Narrow- Band
Tuned Amp. Scaling Adder. Regenerative Amplification. Differential Input are presented in a format that
and Differential Output Amplification. Amp with Automatic Gain requires a minimum of technical
Control. Op- Amp Modulator Arrangement. Bootstrapped Amp Operation.
background for successful applica-
Jacket design by Dennis Holm DC Level-Shifting Principles. Mounting and Handling Op- Amps.
tion. It permits the reader to
7 Specialized Op-Amp Applications
Time- Division Multiplexing. Sample- Hold Read Configuration. Sample - analyze, design, and troubleshoot
Hold Compare Configuration. Four-Quadrant Multiplier Configuration. most operational amplifier circuits.
Chopper- Stabilized Op-Amp. Varactor Type of Op-Amp. Bode Plots.
Avoidance of Damage to Op-Amps. Some other special features of
8 Principles of Negative Feedback the book:
General Considerations. Basic Negative- Feedback Analysis. Equivalent
Inductor simulation by opera-
Circuit for Op-Amp Low-Pass Filter. Equivalent Circuit for Op- Amp
High- Pass Filter. Bode Plot for Op- Amp Integrator. Op- Amp Output
tional amplifier circuits is pre-
Impedance and PP Negative Feedback. Constant Gain Bandwidth Product. sented in an understandable
RESTON PUBLISHING COMPANY, INC. manner.
A Prentice -
Hall Company RESTON PUBLISHING COMPANY, INC. Reston, Virginia
RESTON
EDWARD BANNON (Continued on back flap)
Reston, Virginia A Prentice- Hall Company 0-87909 -585 -7
OPERATIONAL
AMPLIFIERS:
Theory and
Servicing

by Edward Bannon

RESTON PUBLISHING COMPANY, INC.

A Prentice- Hall Company
Reston, Virginia
Library of Congress Cataloging in Publication Data

Bannon, Edward
Operational ampli fiers.
x, 195 p. illus.
Includes index.
1. Operational amplifiers. I. Title.
TK7871.58.06H47 621.3815'35 74-34298
ISBN 0-87909-585-7

TECHNICAL DRAWINGS BY ROBERT MOSHER

C) 1975 by Reston Publishing Company, Inc.

A Prentice- Hall Company
Reston, Virginia 22090

All rights reserved. No part of this book may be re-

produced in any way, or by any means, without
permission in writing from the publisher.

10 9 8 7 6 5 4

PRINTED IN THE UNITED STATES OF AMERICA

TABLE OF CONTENTS

PREFACE, ix
1 Basic Operational Amplifiers, 1
1.1 General Considerations, 1
1.2 Basic Applications, 3
1.3 Basic Stability Considerations, 7
1.4 Operating Conditions and Component Values, 7
1.5 Basic Low-Pass and High-Pass Filters, 9
1.6 Basic Bandpass and Notch Filters, 13
1.7 Multiloop Feedback Filters, 15
1.8 Logarithmic Amplifier, 16
1.9 Basic Troubleshooting Approach, 17
REVIEW QUESTIONS, 21

2 Linear and Nonlinear Op-Amp Applications, 23

2.1 General Considerations, 23
2.2 Application Notes, 25
2.3 Input and Output Resistance Characteristics, 28
2.4 Basic Nonlinear Responses, 30
2.5 Bias Current Offset Considerations, 33
2.6 Troubleshooting Techniques, 38
REVIEW QUESTIONS, 44

3 Inductance Simulation by Operational Amplifiers, 45

3.1 General Considerations, 45
3.2 Phase Relations in LC Circuits, 50
3.3 Simulation of L by C in Filters, 50
3.4 Phase Relations in Two-Terminal and Four-Terminal Circuits, 53
3.5 Principles of Inductance Simulation, 55
3.6 OTA Gyrator Arrangements, 58
3.7 Frequency- Dependent Negative- Resistance Circuits, 63
3.8 Basic Operational Amplifier Test Procedures, 64
REVIEW QUESTIONS, 67

4 • Op-Amp Instrumentation Applications, 68

4.1 General Considerations, 68
4.2 Digital Voltmeter Arrangements, 68
vi TABLE OF CONTENTS

4.3 Op-Amp Triggered Time Base, 78

4.4 Current Mirror Action, 80
4.5 Operational Voltage- Amplifier Test Procedures, 82
REVIEW QUESTIONS, 87

5 • Op-Amp Generating Applications, 88

5.1 General Considerations, 88
5.2 Op-Amp Sine-Wave Generators, 88
5.3 Variable- Frequency Sine-Wave Oscillators, 94
5.4 Square-Wave Generators, 100
5.5 Triangular-Wave Generators, 104
5.6 Ramp ( Sawtooth) Generators, 105
5.7 Operational Voltage-Amplifier Test Procedures, 107
REVIEW QUESTIONS, 111

6 Specialized Amplifier Arrangements, 112

6.1 General Considerations, 112
6.2 Digital Pulse Amplifier, 115
6.3 Wide- Band Amplifier, 116
6.4 Narrow- Band Tuned Amplifier, 118
6.5 Scaling Adder, 118
6.6 Regenerative Amplification, 120
6.7 Differential Input and Differential Output Amplification, 120
6.8 Amplifier with Automatic Gain Control, 122
6.9 Op-Amp Modulator Arrangement, 124
6.10 Bootstrapped Amplifier Operation, 125
6.11 DC Level-Shifting Principles, 126
6.12 Mounting and Handling Operational Amplifiers, 129
REVIEW QUESTIONS, 129

7 • Specialized Op-Amp Applications, 131

7.1 Time- Division Multiplexing, 131
7.2 Sample- Hold- Read Configuration, 133
7.3 Sample- Hold-Compare Configuration, 134
7.4 Four-Quadrant Multiplier Configuration, 135
7.5 Chopper-Stabilized Operational Amplifiers, 141
7.6 Varactor Type of Op-Amp, 142
7.7 Bode Plots, 144
7.8 Avoidance of Damage to Op Amps, 147
REVIEW QUESTIONS, 148
 TABLE OF CONTENTS vii

8 • Principles of Negative Feedback, 150

8.1 General Considerations, 150
8.2 Basic Negative- Feedback Analysis, 152
8.3 Equivalent Circuit for Op-Amp Low- Pass Filter, 158
8.4 Equivalent Circuit for Op-Amp High- Pass Filter, 160
8.5 Bode Plot for Op-Amp Integrator, 163
8.6 Op-Amp Output Impedance and PP Negative Feedback, 167
8.7 Constant Gain Bandwidth Product, 168
REVIEW QUESTIONS, 170

ANSWERS TO REVIEW QUESTIONS, 171

APPENDIX A, 179

APPENDIX B, 183

GLOSSARY, 189

INDEX, 193
PREFACE

With the rapid advance of the operational-amplifier field in recent

years, aneed has arisen for arelevant state-of-the-art textbook. Mono-
lithic operational amplifiers have become more sophisticated and
versatile, and the voltage op amp is now supplemented by the trans-
conductance op amp. This device has made acomplete transition from
an analog-computer subassembly to auniversal analog component. It
may now be regarded as an elaborated and sophisticated offspring
from the conventional transistor. The first-generation IC op amps pro-
vided high input impedance, low output impedance, and high voltage
gain. They were, however, susceptible to latch-up, short-circuit damage,
and required external lag networks.
Second-generation op amps were immune to latch-up, included
output short-circuit protection, and contained built-in lag networks.
They also provided higher input impedance, higher voltage gain, and
lower input offset and bias currents. Third- generation op amps pro-
vided still lower input offset and bias currents, with greater immunity
to temperature drift. Fourth- generation op amps offered further im-
provement of an order or more of magnitude in reduction of input
offset and bias currents and immunity to temperature drift. Fifth-
generation op amps featured greatly increased frequency range and
faster slew rate, with other functional improvements. It is probable
that the operational transconductance amplifier, with its high output
impedance, should be classified as asixth-generation device. The oper-
ational transconductance amplifier facilitates the implementation of
sophisticated networks, such as gyrators.
It is the purpose of this textbook to present a broad coverage of
basic op-amp applications, with appropriate theoretical treatment for
use as ateaching tool in the junior college curriculum. Troubleshooting
is explained along with basic theory. The focus of attention is on the
beginning student and his problems. Mathematical treatment has been
introduced only to the extent required for ample rigor at this instruc-
tional level. It is assumed that the student has completed courses in
electricity, electronics, and radio communication, or has attained a
practical background in these areas. A student who is taking a con-
current course in semiconductor electronics will be able to assimilate
the associated chapters in this text by looking up various terms and
x • PREFACE

topics with which he may be unfamiliar. The burden on the student

will be considerably lightened, however, if he has completed courses
in both general electronics and semiconductor electronics before start-
ing his study of operational amplifiers.
Acknowledgment is made to those who have preceded the author
by their development of other books on op- amp technology, and to the
faculty of San Jose City College, who have made many helpful sugges-
tions and criticisms. This book can properly be described as a team
effort, although the individual members would choose to minimize
the measure of their own contributions. It is appropriate that this text-
book be dedicated as ateaching tool to the instructors and students of
our junior colleges and technical schools.

EDWARD BANNON
1 • Basic
Operational
Amplifiers

1.1 GENERAL CONSIDERATIONS

Operational amplifiers (op amps) received their name from de-

signers of first- generation analog computers. An operational amplifier
was a somewhat specialized amplifier section or block in these early
computer systems. Computers can be classified into two basic cate-
gories: analog and digital. An analog computer operates on directly
measurable quantities, such as voltages, which represent numbers.
Analog voltages are continuously variable. A digital computer also op-
erates with directly measurable quantities, such as voltages, which rep-
resent numbers. However, digital voltages are constant in value and
are merely switched on or off — digital voltages are not variable. Op
amps are used primarily in analog computers. In addition to the analog
and digital types of computers, asubclassification is termed the hybrid
type of computer. A hybrid computer employs both continuously vari-
able analog voltages and switched digital voltages. Operational ampli-
fiers are used in hybrid computers. Op amps are also utilized in other
kinds of electronic equipment.
During the course of op-amp development, tubes, transistors, and
integrated circuits have been employed. Both hybrid and monolithic
integrated circuits have found application. A hybrid integrated circuit
is an arrangement that consists of one or more IC's combined with one
or more discrete component parts. A hybrid IC may also consist of a
combination of more than one type of integrated circuit joined into one
integrated component. Again, a monolithic IC consists of elements
which are formed upon or within a semiconductor substrate with at
least one of the elements formed within the substrate. In other words,
an integrated circuit is acombination of interconnected circuit elements
inseparably associated on or within acontinuous substrate.
Today, the monolithic integrated circuit has become the most

1
2 . BASIC OPERATIONAL AMPLIFIERS

widely used type of op amp. A typical op amp is illustrated in Figure

1-1. Op-amp IC's have become comparatively economical and are ap-
plied as building blocks in electronic computers, waveform processors,
active filters, and so on as detailed in following chapters. An op amp is
basically a dc-coupled multistage linear amplifier. Note that a linear
amplifier has an output waveform amplitude that is directly propor-
tional to its input signal amplitude. An ideal op amp would have in-

Fig. 1-1 Appearance of atypical operational amplifier.

 BASIC APPLICATIONS . 3

finite input impedance and infinite gain. In practice, an op amp has

extremely high input impedance; its current driving requirement is
measured in pA ( A). A preferred- type op amp has avoltage gain of
approximately 100,000 times. An output impedance of 150 ohms is typi-
cal.
Figure 1-2 shows the internal circuit of a widely used op amp.
Note that two inputs are provided. One is called the inverting input,
and the other is called the noninverting input. Together, they form a
differential input arrangement. One input is said to be the complement,
or the inverse, of the other. In other words, if asmall positive voltage is
applied to the noninverting (+) input terminal, it will produce aposi-
tive output. On the other hand, if the same small positive voltage is ap-
plied to the inverting (—) input terminal, it will produce a negative
output. Note that if the same voltage were applied to both input ter-
minals at the same time, the output would be zero. If desired, both in-
put terminals can be driven; this is called the differential connection.
Or, one input terminal can be driven and the other input terminal re-
turned to ground; this is called the single- ended connection.
An ideal op amp would have zero output when both input ter-
minals are at zero potential. However, in practice, the output may not
be exactly zero when both input terminals are at zero potential. This
deviation from zero is called offset; some op amps provide connections
to an external control which can compensate for offset voltage by apply-
ing suitable bias current to the input transistors. Observe the offset ter-
minals provided in the configuration of Figure 1-2. Details of external
circuitry are explained in following chapters. Note that an op amp has
single-ended output. The output section operates in the emitter- fol-
lower mode to provide substantial power at low impedance.

1 . 2 BASIC APPLICATIONS

In most op-amp applications, only part of the full device gain is

utilized. In other words, negative feedback is provided, as shown in
Figure 1-3(a) and (b). These are examples of basic inverting and nonin-
verting amplifiers. Note that the inclusion of the resistive divider net-
work Ro—Riprovides negative feedback by channeling part of the out-
put voltage to the inverting input terminal. In turn, the gain of the
amplifier is equal to the sum of Ro and Ri divided by the value of Ri.
Observe that the inverting input terminal is driven in Figure 1-3(a),
whereas the noninverting input terminal is driven in (b). Next, the volt-
age summer shown in Figure 1-3(c) represents aslight elaboration of
the inverting amplifier arrangement. It provides an output voltage
4 . BASIC OPERATIONAL AMPLIFIERS

Inverting
input
o

Non- inverting
input

Offset
o

(a)

V+
Power
supply
Inverting
input

Non- inverting Output

input
Power
supply
(c)

Ground

(b)

Fig. 1-2 Typical internal circuitry and symbols for op amps: (

a) Internal configu-
ration; (
b) Elaborated symbol; (c)Simplified symbol.
 BASIC APPLICATIONS . 5

Inverting amplifier Differentiator

Non inverting amplifier Integrator

RI
Eout I f Ein dt
RCo

ta,it• su mm er Dit erential ampllfier

E1• Eout ( E1 + E2+E3)

E2

E3

Icl Eout
Common

Voltage follower

Fig. 1-3 Basic op-amp applications.

which is the sum of all the input voltages multiplied by the gain of the
op amp. A voltage summer is often used as an audio mixer.
Next, Figure 1-3(d) depicts the basic voltage-follower arrangement.
The output voltage follows the level of the input voltage precisely. Note
that the load at the output of avoltage follower can draw alarge current,
although the input draws almost no current. A voltage follower is aspe-
cial case of anoninverting amplifier in which the gain is unity. It is es-
sentially an impedance transformer. An op- amp differentiator is shown
in Figure 1-3(e). Although its action is analogous to that of asimple RC
differentiating circuit, there is an important distinction in that an op-
amp differentiator produces an output signal which is aprecise deriva-
6 . BASIC OPERATIONAL AMPLIFIERS

tive of the input waveform. In other words, the output signal approaches
the true mathematical derivative of the input waveform. As an illustra-
tion, when an op-amp differentiator is driven by asquare-wave voltage,
the output consists of extremely narrow pulses. It will be shown later
that extremely narrow pulses are developed because the differentiating
capacitor "sees" an extremely low input impedance to the op amp.
An op-amp integrator is depicted in Figure 1-3(f). Although its
action is analogous to that of a simple RC integrating circuit, there is
an important distinction in that an op- amp integrator produces an out-
put signal which is a precise integral of the input waveform. In other
words, the output signal approaches the true mathematical integral of
the input waveform. For example, when an op- amp integrator is driven
by sharp pulses, the output consists of aprecise square waveform. Note
that op-amp integrators and differentiators perform opposite mathe-
matical operations. As an illustration, if a square- wave voltage is ap-
plied to an op- amp differentiator, and the pulse output from the differ-
entiator is applied to an op- amp integrator, a precise replica of the
original square-wave voltage appears at the output of the integrator.
If you are not fully familiar with the differentiating and integrating
symbols indicated in Figure 1-3 (e) and (f), the following principles
will be helpful:
1. A mathematically exact square wave has zero rise time and zero
fall time; it has perfectly square corners and aperfectly flat top.
2. A mathematically exact impulse waveform has zero width and
infinite amplitude.
3. The true mathematical derivative of asquare wave is asequence
of alternately positive and negative impulse waveforms.
4. The true mathematical integral of an impulse waveform is a
mathematically exact square wave.
Next, observe the op- amp differential-amplifier arrangement
shown in Figure 1-3(g). This configuration is driven in push-pull and
provides a single- ended output. Since negative feedback is provided,
only part of the maximum available gain is realized. An important ad-
vantage of differential-amplifier operation is that common-mode signal
voltages are cancelled out. As an illustration, when an audio signal
flows through along line, it may become mixed with hum interference.
Note that if the line picks up stray hum fields, both sides of the line will
develop hum voltage in the same phase. On the other hand, if the line
is being driven by apush-pull audio signal, opposite sides of the line
carry opposite-phase audio driving voltages. In other words, the hum
voltage occurs as asingle-ended driving voltage, whereas the audio sig-
nal is provided as adouble- ended driving voltage. In this situation, the
hum voltage is said to occur as common- mode interference. It follows
 OPERATING CONDITIONS AND COMPONENT VALUES . 7

from previous discussion that common-mode interference voltages will

be cancelled out by adifferential amplifier.

1 . 3 BASIC STABILITY CONSIDERATIONS

Op amps are high-gain devices, ranging up to a voltage gain of

1,000,000 times. Many op amps also have afrequency response from dc
to several MHz. In turn, avoidance of spurious oscillation and consider-
ations of general stability are of basic concern. Op-amp layouts should
be arranged with the inputs well isolated from the output, and input
leads should be kept as short as practical. To minimize the internal im-
pedance (common coupling) that could be troublesome in the power
source, the supply-voltage terminals are often bypassed with a0.1—µF
capacitor. Another stability consideration of importance is the inherent
phase shift of the internal op-amp circuitry. In other words, as the op-
erating frequency is increased, successive stages in an op amp introduce
progressive phase shift from input to output. If this phase shift ap-
proaches 180 degrees before the gain has decreased to unity or less, the
op amp will be unstable and break into oscillation. Therefore, an ex-
ternal phase- shift compensating network may be required, as exempli-
fied by R1—C1 in Figure 1-4(a). This RC coupling introduces aprogres-
sive decrease in gain as the operating frequency increases. Some op
amps have built-in phase- shift compensating networks, and require no
external stabilizing components to avoid self- oscillation.

1.4 OPERATING CONDITIONS AND

COMPONENT VALUES

Basic op-amp circuitry for various applications is shown in Figure

1-4. The majority of monolithic op-amp IC's operate from supply volt-
ages of +5 to +15 volts, and —5 to — 15 volts. It is sometimes practical
to eliminate one supply- voltage polarity by using a resistive voltage
divider to bias the noninverting input, as shown in Figure 1-4(c). An
example of alimiting amplifier (clipper) is depicted in (d). A limiter is
basically an overdriven amplifier; however, an ordinary Class-A am-
plifier does not necessarily operate satisfactorily as alimiter when it is
overdriven. For example, to ensure that both positive and negative sig-
nal peaks are equally clipped, apotentiometer offset adjustment is re-
quired. Next, observe the comparator arrangement shown in Figure
1-4(e). A comparator has aunique function; it indicates when an input
voltage becomes equal to areference voltage. The output of acomparator
8 . BASIC OPERATIONAL AMPLIFIERS

Audio amp Limiting amp

10K
Input

Input
Output

(a)
+15 V - 15V -15V + 15V
(d)
Comparator
Audio mixer
Inputs
I- 12V

Input

1200 Hz active filter

Jr ,

, 12V

•Transistor- transistor logic

Fig. 1-4 Op-amp circuitry in typical applications.

swings from a maximum positive value to amaximum negative value

as the input voltage passes through the reference voltage value. Com-
parators are used in frequency counters, for example, as explained in
greater detail subsequently.
Op amps are used extensively in active filters, as exemplified in
Figure 1-4(f). Note that apassive filter utilizes resistors and capacitors,
for example. On the other hand, an active filter employs RC components
in combination with an op amp. Low-pass, high-pass, bandpass, or
 BASIC LOW-PASS AND HIGH-PASS FILTERS . 9

band- reject (notch) filter action may be provided, as shown in Figure

1-5. In the example of Figure 1-4(f), atwin-TRC network is used in the
negative- feedback loop. This twin-T network is resonant at 1200 Hz
(has practically zero output at 1200 Hz). In turn, the op amp develops
maximum gain at 1200 Hz with progressively reduced gain at higher
frequencies and at lower frequencies. This frequency characteristic
provides bandpass action. In this example, again of approximately 40
times is obtained at 1200 Hz. In addition to stepping up the amplitude
of the input signal, amplifier action can provide ahighly selective fre-
quency response. This topic is treated in more detail in the following
section.

1.5 BASIC LOW-PASS AND

HIGH-PASS FILTERS

As we know, differentiators and integrators such as depicted in

Figure 1-3(e) and (f) are forms of high-pass and low-pass filters. It is
evident that they are also in the class of active filters. As would be an-
ticipated, some active-filter arrangements are more elaborate than
others, and the more complex configurations can provide various ad-
vantages in application and operation. It is instructive to consider the
action of the single-loop feedback, low-pass active filter shown in Fig-
ure 1-6. This is called a single-loop feedback arrangement because
there is only one feedback loop provided. Negative feedback takes
place through the feedback component in (a), and through and lOR
Cf

in (b). We will find that filter action occurs both in the feedback com-
ponent and in the input component, in this example.
Observe that filter action starts at the input circuit in Figure 1-6(b),
where the incoming signal flows through apassive RC low-pass filter
section and then into the op amp. Note that if Cfwere disconnected, the
op amp would merely step up the amplitude of the filter output. How-
ever, with Cf present in the feedback loop, additional low-pass filter
action takes place. In other words, Cf has decreasing reactance at higher
frequencies, with the result that more negative feedback occurs at
higher frequencies. Therefore, the op amp develops higher gain at
lower frequencies. The result of these combined low-pass filter actions
is to produce a sharper cutoff characteristic than is provided by the
passive RC filter alone.
It is helpful to note the meaning of certain op-amp terms at this
point. With reference to Figure 1-6(a), vs is called the input signal; Vi
is called the differential input to the op amp; Vo is called the output of
the op amp. The open-loop gain is defined as the ratio of Vo to Vi,or
 100 100

10 . BASIC OPERATIONAL AMPI , FIERS

90 OOlpF
90

80
Output voltage Percentage 10K

Output voltage Percentage

70 —3dB level 70

60 60

50 50

40 40

30 30

20 20

10 10

o o
10 100 1,000 10,000 100.000 10 103 1,000 10,000 100,000

Frequency- Hertz Frequency- Hertz

lal (b)

100 100

90 so
80 80

Output voltage- Percentage

Output voltage- Percentage

70 70

60 60

50 50

40 40

30 30

20 20

10 10

o 0
10 100 1,000 10,000 100,000 10 100 1,000 10,000 100.0130

Frequency- Hertz Frequency- Hertz

Fig. 1-5 Frequency characteristics of basic filters (

a) High-pass frequency response; (
b) Low-pass frequency response; (c) Band-
pass frequency response; ( d) Twin-T RC notch filter frequency response.
 BASIC LOW-PASS AND HIGH-PASS FILTERS . 11

If

(a)

IOR

R
Hu

Output

2R

(Offset balance')

="
*Balances out the dc bias
current which is fed back
from output to input.

Fig. 1-6 A basic single- loop feedback low-pass active filter. (a) Block diagram;
(b) Basic circuit arrangement.

Vo/Vi.The closed-loop gain is defined as the ratio of Vo to V„ or V0!Vs.

Note carefully that the open-loop gain is the gain of the op amp, and is
independent of the input and feedback components. On the other hand,
the closed-loop gain depends only on the values of the input and feed-
back components, provided that the closed-loop gain of the circuit is
much less than the open-loop gain of the op amp.
It can be shown that the cutoff frequency for the low-pass active
filter depicted in Figure 1-6(b) is given by the equation:

1
f` 27rRC

where f
e is the frequency in Hz at which the output is -3dB down
12 . BASIC OPERATIONAL AMPLIFIERS

R is resistance in ohms

C is capacitance in farads, and Cf = C

Next, it is instructive to consider the single-loop, high-pass active

filter depicted in Figure 1-7. Filter action takes place at the input circuit,
where the incoming signal flows through apassive RC high-pass filter
section and thence into the op amp. The R/10 series resistor serves to
prevent overload of the op amp at very high frequencies owing to the
decreasing reactance of capacitors C,C. Note that the op amp merely
steps up the amplitude of the filter output in this example. In other
words, the negative- feedback loop has no filter action (frequency dis-
crimination). The negative-feedback resistor Rf functions to reduce the
open- loop gain of the op amp, thereby contributing to operating sta-
bility. The cutoff frequency for the high-pass active filter depicted in
Figure 1-6 is given by the equation:

1
(1-2)
27TRC

where f
e is the frequency in Hz at which the output is —3dB down

C is capacitance in farads

R is resistance in ohms, and Rf = R

Although the high-pass active filter in Figure 1-7 is avery simple

arrangement consisting of an RC passive filter section followed by a
linear amplifier, it has some basic advantages over apassive filter alone.
First, the op amp steps up the amplitude of the filter output, thereby
eliminating an insertion loss. In other words, the passive RC filter section
has an insertion loss which is equal to the difference between its input

Rf

10
Input 0--)1-

Output

(Offset balance)

Fig. 1-7 A simple single- loop feedback high-pass active filter

 BASIC BANDPASS AND NOTCH FILTERS. 13

signal power and its output signal power within the pass band. Inser-
tion loss may be expressed in watt units or in dB units. Second, the op
amp operates as abuffer between the output of the passive filter and the
load at the op-amp output. This is an advantage, because the filter char-
acteristics are not changed when the load impedance is changed. Third,
the op amp provides amuch lower output impedance than the passive-
filter output impedance. This is an advantage because acomparatively
large load current can be supplied.

1 . 6 BASIC BANDPASS AND NOTCH FILTERS

A bandpass filter attenuates frequencies on either side of its center

frequency. Thus, a bandpass filter is formed by the overlapping re-
sponses of alow-pass filter and ahigh-pass filter. Figure 1-8 shows the
arrangement for a basic single-loop feedback bandpass active filter.
Note that this is asingle-loop feedback configuration because there is
only one negative- feedback signal returned to the input of the op amp.
The passive low-pass RC feedback section comprises the R,R,2C circuit;
the high-pass section comprises the C,C,R/2 circuit. Feedback is also
provided through the 470-k resistor; it increases the bandwidth of the
filter. Observe that if this resistor were replaced by ashort-circuit, the

470K

47K
Input
22, F (it) pLn t

2R

(Offset balance)

Fig. 1-8 A basic bandpass active filter.

14 BASIC OPERATIONAL AMPLIFIERS

passive RC filter sections would provide no frequency discrimination.

It is instructive to note that the feedback loop in Figure 1-8 by it-
self has band- elimination action, or, it is anotch filter that provides trap
action on an incoming signal. This combination of passive low-pass and
high-pass RC filter sections is called aparallel-T RC filter, or atwin-T
RC filter. With reference to Figure 1-9, the relative component values
for zero signal transfer from input to output are given by the equations:

co 2C,C 2 = 2/lq (1-3)

co 2C1 = 1/(2R,R2) (1-4)

R2C2 = 4R IC, ( 1-5)

where resistance values are in ohms

capacitance values are in farads

= 27r fwith fexpressed in Hz

Zero transfer is obtained under these conditions, because the out-

puts from the low-pass and high-pass sections have opposite phases
and equal amplitudes at frequency f. If, as in Figure 1-8, we make R2 =
2R 1 and C2 = 2C 1,then the frequency of zero transfer is given by the
equation:

f = 1/(2rrC iR2) = 1/(2rrC2Ri) (1-6)

With reference to the notation in Figure 1-8, the center frequency

of the active bandpass filter is given by the equation:

e 1
(1-7)
27rRC

The arrangement shown in Figure 1-8 develops all of its useful

frequency discrimination through the negative- feedback loop. In other
words, there is no useful filter action provided by the input circuit. The
input series capacitor and resistor merely prevent overload of the op
amp at very high and very low frequencies.
Next, consider the action of the basic notch filter depicted in Fig-
ure 1-9. In this example, the twin-T RC network used in the feedback
loop of Figure 1-8 has been shifted to the input circuit of the op amp.
Thus, this active filter consists of an RC passive filter section followed
by alinear amplifier. In other words, the op amp provides no frequency
 MULTILOOP FEEDBACK FILTERS . 15

47K

470K
Input

Output

2R

(Offset balance)

12

Fig. 1-9 A simple active notch filter.

discrimination, but merely steps up the output from the twin-T net-
work. The 47-k feedback resistor reduces the open- loop gain of the op
amp and stabilizes its operation. Since the same frequency- discriminat-
ing network is used in Figure 1-9 and Figure 1-8, the center frequency
of the notch or trap characteristic is given by the preceding Equation
(1-6). If the 470-k resistor is omitted in Figure 1-9, zero transfer is ob-
tained at the notch frequency. Or, if the value of the 470-k resistor is
reduced, the width of the rejection band is increased.

1 . 7 MULTILOOP FEEDBACK FILTERS

In addition to the basic single- loop feedback filters that have been
noted, multiloop feedback filters are also used in many applications.
These elaborated arrangements employ more than one op amp, as shown
in the example of Figure 1-10. Each op amp has a negative- feedback
loop, and the op amps are connected in cascade. Observe that the first
op amp, 0A1, has its input connected to two negative- feedback loops.
Stage feedback occurs through R3, and overall feedback occurs through
R2. The R3 feedback loop serves to reduce the open- loop gain and pro-
vides operating stability. On the other hand, the R2 feedback loop re-
duces the gain at low frequencies, because the third op amp, 0A3, has
low-pass output. Accordingly, high-pass output is obtained from 0A1.
Next, the second op amp has stage feedback through C, and therefore
0A2 develops low-pass action. Note that the combination of °Al high-
pass action and 0A2 low-pass action results in bandpass action at the
output of 0A2. Finally, the third op amp has stage feedback through C
16 . BASIC OPERATIONAL AMPLIFIERS

High•pass
output

Band pass
output

Low pass
output

Fig. 1-10 A multiloop feedback active filter.

which provides additional low-pass action. Therefore, low-pass action

is obtained from 0A3.
The multiloop feedback active filter depicted in Figure 1-10 is also
called astate variable filter. In other words, its frequency and selectivity
can be adjusted independently. Thus, the value of R4A-B controls the
bandpass frequency, and the value of R6 controls the bandwidth. A state
variable filter has an advantage over simpler active filters in that it pro-
vides very sharp cutoff characteristics, with simultaneous high-pass,
low-pass, and bandpass outputs. The bandpass center frequency of the
configuration in Figure 1-10 is given by the equation:

(1-8)
f
r 27r x R4 x C

where f
e is the bandpass center frequency in Hz

kvaries between 0and 1, depending on the setting of R4,

with avalue of 1when 0A2 drives 0A3 directly, and
0A2 drives 0A3 directly

R is resistance in ohms

C is capacitance in farads

1.8 LOGARITHMIC AMPLIFIER

A logarithmic amplifier is aform of nonlinear amplifier which pro-

vides an output amplitude that is proportional to the logarithm of the
 BASIC TROUBLESHOOTING APPROACH . 17

input amplitude. It has no frequency discrimination. Logarithmic am-

plification is obtained with the basic arrangement shown in Figure 1-
11. Nonlinear feedback is provided by asuitably biased power transis-
tor operating in the common- base mode. Recall that the logarithm of
one is zero, of 10 is one, of 100 is two, and so on. Thus, the 10-k offset
null adjuster is set to zero the output of the op amp when one unit of
positive signal is applied at the input terminal of the op amp. When
larger values of positive input signals are applied, the transistor auto-
matically feeds back adisproportionate amount of voltage and the out-
put is precisely proportional to the logarithm of the input amplitude.
Of course, alogarithmic amplifier cannot provide aprecise output level
if operated out of its rated input- voltage range.

Input

Output

—v
Fig. 1-11 Basic logarithmic amplifier arrangement.

1.9 BASIC TROUBLESHOOTING APPROACH

Troubleshooting of op-amp arrangements starts with symptom

analysis. It is helpful to evaluate trouble symptoms with respect to a
block diagram, because the various blocks have functional relationships.
In turn, the particular malfunction may indicate that there is adefective
component in acertain block. Thereby, preliminary localization of the
fault is determined. As an illustration, consider the block diagram of the
biquadratic bandpass filter shown in Figure 1-12. It is evident that if
the functions of the three blocks are known, atrouble symptom can be
evaluated from the viewpoint of preliminary localization. Therefore, the
troubleshooter needs to know the overall function and the various sub-
functions of the op- amp arrangement with which he is concerned.
 18 . BASIC OPERATIONAL AMPLIFIERS

R2 10K

(Sets center frequency)

.015

R1 200K R4 10K 015

R5 R2'

R3 10K 10K
10K
(Sets
gain)

Input-must eturn to Ou put

ground via low resistance

Fig. 1-12 An op-amp biquadratic bandpass section.

Otherwise, he must adopt a "shotgun" approach, and merely replace

various components at random. This approach is usually wasteful,
time-consuming, and inefficient.
Consider the overall function and the subfunctions of the biquad-
ratic bandpass section depicted in Figure 1-12. This is basically amulti-
loop feedback active filter, such as exemplified previously in Figure
1-10. If we interchange °Al and 0A2 in Figure 1-10, we obtain the
biquadratic filter arrangement of Figure 1-12. It follows from previous
discussion also that bandpass output will be obtained from 0A2 in the
biquadratic arrangement. Note that the term biquadratic means merely
that the filter action is described by an algebraic equation of the fourth
degree. This bandpass filter is equivalent to asimple RLC series circuit,
as pictured in Figure 1-13. Note that the bandwidth of the filter de-
pends upon the Q value of the circuit. Since the Q value is determined
by R1 in Figure 1-12, it follows that if the 0.015-µF capacitor in shunt
to R1 becomes leaky, the selectivity of the filter will become subnormal.
Therefore, this is the first possibility that the troubleshooter would in-
vestigate if asymptom of poor selectivity occurs.
On the other hand, consider the malfunction that results in case
the foregoing capacitor becomes open-circuited. In such acase, the °Al
block does not develop low-pass action, and therefore, bandpass output
is not obtained from 0A2. Since the filter action of 0A3 is unchanged
in this example, feedback via R2 produces high-pass response, and
high-pass output is obtained from 0A2. Accordingly, if atrouble symp-
tom of high-pass output occurs, instead of bandpass output, the trouble-
shooter would proceed to check the possibility of an open feedback ca-
 BASIC TROUBLESHOOTING APPROACH . 19

Frequency ratio o = resonance)

.3Fo . 5Fo 3Fo 5Fo

2Fo . 4Fo . 7Fo Fo 2Fo 4Fo
1

5
-lo
0.
,6,

•
—20- 1
'.2
‘Do .05
30

S
o
•cif.,-- .02
'•06-•
0s,
—40 01
/cb 4r,,
nos
4r,
—50 •0 1-
4,.., .002
'•005
60 .001

Eout

Ein

Fig. 1-13 Frequency response curves for RLC series circuits with various Q values.

pacitor in the °Al section. Although other component defects can occur,
capacitor defects are more common than resistor faults or op- amp mal-
functions. Therefore, a troubleshooter checks out possible capacitor
defects first. Note that a suspected "open" capacitor can be checked
simply by " bridging" it temporarily with a known good capacitor.
Then, if the system action is restored to normal, the diagnosis is con-
firmed.
Next, consider the trouble symptom that results in case the feed-
back capacitor in the 0A3 section (Figure 1-12) becomes "open". In
such acase, there is no low-pass feedback to 0A1, and the system does
not develop high-pass action. However, OA1 continues to develop low-
pass action, and low-pass output is obtained from 0A2. Accordingly, if
atrouble symptom of low-pass output occurs, instead of bandpass out-
put, the troubleshooter would proceed to check the possibility of an
open feedback capacitor in the 0A3 section. Again, suppose that this
feedback capacitor becomes leaky. In this situation, the effective capaci-
tance value is reduced and the cutoff frequency of the stage is increased.
20 . BASIC OPERATIONAL AMPLIFIERS

In turn, the bandwidth of the output from 0A2 is increased and the
center frequency is shifted to ahigher value. Table 1-1 lists component
values versus Q and frequency for this biquadratic bandpass filter. It
follows that if a capacitor defect increases the bandwidth of the 0A2
output (decreases the system Q value), the gain will also decrease.
Other trouble possibilities are subnormal supply voltage, off- value
resistors, defective op amps, cracked circuit boards, and cold- soldered
connections. Leakage between printed-circuit conductors occasionally
causes trouble symptoms. Many op amps are not designed to operate
normally under conditions of high humidity. An op amp will also fail to
operate normally at excessively high or low temperatures. For example, a
typical op amp is rated for normal operation between the limits of —55°
and 125°C. It is often helpful to follow up preliminary analysis of trouble
symptoms with dc voltage and resistance measurements and suitable
system tests, as explained in following chapters.
TABLE 1-1

Component values versus Q and Frequency

Frequency C Q R1

10 Hz 15 pF 0.5 5K
20 Hz 7.5 pF 1 10 K
50 Hz 3.3 pF 2 20 K
100 Hz 1.5 pF 5 50 K
200 Hz .75 pF 10 100 K
500 Hz .33 pF 20 200 K
1kHz .0159 pF 50 510 K'
2kHz 7500 pF 100 1.2 meg*
5kHz 3300 pF 200 3.3 meg"
10 kHz 1500 pF 500 10 meg"

(values approximate— (values approximate—

rounded to stock 'influenced by
sizes) frequency and supply
voltage)

If R3 = 10 K, circuit gain = CI
If R3 = 100 K, circuit gain = 0/10
If R3 = 1K. circuit gain = 10 CI etc...

Catastrophic destruction of an op amp usually occurs if the power-

supply polarity is accidentally reversed. Therefore, protective diodes
may be included in series with the power- supply leads, as depicted in
Figure 1-14. This is the most common arrangement. However, protec-
tive diodes may be utilized also in configurations that have a single
power supply with aresistive divider, or a single power supply with
a zener-diode regulator, as shown in Fig. 1-15. Diode protection is
 REVIEW QUESTIONS . 21

(DI, D2 are
1N4004 etc.)

Fig. 1-14 Dl and D2 function as protective diodes.

(b)

Fig. 1-15 Other protective-diode arrangements. (a) For single power source with
resistive divider; (b) For single power source with zener-diode regulator.

most advantageous in battery- powered equipment, because inexperi-

enced personnel can become confused concerning correct polarity re-
lations.

REVIEW QUESTIONS

1. What is the circuit called when both inputs of an op amp are driven?
2. What is the deviation from zero called?
3. What is avoltage follower circuit?
4. What is one important advantage of differential amplifier operation?
5. How is an operational amplifier kept from oscillating?
6. What is a limiter?
7. In Fig. 1-6(b), what effect does Cf have on the cutoff frequency?
22 . BASIC OPERATIONAL AMPLIFIERS

8. What is the meaning of each of the following terms?

Vs,Vs,Vs/Vi, Vo/Vs,and f.
9. What is the cutoff frequency of the circuit in Fig. 1-7 when R = 100 k
and C = . 01 F?
10. What are three advantages of using op amps in filters?
11. What is the center frequency of the filter in Fig. 1-8 when R = 10k and
C = 159 pF?
12. What is another name for the multiloop feedback-active filter?
13. What are the advantages of astate variable filter?
14. What is the center frequency of the circuit in Fig. 1-10 when R = 10 k
and C = 100 pF?
15. Why would capacitors be more suspect than resistors when checking a
faulty op amp?
16. List some of the trouble possibilities with afaulty op amp.
 2 • Linear and
Nonlinear
Op-Amp
Applications

2 . 1 GENERAL CONSIDERATIONS

It was noted previously that an operational amplifier may be util-

ized in either the linear or the nonlinear mode. Recall that alinear am-
plifier has an output that varies in direct proportion to the input. On
the other hand, anonlinear amplifier has an output that does not vary
in direct proportion to the input. As an illustration, aClass-A amplifier
operates in the linear mode. However, alogarithmic amplifier operates
in the nonlinear mode. Again, alimiter operates partially in the linear
mode, and partially in the nonlinear mode It is instructive at this point
to observe how an op amp functions in alinear- nonlinear application,
such as alimiter.
In Figure 2-1 a simple but practical op- amp configuration is
shown. It consists of adifferential input stage (Q1 and Q2) with invert-
ing and noninverting inputs. Q3 operates as aconstant-current sink to
optimize differential action of Q1 and Q2. Note that Q1 and Q2 are emit-
ter-coupled via Rl. If an input signal is applied to the noninverting input,
an amplified signal appears at the collector of Q1 and is fed to the base
of Q4. Again, if an input signal is applied to the inverting input, this
signal is coupled from the emitter of Q2 to the emitter of Ql. In turn, an
amplified signal appears at the collector of Q1 and is fed to the base of
Q4. Finally, Q4 operates as an emitter follower and provides current
gain at low impedance. Thus, Ql, Q2, and Q4 operate as amplifiers, and
Q3 is included to stabilize differential-amplifier operation.
The op amp in Figure 2-1 is rated for alinear dynamic output volt-
age range of -± 2.5 volts, with an open-loop voltage gain of 62 dB. This
means that the output varies in direct proportion to the input, provided
that the input signal amplitude is sufficiently small that the output sig-
nal amplitude does not exceed 2.5 volts. Since the voltage gain of the op

23
24 . LINEAR AND NONLINEAR OP- AMP APPLICATIONS

,6V

Output'

Non- inverting
input o

J_
-
V CC 3
—9V

Notes: Pin 10 is for frequency shaping

Pins 1, 2, and 6 - no internal connection

*Output offset voltage = — 0.5V

Fig. 2-1 A simple operational-amplifier configuration.

amp is 62 dB, it follows that the input signal amplitude must not exceed
2.5 mV if the linear dynamic range is not to be exceeded. However, sup-
pose that an input signal amplitude of 5mV is applied. In such acase,
Q1 and Q2 will be driven into nonlinear regions of operation, and the
input signal will not be amplified linearly. Instead, the driving signal
to Q4 will be compressed or clipped on its positive and negative peaks.
Positive-peak clipping results from driving one input transistor into
saturation, and negative- peak clipping results from driving the other
input transistor into saturation.
Note in passing that the op amp depicted in Figure 2-1 has an in-
put resistance of approximately 10,000 ohms and an output resistance of
about 10 ohms. As noted previously, an ideal op amp would have no
output offset voltage. In other words, the resting dc output voltage
would have the same value as the resting dc voltage at the input. How-
ever, in asimple arrangement such as Figure 2-1, there is considerable
dc offset voltage at the output. That is, when the inverting and the non-
inverting input terminals are grounded through 510- ohm resistors, and
the output terminal works into an open circuit, there is adc offset volt-
age of — 0.5 volt between the output terminal and either of the input ter-
minals. Although this would be aserious problem in some applications,
alarge offset voltage is of no concern in arrangements that do not em-
ploy anegative- feedback loop.
 APPLICATION NOTES . 25

2.2 APPLICATION NOTES

It is instructive to consider the linear op- amp applications shown

in Figure 2-2. Observe that asubtracter is arranged so that one voltage
is applied to the inverting input of the op amp, and another voltage is
applied to the noninverting input. In turn, the voltages tend to cancel
each other out, and the difference appears as the output voltage e 3.Note
that the input voltages el and e, must have the same polarity. Either dc
or ac input voltages may be utilized; in other words, both e, and e, may
be dc voltages, or both may be ac voltages. Note that the subtracter will
not function, however, if e, is adc voltage and e, is an ac voltage. In case
e, and e, are ac voltages, they must have the same frequency and phase.
That is, if e, and e, were ac voltages with arandom or unknown phase
relation, the amplitude of the output voltage e,, would have an unknown
relation to the amplitudes of el and e 2.

Next, consider the adder/subtracter arrangement depicted in Fig-

ure 2-2(b). This will be recognized as acombination of the adder con-
figuration that was explained in Chapter 1, and of the subtracter con-
figuration described above. Note that all four input voltages must have
the same polarity in an adder/subtracter arrangement. Either ac or dc
voltages may be employed. In ac operation, all the input voltages must
have the same frequency and phase. Note also that the operating fre-
quency must not exceed the rated frequency capability of the op amp.
As an illustration, atypical op amp has arated frequency response from
dc to 50 kHz. If operation were attempted at afrequency greater than
50 kHz, subnormal amplification would result and the balance between
inverting and noninverting functions would tend to become upset.
It is instructive to consider briefly how voltages add in aresistive
adder circuit. As an illustration, we will observe how voltage e, is added
to voltage e, in Figure 2-2(b). To reduce the circuit to its essential func-
tional form, refer to Figure 2-3(a). Note that e, and e, are basically con-
stant-voltage sources; in other words, the internal resistance of these
two sources is considered to be zero. The output voltage e 3 is the drop

across the lower resistor R. Now, let us stipulate that the source e, has a
value of zero, and that the source e, has avalue of Evolts. In turn, source
e, can be replaced by ashort-circuit, and we obtain the equivalent cir-
cuit shown in Figure 2-3(b). It is evident by inspection that the output
voltage will be equal to 1/3E. Next, let us stipulate that source el and
source e, each has avalue of E volts. In turn, we obtain the equivalent
circuit depicted in Figure 2-3(c). It is apparent that both of the input
currents produce an output voltage drop. Finally, the output voltage
will be equal to 2/3E. Hint: In case this value is not self-evident, the stu-
dent may apply Ohm's law and Kirchhoff's current law to the circuit.
26 . LINEAR AND NONLINEAR OP- AMP APPLICATIONS

Subtracter

(a)

e5

Adder/
subtracter
e5 = (el + e2) — ( e3 + e4)

(b)

el e2r

Phase shifter

Phase of e2 varies
from 0to 180° as
the value of ris varied.

(c)
Fig. 2-2 Typical linear op-amp applications.

Next, consider the phase- shifter op-amp arrangement shown in

Figure 2-2(c). This is, in the first analysis, asubtracter configuration in
which the inverting and noninverting inputs are energized through
dividers from the same ac source. However, avariabJe resistance is in-
cluded in the divider circuit to the noninverting input. This variable
resistance provides an adjustable phase shift of the voltage applied to
the noninverting input. Note that the voltage applied to the inverting
 APPLICATION NOTES . 27

(a) (b)

(c)
Fig. 2-3 Example of resistive adder action. ( a) Equivalent circuit; (
b) Source el
equal to E, and source e2 equal to zero; (c) Source eland source e2 both
equal to E.

input has afixed phase. In turn, the phase of the output voltage e 2 de-

pends upon the vector difference of the two input voltages. Variation of
the value of rcan provide aphase variation range of practically 180°. The
basis of this phase variation is shown in Figure 2-4. This semicircle
diagram depicts the locus of voltage e,. as the value of ris varied. The
phase angle between e,. and el is 4). Note that when rhas avery small
value, cf) approaches 90°; on the other hand, when rhas a very large
value, 4) approaches 0°.
It is helpful to observe op-amp characteristics and differential-
amplifier function in somewhat greater detail at this point. With refer-
ence to the subtracter configuration depicted in Figure 2-2(a), inverting-
amplifier and noninverting-amplifier functions are employed. The gain
of the basic inverting-amplifier arrangement was noted in Chapter 1.
It might be supposed that the gain of the basic noninverting-amplifier
arrangement is identical. However, this is not quite correct. Refer to
Figure 2-5. The basic configuration for an inverting amplifier is shown
in Figure 2-5(a). As noted in Chapter 1, the voltage amplification of the
28 . LINEAR AND NONLINEAR OP- AMP APPLICATIONS

ec

Fig. 2-4 Semicircle diagram for series RC circuit. (

a) Locus of circuit voltage drops;
(b) Reference circuit.

arrangement is given to agood approximation by the ratio R,/R1.In Fig-

ure 2-5(b) an example of an inverting amplifier with avoltage amplifi-
cation of 100 is depicted. Next, the basic configuration for anoninvert-
ing amplifier is shown in Figure 2-5(c). It can be shown that the voltage
amplification of this arrangement is given to agood approximation by
the equation:

(2-1)

In Figure 2-5(d) an example of anoninverting amplifier with the

same resistive values as in Figure 2-5(b) is depicted. Note that in this
example the voltage amplification is 101 times. In other words, the non-
inverting arrangement has 1 per cent greater gain than the inverting
arrangement. Thus, asubtracter designed from basic op-amp circuitry
would have an inherent error of 1 per cent. However, note that this
error is easily avoided by driving the noninverting input through a
resistive voltage divider that imposes a1per cent loss on the input sig-
nal amplitude.

2.3 INPUT AND OUTPUT RESISTANCE

CHARACTERISTICS

The input resistance and output resistance of an op amp is de-

termined by its internal design. However, the input resistance of an
op-amp stage may be quite different from the input resistance of the
op amp itself. Similarly, the output resistance of the stage might be dif-
ferent from the output resistance of the op amp itself. In other words,
the input and output circuitry that is employed may be the determining
factor. As an illustration, Figure 2-6 shows the input and feedback sig-
nal currents for basic inverting and noninverting amplifiers. Applica-
 INPUT AND OUTPUT RESISTANCE CHARACTERISTICS . 29

Rf 100K

Vo

(a)

Rf 100K

Output
Input A = Ri + Rf
Ri

lc)
Fig. 2-5 Inverting and noninverting amplifier arrangements. (a) Basic inverting
amplifier configuration; (b) Example of stage amplification; (c) Basic
noninverting amplifier configuration; (
d) Comparative example of stage
amplification.

tion of asignal voltage V, causes an input current flow I ;in Figure 2-6(a).

Since the op amp has extremely high gain, the feedback current I is
almost as large as I i.From the viewpoint of input- resistance analysis,
we may assume that is equal to I
If L In turn, the inverting- input (—)

terminal of the op amp is practically at zero potential. This means that

the inverting- input terminal "looks like" a ground point to the input
signal. Or, the input resistance to the inverting op- amp arrangement is
practically equal to Ri.
Next, consider the input resistance of the noninverting op-amp
arrangement depicted in Figure 2-6(b). As before, I f is almost equal to

I. However, the two currents do not oppose in this amplifier configura-

tion. Therefore, the input resistance to the noninverting op- amp ter-
minal (+) is determined essentially by the internal design of the op amp.
A typical high-performance op amp will present an input resistance of
less than one megohm up to several hundred megohms. Note that the
input resistance of an op amp basically denotes the ratio of input volt-
age to input current. With reference to Figure 2-6(a), the input resist-
ance is accordingly equal to Vs/I i.Observe that I iis given by the ratio

of the voltage drop across R, to the resistance of R,. Since the signal volt-
30 . LINEAR AND NONLINEAR OP- AMP APPLICATIONS

R2

(al

(3)

Fig. 2-6 Analysis of input resistance. (a) Inverting op-amp arrangement; (b) Non-
inverting op-amp arrangement.

age at the inverting terminal of the op amp is practically zero, the volt-
age drop across R, is equal to Vs,and the input current I f is equal to

Vs/Ri.In turn, the input resistance is equal to Vs divided by Vs/R,, or

the input resistance is equal to R,. Next, with reference to Figure 2-6(b),
the input current at the noninverting terminal of the op amp is typi-
cally 2.5 µA at 1V, or the input resistance is equal to 0.4 megohm.
Consider next the output resistance of an op amp, apart from its
load circuitry. Just as variously designed op amps may have inherent
(intrinsic) input resistances as low as several thousand ohms or as high
as several hundred megohms, so do inherent output resistances vary.
As an illustration, a typical high-performance op amp may have an
output resistance of 150 ohms. Another op amp may have an output re-
sistance of 75 ohms. A very simple design might have an output resist-
ance of 10,000 ohms. The comparatively simple design depicted in Fig-
ure 2-7 has arated output resistance of 160 ohms. Typical op amps can
provide an output voltage swing of 6volts peak- to-peak. If areduction
in output- voltage swing is permissible in aparticular application, the
output can be taken from avoltage divider connected to the output ter-
minal of the op amp. In turn the output resistance of the op-amp stage
will be less than the inherent output resistance of the op amp itself.

2. 4 BASIC NONLINEAR RESPONSES

A typical op amp is rated for amaximum signal-output current of

25 milliamperes. To protect the op amp from possible damage, acurrent
limiter or clamper may be built into the output stage. In such acase, the
 BASIC NONLINEAR RESPONSES . 31

Non inverting
input

VCC3

Notes: Pins 10 and 1are for frequency shaping

Pins 2 and 6 - no internal connection

Fig. 2-7 A simple op-amp configuration with arated output resistance of 160
ohms.

output waveform will be clipped if the output-current demand is ex-

ceeded. Figure 2-8 depicts an example of current clipping, or current
limiting distortion. Next, consider the effect of voltage clipping distor-
tion. Voltage clipping results from limiting of the maximum output
voltage capability for the op amp. For example, atypical op amp has an
output voltage capability approximately one volt less than the power-
supply voltages. In case the op amp is driven beyond its output-voltage
capability, the output waveform will become clipped. Clipping occurs
on both positive and negative peaks, as depicted in Figure 2-8.
As noted previously, it is also possible to overdrive the input sec-
tion of an op amp. The input voltage limits are often determined for
positive inputs by saturation of the input transistors, and for negative
inputs by saturation of the current source transistor. If the positive input
limit is exceeded, the op amp may be damaged. Or, if the input transis-
tors are not damaged, acondition called latch-up or "stuck at" response
may occur. For example, if the transistor at the inverting input saturates,
it no longer functions as an inverting amplifier, but provides acurrent
path between the input terminal and the base of the second input tran-
sistor. Thus, the inverting input is changed by overdrive into anonin-
verting input. Under this condition, the negative- feedback voltage acts
as apositive- feedback voltage, and the output voltage may hold the in-
put stage in saturation. This is the latch-up type of nonlinear response.
Latch- up response is more likely to occur in a voltage- follower
arrangement than in amplifier configurations that employ less negative
32 . LINEAR AND NONLINEAR OP- AMP APPLICATIONS

Positive peak
• limiting

•
Negative peak
limiting

Fig. 2-8 Example of current clipping distortion.

feedback. As seen in Figure 2-9(a), the output from the op amp is di-
rectly connected to the inverting input in avoltage follower. If atran-
sient voltage occurs in the input and momentarily overdrives the input
section of the op amp, latch- up is almost certain to result. Sometimes a
33-k resistor is connected in series with the feedback loop to limit the
negative- feedback voltage. However, this method of preventing latch-
up results in an increase of offset voltage. A somewhat more sophisti-
cated method of avoiding latch- up in avoltage follower is depicted in
Figure 2-9(b). A diode clamp D, is utilized to limit the amplitude of
feedback voltage and thereby to prevent the input transistor of the op
amp from going into saturation. Note that an input series resistor R, is
also provided. This resistor might have a value of 10 k, and provides
limiting of input transients without increasing the offset voltage ex-
cessively.
Various other protective circuitry is used in voltage- follower
arrangements, as explained in greater detail subsequently. Note in pass-
ing that the input resistance of avoltage follower is very high, and the
output resistance is very low. The voltage gain is practically unity. A
voltage follower is employed for impedance transformation and/or

R2

Output • Output

Input Input

(a) (
b)

Fig. 2-9 Latch-up protection in the voltage follower. (a) Basic follower arrange-
ment; (I)) Latch-up protection by series resistance and diode clamping.
 BIAS CURRENT OFFSET CONSIDERATIONS . 33

sectional isolation in most applications. A typical input resistance of

30 megohms can be obtained with suitable circuitry, and an input re-
sistance of 15 megohms is provided with circuitry that is optimized for
dc balance. The output impedance provided by a voltage follower is
considerably lower than the output impedance of an emitter follower
because of the extremely high gain of an op amp in comparison to the
gain of atransistor.

2 . 5 BIAS CURRENT OFFSET

CONSIDERATIONS

In both linear and nonlinear applications, consideration of bias

current offset is generally of basic importance. As noted previously, an
ideal op amp would have zero output voltage when the input voltage is
zero. In practice, however, this may not be the case. The output voltage
that is present when the input voltage is zero is called the output off-
set voltage. This output offset voltage, of course, is fed back to the in-
verting input of the op amp through the feedback loop. In turn, the cir-
cuit action may be disturbed. Note that there are two basic causes of
output offset voltage: input bias current and input offset voltage. We
will consider the characteristics of input bias currents and their control
at this point, and then proceed to the problem of input offset voltage
and output offset null adjustment.
All op amps have differential- amplifier input stages. A differen-
tial amplifier is so-called because it amplifies the difference between
two input signals (the signal at the inverting input and the signal at the
noninverting input). With reference to Figure 2-10, the current- source
transistor Q3 provides apractical constant-current supply to transistors
Q1 and Q2. To briefly review the basic semiconductor theory that is
involved here, the current that flows from the emitter to the collector of
atransistor is determined by the base bias current times the beta value
of the transistor. Moreover, the value of this emitter- to- collector cur-
rent is practically independent of the emitter-collector voltage. In other
words, the emitter-collector current that flows through Q3 is essentially
constant, because this current depends only on the fixed value of base-
bias current IgQ3.
Both of the inputs to the differential amplifier have been placed at
ground potential in Figure 2-10. It is evident that one-half of IcQ3 will
flow through QI, and that the other half will flow through Q2. Each of
these currents is related to the base- bias currents of Q1 and Q2. In other
words, IcQ is equal to beta times IBQ1, and IcQ2 is equal to beta times hew.
1

The base- bias currents IgQi and I Bca are called the input bias currents.
34 . LINEAR AND NONLINEAR OP- AMP APPLICATIONS

To V+
power supply

R1 R2
Output

1
B0 1 Q1 1
80 2

Input 1 Input 2

(Connected (Connected
Ico 3
to ground) 03 to ground)

1
80 3 ( From V+ supply)

To V—
power supply

Fig. 2-10 Basic differential-amplifier configuration with aconstant-current source.

Note that the output is taken from the collector of Q2. Now, suppose
that IBQ 1 and I
BQ ,are both increased by the same amount (Figure 2-11).

This increase is called acommon- mode input signal. The common-mode

signal would cause an increase in Icw and IcQ2 if Q3 were not present.
However, the presence of Q3 prevents any change in total current.
Therefore, the output of the differential amplifier remains unchanged.
The only change that does occur is an increase in the collector- emitter
voltage of Q3.
To repeat abasic principle, the output of adifferential amplifier is
unaffected by application of acommon-mode input signal. Next, con-
sider the result of applying adifferential- mode input signal (Figure 2-
12). Note that a positive voltage is applied to Input 1, and anegative
voltage is applied to Input 2. In turn, Iggi increases, and IgQ2 decreases.
Similarly, Iccu increases, and IcQ2 decreases. Of course, the sum of the
collector currents remains unchanged, because of the constant-current
action of Q3. Since IcQ2 decreases, the voltage drop across R2 decreases,
and there is acorresponding change in output voltage. In practice, it is
not possible to match the components perfectly and to maintain IcQ3
absolutely constant. A typical op amp will amplify adifferential-mode
signal approximately 10,000 times more than it will amplify acommon-
mode signal. Therefore, in the majority of practical applications, it can
be assumed that the op amp does not respond to common- mode signals.
In this discussion of bias-current offset, we will define input bias
currents as those currents that must be supplied at the input terminals
 BIAS CURRENT OFFSET CONSIDERATIONS . 35

To V+
power supply

Output

3 ( From V+ supply)

To V—
power supply

Fig. 2-11 Differential amplifier with acommon- mode input signal applied.

To V+
power supply

Output

..-- ' B O ( From V+ supply)

To V—
power supply

Fig. 2-12 Differential-mode input signal applied to amplifier.

of an op amp to provide correct biasing of the differential input- stage

transistors. With reference to Figure 2-13(a), the input bias current
flows through R1 and R2 to the output terminal and thence through the
load to ground. This input bias current develops a voltage drop across
R1 and R2, and appears as an input voltage at the inverting terminal of
36 . LINEAR AND NONLINEAR OP- AMP APPLICATIONS

R2

R1
Input Input

Output Output

(a) (
b)

Fig. 2-13 a) Path of input bias current; (

Input bias-current considerations. ( b)
Insertion of bias-current balancing resistor.

the op amp. This is adifferential input voltage, since there is no corre-

sponding voltage applied at the noninverting terminal. Therefore, the
input bias current is amplified by the op amp, and the resulting output
offset voltage is given approximately by the equation:

Eat; — IbR2 (2-2)

where Eb., is the output offset voltage

I
I, is the input bias current

R2 is the negative- feedback resistance

As noted previously, the output offset voltage owing to input bias

current through the feedback loop can be cancelled out by insertion of
a suitable resistance between the noninverting input terminal and
ground (R3 in Figure 2-13(b)). The value of R3 is chosen to develop a
voltage drop equal to I
bR2, and this required value is given by the equa-

tion:

R1 x R2
(2-3)
R3 = R1 + R2

where R1 and R2 have the significance indicated in Figure 2-13(a).

It was also noted previously that perfect op amps cannot be de-
signed and manufactured, with the result that even when the input bias
current is cancelled out, there is generally asmall output offset voltage
remaining. To bring the output terminal of the op amp to zero poten-
tial, R3 must usually be adjusted to provide an input bias current slightly
 BIAS CURRENT OFFSET CONSIDERATIONS . 37

greater or slightly less than the input bias current at the inverting ter-
minal of the op amp. The difference between these two input bias cur-
rents is called the input offset current. Note that the output offset volt-
age produced by the input offset current is given approximately by the
equation:

E„s = I„,R2 (2-4)

where Eos is the output offset voltage

I
os is the input offset current

R2 is the negative- feedback resistance

Next, consider the characteristics of input offset voltage. With ref-

erence to Figure 2-14(a), an input offset voltage is defined as the differ-
ential input voltage that must be applied to the input terminals of an
op amp to bring the output terminal to zero potential. An ideal op amp
would have zero input offset voltage. In practice, however, the input
offset voltage is not quite zero, owing to tolerances on the internal com-
ponents of the op amp. The input offset voltage can be represented as
asmall voltage source in series with the noninverting input terminal of
the op amp, as depicted in Figure 2-14(b). In turn, the output offset volt-
age that results from the input offset voltage is given by the equation:

E0 + R2 (2-5)
R1 V„,

where Eos is the output offset voltage

V„sis the input offset voltage

R1 is the resistance of the input component

R2 is the resistance of the feedback component

A typical high-performance op amp is rated for amaximum input

bias current of 80 nA (8x10 -9ampere), amaximum input offset current
of 20 nA, and amaximum input offset voltage of 1mV ( 10 -3 volt). Sub-
stitution in the foregoing equations shows that the corresponding out-
put offsets owing to input bias current and input offset voltage are 0.8
mV and 101 mV, assuming that R1 -=- 100 ohms, and R2 = 10 k. Since the
output offset voltages are caused by tolerances on different components
in the op amp, the two voltages may have either polarity (may add or
38 . LINEAR AND NONLINEAR OP- AMP APPLICATIONS

R2

I
nput
Output

Eos = OVolts

'Adj. to make Eos = OV

(a) (b)

Fig. 2-14 Representation of input offset voltage. (a) I

nput offset voltage represented
as an external battery; (
13) Input offset voltage represented as an internal
battery.

subtract). In case they happen to add, the total output offset voltage
would be 101.8 mV in this example. As apractical application note, this
total output offset would not be regarded as serious. However, if abal-
ancing resistor is inserted (R3 in Figure 2-13(b)), the value of output
offset voltage owing to bias current can be substantially reduced. As
noted previously, in case the total output offset voltage must be exactly
zero, anull potentiometer is included in the input configuration.

2 . 6 TROUBLESHOOTING TECHNIQUES

DC voltage and resistance measurements are basic in trouble-

shooting op- amp systems. Some op amp circuits have very high inter-
nal impedance. As an illustration, two amplifier circuits are depicted in
Figure 2-15. One circuit has again of 100 times, and the other circuit
has again of two times. The low-gain amplifier has some very high in-
ternal impedances. Note that the inverting input is connected to a5-meg
resistor and a10-meg resistor. Also, the noninverting input is connected
to a3.3-meg resistor. Because these input circuits have such ahigh value
of internal resistance, it would be impossible to measure the input off-
set voltage with a20,000 ohms-per- volt VOM. A conventional VOM will
load the circuits excessively and the voltage readings will be meaning-
less. Instead, it is necessary to employ aTVM that has an input resist-
ance of at least 10 megohms. For example, an FET multimeter such as
illustrated in Figure 2-16 is suitable.
Note that the instrument shown in Figure 2-16 has ahi-lo ohm-
meter function. When operated in its hi-pwr mode, conventional ohm-
meter action is provided. In other words, the ohmmeter is energized
by a1.5-volt battery. On the other hand, when the ohmmeter is operated
 TROUBLESHOOTING TECHNIQUES . 39

10K 10 'nog

Fig. 2-15 Op-amp circuits with gain values of 100 and of 2.

Fig. 2-16 A hi- lo FET multimeter. (

Courtesy, Sencore)

in its lo-pwr mode, the instrument applies a maximum of 0.08 volt

across the circuit under test. This feature ensures that semiconductor
junctions will not be " turned on" during in- circuit resistance measure-
ments. To understand the advantage of low- voltage ohmmeter testing
in semiconductor circuits, refer to Figure 2-17. This is asimple inverting-
amplifier configuration. To measure resistance values, the 15-volt sup-
40 . LINEAR AND NONLINEAR OP- AMP APPLICATIONS

10K

=.

Fig. 2-17 A simple op-amp inverting-amplifier configuration.

plies must be disconnected and the input voltage E, switched off. Then,
the values of the 100-ohm resistor, the 10-k feedback resistor, and the
load resistance can be measured in-circuit with alo-pwr ohmmeter. In
other words, none of the transistor junctions can be turned on by atest
voltage of 0.08 volt, or less.
Of course, the foregoing conclusion is based on the assumption
that the op amp is not defective. As an illustration, if the collector junc-
tion of Q1 happens to be short-circuited (Figure 2-17), alo-pwr ohm-
meter will not indicate the correct resistance of the 10-k feedback resis-
tor on an in-circuit test. Note that in this situation, the 10-k resistor
would be effectively shunted by a 4.7-k resistor in series with a 5-k
resistor. In turn, the ohmmeter would indicate aresistance of approxi-
mately 5 k. In such a case, the technician would disconnect the 10-k
feedback resistor from the op amp, and measure its resistance out- of-
circuit. The result, of course, would be that the 10-k resistor would now
measure its normal value. In turn, the logical conclusion would be that
the op amp is defective. It is instructive to note in passing that the input
transistors Q1 and Q2, and Q5 and Q6 are Darlington-connected. This
connection is used to obtain comparatively high input impedance—
typically 1megohm.
A test oscillator is also a basic instrument in troubleshooting of
op-amp systems. Figure 2-18 illustrates a suitable high- quality test
oscillator. It is used to inject sine- wave signals at various points. Since
 TROUBLESHOOTING TECHNIQUES . 41

2040 OSCILLATOR

Fig. 2-18 A high-quality test oscillator. (Courtesy, Hewlett-Packard)

awide range of test voltages are needed in general troubleshooting pro-

cedures, a test oscillator should provide an output signal range from
0.1 mV to several volts. A calibrated attenuator is not a necessity, al-
though it can often simplify test procedures and reduce the number of
voltage measurements that are required. In some situations, the fre-
quency response of an op- amp section or system may need to be meas-
ured. Accordingly, the test oscillator should provide an ample frequency
range. For example, the instrument shown in Figure 2-18 has a fre-
quency range from 5 Hz to 1.2 MHz. Although high-fidelity response
is seldom required in op- amp systems, it is nevertheless desirable to
employ atest oscillator with acomparatively low percentage of distor-
tion. The instrument in Figure 2-18 is rated for aharmonic distortion of
less than 0.1% from 30 Hz to 100 kHz, less than 0.6% from 5Hz to 30 Hz,
and less than 1% from 100 kHz to 1.2 MHz.
Tests of op-amp response in comparator arrangements are often
42 . LINEAR AND NONLINEAR OP- AMP APPLICATIONS

facilitated by the availability of a square-wave generator and an os-

cilloscope. These instruments are employed, for example, to measure
the slew rate of the op amp. The slew rate is defined as the maximum
rate of change (maximum speed of response) to an input signal that
suddenly changes from amaximum positive value to amaximum nega-
tive value. This topic is discussed in greater detail subsequently. A typi-
cal high-performance op amp is rated for aslew rate of 0.5 volt per mi-
crosecond. Accordingly, asuitable square-wave generator should have
arise time (Figure 2-19) of much less than 1microsecond. The instru-
ment illustrated in Figure 2-20 has arated rise time of 50 nanoseconds
(50 ns). It has afrequency range from 4Hz to 2MHz, with amaximum
output of 5volts which can be attenuated 80 dB.
A companion oscilloscope suitable for slew- rate testing is illus-
trated in Figure 2-21. This instrument has avertical-amplifier band-
width from dc to 15 MHz, and two time bases. The second time base
functions as adelay generator, so that asignal that is related to an in-
itating signal, but delayed in time, can be easily displayed. A calibrated
delay range from 2ps to 10 sis provided. Time base A is adjustable
from 0.1 µ,s/cm to 5s/cm in 24 calibrated steps. Time base B is adjustable
from 2µs/cm to 1s/cm, in 18 calibrated steps. It is useful as arepetition-
rate generator over the range of 0.1 Hz to 40 kHz. A sweep magnifier
of 5X extends the maximum sweep speed to 20 ns/cm. Expertise in os-
cilloscope testing procedures requires both specialized study and prac-
tical experience.

90%

Practical
square
—

fi
wave

Rise time is 0.05 microsecond

Ideal
square
wave

10% —

1111
05 1.0 15 20

Time ( microseconds)

Fig. 2-19 Measurement of rise time.

 TROUBLESHOOTING TECHNIQUES . 43

IOSA 011C1.1.ANOI

• •

iede
1 1!15

dried&
MIN
1 0, M.

SUU11
Me

Fig. 2-20 A high-performance square-wave generator. (

Courtesy, Hewlett-Packard)

Fig. 2-21 A triggered-sweep oscilloscope with calibrated time base. (Courtesy,

Hewlett-Packard)
44 . LINEAR AND NONLINEAR OP-AMP APPLICATIONS

REVIEW QUESTIONS

1. What is the difference between a linear and nonlinear mode of opera-

tion?
2. In Fig. 2-1, what is the function of Q3?
3. Compare the input resistance of the circuit in Fig. 2-1 to the output
resistance.
4. Why isn't the 0.5 volt dc offset voltage in Fig. 2-1 aproblem?
5. What is the requirement of the input voltages in Fig. 2-2?
6. What is the frequency requirement of the adder/subtracter in Fig. 2-2
(b)?
7. What is the voltage amplification of the circuit in Fig. 2-5(b) when
Ri = 10k ohms and Rp = 1M ohm?
8. What is the value of the input resistance of the inverting terminal of
the circuit configuration in Fig. 2-6(a)?
9. What is the range of input resistance values of typical op amps?
10. What can we state about the value of the output resistance of an op
amp circuit?
11. Other than the internal construction of the op amp, what limits the
voltage swing of an op amp circuit?
12. What is latch-up?
13. What is the problem that results when the circuit in Fig. 2-9(a) is used
to prevent latch-up?
14. Why is the output resistance of avoltage follower less than that of an
emitter follower?
15. What is adifferential amplifier?
16. In Fig. 2-13(a) what is the value of the output offset voltage when l
b is

20FLA and R, is 100k ohms?

17. Why should you use aTVM to measure the dc voltage of most op amps?
18. Why is it necessary to use aLo-Pwr ohmmeter to measure resistance in
an op amp circuit?
19. Define the term "slew rate" as it applies to an op amp.
3 • Inductance
Simulation by
Operational
Amplifiers

3 1 GENERAL CONSIDERATIONS

Transistors, diodes, resistors, and capacitors are built into inte-

grated circuits. On the other hand, inductors as such cannot be formed
in IC technology. Therefore, various expedients are employed to simu-
late inductance in IC packages by means of suitable configurations of
capacitors, resistors, and op amps. At this point, it is instructive to
briefly review the basic characteristics of inductors and capacitors. With
reference to Figure 3-1, an ideal or pure inductor is atwo- terminal de-
vice consisting essentially of acoil of wire wound in the form of aspiral
or helix. This ideal inductor has an electrical property called inductance,
and the wire is assumed to have zero resistance. It is also assumed that
the ideal inductor has no distributed capacitance (no capacitance be-
tween consecutive turns of wire). The property of inductance can be
compared to the inertia of a flywheel. In other words, a flywheel
opposes the driving force that tends to speed up its rotation. Once
the flywheel has been placed in rotation, it opposes the braking force
that tends to slow down its rotation. Similarly, an inductor opposes
current buildup when avoltage is applied to the terminals of the coil;
conversely, the inductor opposes current decay when the voltage is
switched off.
Note that the foregoing flywheel and inductor characteristics are
based on energy storage. In other words, aflywheel stores mechanical
energy as its speed of rotation increases. An inductor stores electrical
energy as the current through its winding increases. It is apparent that
an ideal flywheel or an ideal inductor does not convert ("use up") en-
ergy, but merely holds its stored energy unchanged until it is given a
suitable opportunity to return this stored energy to some load. For ex-

.45
46 . INDUCTANCE SIMULATION BY OPERATIONAL AMPLIFIERS

(a) (b)

Fig. 3-1 Inductor characteristics. (

a) Basic physical construction; (
b) Demonstra-
tion circuit.

ample, aflywheel returns its stored energy to the brake that slows down
its speed of rotation. An inductor returns its stored energy to the re-
sistor that is switched across its terminals in place of abattery as shown
in Figure 3-1(b). A brake converts (" uses up") mechanical energy in the
form of heat. Similarly, a resistor converts electrical energy into heat
energy.
Conversion of stored electrical energy into light and heat is dem-
onstrated by the arrangement shown in Figure 3-1(b). A comparatively
large inductor is employed, so that appreciable electrical energy can
be stored. When switch Sw is closed, the lamp glows for ashort time.
This fact demonstrates that coil L opposes current buildup, thereby
causing current to flow through the lamp. On the other hand, after the
current buildup in the coil is completed, the coil no longer opposes its
current flow, and the coil acts as ashort-circuit across the lamp. In turn,
the lamp then stops glowing. However, if switch Sw is now opened, the
lamp flashes brightly for ashort time. This fact demonstrates that stored
electrical energy in the coil has been returned to the external circuit and
converted into light and heat.
Electrical energy is stored by an inductor in the form of amagnetic
field, as depicted in Figure 3-2. The strength of this field is directly pro-
portional to the current that flows through the winding. Buildup of the
magnetic field and current flow lags behind the voltage that is applied
when the switch is closed. It is important to recognize that it is the
buildup of the magnetic field in an inductor that opposes current flow
and causes it to lag behind the applied voltage. In other words, as the
magnetic field is being built up in Figure 3-2, the magnetic lines of
force are expanding outward and cutting the coil turns. This cutting
action induces avoltage in the turns which opposes the applied battery
voltage. We call this opposing voltage a counter electromotive force
(CEMF), or the voltage of self-induction. It is important to understand
 GENERAL CONSIDERATIONS . 47

Fig. 3-2 An inductor stores energy in the form of amagnetic field.

CEMF, because it is abasic factor in the operation of simulated induc-

tance with operational amplifiers.
When the applied voltage to an inductor is switched off, the mag-
netic field that has been established then starts to collapse inwards. In
so doing, the magnetic lines of force cut the coil turns in the opposite
direction from before. This cutting action again induces aCEMF, but
with opposite polarity to the first CEMF described above. Accordingly,
this CEMF tends to maintain current flow through the winding, in spite
of the fact that no battery voltage is being applied to the coil. It is this
CEMF that causes the lamp in Figure 3-1(b) to flash briefly when switch
Sw is opened, after being closed previously. Again, this is lagging ac-
tion, because the current that causes the lamp to flash is flowing after
switch Sw is opened.
A small coil has asmall inductance, whereas alarge coil has alarge
inductance. Inductance is measured in Henrys. A Henry is defined as
the inductance of acoil that permits the current to increase at the rate
of 1ampere per second when 1volt is applied to the coil terminals. Fig-
ure 3-3 shows the current rise in an ideal 1- Hy coil. When 1volt is ap-
plied to the inductor, the current increases at the rate of 1ampere per
second. The opposition that an inductor exhibits to achange in current
is called inductive reactance. Reactance is measured in ohms. Note that
reactance is different from resistance, not only because reactance does
not convert energy, but also because the reactance of a coil does not
oppose current flow— it only opposes any change in current flow.
The ohmic measure of reactance is shown to good advantage by
consideration of an ideal inductor connected to an ac voltage source, as
48 . INDUCTANCE SIMULATION BY OPERATIONAL AMPLIFIERS

Current, amperes 4
1V

o 2 3 4 5 6 7 8

Time, seconds

(b)
Fig. 3-3 Ideal inductor energized by adc voltage source. (
a) Circuit; (b) Current
flow versus time.

depicted in Figure 3-4. If the applied voltage is doubled, the current

through the inductor is doubled. Or, the reactance of the inductor is
given by this voltage/current ratio:

E
= ohms (3-1)

Next, if the frequency of the applied voltage is doubled, the value

of the reactance is doubled. In other words, inductive reactance is pro-
portional to frequency:

XL = 27rf L ohms (3-2)

where L is in Henrys, and fis in Hertz

Next, consider the basic characteristics of capacitance. A capacitor
is a two- terminal device consisting essentially of apair of spaced metal
plates, as depicted in Figure 3-5. An ideal capacitor has an electrical
property called capacitance, which is associated with energy storage.
Electrical energy is stored by acapacitor in the form of an electrostatic
field. This mode of energy storage is characterized by acurrent flow
 GENERAL CONSIDERATIONS . 49

AC
sou rce

Fig. 3-4 Inductive reactance is equal to an E/I ratio.

Positive
plate

Dielectric
material

(a) (b)

Fig. 3-5 Capacitor characteristics. (

a) Basic physical construction; (b) Demonstra-
tion circuit.

that leads the applied voltage to the capacitor. As an illustration, con-

sider the circuit action in Figure 3-5(b) when switch Swl is closed.
There is an inrush of current from the battery into the capacitor, and
this current flow causes the lamp to flash briefly. As soon as the capaci-
tor is fully charged (comes up to full voltage) the lamp stops glowing.
Thus, the current leads the voltage.
To demonstrate that the capacitor has stored electrical en-
ergy which can be returned to the external circuit, Swl may be opened,
and Sw2 then closed. The lamp will flash briefly as the stored energy in
the capacitor discharges through the lamp. Note that a capacitor op-
poses any change in voltage, whereas an inductor opposes any change
in current. A small capacitor has asmall capacitance, and alarge capaci-
tor has alarge capacitance. Capacitance is measured in Farads. A Farad
is defined as the capacitance that will store 1coulomb when 1volt is
applied to its terminals. A coulomb is aquantity of electricity equal to
1ampere flowing for 1second. The opposition that acapacitor exhibits
to achange in voltage is called capacitive reactance, and is measured in
ohms. Capacitive reactance is different from resistance because reac-
tance does not convert energy.
30 . INDUCTANCE SIMULATION BY OPERATIONAL AMPLIFIERS

The reactance of acapacitor is given by its ac voltage/current ratio:

Xc = Tu. ohms (3-3)

Next if the frequency of the applied ac voltage is doubled, the value

of the reactance is halved. In other words, capacitive reactance is in-
versely proportional to frequency:

1
Xc = 27rf C ohms (3-4)

where C is in Farads, and fis in Hertz

3 . 2 PHASE RELATIONS IN LC CIRCUITS

Phase relations are of basic importance in simulation of inductance

by RC op-amp circuitry. Figure 3-6 shows how the sine-wave current
in an inductor lags the applied voltage and how the current in acapaci-
tor leads the applied voltage. These phase relations are always present
in an ac circuit, as exemplified in Figure 3-7. Note that the voltage
across the inductor is 180° out of phase with the voltage across the ca-
pacitor. Power is alternately stored by the capacitor, and then by the
inductor. A series LCR circuit is essentially abandpass filter, because
the maximum current flow in the circuit occurs at its resonant frequency:

1
(3-5)
27rVa- Hertz

where f„ is the resonant frequency,

L is in Henrys

C is in Farads

3 . 3 SIMULATION OF L BY C IN FILTERS

There are various ways in which inductance can be simulated by

capacitance in filter circuits. Simulation is uncomplicated in elementary
filters, such as shown in Figure 3-8. An RC circuit is equivalent to an
RL circuit with respect to frequency characteristics if the inductance in
 SIMULATION OF L BY C IN FILTERS . 51

0=90 °
E

=90°

=90°

Fig. 3-6 Phase relations for ideal inductance and capacitance. ( a) Voltage-current
relation for inductor; (b) Voltage-current relation for capacitor.

ER
ER
0° 180 ° 360 °

Fig. 3-7 Voltage, current, and power relations in R, C, and L.

52 . INDUCTANCE SIMULATION BY OPERATIONAL AMPLIFIERS

Henrys is equal to R2C, as shown in Figure 3-8(a) and (b). In other

words, the two circuits have the same time constant. This equality fol-
lows from the relation RC = L/R, arelation that can be shown by mathe-
matical analysis of the two circuits. As a practical note, when a com-
paratively large inductor is used, the output waveform may differ
considerably from the waveform predicted by simple theory, because
alarge inductor has substantial distributed capacitance.
Note that the equivalent circuits in Figure 3-8(a) and (b) become
high-pass filters, or differentiating circuits, if the output is taken from
across the inductor in (a), and from across the resistor in (b). As anu-
merical example of equivalency, if Ll = 1mH, and R1 = 1,000 ohms,

Li R1
Ell E01 E11 E01

Cl

E02 E12 E02

(a) (b)

R1 Li E01
Ell Low-C
probe

E12
E02

Note: L = R2 C

(c)

R1 R2 E01
Ell Low C
probe

E12
E02

Note: R1 = R2
Cl = C2

(d)

Fig. 3-8 Inductance simulation by capacitance in elementary filters. (a) An RL low-

pass filter, or integrating circuit; (b) Equivalent RC low-pass filter, or
integrating circuit; (c) A series RLC low-pass filter, or integrating circuit;
(d) Equivalent two-section RC low-pass filter, or integrating circuit.
 PHASE RELATIONS IN TWO-TERMINAL AND FOUR-TERMINAL CIRCUITS . 53

then Cl = 0.001 µF. Next, observe the simulation of inductance by RC

circuitry in Figure 3-8(c) and (d). In this case, a series LCR low-pass
filter, or integrating circuit, has an equivalent circuit consisting of a
two- section RC low-pass filter, or integrating circuit. The foregoing
examples of simulation are instructive. However, it should not be sup-
posed that any inductive filter can be simulated by uncomplicated RC
circuitry. To the contrary, most inductive filter configurations can be
simulated by RC circuitry only if op amps are included.
It will be recognized that the equivalency in Figure 3-8(a) and (b)
does not extend beyond the fact that both circuits have the same output
waveform. Note that the input impedance in Figure 3-8(a) is inductive
(a lagging current is drawn), whereas the input impedance in Figure
3-8(b) is capacitive (aleading current is drawn). In other words, this is
not strictly an example of inductance simulation. Instead, it is an ex-
ample of simulation of an input-output waveform characteristic. The
same observation applies to the equivalency in Figure 3-8(c) and (d).
Further, it should be noted that the input impedance in Figure 3-8(a)
increases as the operating frequency increases, whereas the input im-
pedance in Figure 3-8(b) decreases as the operating frequency in-
creases. Similarly, the output impedances of the two circuits vary dif-
ferently with frequency.

3.4 PHASE RELATIONS IN TWO-TERMINAL

AND FOUR-TERMINAL CIRCUITS

Figure 3-9(a) shows an example of atwo- terminal LCR series cir-

cuit; it has the frequency and phase characteristics depicted in Figure
3-9(b). This phase characteristic represents the lead or lag of the circuit
current with respect to the applied voltage as the operating frequency
varies from alow value to a high value. Note that the circuit draws a
leading current at low frequencies, and draws alagging current at high
frequencies. In other words, the input impedance is capacitive at low
frequencies, and is inductive at high frequencies. At the resonant fre-
quency f o,the input impedance is resistive (phase angle is 0°). At the

limits of the circuit's frequency response, the phase angle is 90° lead-
ing, or 90° lagging.
Next, Figure 3-10 shows an example of atwo- terminal LCR paral-
lel circuit; it has the frequency and phase characteristics depicted in
Figure 3-10(b). Note that the circuit draws alagging current at low fre-
quencies, and draws a leading current at high frequencies. In other
words, the input impedance is inductive at low frequencies, and is ca-
pacitive at high frequencies. At the resonant frequency f o,the input
54 . INDUCTANCE SIMULATION BY OPERATIONAL AMPLIFIERS

100

90 90 °

C
80

Percent of maximum current

70 45°

60

50 0°

40

30 45 °

(al
20

10 90 °

o
fo

Frequency
(b)

Fig. 3-9 Frequency and phase characteristics of atwo-terminal LCR series circuit.
(a) Configuration; (
b) Frequency response and phase characteristic.

100

90 90 °

80
Impedance

70 450 3
60
caxlmen1

50
,
Percent of

40

30 45 0
cr,
(a)
20

10 90 °

o
fo
Frequency

(b)

Fig. 3-10 Frequency and phase characteristics of atwo-terminal LCR parallel cir-
cuit. (a) Configuration; (
b) Frequency response and phase characteristic.
 PRINCIPLES OF INDUCTANCE SIMULATION . 55

impedance is resistive (phase angle is 0°). At the limits of the circuit's

frequency response, the phase angle is 90° lagging, or 90° leading. Thus,
a parallel LCR circuit has the opposite phase characteristic of aseries
LCR circuit. Note also that the impedance of a parallel LCR circuit is
maximum at f o,whereas the impedance of aseries LCR circuit is mini-

mum at f o.

With reference to Figure 3-8, observe that afour- terminal circuit

has apair of input terminals, and apair of output terminals. In turn, it
has aforward transfer characteristic which is defined as the ratio of out-
put voltage to input voltage, or as the ratio of output voltage to input
current. Note that the output current in Figure 3-8(a) lags the input
voltage; the output voltage in Figure 3-8(b) also lags the input voltage.
Similarly, it can be shown that the output voltage in Figures 3-8(c) and
(d) lags the input voltage. Forward transfer characteristics are of basic
importance in simulation of inductance by RC op- amp circuitry.

3 . 5 PRINCIPLES OF INDUCTANCE
SIMULATION

To simulate the characteristics of inductance by a network that

comprises resistance, capacitance, and op amps, the network must be
arranged so that an input voltage causes acurrent to be drawn by the
input terminals which lags the applied voltage by 90°. In principle, the
circuit designer has the available relations depicted in Figure 3-11.
Note that if an ac voltage E is applied to capacitor C, aleading current I
will be drawn by Rl. This current will lead E by almost 90° if the reac-
tance of C is large compared to the resistance of Rl. Next, if the voltage
drop across R1 is applied to the inverting input of an op amp, the out-
R2

i E

180 ° phase
shift

(a) (b)

Fig. 3-11 Simulation of inductance. (

a) Basic components; (b) Component phase
relations.
56 . INDUCTANCE SIMULATION BY OPERATIONAL AMPLIFIERS

put voltage will be reversed in polarity, or shifted in phase by 180°. As

shown in Figure 3-11(b), the I + 180° sine wave is effectively in an in-
ductive relation to E, inasmuch as it lags E by 90°. In other words, the
necessary electrical relations are available to devise an RC op- amp net-
work that will "look" inductive to an ac input voltage.
A network for inductance simulation necessarily employs feed-
back in such amanner that the current which is drawn in response to
an applied ac voltage is dominated by the output current of the op amp.
One basic form is called agyrator, and its circuit action is given in ref-
erence to Figure 3-12 by the equations:

V, = AI, (3-6)

I, = -BV2 (3-7)

where A and B are constants.

V, -AI, A
- I,— -BV— (3-8)
2 BXc

.
7 A 1 CA
(3-9)
B 1/jwC - J*) B

This result denotes asimulated inductance with avalue of CA/B

Henrys. A positive jw term appears in the final term because the net-
work is defined to draw a current in accordance with equation (3-7).
An example of inductance simulation by op- amp circuitry is
,nown in Figure 3-13. Here, an LCR high-pass filter has been converted
into op-amp RC form. In other words, the inductor in the LCR filter has
been replaced by op- amp circuitry. A high-pass filter, as explained pre-
viously, rejects or attenuates low frequencies but passes high frequen-
cies from the input to the output of the filter. Note that the op amp em-
ploys positive feedback in this application. The circuit action in Figure
3-13(a) can be summarized as follows:
1. Caracitor C develops increasing reactance at lower frequencies
ant thereby opposes the passage of low frequencies.
2. In luctor L develops decreasing reactance at lower frequencies
an tends to shunt low frequencies to ground, thereby further
attenuating the low- frequency output.
3. Capacitor C develops decreasing reactance at higher frequen-
cies and thereby permits passage of high frequencies.
4. Inductor L develops increasing reactance at higher frequencies
and thereby permits passage of high frequencies, instead of
shunting them to ground.
 PRINCIPLES OF INDUCTANCE SIMULATION . 57

11 12
o
Z in
Network
o
V2
Txc
Fig. 3-12 Gyrator block diagram.

CI R1

e2 e1

la) (b)
Fig. 3-13 Inductance simulation in ahigh-pass filter. (
a) Conventional LCR filter
circuit; (
b) Inductor simulated by op-amp circuitry.

Next, an equivalent circuit action is provided by the configuration

of Figure 3-13(b) as follows:
1. Capacitor Cl develops increasing reactance at lower frequencies
and thereby opposes the passage of low frequencies.
2. Capacitor C2 develops increasing reactance at lower frequencies
which in turn reduces the input signal voltage into the op amp.
3. Capacitors Cl and C2 develop decreasing reactance at higher
frequencies and thereby permit passage of high frequencies.
4. Capacitor C2 applies increasing input signal voltage into the
op amp at higher frequencies, and the output signal voltage is
increased by the gain of the op amp at high frequencies.
Note that the amount of positive feedback utilized in the configu-
ration of Figure 3-13(b) must not be so great that the op amp breaks
into oscillation. The output voltage at high frequencies increases as the
input signal voltage is increased, up to the point that the transistors in
the op amp are overdriven. Beyond this input level, the output wave-
form will become limited or clipped.
Passive filters such as depicted in Figure 3-13(a) have a charac-
teristic transient response, in addition to their steady-state response.
Similarly, active filters such as depicted in Figure 3-13(b) have both
steady-state and transient responses. The frequency response of afilter
characterizes its steady-state response. On the other hand, the response
of afilter to asuddenly applied DC input voltage characterizes its tran-
sient response. Figure 3-14 shows how abattery voltage can be suddenly
58 . INDUCTANCE SIMULATION BY OPERATIONAL AMPLIFIERS

switched into an LCR high-pass filter. This is called astep- function in-
put voltage. In turn, the filter develops an output voltage waveform as
shown in Figure 3-14(b). The rate of decay of the output voltage be-
comes slower as the values of L, C, and R are increased.
Active filters such as the op-amp RC high-pass filter depicted in
Figure 3-13(b) have asimilar transient response. With reference to Fig-
ure 3-15(a), consider the circuit action when switch Sw is closed. First,
the step function of voltage seen in Figure 3-15(b) is applied to Cl. In
turn, asurge of voltage immediately appears across R2 from C2, and a
differentiated pulse is applied to the input of the op amp. This pulse is
amplified with the result that e 2 immediately rises to its maximum

value. At the same time, positive feedback voltage is applied to Cl - C2

via Rl. This feedback modifies the response of the RC circuitry as de-
picted in Figure 3-16. In other words, the circuit action can be sum-
marized as follows:
1. A two- section differentiating circuit is provided by C1R1 and
C2R2. By itself, this two- section differentiator produces avolt-
age waveform across R2 in accordance with the " resistive tran-
sient component" indicated in Figure 3-16.
2. Positive feedback from the op- amp output to Cl - C2 introduces
simulated inductive action, with the result that an "inductive
transient component" is included in the total response, as in-
dicated in Figure 3-16.
3. Combination of the two transient components results in the
output voltage waveform e 2,which is essentially the same as

the voltage output waveform depicted in Figure 3-14.

3. 6 OTA GYRATOR ARRANGEMENTS

A useful network for inductance simulation employs an opera-

tional transconductance amplifier (OTA) in agyrator configuration. An
OTA has acomparatively high output resistance, which provides added
utility in gyrator application. The forward transfer characteristic of an
OTA is defined as the relation of output current to input voltage. By way
of comparison, the forward transfer characteristic of an operational
voltage amplifier (OVA) such as discussed previously, is defined as the
relation of output voltage to input voltage. Although the gain of an
OTA could be expressed as an output/input voltage ratio, its high out-
put resistance complicates the equations, and the OTA forward char-
acteristic is best described by a transconductance term. Note that an
ideal OVA would have zero output resistance, whereas an ideal OTA
would have infinite output resistance.
 OTA GYRATOR ARRANGEMENTS . 59

Output voltage
Time

lal ( b)

Fig. 3-14 Transient response of an LCR high-pass filter. (

a) Arrangement for apply-
ing a step function of voltage; (
b) Response of filter to astep-function
input.

Cl R1
E

Switch
closed
e2

Time

(a) (b)

Fig. 3-15 Inductance simulator for functional analysis. (

a) Source voltage provided
by battery and switch; (b) Step function of voltage is applied when Sw
is closed.

Inductive transient
component

Time

Fig. 3-16 Basic transient components of output from inductance simulator con-
figuration.
60 . INDUCTANCE SIMULATION BY OPERATIONAL AMPLIFIERS

The output circuit of an OTA is regarded as an infinite- impedance

current generator, whereas the output circuit of an OVA is regarded as
a zero- impedance voltage generator. Transconductance is symbolized
by Gm ,and is equal to the ratio of output current to input voltage for
the OTA:

Gm = —
iout mhos (3-10)

where i
out is in ampere units

ein is in volt units

An OTA has a high input resistance, as does an OVA. Table 3-1

summarizes comparative characteristics of ideal OTA and OVA devices.
If an OTA is operated into a suitable resistive load, with a negative-
feedback loop, it functions in essentially the same manner as an OVA.
TABLE 3-1

Comparative Characteristics of Ideal OTA and OVA Devices

OTA OVA
Input impedance High
Input bias current Low
Offset
High High
Gain Transconductance Voltage gain
Bandwidth Infinite
Slew rate Infinite
Output voltage Limited by supplies
Output current Limited by supplies
Output impedance Infinite
Operating current Adjustable Adjustable

On the other hand, an OVA cannot be made to function like an OTA.

Figure 3-17 shows the basic circuit for an OTA. It is instructive to con-
sider the voltage and current relations in the device. Transistors Q3
and Q4 function as an input differential amplifier, biased by the con-
stant- current source comprising Q1 and Q2. In turn, the differential
output- signal currents from Q3 and Q4 are amplified by Q7 and Q8
which function as a differential amplifier. Next, Q10 and Q11 convert
the double- ended output of the Q5- through- Q9 network into asingle-
ended output. All of the transistors operate in Class A. Note that the
amplifier bias current (ABC) level serves to establish the bias on all
transistors in the device. In theory there is no need for asignal ground
because the input signal is differential and the output is acurrent source.
Details of OTA operation and discussion of elaborated OTA con-
 OTA GYRATOR ARRANGEMENTS . 61

Q5 06

Inverting
input
o o o

Amplifier
Non- inverting
bias
input
current
o 02 010 011
(ABC)

QI

o
v- v-

Fig. 3-17 Basic OTA configuration.

figurations are resumed subsequently. At this time, consider the basic

OTA gyrator arrangement depicted in Figure 3-18. An OTA is particu-
larly suitable for gyrator application because of its high output imped-
ance. To anticipate subsequent discussion, it will be shown that an
OVA gyrator is suitable for application in circuits with one end of the
simulated inductance grounded. On the other hand, an OTA gyrator
can be applied in circuits that employ afloating simulated inductance
(both ends of the simulated inductance operating above ground po-
tential). For practical application, note that simulated inductance val-
ues of approximately 10,000 Henrys can be obtained in aconfiguration
comprising apair of OTA's.
With reference to Figure 3-18, a gyrator arrangement is shown
which provides this very high value of simulated inductance with the
use of an external 3-µF capacitor. As noted above, there is no ground
reference in this type of circuit, and the simulated inductance may op-
erate as afloating inductor in an audio filter, or other signal-processing
network. In effect, the simulated inductance is isolated from the power
supplies by the high input and output impedances of the OTA's. An
attenuation network is provided around the input of both op amps for
extension of the differential operating range of each OTA approximately
100 times. This attenuation network reduces the transconductance value
100 times and thereby further increases the gyration resistance. Provi-
62 . INDUCTANCE SIMULATION BY OPERATIONAL AMPLIFIERS

Fig. 3-18 A gyrator arrangement utilizing two op amps.

sion for adjustable bias current is made so that OTA transconductance

can be directly controlled, thereby varying the gyration resistance in-
versely. In turn, the value of the simulated inductance is varied.
Note that atwo- terminal network such as the gyrator depicted in
Figure 3-18 is sometimes called asingle-port network. Again, a (basic-
ally) four- terminal network as in Figures 3-14 and 3-15 is called atwo-
port network. Since there are two pairs of input terminals and one pair of
output terminals provided in Figure 3-17, this arrangement is called a
three-port device. A gyrator arrangement using two OVA's is depicted
in Figure 3-19. From the viewpoint of application, it is aone-port net-
work. However, from the viewpoint of the circuit designer it is regarded
as atwo-port network with capacitance connected across one port, and
resistance connected across the other port. The value of inductance sim-
ulated by the gyrator in Figure 3-19 is given by the equation:

L = R1 x R2 x R4 x Cl
Hy (3-11)
R3

Observe that when a gyrator is designed with OVA's, as in Fig-

ure 3-19, one of the terminals must be connected to ground. This is in
contrast to the gyrator designed with OTA's in Figure 3-18, wherein
 FREQUENCY- DEPENDENT NEGATIVE- RESISTANCE CIRCUITS . 63

C1 R2 R3 R4

R1

o
Simulated
inductance

I
Fig. 3-19 A gyrator arrangement using two OVA's.

both terminals may operate above ground potential. Therefore, an OVA

gyrator finds application chiefly in high-pass active filters, whereas an
OTA gyrator may be employed in either low-pass or high-pass active
filters.

3 . 7 FREQUENCY-DEPENDENT
NEGATIVE-RESISTANCE CIRCUITS

Another method of reactance simulation utilizes frequency- de-

pendent negative- resistance (FDNR) circuits instead of agyrator con-
figuration. Figure 3-20 shows a typical FDNR circuit. It is frequency-
dependent because the reactances of Cl and C2 vary with frequency.
Because it is frequency-dependent, it serves as afilter. Unlike agyrator,
an FDNR circuit draws aleading current when an ac voltage is applied
to its terminals. The FDNR circuit exemplified in Figure 3-20 employs
OVA's, and one of its terminals is necessarily grounded. Negative resist-
ance is a characteristic of adevice or network that draws less current
when more voltage is applied. All circuits that utilize positive feedback
exhibit negative resistance over their useful operating range. An FDNR
finds its chief application in low-pass filter circuits that require very
large values of simulated capacitance. The capacitance value simulated
by the FDNR circuit in Figure 3-20 is given by the equation:

C = R1 x R3 x Cl x C2 farads (3-12)
R2
64 . INDUCTANCE SIMULATION BY OPERATIONAL AMPLIFIERS

Cl R3 C2

Fig. 3-20 An FDNR circuit for simulating alarge capacitance.

3.8 BASIC OPERATIONAL AMPLIFIER

TEST PROCEDURES

Operational amplifiers can be checked and their basic character-

istics measured with comparatively simple test arrangements. For ex-
ample, the circuit shown in Figure 3-21(a), when used with suitable
instruments, permits precise measurements of dc open-loop gain, open-
loop gain stability versus temperature, open- loop gain versus supply-
voltage variation, open-loop input impedance, and open- loop output
impedance. Gain is measured by an ac method which eliminates prob-
lems from dc offset and drift. A frequency of 10 Hz is employed. Note
that the 1000-µF capacitor has areactance of approximately 16 ohms at
10 Hz. In turn, the ideal voltage-gain figure is approximately 63,000
times, or 96 dB, in accordance with the equation:

Eo Ro + Xc
(3-13)
E1 Xc

In practice, ameasured gain figure of 80 dB would be considered

satisfactory or normal. On the other hand, again of 60 dB for example,
would indicate that the op amp is defective, and should be rejected.

OPEN- LOOP DC VOLTAGE GAIN: Measurement of the open- loop dc- volt-
age gain of the op amp is made with asine- wave test signal supplied
by an audio oscillator operating at 10 Hz and an output level of 100 ¿.iv.
In turn, the output is measured with aTVM or oscilloscope. An oscillo-
 BASIC OPERATIONAL AMPLIFIER TEST PROCEDURES . 65

Ro Ro
1meg 10K

(a) ( b)

Fig. 3-21 Op amp test circuits. (

a) For measurement of ac open- loop characteris-
tics;' (
b) A X100 amplifier circuit for maximum-output and bandwidth
tests.

scope is preferable because it will show whether the output waveform

is being clipped or otherwise distorted. Waveform distortion is asso-
ciated with incorrect gain calculations.

OPEN- LOOP GAIN STABILITY VERSUS TEMPERATURE: The foregoing test ar-
rangement is also employed to measure the open-loop gain stability of
the op amp versus temperature. A dB gain measurement is first made
with the op amp at 0°C, and then with the op amp at 50°C. In turn, the
gain stability is defined by the expression:

Stability = dB, — dB, (3-14)

50°C

OPEN- LOOP GAIN STABILITY VERSUS SUPPLY VOLTAGE: The foregoing test
arrangement is also utilized to measure the open-loop gain stability of
the op amp versus supply-voltage variation. A dB gain measurement is
first made with the supply voltage at 10 percent above bogie value, and
then with the supply voltage at 10 percent below bogie value. In turn,
the gain stability is defined by the expression:

Stability = dB, — dB, (3-15)

20%

OPEN-LOOP INPUT IMPEDANCE: Measurement of the open- loop input

impedance of the op amp utilizes the foregoing test arrangement with
the addition of a decade resistance box. The output voltage is first
measured with the audio- oscillator signal applied directly to the op
66 . INDUCTANCE SIMULATION BY OPERATIONAL AMPLIFIERS

amp. Then, the output voltage is measured with series resistance in-
serted in the audio- oscillator output lead. Sufficient resistance is em-
ployed to make the output voltage drop 10 percent. In turn, the open-
loop input impedance of the op amp is equal to nine times the value of
the series resistance that was inserted.

OPEN- LOOP OUTPUT IMPEDANCE: Measurement of the open-loop output

impedance of the op amp makes use of the same items as above, except
that the decade resistance box is now connected as aload across the
output of the op amp. The output voltage is first measured with in-
finite load resistance (no load). Then, the output voltage is measured
with finite load resistance. A resistance value is employed which makes
the output voltage drop 10 percent. In turn, the open-loop output im-
pedance of the op amp is equal to 1/9 of the load- resistance value. Note
that the output waveform must not be clipped, or the calculation will
be in error; reduce the input signal voltage, if necessary.

MAXIMUM OUTPUT CAPABILITY: Measurement of the maximum output

voltage and current capability of an op amp utilizes the circuit depicted
in Figure 3-21(b), and the same test equipment as above. The decade
resistance box is connected across the output of the op amp, and is set
to the desired value of load resistance. Starting from the initial 100 /
Iv
level, the input signal amplitude is increased until distortion becomes
perceptible in the output waveform. The signal amplitude is then backed
off slightly. Maximum output-voltage capability is then measured on
the oscilloscope screen. In turn, the maximum output- current capability
is calculated, observing that Ro and RL operate in parallel. The current
value is given by the equation:

Vow
(3-16)
Iota = RL II R„

OPEN- LOOP BANDWIDTH: Measurement of the open- loop bandwidth of

an op amp employs the circuit shown in Figure 3-21(b), with an audio
oscillator and a TVM or oscilloscope. The audio oscillator is set for a
signal level of 30 mV into the op amp. Then, the operating frequency
is increased from the initial value of 10 Hz to a value that causes the
output signal level to decrease to a level of 30 mV. This is called the
small- signal open- loop bandwidth of the op amp. On the other hand,
the full-power response is defined differently, and is often the dominant
design factor. The full-power response of an op amp is measured with
sufficient drive from the audio oscillator to develop maximum rated
output voltage at 10 Hz. Then, the operating frequency is increased un-
 BASIC OPERATIONAL AMPLIFIER TEST PROCEDURES . 67

til the maximum rated output voltage starts to decrease. This is called
the full- power response frequency of the op amp.
As noted previously, the circuit depicted in Figure 3-21(b) is also
used to check other characteristics of an op amp. These further test pro-
cedures are explained in greater detail subsequently.

REVIEW QUESTIONS

1. Explain CEMF as the term applies to an inductor.

2. What is the relationship between the current and voltage in an inductor?
3. What is the relationship between the current and voltage in acapacitor?
4. What is agyrator?
5. What limits the amount of feedback allowed in acircuit, such as shown
in Fig. 3-13(b)?
6. What values of inductance can we simulate with acircuit comprised of
apair of OTA's?
7. What is athree- port circuit?
8. Where does aOVA gyrator find most application?
9. Where does aOTA gyrator find most application?
10. What is the characteristic of anegative resistance network?
11. What is the simulated capacitance value of the circuit in Fig. 3-20 when
R, = 100k ohm, 12 3 = 200k ohm, C, = . 01µF, and C2 =
12. List seven basic operational amplifier measurements.
4 • Op-Amp
Instrumentation
Applications

4 . 1 GENERAL CONSIDERATIONS

Operational amplifiers are used in various instrumentation appli-

cations. As an illustration, op amps are employed in active oscilloscope
probes such as differentiating, integrating, and logarithmic probes. Op
amps are utilized in strain gages, thermocouple bridges, high-gain
active filters, buffers, and sample-and-hold amplifiers. Other applica-
tions include precision voltage references, paired operation in true in-
strumentation amplifiers, replacement of chopper- type amplifiers, and
comparators in various instruments such as digital voltmeters. They are
also used as oscillators; for example, op amps may be key components
in triggered- sweep circuits (triggered time bases) for oscilloscopes. In-
strumentation applications employ op amps in both linear and nonlinear
modes.

4 . 2 DIGITAL VOLTMETER ARRANGEMENTS

A digital voltmeter (DVM) such as illustrated in Figure 4-1 indi-

cates a measured voltage value in the form of numerals, instead of a
pointer indication on ascale, as in the case of an analog voltmeter. Since
the applied voltage may have any value within the range of the volt-
meter, the input to the instrument is of analog form. In turn, the nu-
merical display is of digital form. Therefore, an analog- to- digital con-
verter (A- to-D converter) is required in the instrument. Seven basic
types of A- to- D conversion are employed in various designs of digital
voltmeters. These basic designs are termed ( 1) ramp, (2) staircase ramp,
(3) dual ramp integrating, (4) integrating, (
5) integrating and potentio-
metric, (6) successive approximation, and (7) continuous balance.
As an illustration, avoltage value can be converted into apropor-
tional time interval, during which an accurate oscillator (clock) is started
and then stopped. In turn, the number of pulses produced by the os-

68 .
 DIGITAL VOLTMETER ARRANGEMENTS . 69

Fig. 4-1 A digital voltmeter. (Courtesy, 8 & KMfg. Co.)

cillator actuate an electronic counter that has adigital readout in terms

of volts. Basically, aramp- type digital voltmeter measures the time that
alinear ramp (sawtooth waveform) takes to fall from the input voltage
level to ground potential, or, the time that it takes to rise from ground
potential to the input voltage level. This time interval is measured by a
digital counter energized by clock pulses, and displayed on in-line in-
dicating tubes in numerical form. Thus, although the input to the
instrument is of continuous (analog) form, the measured value is dis-
played in discrete (digital) form. Figure 4-2 depicts the principle of
voltage- to- time conversion. At the start of the measurement operation,
aramp generator is triggered and alinear decrease occurs in the ramp
voltage. Soon the ramp voltage reaches the same value as the voltage
being measured, and this first coincidence triggers a count gate,
whereby clock pulses are applied to the digital counter. The count gate
remains open until the ramp reaches ground potential (zero volts),
whereupon the count gate is closed, and the voltage value is indicated
numerically.
Note that the time interval over which the count gate is open is
proportional to the input voltage value. Therefore, the number of clock
pulses that pass into the electronic counter is also proportional to the
input voltage value. Figure 4-3 shows ablock diagram for aramp- type
digital voltmeter. The basic cycle sequence consists of sampling, dis-
play, and reset sequences. When an input voltage is applied to the
ranging and attenuator section, a reference voltage is applied to one
input terminal of the input-comparator op amp, and the ramp generator
70 . OP- AMP INSTRUMENTATION APPLICATIONS

Start of measurement

+12 Voltage ramp

Voltage being
measured

0V

—12V

Count gate
time interval)

Clock pulses

Fig. 4-2 Principle of voltage-to-time conversion.

DC Volts Input
Input comparator
C)-----
Ranging
and 9 Start pulse
Gate
attenuator

Ramp
Polarity Oscillator Counter
generator

Gate
Stop pulse
Ground
comparator

Sample Reset
Readout
rate

Fig. 4-3 Block diagram for aramp-type digital voltmeter.

is started. In turn, the output from the ramp generator is applied to the
other input terminal of the input- comparator op amp. A short time later
(Figure 4-2), the ramp voltage becomes equal to the reference voltage.
In turn, the output from the input- comparator op amp suddenly changes
in polarity and triggers the start- pulse gate.
Next, the output from the start- pulse gate switches the oscillator
on, and clock pulses are applied to the electronic counter. In turn, the
oscillator continues operating until the ramp voltage reaches ground
 DIGITAL VOLTMETER ARRANGEMENTS . 71

potential. That is, the ground-comparator op amp is referenced to

ground potential. In turn, when the ramp voltage passes through zero
(ground potential), the output from the ground-comparator op amp
suddenly changes in polarity and triggers the stop-pulse gate. There-
upon, the oscillator is switched off and the electronic counter stops.
Thus, the readout section indicates numerically the value of the ref-
erence voltage that was applied to the input-comparator op amp. Also,
the reset circuitry is actuated so that the foregoing sequence of circuit
actions can be repeated. As explained in greater detail below, asample-
rate section is included in the instrument to enable the DVM to " fol-
low" avarying input voltage.
All DVM's have abasic cycle sequence of sampling, display, and
reset operations. With reference to Figure 4-3, a units counter is first
actuated. After the ninth count, acarry pulse is fed to the tens counter.
After the 99th count, acarry pulse is fed to the hundreds counter. After
the 999th count, acarry pulse is fed to awarning lamp which indicates
to the operator that the range switch is set too low. The sample- rate
function depicted in Figure 4-3 permits the readout value to decrease
in case the voltage under measurement starts to decrease. This sample-
rate section is controlled by arelaxation oscillator (pulse generator) that
triggers and resets the counters to zero every half second. In turn, the
display circuits store each reading until a new sample value occurs,
whereupon the counters are actuated and the former readout value is
replaced by the new value. Display-circuit storage eliminates "blinking"
that would otherwise occur at the sampling rate. After the operator com-
pletes the measurement, the readout automatically returns to zero.
Next, Figure 4-4 shows ablock diagram for the staircase ramp type
of DVM. Voltage measurements are made on the basis of comparing
the input voltage to that of an internally generated staircase ramp volt-
age. When the staircase ramp voltage becomes equal to the input volt-
age, the op- amp comparator suddenly reverses its output polarity and
stops the ramp. In turn, the readout unit displays the number of steps
that made the staircase ramp voltage equal to the input voltage. The
sampling rate in this example is 2Hz. At the end of asample, areset
pulse returns the staircase voltage to zero. "Blinking" is eliminated by
temporary storage, as explained previously. Each decade counter unit
is connected to adigital- to-analog converter (D- to-A converter). Outputs
from these converters build up the comparison (staircase) voltage. Note
that the comparator op amp functions in the nonlinear mode, whereas
the input amplifier, reset amplifier, and staircase amplifier function in
the linear mode.
It is instructive to consider the operation of the integrating type of
DVM. A block diagram of the voltage- to- frequency converter section is
shown in Figure 4-5. This design of DVM indicates the average value
72 . OP- AMP INSTRUMENTATION APPLICATIONS

_ 0
2- Hz sample I • Readout
oscillator Amp

DC amplifier Reset
Output amplifier Decade
Transfer line
counters

Op 4.5- kHz
Op Op Amp count
0—er• Attenuator oscillator
Amp Amp
DC Volts Comparator
Input Input
—1A
amplifier

OP DIA
Pola try Staircase A converters
amplifier amplifier
and
flip-flop

Fig. 4-4 Block diagram of astaircase-ramp type of DVM.

of avarying input voltage over acertain time interval, whereas aramp-

type DVM "follows" avarying input voltage. In the example of Figure
4-5, integration is employed with a voltage-to-frequency converter.
Essentially, the network functions as afeedback control system which
controls the rate of pulse generation. In turn, the average value of the
pulse train is equal to the dc input voltage value. Decade counters and
areadout unit (not shown) are utilized to display the measured value.
A major advantage of this form of A- to-D conversion is its ability to
measure a dc-voltage value accurately in the presence of large noise
pulses. In other words, the noise voltages tend to average out (cancel)
over the measuring interval.
At this point, it is instructive to note that the basic op-amp inte-
grator arrangement is often unsatisfactory in practice. Part of the input
offset current tends to charge the feedback capacitor and produces a
constantly changing output when no input voltage is applied. There-
fore, the basic circuit must be somewhat elaborated to minimize the
effect of input offset current. A current- balancing arrangement for this
purpose is depicted in Figure 4-6. R2 has avalue that is large compared
with the reactance of C over the range of frequencies to be integrated.
Note that the offset current through R2 is minimized by suitable ad-
justment of RP1. With respect to dc, the gain of the circuit is limited to
—R2/R1; this characteristic prevents the output from gradually drifting
into saturation. In case R2 is not included, eventual drift into saturation
can be anticipated.
Next, ablock diagram for an integrating DVM is shown in Figure
4-7. A 60- Hz clock is employed in this example, and the average value
of the input voltage is measured over a1/60- sec. sample interval. The
arrangement consists basically of avoltage- to-frequency converter and
 DIGITAL VOLTMETER ARRANGEMENTS . 73

[integrator
Zero- level
trigger level

DC

Pulse output

Pulse
generator

Fig. 4-5 Block diagram of a voltage-to-frequency converter for an integrating

type of DVM.

R2
AA

R1

DC Volts
Input o

R3

RP1

Fig. 4-6 A current-balancing arrangement for an op-amp integrator.

acounter. As explained above, adc voltage applied to the integrator is

translated into apulse rate proportional to the value of the applied volt-
age. During the 1/60- sec. sample interval, the output from the converter
is applied to the 10 2 decade. After the sampling period an interpolation
process is utilized and pulses are fed into the 10° decade. Note that these
pulses are proportional in value to the charge remaining on the inte-
grating capacitor after the 1/60- sec. sampling interval. Following the
interpolation process, the counts present in all of the decades are dis-
played on in-line digital readout tubes.
Another DVM design which provides very high accuracy is shown
in the block diagram of Figure 4-8. This is called the integrating/poten-
tiometric type of DVM. It employs an integrating- type voltmeter which
measures the average value of avarying input voltage over the sampling
interval, supplemented by potentiometric action which operates from
precision resistance ratios and a precise reference voltage. Level corn-
74 . OP- AMP INSTRUMENTATION APPLICATIONS

Op Zero- level
High I Amp detector
lot.

Buffer L — Gate

Voltage Pulse TrIgger level F.

input generator detector

Guat
o :_
dt Generator
r T
.
Interpolate F—

io5
Digit Decade
to3
Decade
10 2
Decade
10 1
Decade
10o
Decade
T.60- kHz
clock

Readout

Fig. 4-7 Block diagram for an integrating-type DVM.

pansons are made on the basis of null techniques similar to those util-
ized in calibration of high-accuracy laboratory voltmeters. When ac-
voltage values are to be measured with aDVM, an ac-dc converter is
employed. A typical arrangement is shown in Figure 4-9. It is aspe-
cialized rectifier network with an output capability up to 1volt dc. Its
response is proportional to the average value of the applied ac rms volts.
The incoming ac voltage is amplified and then passed through arecti-
fier and filter arrangement. This type of ac-dc converter can indicate
correct ac voltage rms values for pure sine waveforms only.
It is instructive to consider the half-wave and full-wave precision-
rectifier configurations shown in Figure 4-10. Semiconductor diodes
are somewhat nonlinear, particularly at low input- signal levels. More-
over, a germanium diode does not conduct substantially until the ap-
plied voltage exceeds 0.3 volt. Similarly, asilicon diode does not con-
duct substantially until the applied voltage exceeds 0.7 volt. However,
if instead of utilizing the diodes directly, they are operated in the feed-
back loop of an op amp, precise rectification can be obtained down to
very small input levels. Typical configurations are shown in Figure 4-
10. Either germanium or silicon diodes may be utilized.
With reference to Figure 4-10(a), note that the dc output voltage
is not taken from the output terminal of the op amp, but between D2
 DIGITAL VOLTMETER ARRANGEMENTS . 75

/ V Fconverter
\
— 1

L Coroner
../

Fig. 4-8 Block diagram for an integrating/potentiometric DVM.

Pv- l'un hu

Negative feedback

Fig. 4-9 An ac- dc converter configuration for a DVM.

76 . OP- AMP INSTRUMENTATION APPLICATIONS

(a)

R3 R5

AC 10K
input 5K
Precision DC
half-wave output
rectifier Summing
amplifier

R6 2.7K

(b)

Fig. 4-10 Op-amp precision- rectifier configurations. (

a) Half wave; (
b) Full wave.

and R2 in the feedback loop. It is evident that when the input voltage
is positive, all of the feedback energy flows through Dl. Although the
op amp develops an output voltage, there is no output from the dc out-
put terminal, owing to the high reverse resistance of D2. Next, when the
input voltage is negative, all of the feedback energy flows through D2
and R2. In turn, there is avoltage drop across R2 which appears at the
dc output terminal. Owing to the high gain of the op amp, even avery
small negative input voltage will bias D2 for efficient rectification.
Next, with reference to Figure 4-10(b), this precision rectifier ar-
rangement includes a precision half-wave rectifier and a summing
amplifier, thereby providing full- wave rectification. As depicted in
Figure 4-11, the output from the half- wave rectifier is added to the in-
put voltage in suitable proportion to form afull-wave rectified output
from the summing amplifier. Note that the value of R3 is twice the value
of R4. In turn, the peak voltage from the half-wave rectifier is twice the
peak voltage of the input waveform. When these two waveforms are
added, their resultant is the same as that of afull- wave rectifier.
Another type of DVM, called the dual- slope integration design, is
 DIGITAL VOLTMETER ARRANGEMENTS . 77

Input AC
voltage

Output from
half- wave rectifier

Sum of
A and B

Output from
summing Op Amp

Fig. 4-11 Operating waveforms in precision full-wave rectifier circuit.

shown in block form in Figure 4-12. This arrangement measures dc

voltages by means of an integrator. In turn, the integrator controls a
time interval which is proportional to the average value of the dc volt-
age to be measured. This time interval gates the counter on and off, so
that the number of oscillator pulses that are totalized is proportional to
the average value of the dc voltage to be measured. The dc input volt-
age is integrated, thereby producing an upward ramp. Integration oc-
curs either for 1/10 or 1/60 of asecond, the period being selectable by
the operator for best response. This ramp voltage rises to apeak value
at the end of the integration interval, and the peak value is stored. Then,
a downward ramp is started by switching a precise reference voltage
in opposite polarity to discharge the integrator. This discharge time is
terminated by azero- detect (comparator) circuit, and is proportional to
the stored voltage value. During the discharge time interval, oscillator
pulses are totalized and then indicated by the display unit.
There is a possibility of slow drift in the dual- slope integrating
DVM. Accordingly, provisions are included for automatic zeroing. After
the integration cycle is completed, the input amplifier (Figure 4-12) is
automatically disconnected and adjusted for zero output before the
next measurement is started. Thereby, the input amplifier is main-
tained in a precisely zeroed state while resting between integration
cycles. Note that a dc- voltage measurement is made by applying the
input voltage to the X input terminal. In case it is desired to measure
the ratio of two dc voltages, one voltage is applied to the X input ter-
78 . OP-AMP INSTRUMENTATION APPLICATIONS

Inputs
X
y
Input
section

DC/El
Counter Display
amp ¡ fier

Count
gate

Program
limits

0-1 Limit
test I

ntegratOr

r- - -
Remote _j Recorder I
I control I I output I

Fig. 4-12 Block diagram of adual-slope integrating DVM.

minal and the other voltage is applied to the Y input terminal. In turn,
the voltage ratio is indicated by the DVM as the X/Y value. Instrument
function is the same as explained above, except that the down- slope is
now determined by the Y input voltage, instead of the reference voltage.

4 . 3 OP-AMP TRIGGERED TIME BASE

A triggered time base that utilizes three op amps is depicted in

block form in Figure 4-13, and in schematic form in Figure 4-14. This
type of time base is used in lab- type oscilloscopes. Because the power
output of an op amp is somewhat limited, the time base is followed by a
power- transistor horizontal amplifier (not shown) to drive the cathode-
ray tube. With reference to Figure 4-14, adiode limiter circuit (D1-D4)
is provided to prevent overdrive of the input field-effect transistor. This
FET (Q1) is included to obtain high input impedance for the incoming
sync signal, thereby minimizing loading of associated circuitry. The
following network comprises three op amps, one of which operates in
the linear mode while the other two operate in the nonlinear mode.
These op amps function as acomparator, aflip-flop, and an integrator.
The integrator operates in the linear mode.
A diode limiter arrangement (D5, D6) is also placed in the input
 OP- AMP TRIGGERED TIME BASE . 79

Preamp
0- and COMpardlor Fhp- flop I
megrator —*-0
Sync limiter Sawtooth
input output

Fig. 4-13 Block diagram for an op-amp triggered time base.

circuit of the comparator, to avoid the possibility of latch- up owing to

overdrive. A reference voltage level for the comparator is set by R9.
When the output from the pre-amp exceeds this reference level, the out-
put from the comparator suddenly swings from anegative voltage to a
positive voltage. In turn, apositive pulse is fed into the inverting input
of the flip-flop op amp. Diodes D7 and D8 ensure that negative pulses
cannot enter the flip-flop. This flip-flop is basically an ac- coupled multi-
vibrator which is overbiased so that it cannot change state unless a
trigger pulse is applied. Multivibrator circuitry is explained in greater
detail in the next chapter The flip-flop is in astate of positive saturation
until atrigger pulse is applied to the inverting input Then, the flip-flop
changes state and goes into negative saturation. It remains in negative
saturation until atrigger pulse arrives at the noninverting input. There-
upon the flip-flop changes state back into positive saturation
When the flip-flop suddenly changes from positive saturation to
negative saturation, the integrator is energized and produces alinear
positive ramp (saw- tooth wave). Switch S2 provides achoice of three
ramp speeds. Note that the ramp voltage is fed back to the noninverting
input of the flip-flop via R15 and D10. When the ramp voltage becomes
sufficiently positive, the flip-flop suddenly changes state and goes into
positive saturation once again. This action also discharges the integra-
tor capacitor suddenly, causing flyback (retrace). The time base then
rests until another trigger pulse arrives at the inverting input of the
flip-flop. Note that C4 is included to provide lockout (holdoff) action.
In other words, if atrigger pulse happens to be applied to the inverting
input of the flip-flop during the retrace interval, C4 will prevent pre-
mature initiation of aramp.
Next, consider the operation of the integrator in Figure 4-14. A
diode, D11, is connected in series with the inverting- input terminal of
the op amp. In turn, the charging current of the integrating capacitor is
determined by forward or reverse bias on D11. In other words, when
the flip-flop is in its negatively saturated state, D1 1is reverse biased
and the charging current is set by R14. Thus, the sweep speed is de-
pendent on the setting of R14, which functions as a vernier sweep-
speed control. As noted previously, S2 functions as a coarse sweep-
speed control. Next, when the flip-flop suddenly goes into positive
saturation, Dll becomes forward- biased, and the integrating capacitor
80 . OP- AMP INSTRUMENTATION APPLICATIONS

R3
2.2rnft
RI
R6 R8
R4 10kS2 22k11
10ka
470kS1
D
DI G Comparator
E R2 Q1 07
02 100k11 ICI

D5i 1
S C3
Limiter m
Preap
D
R5 R7 100pF
D3 470kft 6.81,“ R9
10ket Limiting
04 D8
diodes

CI
)I 0 V+
0.220F — B1
0 _1- 9V
Si
Off- on

„_C4 100pF
J—
4)--- B2
C2 9V
)1 ov )E0_05LrL0

0.22p F

C7 ) 0.10F

Flip-flop

IC2 DI I IC3

R13 R14 o
Saw 00th
0—'V.
Vse— speee—• ou put
100k1-2 5m12
Integrator
R12

720ka
C4 ) 1. 003pF

D10 R15
• w e
09 1001,11
RI I 10ka

Fig. 4-14 Schematic diagram for an op-amp triggered time base.

discharges quickly through the diode. Diode D9 is included in the feed-

back network to ensure that negative- going voltage cannot feed back
into the noninverting input of the flip-flop.

4.4 CURRENT MIRROR ACTION

Most op amps have inverting and noninverting inputs which are

associated with a differential-amplifier section. On the other hand,
some op amps develop a noninverting input by means of acurrent-
differencing input stage called a current mirror. Figure 4-15 depicts
the basic current-mirror configuration. Its action is essentially that of a
 CURRENT MIRROR ACTION . 81

Input

Input (+)

Fig. 4-15 A current-mirror op-amp configuration.

circuit which responds to acurrent input fed into one terminal by draw-
ing an identical current input at the other terminal. Thus, when acur-
rent, It,is fed into the diode-connected transistor Ql, aself- bias voltage
is developed across its base- emitter junction. In turn, acollector current,
12,flows according to the equation:

1
2 = I — 2I B (4-1)

This current flow produces avoltage drop across the base- emitter
junction of Ql, which applies acorresponding bias to the base of Q2.
Because Q1 and Q2 are matched transistors, the collector current of Q2
(I3)is equal to 12 and practically equal to I. Current 1 3 must be drawn

from the inverting input of the op amp; thus I 4,which is essentially

equal to II,flows from the external circuit into the inverting input. One
of the important distinctions between aconventional op amp and the
current-mirror design is that the former has avery high input imped-
ance, whereas the latter has a low input impedance. Therefore, the
current-mirror type of op amp is called acurrent- operated device.
82 . OP-AMP INSTRUMENTATION APPLICATIONS

Note in Figure 4-15 that asingle-polarity supply voltage is utilized

by acurrent-mirror op amp. This is apositive power supply- anegative
power supply is not required. In turn, this feature makes the current-
mirror op amp easily designed into automotive electrical systems. An-
other attractive feature is the comparatively small number of com-
ponents built into the IC package, resulting in comparatively low cost.
Current-mirror op amps are designed into anti-skid, speed-control,
and fuel- injection systems. Another typical application is in frequency-
doubling tachometer generators, as depicted in Figure 4-16. Note the
specialized symbol that is preferred to denote acurrent-mirror op amp.
This tachometer arrangement is actuated by current pulses from the ig-
nition system of a vehicle. In turn, the tachometer develops adc out-
put which is proportional to twice the input frequency. This dc output
energizes a conventional milliammeter with ascale calibrated in rpm.
A symmetrical op- amp pair is utilized in the arrangement of Figure
4-16, so that there will be zero dc output when there is no input pulse
train (Fin ). Exact balance is obtained by adjustment of R3, which com-
pensates for tolerances on op-amp characteristics. Pulses applied to Cl
are differentiated, so that the positive input pulse is changed into a
positive spike followed by anegative spike. Frequency doubling is an
aspect of full-wave rectification, provided by diodes D1 and D2. Al-
though D1 and D2 could be employed without an op amp, the dc out-
put would have acomparatively low level, and amore sensitive indi-
cating meter would be required. Therefore, it is advantageous to include
the op-amp circuitry and use alower- sensitivity (lower cost) indicating
meter.

4 . 5 OPERATIONAL VOLTAGE-AMPLIFIER
TEST PROCEDURES

As noted previously, operational amplifiers can be checked and

their basic characteristics measured with comparatively simple test
arrangements. It is instructive to consider how the circuit shown in
Figure 4-17 is used to measure input offset voltage, input voltage drift
versus temperature, input voltage drift versus supply, input voltage
drift versus time, and input noise of operational voltage amplifiers.

INPUT OFFSET VOLTAGE MEASUREMENT: A standard test circuit is de-

picted in Figure 4-17, which is basically aX100 amplifier used for meas-
urement of very small voltage drift and offset values. These voltages are
measured at the output terminals, and are referred to the input by di-
 OPERATIONAL VOLTAGE- AMPLIFIER TEST PROCEDURES . 83

R4 R3 R4 C2

Fig. 4-16 Current- mirror op-amp tachometer configuration.

R1 Ro

Fig. 4- 17 Standard test circuit.

viding the measured value by 100. Note that in calculating load values,
R„ presents aload to the output of the op amp, and must be included in
the load calculations. To measure the input offset voltage, the input
terminals in Figure 4-17 are short-circuited, and the voltage across the
output terminals is measured with aTVM or adc oscilloscope. This is
the output offset voltage which is divided by the voltage gain of the
amplifier to obtain the input offset voltage:

Void
Vin off = (4-2)
100

INPUT VOLTAGE DRIFT VERSUS TEMPERATURE: To measure the input volt-

age drift versus temperature, the test circuit shown in Figure 4-17 is
employed. Two measurements of input offset voltage are made, as ex-
plained above. One measurement is made at 0°C and the other is made
at 50°C. In turn, the drift is calculated as the difference between the two
84 . OP-AMP INSTRUMENTATION APPLICATIONS

measured values. This is the drift over a50° range; it is expressed in the
form of the following equation, which implies that the reference tem-
perature is 0°C:

Drift = à V OSet (4-3)

50°C

INPUT VOLTAGE DRIFT VERSUS SUPPLY: To measure the input voltage drift
versus variation in the supply voltage, the input terminals in Figure
4-17 are short-circuited, and the output voltage is measured with a
TVM or dc oscilloscope. With reference to Figure 4-18, the output volt-
age is measured first with both supply voltages increased 10 percent.
Then, the output voltage is measured with both supply voltages de-
creased 10 percent. These values are next divided by 100 to determine
the corresponding input offset voltages. In turn, the input voltage drift
is defined as the difference between these two values, with respect to
a20 percent supply-voltage variation. It is expressed in the form of the
following equation:

Drift = à Voffset (4-4)

20%

INPUT VOLTAGE DRIFT VERSUS TIME: To measure input voltage drift ver-
sus time, the input terminals in Figure 4-17 are short-circuited, and a
strip recorder is connected to the output terminals. A typical strip re-
corder is illustrated in Figure 4-19. The output voltage is then moni-
tored for 24 hours, after which the maximum input voltage offset is
noted. In turn, the input voltage drift versus time is defined by the
equation:

Drift = Vin off (max). (

4-5)

INPUT NOISE: To measure input noise, the input terminals in Figure

4-17 are short-circuited, and aTVM is connected through a10- kHz low-
pass filter to the output terminals of the op amp. The noise voltage con-
sists of arandom mixture of frequencies up to 10 kHz, and is measured
in microvolts or millivolts. An nrts-indicating TVM is utilized. In turn,
the measured value is referred to the input by dividing by 100. Thus,
the input noise ( in rms value) is given by the following equation:

Output Noise
Input Noise — (4-6)
100
 OPERATIONAL VOLTACiE-AMPLIFIER TEST PROCEDURES . 85

Fig. 4-18 Supply voltage variation for drift measurement.

Fig. 4-19 A strip recorder for monitoring voltage variation. (

Courtesy, Hewlett-
Packard Co.)

INPUT CURRENT OFFSET: Input offset current is measured with the stand-
ard test circuit depicted in Figure 4-20. This is a unity- gain op-amp
configuration in which current owing to offset and drift circulates
through the feedback loop. In turn, the output voltage is equal to the
voltage across the feedback resistor from which the current may be cal-
culated. Note that it is the isolating property of the op amp which makes
it practical to measure the voltage across the 10-meg resistor, even with
aVOM. To measure input current offset, the input terminals are short-
86 . OP-AMP INSTRUMENTATION APPLICATIONS

Ro

Fig. 4-20 Unity gain amplifier test circuit.

circuited and aTVM or dc oscilloscope is connected across the output

terminals. The dc output voltage is measured, and the input current
offset calculated in accordance with the following equation:

Void
I
i,, — (4-7)
10 x 106

INPUT CURRENT DRIFT VERSUS TEMPERATURE: Input current drift versus

temperature is measured in essentially the same way as input voltage
drift versus temperature. However, the corresponding current drift is
calculated from voltage offset measurements. The test circuit depicted
in Figure 4-20 is employed, with the input terminals short-circuited,
and aTVM or dc oscilloscope connected across the output terminals of
the op amp. In turn, the output voltage is measured at 0°C and at 50°C.
These values are converted into input current values by dividing the
figures by 100 and then by 10 x 106.Next, the current values are sub-
tracted and their difference is expressed as the input current drift ver-
sus temperature in accordance with the following equation:

Drift — Ii" off (4-8)

50°

INPUT CURRENT DRIFT VERSUS SUPPLY: To measure input current drift

versus supply- voltage variation, the same basic procedure is utilized
as in measurement of input voltage drift versus supply voltage variation.
However, input voltage drift values are converted into corresponding
input current drift values by dividing the figures by 10 x 106.The test
circuit shown in Figure 4-20 is utilized, with the input terminals short-
circuited, and a TVM or dc oscilloscope connected to the output ter-
minals of the op amp. The output voltage is measured at asupply-voltage
 OPERATIONAL VOLTAGE-AMPLIFIER TEST PROCEDURES . 87

value 10 percent above rated value, and at 10 percent below rated value.
Both supply voltages are varied in the test (Figure 4-18). These voltage
values are referred to the input by dividing them by 100. Then, they are
converted into corresponding current values by dividing each input
voltage value by 106.Finally, the difference between the two current
values is taken and expressed as the drift value in accordance with the
following equation:

L I. off
Drift = '" (4-9)
20%

Note that when drift measurements are made over a50° tempera-
ture range, it is not necessarily true that the drift per degree will be
equal to 1/50 of the total drift value. In other words, drift versus tem-
perature is not necessarily linear. Similarly, when drift measurements
are made over a20 percent supply variation, it is not necessarily true
that the drift per percent of supply variation will be equal to 1/20 of the
total drift value. As before, the drift versus supply voltage value is not
necessarily alinear variation.

REVIEW QUESTIONS

1. What is the function of an op amp in DVM?

2. What is the purpose of the current balancing circuit in Fig. 4-6?
3. What is acurrent mirror circuit?
4. In Fig. 4-11, what determines the charging current of the integrating
capacitor?
5. What is acurrent mirror type of op amp called?
6. What are some of the uses of current-mirror op amps in automobiles?
7. Draw adiagram of acircuit to measure input voltage drift versus time.
8. What is the input noise in Fig. 4-20 if the output noise measures
50 µvolts?
9. Draw adiagram of atest setup to measure the input offset voltage.
10. State the name of eight op amp measurements that were discussed in
Chapter 4 and the formula for each calculation.
5 • Op-Amp
Generating
Applications

5 . 1 GENERAL CONSIDERATIONS

Operational amplifiers find extensive application in the generation

of precise, controllable signals of various types. Ramp generation was
explained in the previous chapter, and we are now in agood position
to consider the generation of sine waves, square waves, triangular
waves, pulse trains, timed pulses, digital clock pulses, quadrature sine
waves, trapezoidal waves, and staircase waveforms. The most basic
waveform is the sine wave, and it is the most commonly used test sig-
nal. Note that the fundamental characteristic of a sine wave is based
upon mathematical forms and operations. In other words, when circuit
action is to be described in terms of equations, the choice of the sine
wave as the basic waveform results in comparatively simple and man-
ageable mathematical expressions. On the other hand, if the seemingly
simple square wave is chosen as the basic waveform, the resulting
mathematical expressions become prohibitively complicated and un-
manageable. This topic is explained in greater detail subsequently.

5.2 OP-AMP SINE-WAVE GENERATORS

Various configurations are used to generate sine- wave voltages.

Most of these provide positive feedback for an op amp at asingle fre-
quency. Another approach employs asquare- wave generator followed
by a highly selective op- amp filter arrangement. In other words, a
square waveform consists of a large number of harmonically- related
sine-wave frequencies. If the harmonics are all filtered out, leaving the
fundamental frequency, asine- wave output is obtained. Some op- amp
sine-wave generators employ a combination of basic configurations,
such as acombination of Wien- bridge and quartz-crystal oscillator cir-
cuitry. Additional functions, such as an automatic gain control (ACC)
loop may be included to minimize waveform distortion.
88.
 OP-AMP SINE- WAVE GENERATORS . 89

Consider the comparatively simple sine- wave oscillator depicted

in Figure 5-1. This arrangement utilizes a slightly detuned parallel-T
(twin-T) RC feedback loop whereby the op amp supplies its own input
at achosen frequency. Recall that if the twin-T capacitance and resist-
ance values are chosen for complete rejection of agiven frequency, the
arrangement operates as an extremely selective bandpass filter. As a
bandpass filter, the configuration is stable and does not oscillate. On
the other hand, if the feedback loop is slightly detuned by adjustment
of the potentiometer in Figure 5-1, a180° phase shift (positive feedback)
will occur and the op amp will oscillate at a frequency given by the
equation:

1
(5-1)
= 27TRC

where fis in Hertz

R is in ohms

C is in farads

Note that the resistance of the potentiometer in Figure 5-1 should

be decreased only to the point that a sine- wave output is obtained.
Otherwise, the output waveform will become distorted. This oscillator

Sine- wave
output

2R

Fig. 5-1 A simple op-amp sine-wave generating arrangement.

90 . OP-AMP GENERATING APPLICATIONS

configuration is essentially afixed- frequency design suitable for opera-

tion in the audio- frequency range. It is impractical to design the feed-
back network for variable- frequency operation because all of the R and
C values must be changed simultaneously and must track precisely.
However, if operation is desired at two or three spot frequencies, a
switching arrangement can be utilized with corresponding twin-T net-
works.
Another basic sine-wave oscillator configuration is shown in Fig-
ure 5-2. This is called the Wien- bridge arrangement and its operation
is characterized by both positive and negative feedback. Positive feed-
back occurs through the RC loop to the noninverting input terminal of
the op amp. Negative feedback occurs through the resistive voltage-
divider circuit to the inverting input of the op amp. As would be antici-
pated, the circuit will not oscillate unless the positive feedback exceeds
the negative feedback. The amount of negative feedback is determined
by the setting of the 500- ohm potentiometer. To obtain low distortion in
the output waveform, the negative feedback should be almost as great
as the positive feedback. Note bulb B1,which is included to provide
output amplitude stability. It functions as an automatic current regula-
tor. If more current tends to flow, the filament becomes hotter and its
resistance increases. In turn, more negative- feedback voltage is applied
to the op amp.
It is instructive to observe the amplitude and phase relations ver-
sus frequency for the Wien- bridge oscillator, as depicted in Figure 5-3.
Since the positive feedback loop consists of an RC bandpass filter net-
work, the positive feedback voltage rises to amaximum at the frequency
of oscillation. On the other hand, the negative- feedback voltage is not
afunction of frequency, because it is applied through aresistive feed-
back loop. Note that oscillation will occur if the negative- feedback volt-
age level is slightly less than the peak value of the positive feedback
voltage. Since the peak of the positive- feedback curve is broad, it might
be supposed that the oscillating frequency would not be particularly
stable. However, good stability is obtained owing to the rapid change
in the phase of the positive feedback voltage through the oscillating
frequency. In other words, if the oscillating frequency tends to drift, a
phase shift occurs in the positive feedback voltage which reduces the
amplitude of oscillation. Since positive feedback always builds up the
output to the maximum possible amplitude, this phase variation en-
sures that the oscillating frequency will be highly stable.
This Wien- bridge op- amp oscillator is generally used in fixed-
frequency applications, in the range from 100 to 6,000 Hz. However, if
operation is desired at two or three spot frequencies, a switching ar-
rangement can be utilized to change the R and C values as required.
 OP- AMP SINE- WAVE GENERATORS . 91

30
500
25
1 f
P.ositive
Negative
eedback feedback 20
18K
15
220
CD

Eo 10
o
5

0 2 4 6 8 10 12

Voltage, Volts

f-
2trRC

(a) ( b)

Fig. 5-2 Wien-bridge sine-wave oscillator. (

a) Configuration; (
b) Typical tungsten-
filament characteristic.

Negative Phase shift

/ 1 feedback
voltage s' of positive
feedback voltage

2 Positive
feedback
voltage

Frequency fo

Fig. 5-3 Feedback amplitude and phase relations versus frequency in aWien-
bridge oscillator.

The maximum frequency of oscillation depends on the slew rate of the

op amp. Although the op amp itself is not limited to aminimum fre-
quency of oscillation, the lower practical limit of 100 Hz is imposed by
the characteristics of the regulator bulb. In other words, the thermal lag
of the filament is an essential factor in preventing negative- feedback
variation between the start and the end of an individual cycle. Although
regulatory action is essential, it must not occur so rapidly that it inter-
feres with the development of the sine wave from its null to its peak.
Another version of the Wien- bridge oscillator is shown in Figure
5-4. This configuration employs apair of back-to-back zener diodes in-
92 . OP- AMP GENERATING APPLICATIONS

450

300
IF ( mA)

Reverse voltage150

30 20 10

05 1.0 1.5

15 Forward voltage

IZ ( mA)
Eo
Positive 30
feedback

45

(a) ( b)

Fig. 5-4 Op-amp Wien-bridge sine-wave oscillator with zener-diode stabilization

of output amplitude (
a) Configuration; (
b) Typical zener-diode charac-
teristic.

stead of alamp bulb to stabilize the amplitude of the output waveform.

If more current tends to flow, the zener diodes draw increased current,
or, their effective internal resistance decreases. In turn, more negative-
feedback voltage is applied to the inverting input of the op amp. Zener
action is much more abrupt than the resistance change in a tungsten
filament. Therefore, aswamping resistor 6R1 is connected in series with
the zener diodes to minimize waveform distortion while maintaining
adequate regulatory action. For this reason also, the zener diodes are
connected to the junction of 0.18R1 and 0.15R1, instead of the inverting-
input terminal of the op amp. The proportional resistor values stipu-
lated in the negative- feedback loop have been chosen to make the nega-
tive-feedback level almost equal to the positive- feedback level, thereby
minimizing output waveform distortion. A harmonic- distortion figure
of 0.5 percent is typical.
When very low output distortion is required, an active negative-
feedback loop can be employed, as depicted in Figure 5-5. Note that
this is basically an amplified-AGC arrangement. The chief advantage
of this elaborated feedback network is that it permits the oscillator to
turn on when the supply voltage is applied, without provision of an
undesirable level of positive feedback. By minimizing the positive-
feedback voltage required to ensure self-starting, waveform distortion
is held to avery small amount. Another feature of the configuration that
contributes to avery low percentage distortion is the RC filter C,R 2.In
other words, C, provides atime delay in AGC voltage changes, so that
 OP- AMP SINE- WAVE GENERATORS . 93

Negative
feedback

—60

50

40
o
30

20

Sine-wave 10
10 20 30 40 50
output

8 8

-n 2
o
Back 3
current
Positive µA
a 4
feedback o
Forward current-mA
f 1

2irRC

(a) ( b)

Fig. 5-5 Op-amp Wien- bridge sine-wave oscillator with an active negative-feed-
back loop. (a) Configuration; (
1» Germanium-diode characteristic; back
voltage and current are shown to different scale.

there is no practical interference with the development of the sine wave

from its null to its peak. A harmonic- distortion figure of 0.2 percent is
typical.
Consider the circuit action in the configuration of Figure 5-5. No
current can flow through the rectifier diode until the feedback voltage
exceeds the zener threshold. Thus, when the oscillator is starting and
building up its output amplitude, the FET has zero gate- source bias
voltage. In turn, the drain- source resistance of the FET is comparatively
low. This low resistance connects 10R, to ground and enables the op
amp to operate at high gain. On the other hand, after the output ampli-
tude builds up sufficiently to exceed the zener threshold, the FET gate
voltage falls below the source voltage. Thus, the FET is biased toward
turn-off, and its effective drain- source resistance increases. This in-
creases the negative feedback and reduces the gain of the op amp. The
net gain around the positive- feedback loop stabilizes at unity.
To summarize briefly, the gain around the positive- feedback loop
is greater than unity to enable self-starting of oscillation in Figure 5-5.
Then, as the output amplitude increases, the gain is reduced to unity at
equilibrium. In turn, the inherent distortion of the system is minimized.
There is aslight gain change over each oscillation cycle, particularly at
very low operating frequencies. This gain change results from dis-
94 . OP-AMP GENERATING APPLICATIONS

charge of the filter capacitor C, through the reset resistor R2. This source
of distortion can be minimized by a long time constant for the cir-
cuit. However, atrade-off is involved, since stable operation can be im-
paired by an excessively long time constant. It follows that the Wien-
bridge oscillator is not the best choice for generation of very low audio
frequencies. On the other hand, it is the most widely used configuration
for generation of spot audio frequencies.
Increased frequency stability can be realized by including aquartz
crystal in the positive-feedback loop, as depicted in Figure 5-6. With
reference to Figure 5-3, the crystal functions to greatly sharpen the peak
of the frequency- response curve for the positive- feedback voltage. Note
that the positive- feedback components R and C serve to attenuate crys-
tal harmonics, and their values are chosen accordingly. In other words,
the quartz crystal becomes the dominant frequency-determining com-
ponent. Like atuned circuit, the quartz crystal has aphase angle of zero
at its resonant frequency, and its internal impedance is resistive. This
internal resistance replaces the series resistor R in Figure 5-5. The paral-
lel resistor R in Figure 5-6 should have avalue equal to the internal re-
sistance of the crystal, and the parallel capacitor C should have avalue
given by the equation:

RC = 1 (5-2)
271-f„

where f,, is the resonant frequency of the crystal.

5 . 3 VARIABLE-FREQUENCY SINE-WAVE
OSCILLATORS

Variable- frequency sine-wave oscillators employing op amps do

not have the Wien-bridge configuration, because the required AGC sys-
tem becomes objectionably involved. However, a suitable phase- shift
configuration, such as shown in Figure 5-7, is well adapted to variable-
frequency operation. It is instructive at this point to consider the varia-
ble phase- shift configuration depicted in Figure 5-8. Unity gain is
provided, with phase shift from input to output controlled by variable
resistance. In theory, a 180° phase shift is provided. Note that if R is
equal to zero, the input voltage is applied directly to the noninverting
input. On the other hand, if R is equal to infinity, the input voltage is
applied to the inverting input. Thus, the circuit in (a) provides an ad-
justable phase variation from 0° to —180°, and the circuit in (b) provides
an adjustable phase shift from — 180° to — 360°.
 VARIABLE- FREQUENCY SINE- WAVE OSCILLATORS . 95

Negative feedback

Reactance Resistance
o
-

c
3
°

o
- o
0.
e
:r•

Positive
feedback Frequency increasing

(a) ( b)

Fig. 5-6 Op-amp Wien-bridge sine-wave oscillator with an active negative-feed-

back loop and aquartz-crystal filter. (
a) Configuration; (
b) Quartz-crystal
characteristic.

Next, with reference to Figure 5-7, op amp No. 1employs the fore-
going variable phase- shift configuration in a sine- wave generator ar-
rangement with single- resistor variable frequency control. Note that
op amp No. 2utilizes asimilar phase- shift configuration, but with fixed
resistance. These two phase- shift circuits are connected in series, and
are provided with afeedback loop from op amp No. 1to op amp No. 2.
Feedback takes place through an amplitude limiter associated with op
amp No. 3. Note that oscillation must occur at the frequency for which
the overall phase shift is 360°. In turn, this required phase shift is re-
lated to R1,R2, and C values according to the equations:

=—2tan -l wR IC — 180° (5-3)

= — 2tan -'w1Z 2C — 180° (5-4)

These phase shifts are added to the 180° phase shift of the ampli-
tude limiter, resulting in an oscillation frequency given by the equations:

1
(5-5)
f 27rcVTi,Tz,

In practice, a10- to- 1frequency range can be obtained by variation

of R1.When a greater frequency range is desired, a different value of
96 . OP-AMP GENERATING APPLICATIONS

R2 may be switched into the generator circuit. Observe that this con-
figuration can provide two sine-wave outputs with aphase difference
given by the equation:

irth — 4)2 = —2tan -' coRC (5-6)

when R, = R2 = R.
As an illustration, the phase difference between the two sine-wave
outputs will be 90° in accordance with Equation (5-5) if coRC = 1. When
an oscillator is operated so that it generates two outputs having the same
frequency but differing 90° in phase, the arrangement is called aquad-
rature oscillator. Note that initial gain of the system depicted in Figure
5-7 is greater than unity, to enable self-starting. After build-up of os-
cillation to the steady state, the zener diodes introduce additional nega-
tive feedback and reduce the gain so that waveform distortion is mini-
mized.
At this point, it is instructive to consider basic op- amp multipliers
and dividers. For example, multiplication or division of apair of volt-
ages can be accomplished by op amps in high- gain feedback configura-
tions with voltage- controlled resistors or with logarithmic amplifier
feedback loops. An arrangement that employs light- dependent resistors
is shown in Figure 5-9. Note that op amp No. 2has afeedback loop that
includes alamp. Op amp No. 2is operated at nearly zero input voltage.
A slightly negative voltage is applied to Z and aslightly positive voltage
is applied to Y. The feedback loop for op amp No. 2energizes the lamp
and controls the resistance of light- dependent resistors R1.Observe that
R2 is afixed resistor; thefcurrent through R2 is equal to Y/R 2, and the re-
sistance of R, is given by the equation:

R
R, = 2-Z
(
5-7)
Y

Both of the LDR's have the same resistance value, and the output
voltage from op amp No. 2is directly proportional to the voltage applied
to the Y terminal, directly proportional to the voltage applied to the X
terminal, and inversely proportional to the voltage applied to the Z
terminal. In other words:

XY
Eo = — - (5-8)

Note that op amp No. 2inverts the voltage from input to output.
Equation (5-7) is called the transfer function for the configuration of
 VARIABLE- FREQUENCY SINE-WAVE OSCILLATORS . 97

3R Zeners

0.8R 0 15R

< Op -
Amp
3

C
-
Op Op
Amp o Amp o
1 e01 2 e02

1
f-
ni2irC R1R2

(a 1

el

e2

0 60 120 180 240 300 360 Degrees

0 60 120 180 240 300 360

(b)

Fig. 5-7 Variable-frequency sine-wave oscillator arrangement. (

a) Configuration;
(b) Sine waves with a60° phase difference.

Figure 5-9. It is evident that this transfer function permits analog multi-
plication or division of input voltages. As an illustration, if Y/Z is set
for a ratio of 2, then E„ will be equal to 2X. On the other hand, if Y/Z is
set for aratio of 1/2, then E„ will be equal to X/2. Observe that the volt-
age applied to Z must be negative for the LDR system to function. In
98 . OP-AMP GENERATING APPLICATIONS

R' R' R' R'

(a) ( b)

Fig. 5-8 Op-amp variable phase- shift configurations. (

a) RC input to noninverting
terminal; (
b) CR input to noninverting terminal.

R2

R1

LDR XY

Lamp

— I

R1

-v
Fig. 5-9 A simple multiplier/divider utilizing light-dependent resistors,

turn, the voltage applied to Y must be positive, so that current Y/R2

flows through R2. The accuracy of multiplication or division provided
by this arrangement depends chiefly upon the precision of tracking by
the LDR's. An accuracy of 2 percent can be obtained without undue
difficulty. More sophisticated op- amp multiplier/divider designs are
available, and logarithmic- amplifier configurations provide optimum
accuracy, as discussed subsequently.
Next, consider the voltage- controlled op- amp sine- wave quadra-
ture generator depicted in Figure 5-10. Note that the operating fre-
 VARIABLE- FREQUENCY SINE- WAVE OSCILLATORS . 99

Multiplier 1

A cos

Multiplier 2 f = EC 1
10 2irRC
A sin wt

(a)

(b)

Fig. 5-10 Op-amp sine-wave generator with multipl iers in feedback loop. (
a) Con-
figuration; (
b) Sine waves in quadrature.

quency is controlled by the voltage value Ec.applied to the Y input of

multiplier No. 1, and to the X input of multiplier No. 2. Two op- amp
integrators are included in the configuration. Observe that multiplier
No. 1has negative gain (polarity inversion) to provide correct feedback
polarity. The output from each integrator is multiplied by E,./10. It can
be shown that the oscillating frequency is given by the equation:

E 1
F (5-9)
10 27TRC

It is often desirable for E, to vary the oscillating frequency in direct

proportion to its value. In turn, it is necessary to add an amplitude sta-
bilization network to the configuration shown in Figure 5-10. For ex-
ample, one of the AGC arrangements described previously may be em-
ployed. A frequency range of 100-to- 1can be obtained when multipliers
with adequate dynamic range are utilized. If the multipliers are designed
to have sufficiently fast response, an ac control voltage can be employed
to obtain afrequency-modulated output from the generator.
100 . OP-AMP GENERATING APPLICATIONS

When variable amplitude is desired from an op-amp sine-wave

generator, the simplest design approach employs avariable- amplitude
square-wave generator followed by ahighly selective filter, as depicted
in Figure 5-11. This is an example of amultiple- feedback bandpass fil-
ter; it is preceded by the low-pass filter RICI.Filtering action is highly
selective, and the filter is designed to pass the fundamental frequency
of the square wave. It can be shown that if the product of RIC, is much
less than 1/27rf, the pass frequency is given by the equation:

j R2 II R3 1
(5-10)
f - V R4 • C2 • C3 217.

Note that R2 and R3 are effectively in parallel. To ensure that the

higher harmonics of the square wave that exceed the high- frequency
limit of the op amp will be rejected, the low-pass filter RIC, is included.
This configuration provides an output sine wave with less than 1per-
cent distortion if component values are within close tolerances. In case
still lower distortion is desired, another op- amp bandpass stage may
be added.

5.4 SQUARE-WAVE GENERATORS

A basic op- amp square-wave generator configuration is shown in

Figure 5-12. Note that this is an example of anonlinear application of
an op amp, whereas the foregoing sine- wave generator arrangements
represented linear applications. The op amp in the square-wave con-
figuration operates in the switching mode, and its output is not directly
proportional to its input. Switching action is controlled by charge and
discharge of C2. Note that the op amp swings periodically from astate
of positive saturation into negative saturation, and vice versa. Suppose
that the op amp is in astate of positive saturation, so that the output
voltage is positive. In turn, the op amp is held in positive saturation by
the voltage divider R1-R2.This circuit action produces the positive half
cycle of the square- wave output.
However, the op amp in Figure 5-12 cannot remain in positive
saturation indefinitely. Note that C1 charges in a positive direction
through R3 and Rg. Eventually, the positive voltage at the inverting in-
put will become greater than the voltage at the noninverting input of
the op amp. These voltage relations cause the op amp to suddenly
switch into negative saturation. Now, the output voltage is negative
and CI proceeds to discharge (to charge in anegative direction). This
circuit action produces the negative half cycle of the square- wave out-
 SQUARE- WAVE GENERATORS . 101

R4

R1 Hi

Attenuator C1 R3

Eo

(a)

Square wave

A: Fundamental
B: 3d harmonic
C: Fundamental plus 3d harmonic
D: 5th harmonic
E: Fundamental plus 3d and 5th harmonics
F: 7th harmonic
G: Fundamental plus 3d, 5th, and 7th harmonics

Square wave

(b)

Fig. 5-11 A variable-amplitude op-amp sine-wave generator. (a) Configuration;

(1) Square-wave frequency spectrum.

put. Eventually, the negative voltage at the inverting input will become
greater than the negative voltage at the noninverting input. These volt-
age relations cause the op amp to suddenly switch back into positive
saturation, and the foregoing circuit actions are repeated.
It is evident that the repetition rate of this astable multivibrator
configuration is determined by the time- constant R3C,. A moderate
variation of repetition rate can be obtained by adjustment of R3.How-
ever, there is a practical lower limit to the value of R3,and to obtain
higher rep rates, the value of C, must be reduced. The maximum rep
rate is determined by the slew rate of the op amp; this factor also deter-
mines the rise time of the square wave at any rep rate. A typical slew
102 . OP-AMP GENERATING APPLICATIONS

R2

90"u

•Rise firne is 0.05 microsecond

Ideal
square,
wave

10% -

0 05 1.0 15 20

Time ( microseconds)

(a) ( b)

Fig. 5-12 Basic op-amp square-wave generator configuration. (

a) Circuit; (
b) Ex-
ample of square-wave rise time.

rate is 0.5 volt per microsecond, although specialized op amps have

considerably faster slew rates. If synchronization is desired, sync pulses
may be coupled into the noninverting input of the op amp.
Although the astable (free-running) multivibrator is the most
common type of square-wave generator, the bistable multivibrator
(flip-flop) is also in wide use. A basic configuration is shown in Fig-
ure 5-13. Positive feedback occurs at all frequencies within the capabil-
ity of the op amp. If there is apositive output voltage present, the feed-
back loop holds the op amp in positive saturation. Or, if there is a
negative output voltage present, the feedback loop holds the op amp in
negative saturation. Suppose that the op amp is in astate of positive
saturation. If a negative pulse voltage is applied to the noninverting
input, and this terminal is driven negative, the op amp will suddenly
change state and go into negative saturation. Next, if apositive pulse
voltage is applied to the noninverting input, and this terminal is driven
positive, the op amp will suddenly revert to it positive saturation state.
Note that if a second positive trigger pulse is applied, there is no re-
sponse from the op amp — anegative pulse is required.
Next, consider the monostable (one-shot) multivibrator arrange-
ment depicted in Figure 5-14. It operates in part as an astable multi-
vibrator and in part as abistable multivibrator. The op amp rests in
positive saturation, owing to the voltage divider R2—R3.When anega-
tive trigger pulse is applied via C,, the positive bias to the noninverting
input is momentarily reversed, and the op amp suddenly changes state
into negative saturation. However, it does not remain in negative sat-
 SQUARE-WAVE GENERATORS. 103

R3

o
R1
- --.
Trigger 10K
pulses
o Output
in

Input

(a) (b)

Fig. 5-13 A bistable multivibrator (flip-flop) configuration. (

a) Circuit; (b) Wave-
forms.

o
- -
Output

--r — r — r —

Input

(a) (b)

Fig. 5-14 A monostable multivibrator arrangement. (

a) Circuit; (b) Waveforms.

uration indefinitely, because C, starts to charge through R, and R4.Note

that C, is initially at ground potential, owing to the bypassing action
of CR,. The voltage divider R2—R3 holds the op amp in negative satura-
tion until C, charges sufficiently negative that the noninverting input
becomes positive (less negative) than the inverting input. Thereupon,
the op amp suddenly changes states back into positive saturation. Ob-
serve that it must now remain in positive saturation because CR, ef-
fectively connects R, to ground, and the inverting input rests at aless
positive potential than the inverting input. When another negative
trigger pulse arrives, the monostable cycle is repeated. Note that R4
varies the charging rate of CI,and in turn varies the length of the pulse
generated by the multivibrator.
It is evident that a monostable multivibrator can operate as a
square-wave generator, a rectangular- wave generator, or apulse gen-
1O4 . OP- AMP GENERATING APPLICATIONS

erator, depending upon its time constant and the rep rate of the applied
trigger pulses. The configuration depicted in Figure 5-14 cannot be trig-
gered by positive pulses; in other words, the op amp cannot be trig-
gered in the reverse direction (reset action). Note in passing that a
series of semi-sawtooth waves (ramps) appears across C, in Figure 5-
14, and that a semi- triangular wave appears across C, in Figure 5-12.
These waveforms are nonlinear, with exponential curvature. Therefore,
more elaborate circuitry is employed when good linearity is required.

5 . 5 TRIANGULAR-WAVE GENERATORS

An example of aprecise square and triangular wave generator is

shown in Figure 5-15. This arrangement employs two op amps with
comparator feedback around an integrator. A highly linear triangular
wave is obtained by utilizing aseparate op amp for the integrator. An-
other advantage of this arrangement is effective control of waveform
+v

Ros

EIR

(a)

f = 1kHz f = 10kHz

................om••••••••••••••••••••••*>---

(b)

Fig. 5-15 Precise square and triangular-wave generator. (

a) Circuit; (b) Typical
output waveforms.
 RAMP ( SAWTOOTH) GENERATORS . 105

characteristics. In other words, frequency, amplitude, and symmetry

controls are available. Note that op amp No. 1functions as an active
integrator, with afeedback loop that includes op amp No. 2for switch-
ing the reference voltage that is integrated. In other words, op amp No.
1functions as acomparator. Observe that adjustment of the symmetry
control serves to increase one integration rate and decrease the other,
or vice versa. The peak voltages of the output waveforms are determined
by the trip levels of the comparator.
It should be noted that hysteresis feedback occurs through RA.In
op- amp technology, hysteresis is defined as the transfer response lag
of acomparator which is controlled by positive feedback. This response
lag establishes different trip levels over the operating cycle. That is, a
different trip point is caused by the response lag when going from posi-
tive to negative saturation, than when going from negative to positive
saturation. Switching action occurs when voltage ErR overcomes the
hysteresis feedback from EsQ, raising the noninverting input of op amp
No. 2to the offset voltage established by Ros .Note that the range of the
amplitude control depends on the output swing capability of op amp
No. 1at the upper limit, and on the comparator input offset voltage at
the lower limit. Note in passing that a trapezoidal waveform is pro-
duced by passing atriangular wave through alimiter.

5.6 RAMP (SAWTOOTH) GENERATORS

A linear ramp and pulse generator employing two op amps is

shown in Figure 5-16. Note the similarity of this arrangement to the
square and triangular generator depicted in Figure 5-15. An op- amp
integrator is utilized with comparator feedback in both configurations.
However, the ramp generator circuit in Figure 5-16 includes diode
CR1. This diode effectively disconnects the comparator during the posi-
tive rise of the ramp waveform. Note also that resistor R, has amuch
smaller value than R, to obtain rapid fall (flyback) of the ramp. As ex-
plained previously, hysteresis feedback occurs through RA,which con-
trols the amplitude of the ramp waveform. The rep rate (frequency) of
the ramp and pulse waveforms is controlled by adjustment of the inte-
gration resistor 111.
Next, consider the staircase waveform generator depicted in Figure
5-17. This is aspecialized form of ramp generator utilized for multiple-
level testing, as in semiconductor curve tracers. Staircase ramp wave-
forms are also used in sequential control applications. The op amps in
the diagram generate a staircase waveform by differentiating and re-
integrating aseries of square waves in combination with arectifier that
106 . OP- AMP GENERATING APPLICATIONS

Rus

ER

Pulse Ramp

(b)
Fig. 5-16 Ramp and pulse generator arrangement. (a) Circuit; (
b) Output wave-
forms.

eliminates the fall of the square wave. Observe that op amp No. 1has
differentiating and rectifying functions. The output from asquare-wave
generator is applied to the op amp via C,. On the positive excursion,
diode D, conducts and the Darlington pair Q1 —Q2 is nonconducting.
On the other hand, during the negative excursion of the input wave-
form, diode D, does not conduct, and the Darlington pair conducts the
differentiated current waveform. In other words, only the negative-
going excursion produces an output from Q1—Q2 to op amp No. 2.
Next, op amp No. 2 integrates this applied pulse train, thereby
producing the staircase ramp output. Each negative excursion of the
square-wave driving waveform charges C, another step. However, these
output steps cannot continue indefinitely. Note that C2 and transistors
Q3 and Q, function as areset clamp and go into conduction at the emit-

ter- base breakdown potential of (24, as represented by the dashed-line

zener diode. In turn, C2 suddenly discharges through the transistors,
and the operational cycle then repeats. The rep rate of the generator is
limited by the slewing rate of the op amps, and by the overload re-
covery rate of Q4.A slight nonlinearity in the staircase waveform of ap-
proximately 0.1 percent results from residual leakage in the reset clamp
circuit and from the finite beta values of Q 1 and Q2.
108 . OP- AMP GENERATING APPLICATIONS

Fig. 5-18 An elaborate function generator. (Courtesy, Wavetek)

_
Fig. 5-19 Differential current drift test circuit.

with aTVM or dc scope. In turn, the differential current drift is defined

by the equation:

Drift = à V,m1 (5-11)

10 meg

FREQUENCY RESPONSE: A unity gain noninverting test circuit is depicted

in Figure 5-20. This configuration employs 100 percent feedback and
provides the most severe test of phase compensation and high- fre-
quency stability. The frequency response of this circuit is limited only
by the inherent characteristics of the op amp. A signal generator with a
sine-wave output at a30-mV level is used to drive the op amp. In turn,
the output voltage is measured over the rated frequency range of the op
 OPERATIONAL VOLTAGE-AMPLIFIER TEST PROCEDURES . 107

V—

(a) (
b)

Fig. 5-17 A staircase generator arrangement. (

a) Configuration; (b)Output wave-
form.

Function generators consist of a combination of various wave-

form generators such as discussed in this chapter. As an illustration,
the generator illustrated in Figure 5-18 provides achoice of nine dif-
ferent waveforms, with a wide range of control over characteristics.
This type of generator is used chiefly in design and development work.

5.7 OPERATIONAL VOLTAGE-AMPLIFIER

TEST PROCEDURES

Comparatively simple test procedures can be employed to check

operational amplifiers for differential current drift, frequency response,
rise time, capacitive loading, common- mode input impedance, and
full- power response. These test procedures are made as follows.

DIFFERENTIAL CURRENT DRIFT: With reference to Figure 5-19, differential

current drift is measured with the configuration shown. No connection
is made to the input terminals, and the dc output voltage is measured
 OPERATIONAL VOLTAGE-AMPLIFIER TEST PROCEDURES . 109

Eo
Ei

o o
7.-

Fig. 5-20 Unity gain noninverting test circuit.

amp with aTVM or scope. The test frequency is increased until the out-
put voltage drops 3dB below the low- frequency level. This frequency
represents the measured bandwidth of the op amp. (The inverting test
circuit in Figure 5-21 may also be used.)

RISE TIME:Rise time may be measured with the test circuit depicted in
Figure 5-20 or 5-21. A square-wave input voltage is applied at alevel
of 100 mV p- p. A triggered- sweep scope is used to display the output
waveform. It is desirable to employ asquare- wave generator that has a
considerably faster rise time than the op amp. In such acase, the rise
time of the output waveform is practically equal to the rise time of the
op amp. Of course, the scope should also have considerably faster rise
time than the op amp. In case the scope has arise time that is marginal,
the displayed waveform will have the rise time given by the equation:

TD = V Ti
t ± 11, (5-12)

where

TD is the rise time of the displayed waveform

TA is the rise time of the op amp

To is the rise time of the oscilloscope

In case the oscilloscope has high performance, and the square-

wave generator rise time is marginal, the generator and op-amp rise
times also combine in accordance with Equation (5-12).

CAPACITIVE LOADING: Capacitive loading, if excessive, can cause in-

stability with configurations such as depicted in Figures 5-20 and 5-21.
To determine the tolerable limit of capacitive loading, the op amp is
110 . OP-AMP GENERATING APPLICATIONS

driven with asine- wave signal generator at alevel of 30 mV. In turn, the
output terminals of the op amp are loaded with adecade capacitor box,
and the output voltage is measured with aTVM or scope. With the sig-
nal generator operating near or at the high- frequency limit (- 3 dB
point) of the op amp, the capacitive load is increased to the point of
unstable operation. This value of capacitance defines the loading limit.

COMMON-MODE INPUT IMPEDANCE: To measure the common- mode in-

put impedance of an op amp, the test circuit shown in Figure 5-21 is
utilized. The op amp is driven by asine-wave signal generator operating
at 100 Hz with alevel of 1V. A decade resistance box is connected in
series with the "hot" lead from the generator to the op amp. In turn, the
output voltage is measured with aTVM or scope, and the level is noted
with zero series resistance. Next, the series resistance is increased until
the output voltage drops 10 percent. The common- mode input imped-
ance is then given by the equation:

Zin = 9R, (5-13)

where R, is the series resistance that is inserted.

FULL POWER RESPONSE: To measure the full- power response of an op

amp, the test circuit shown in Figure 5-22 is employed. The op amp is
driven with asine- wave signal generator operating at 100 Hz. In turn,
the output of the op amp is loaded with the desired value of resistance,
and the output voltage is measured with ascope. The signal generator
is set to alevel that provides the specified full- power output voltage

R1 Ro R1 Ro

Fig. 5-21 Unity gain test circuit ( invert- Fig. 5-22 Test circuit for checking full-
ing) with suitable resistance power response frequency of
level for power measure- an op amp.
ments.
 OPERATIONAL VOLT .GE-AMPLIFIER TEST PROCEDURES . 111

swing from the op amp. Then, the generator frequency is increased un-
til distortion becomes perceptible in the scope pattern. This establishes
the full- power response frequency of the op amp.

REVIEW QUESTIONS

1. What is the purpose of the twin-T circuit in Fig. 5-1?

2. What is the frequency of oscillation of the circuit in Fig. 5-1 when
R = 10kfl and C = 1.59 nF?
3. What are the two frequency selection methods in aWien- bridge os-
cillator?
4. What limits the lower frequency of the Wien- bridge oscillator in Fig.
5-2?
5. What is the frequency of aphase-shift oscillator when R1 = 10k, R2 =
15k and C = . 0011.L.F?
6. What is the oscillating frequency of the circuit in Fig. 5-10 when Ec =
10 V, R = 10 kand C = 15.9 nF?
7. What determines the maximum output frequency of the circuit in Fig.
5-12?
8. In Fig. 5-12, what components determine the repetition rate?
9. What determines the rise time of the square wave in Fig. 5-12?
10. What is atypical slew rate of an op amp?
11. What is the formula for differential current drift?
12. What is the dB drop at the cutoff frequency of the op amp?
13. Draw adiagram of asetup for measuring rise time of an op amp.
14. What is the true rise time of an op amp when To = 10µsec and TD =
5µsec?
15. How is capacitor loading tested?
16. What is the formula for common- mode input impedances?
17. Draw a circuit for measuring full power response of an op amp.
6 • Specialized
Amplifier
Arrangements

6 . 1 GENERAL CONSIDERATIONS

Operational amplifiers are used in various specialized applica-

tions, such as video amplification, high-frequency amplification, tuned
amplification, scaling adders, regenerative amplification, differential
input and differential output amplification, gain control, and related
arrangements. In analyzing these specialized applications, it is helpful
to briefly review two basic feedback circuits. With reference to Figure
6-1, configurations are shown for an inverting amplifier with negative
feedback, and for a noninverting amplifier with negative feedback. It
is evident that the gain for these two configurations will not be exactly
the same, and the difference in gain figures depends upon the relative
values of Ro and R,. From apractical viewpoint, the gain provided by
these configurations is given by the equations:
Inverting configuration:

E„ —R0
(6-1)
E. R,

where the minus sign denotes phase inversion.

Noninverting configuration:

Eo _Ro +R,
(6-2)
E. R,

As noted previously, op amps employ negative feedback in most

applications. Positive feedback is utilized in some applications. Op
amps are used without any form of feedback in voltage- comparison
applications only. If no feedback is used, an op amp has afrequency
characteristic that falls off progressively with increasing frequency, as

112 .
 GENERAL CONSIDERATIONS. 113

RI Ro Ro

(a) (
b)

Fig. 6-1 Basic op-amp configurations with negative feedback. (

a) Inverting con-
figurations (
b) Noninveding configuration.

exemplified in Figure 6-2(a). On the other hand, if negative feedback is

employed, the frequency response becomes much more uniform. In
case alarge amount of negative feedback is utilized, an op amp will have
a flat frequency response out to the limit imposed by the internal de-
sign of the device. As an illustration, Figure 6-2(b) shows how flat fre-
quency response can be obtained to 10 MHz. Note the following points:
1. The op amp in the foregoing examples has an internal frequency
limit of approximately 10 MHz.
2. Without any feedback, the op amp develops again of 60 dB at
very low frequencies, with steadily decreasing gain at higher
frequencies; at about 10 MHz the op amp has zero gain.
3. When alarge amount of negative feedback is utilized, so that
the maximum gain is reduced from 60 dB to 6dB, the op amp
then develops uniform gain from very low frequencies to ap-
proximately 10 MHz.
Note in passing that positive feedback has the opposite effect on
bandwidth that negative feedback provides. In other words, an ampli-
fier that employs positive feedback will have narrower bandwidth than
the same amplifier with no feedback. As noted previously, both nega-
tive feedback and positive feedback are sometimes used in special ap-
plications. It should be emphasized that no feedback and/or frequency-
compensating arrangement can be devised that will increase the usable
gain of an amplifier beyond its unity- gain frequency. In other words,
unity gain occurs at 0 dB, and the unity- gain frequency depicted in
Figure 6-2 is approximately 10 MHz.
Although a6- dB amplifier is suitable for some applications, con-
siderably higher gain is required in other applications. In turn, the op
amp must have acorrespondingly higher unity- gain figure, if appreci-
114 . SPECIALIZED AMPLIFIER ARRANGEMENTS

60 60
N
50 50 N
N 0
40 90 40
.o.,
e„
e 30 30
o
20 20
N

10 10 — Closed- loop response N

O o )
001 0.1 10 001 0.1 10

Frequency, mHz Frequency, mHz

(a) ( Id

Fig. 6-2 Comparative op-amp frequency responses. ( a) Response with no feed-

back; (
I)) Response with large amount of negative feedback.

able bandwidth is to be realized. As an illustration, Figure 6-3 shows a

frequency characteristic for a50- dB amplifier with flat response from
dc to about 3.5 MHz. In turn, the op amp must have aunity- gain cross-
over (frequency) of approximately 150 MHz. A 50- dB gain corresponds
to avoltage ratio of 316- to- 1, whereas a6- dB gain corresponds to avolt-
age ratio of 2- to- 1. Note that these are full- power frequency responses,
whereas the unity- gain frequency response is usable only for very small
signal levels. Power capabilities of common types of op amps range
from 100 mW to 750 mW.
70

60

0
,o
50
Closed- loop
%
response o
o2 40
o
-
•%,

a 30

20

10

o
0.1 1 10 100

Frequency, mHz

Fig. 6-3 Frequency response for a50-dB amplifier corresponding to aunity- gain
frequency of 150 MHz.
 DIGITAL PULSE AMPLIFIER . 115

6.2 DIGITAL PULSE AMPLIFIER

Op amps are used in video amplifiers for general applications,

including amplification of digital pulses. As an illustration, Figure 6-4
shows the schematic diagram for an operational amplifier that provides
abandwidth of 3.5 MHz and again of 30 dB in the arrangement of Fig-
ure 6-5. A gain of 30 dB is equal to avoltage ratio of approximately 32
times. Good stability is provided by phase compensation through a
5-pF capacitor and a 10-k resistor. Note that if phase compensation is
not employed, an objectionable peak response will occur at about 4.5
MHz, as depicted in Figure 6-5(c). The input impedance of this video
amplifier is 480,000 ohms at low frequencies, decreasing somewhat at
higher frequencies.
The pulse-handling capability of the video amplifier depicted in
Figure 6-5 is shown in Figure 6-6. Note that the input is a38- mV 960-ns
V cc

Non-
inverting
input

V EE

Fig. 6-4 An operational amplifier suitable for digital pulse application. (

Courtesy,
RCA)
116 . SPECIALIZED AMPLIFIER ARRANGEMENTS

Phase
compensation
50

Voltage gain- dB
40

30
20

10
o
0.01 0.1 10 100
Frequency mHz

(b)

70

60

Voltage gain-dB
50

ao
No compensation
30
20
Phase 10
compensation
o
0.01 0.1 10 100
Frequency mHz

lc)
(a)
Fig. 6-5 Op-amp video amplifier with 3.5-MHz bandwidth and 30 dB gain. (a)
Amplifier configuration; (
b) Frequency response with phase compensa-
tion; (
c) Frequency response with no phase compensation.

pulse, and the output is a1.1-V pulse (avoltage gain of approximately 30

times). There is a40-nsec delay time, and the rise time is 125 nsec. The
fall time is the same as the rise time. Note that the storage time is zero.
On the other hand, if the amplifier is overdriven, a finite storage time
occurs. For example, with 20- dB overdrive, a storage time of 160 nsec
occurs, with the result that the output pulse is stretched and distorted,
as depicted in Figure 6-6(b). Therefore, precautions should be taken to
prevent overdrive in most applications.

6 . 3 WIDE-BAND AMPLIFIER

Next, consider the 42-MHz op- amp amplifier depicted in Figure

6-7. This configuration has again of 10 dB, with a2- dB peaking of the
frequency characteristic at the high- frequency end. Both phase- lead
and phase-lag compensation are employed. If flat frequency response is
desired, a different value of phase- compensating capacitance can be
utilized. However, the bandwidth is reduced to 25 MHz when the fre-
 WIDE- BAND AMPLIFIER . 117

Output Input Input Output

Vin = 38mV Vin = 1.27V

Vout = 1.1V Vout = 3.2V
td = 4Ons td = 32ns
ts = Ont ts = 160ns
Note:
tr = tf = 120ns tr = 500ns
td = Delay time
tf = 16Ons
ts = Storage time
tr = Rise time
(a; tf = Fall time
(b)

Fig. 6-6 Video-amplifier response to adigital pulse. (a) Low-level response; (b)
Overdriven response.

Phase
compensation

6.8
PF
470
pF

+12V

Rs = 680
15
Vout
Voltage gain-dB

10
Vin

o
0.1 10 100

F equency-mHz

1K Phase
compensation

(a) (
b)

Fig. 6-7 Arrangement of a 42-MHz, 10-dB amplifier. (a) Configuration; (b) Fre-
quency response. (
Courtesy, RCA)

quency response is completely uniform. As noted previously, the func-

tion of phase compensation is to reduce or eliminate the tendency for
the output voltage of an op amp to shift in phase at high frequencies.
This tendency is the result of stray capacitance in the structure of the op
amp.
118 . SPECIALIZED AMPLIFIER ARRANGEMENTS

6 . 4 NARROW- BAND TUNED AMPLIFIER

Op amps can be used with external tuned circuits for narrow- band
amplifier operation. As an illustration, Figure 6-8 shows an arrange-
ment for a100- kHz tuned amplifier with aQ of 33.3 and ahalf- power
bandwidth of approximately 6kHz. This is an inverting- amplifier con-
figuration and it provides a conventional resonant- circuit frequency
response. Although anoninverting amplifier configuration can be used,
the frequency response is changed in that the output does not decrease
to zero at frequencies far from resonance. The gain equation for the con-
figuration of Figure 6-8 is:

Void Z .(
(6-3)
—

Vin Zr

where Z f
. is the feedback impedance

Zr is the input impedance of the op amp.

6 . 5 SCALING ADDER

A scaling adder combines and amplifies two or more input volt-

ages, as explained previously. In addition, ascaling adder weights each
signal. In other words, weighting involves an artificial adjustment of
measurements in order to account for factors which, during normal use
of adevice, would otherwise differ from the conditions during measure-
ment. As an illustration, background-noise voltages may be weighted
for measurement by applying factors to reduce the measured value in
inverse ratio to their interference. This is just another way of saying that
the input signals to the scaling adder are individually attenuated to
specified fractions of their original values. An inverting feedback con-
figuration is employed with an op amp in this scaling- adder application.
Weighting operations are possible because there is avirtual ground at
the junction of the feedback resistor and the inverting input (Figure 6-
9). This virtual ground isolates each signal channel from the other(s).
Weighting operations require that each signal input enter the vir-
tual- ground point through aresistance of such value that its ratio to the
feedback resistance is equal to the stipulated weighting factor. In the
example, of Figure 6-9, the input signals have sine and square wave-
forms for purposes of clarity. Note that the weighting factor is 1/10 for
the sine wave, and 1/5 for the square wave. In other words, the square-
wave signal has aweighting factor which is twice that of the sine-wave
 SCALING ADDER. 119

Circuit Q = 33.3
+6V 22
3.3K = 33.3
20

18

16

14

Voltage gain-dB
12

10

2
(Terminals
o
8and 5
80 84 92 100 108 116 120
open)
1500p F
Frequency- kHz

(a) lb)
Fig. 6-8 A tuned op- amp configuration. (a) Circuit; ( b) Frequency response.

39
pF
12K
+6V

Ifff
•••

680K

Vout

Vertical = 0.5V/Div.
1kHz 100Hz
90 400
mVpp mVpp

Virtual ground

tal (b)

Fig. 6-9 Scaling adder arrangement. (

a) Configuration; (
13) Output waveform.
signal. Or, the square- wave signal is attenuated 50 percent on arelative
basis. Next, observe that the sine- wave signal has asource value of 90
mV p- p, and the square-wave signal has asource value of 400 mV p- p.
In effect, the square-wave signal will have an operative source value of
200 mV p- p. Or, the sine- wave signal will have 45 percent of the ampli-
tude of the square- wave signal in the output circuit. These relations are
apparent in the output waveform shown in Figure 6-9(b). Note also that
the output waveform has an amplitude of 2.8 V p- p. Or, the op amp pro-
vides again of 200 times.
120 . SPECIALIZED AMPLIFIER ARRANGEMENTS

6.6 REGENERATIVE AMPLIFICATION

An example of regenerative amplification is seen in the pulse-

width discriminator arrangement of Figure 6-10. This configuration
produces adigital output pulse when the width of an input pulse ex-
ceeds a preset value. Note that when no input signal is applied, Q1 is
biased into conduction, holding the input integrator in its reset state.
Next, when an input pulse is applied to the base of Q1,the transistor is
cut off and the integrator starts to charge. This charging rate is given by
the equation:

RCh = —V
r volts/sec (6-4)

In turn, the integrator output is aramp waveform that increases

linearly in amplitude with time for the duration of the input pulse. Ob-
serve that if the input pulse is sufficiently wide that the output ramp
rises to the reference voltage set by R 5, the comparator will regenera-
tively switch on and will remain on for a period of time equal to the
difference between the input pulse width and the reference pulse width
given by the equation:

R C Vre
Tref =
(6-8)

where V„f is the value of adjustable voltage at the input to the com-
parator.
As noted above, in case the input pulse width is less than T„î,no
output is obtained from the comparator. Component values indicated
in Figure 6-10 permit a range in discrimination from 1to 100 gs, ap-
proximately. When wider pulses need to be accommodated, the value of
R1 may be increased accordingly.

6 . 7 DIFFERENTIAL INPUT AND

DIFFERENTIAL OUTPUT AMPLIFICATION

All op amps have differential input design, although they are com-
monly operated with single-ended input. As has been explained pre-
viously, either the inverting or the noninverting input may be driven,
with the other input returned to ground. Most op amps have single-
ended output design, although a few are designed with differential
output. Differential output is desirable for direct driving of electro-
 DIFFERENTIAL INPUT AND DIFFERENTIAL OUTPUT AMPLIFICATION . 121

+12V

+12V
66
R8
12kerl
Input
o 65 Comparator
5kS2

Output
R1
6.2kft
D1
FD- 300
— 6V
—6V C3
50pF
62 6V
6.2k12 R7
4704,2

Ramp

1 /
\
\111-
Input
Ref.

Output

(a)

Fig. 6-10 Pulse-width discriminator that uses positive feedback. (a) Circuit; (
b)
Pulse relations.

mechanical devices such as solenoids and indicators which require a

greater voltage swing than provided by single- ended output types of
op amps. With reference to Figure 6-11, abasic configuration is shown
for push-pull input and push-pull output with this type of op amp. Note
that negative feedback is applied to both input terminals. Although a
30-volt (± 15-volt) power supply is employed, an output voltage swing
of 50 volts peak- to-peak is obtained. This swing is attainable because
the 30-volt power supply contributes its voltage to both the inverting-
output and the noninverting-output sections.
Note that the output signal from the op amps in Figure 6-11 can
be applied to afloating load, both ends of which operate above ground
potential. Next, suppose that it is desired to obtain differential-output
operation with op amps that have single-ended output. In such acase,
the configuration shown in Figure 6-12 may be employed. This is an
arrangement that utilizes single-ended input. As apractical note, this
arrangement has considerably less useful bandwidth than that of the
configuration in Figure 6-11. Less effective bandwidth is available be-
122 . SPECIALIZED AMPLIFIER ARRANGEMENTS

25Vp-p

Differential Differential
(push-pull) (push-pull)
input output

25Vp-p

Fig. 6-11 Differential input and output, using an op amp with differential-output
design.

Fig. 6-12 Two conventional op amps provide double-ended output with single-
ended input.

cause each of the op amps introduces phase shift at higher frequencies,

and these phase shifts are additive. By way of comparison, observe the
configuration depicted in Figure 6-13. A pair of op amps are employed
in acircuit that provides both differential input and differential output.
Since phase shifts are not additive, it provides greater bandwidth than
the arrangement in Figure 6-12; it also provides higher input imped-
ance. As an operating note, the driving source in Figure 6-13 must be
center- tapped and returned to ground to complete the input bias- current
circuit.

6.8 AMPLIFIER WITH AUTOMATIC

GAIN CONTROL

Operational transconductance amplifiers have a variable trans-

conductance characteristic as exemplified in Figure 6-14. The transcon-
ductance value is determined by the amplifier bias current (ABC). In
turn, this characteristic makes an OTA useful in an AGC amplifier. With
 AMPLIFIER WITH AUTOMATIC GAIN CONTROL . 123

R2

Gain
R1 adjust
Eo
R2
Ei

Fig. 6-13 Two conventional op amps provide double-ended output and double-
ended input.

100
Forward transconductance-mmho

10

Typical

1.0

0.1

10 100 1,000

Amplifier bias microamperes

Fig. 6-14 Typical transconductance characteristic for an OTA.

reference to the block diagram shown in Figure 6-15, the output signal
from the amplifier is detected ( rectified) and passed through anetwork
comprising alow-pass filter. This filter changes the pulsating- dc output
from the detector- amplifier into smooth dc, and also imposes acertain
time delay in AGC action. The amount of time delay is determined by
124 . SPECIALIZED AMPLIFIER ARRANGEMENTS

Signal
input
Gain-controlled
(;) signal
output

Detector
network
(filter)

Fig. 6-15 Op amp general-purpose amplifier with agc.

the time- constant of the filter. For control action, the AGC voltage is
polarized so that the ABC decreases as the signal input voltage increases.
In turn, the transconductance of the gain-controlled stage is reduced,
maintaining the output signal amplitude essentially constant. Low-
frequency negative feedback is provided for the gain- controlled stage
to stabilize the system and prevent "hunting". In other words, the ABC
changes must always represent negative feedback at all frequencies.

6 . 9 OP-AMP MODULATOR ARRANGEMENT

The transconductance characteristic depicted in Figure 6-14 also

finds application in amplitude modulation from dc to the upper cutoff
frequency of the system. A single OTA is employed in the configuration
of Figure 6-16(a). Note that the carrier signal is applied to the differ-
ential input of the op amp, and the modulating signal current is added
to the quiescent ABC. A carrier and modulating frequency capability in
excess of 20 kHz is provided by atypical OTA. Waveforms produced by
modulator action are exemplified in Figure 6-16(b) for a carrier fre-
quency of 10 kHz and amodulating frequency of 500 Hz. Next, Figure
6-16(c) shows the waveform obtained with a 500- Hz carrier and a
10- kHz modulating frequency.
 BOOTSTRAPPED AMPLIFIER OPERATION . 125

Carrier input

Modulated
output

1meg

Modulating
v-

(a)

MIIIIIIMIZZ111111MM
1111•1111111111.1f1111"11MB
mr,p,m1111111! 111,1
1
uwiliiii 1
,111114e111111„i 4k,
/mum maul 11p4111111
MIIIIIËIIIIIIILABIll
(b) (c)
Fig. 6-16 OTA amplitude-modulator arrangement. (
a) Configuration; (b) Output
waveform, 10 kHz/500 Hz; (c) Output waveform, 500 Hz/10 kHz.

6.10 BOOTSTRAPPED AMPLIFIER OPERATION

To obtain extremely high input impedance to an op amp, aboot-

strapping feedback configuration may be employed. This technique
uses output voltage of the same polarity as the input voltage to inject
acurrent into the input circuit which is equal to the current drawn from
the driving source in the absence of feedback. In turn, the source does
not supply any driving current and the input impedance becomes ef-
fectively infinite. With reference to Figure 6-17, the input voltage is
applied to the noninverting terminal of the op amp. Bootstrapping is
provided by positive feedback through R2,R3,and 1Z4.Adjustment of
the value of R3 permits the input current demand to be precisely bal-
126 . SPECIALIZED AMPLIFIER ARRANGEMENTS

R2

=
Fig. 6-17 A bootstrapped amplifier configuration.

anced out (supplied by) the feedback current. At balance, the input im-
pedance of the op amp is effectively infinite. Note that excessive boot-
strapping will cause instability, since the amplifier will then supply its
own input and break into oscillation.

6.11 DC LEVEL-SHIFTING PRINCIPLES

At this point, it is instructive to consider basic dc level- shifting

principles employed in op amps. As seen in Figure 6-4, an op amp is
dc- coupled throughout. The dc voltage level of simple cascaded dc-
coupled amplifiers rises through successive stages and approaches the
power- supply voltage. Therefore, cascaded dc- coupled stages in an op
amp are supplemented by provisions to compensate for this voltage
rise, so that there will be no dc offset in the output circuit. Figure 6-18
shows the simplest method to obtain adownward shift in dc level. This
configuration employs an emitter- follower stage between one differ-
ential- amplifier stage and the next differential-amplifier stage. The
constant- current source I o and the resistance Re are chosen so that the

collector voltage at Q, is equal to 2VBE ,where VBE is the voltage drop

across the base- emitter junction of Q,. Thus, the collector voltage at Q1
is equal to two forward- biased voltage drops above the emitter voltage
of Q 1.In turn, the voltage drop across the base- emitter junction of Q2
makes the base voltage of Q3 equal to the base voltage of Q1.Accord-
ingly, this arrangement permits similar stages to be cascaded with the
collector and base voltages remaining at the same dc level.
The chief disadvantage of the foregoing arrangement is that the
signal-voltage swing is comparatively limited. Op amps designed for
 DC LEVEL- SHIFTING PRINCIPLES . 127

v,

Fig. 6-18 Adc level-shifting circuit utilizing an emitter follower.

comparatively large voltage swings may use the level- shifting config-
uration shown in Figure 6-19. Observe that the differential stages em-
ploy NPN transistors, whereas a PNP transistor is utilized as alevel
shifter between stages. Downward shift of collector voltage between
Q, and the base of Q 3 is obtained via the collector-emitter voltage of
Q2. Note that Q3 is an effective collector load for Q2. Although alarge

signal-voltage swing is obtained, this arrangement has the disadvantage

of poorer high- frequency response than the configuration depicted in
Figure 6-18. In other words, an integrated PNP transistor has inherently
poorer high- frequency response than an integrated NPN transistor.
Another dc level- shifting arrangement that provides better high-
frequency response with a PNP transistor is shown in Figure 6-20.
Note that the level- shifting PNP transistor is operated in the common-
base mode. A common- base configuration has inherently better high-
frequency response. Transistors Q, and Q3 comprise adifferential pair,
and the collector signal current of Q, produces an equal emitter signal
current in Q4. Although better high- frequency response is obtained
with this arrangement, it has the disadvantage of single-ended input
only.
Next, consider the technique utilized in designing the output stage
of an op amp, so that there is zero shift in dc level between the input and
the output terminals. With reference to Figure 6-21, Q, functions as an
input buffer, and Q2 provides aconstant- current source for Q,. A shift
in dc level results from the voltage drop across R,, owing to the collec-
tor current of Q2. Note that the emitter of Q 3 is bootstrapped to the
emitter of Q2.Feedback from Q 2 through R, causes adecrease in the
voltage drop across R, during negative- going output swings, and an
128 . SPEC IALIZED AMPLIFIER ARRANCLMENTS

Fig. 6-19 A dc level-shifting circuit that employs aPNP transistor.

V+

Signal
+DC Volts

03
Signal +0
DC Volts

R3

R2

v—
Fig. 6-20 A dc level-shifting circuit Fig. 6-21 A dc level-shifting output
with better high-frequency network.
response.

increase across R, during positive- going output swings. This config-

uration provides considerable voltage gain, a high input impedance,
a low output impedance, and an output swing that nearly equals the
supply voltages, while producing the necessary shift in dc level.
Forward- biased diodes are also used for shifting dc levels in op-
amp circuitry. With reference to Figure 6-22, several forward- biased
diodes, or azener diode, may be connected in series between the col-
 MOUNTING AND HANDLING OPERATIONAL AMPLIFIERS . 129

V+

(a) (
D)

Fig. 6-22 dc level-shifting diode circuits. (a) With forward- biased diodes; (b) With
zener diode.

lector and base of cascaded stages. The chief disadvantage of this ar-
rangement is the impedance that it introduces into the signal path.
Therefore, transistor level shifters are generally preferred.

6.12 MOUNTING AND HANDLING

OPERATIONAL AMPLIFIERS

When op amps are mounted in amanner that requires bending of

the leads, it is important that the lead be supported and clamped be-
tween the bend and the package seal, and that bending be done with
care to avoid damage to the plating on the lead. The radius of the bend
should always be greater than the diameter of the lead. In the case of
rectangular leads, the radius of the bend should always be greater than
the thickness of the lead. Note that the ends of the bent leads should
be straight to ensure proper insertion through holes in the printed-
circuit board. Overheating must be avoided during soldering opera-
tions, or the op amp will be damaged.

REVIEW QUESTIONS

1. What is the gain of an op amp, noninverting, when Ro = 10 M ohm and

12, = 10 kohm?
2. What happens to the gain of an op amp (without feedback) as the fre-
quency increases?
130 . SPECIALIZED AMPLIFIER ARRANGEMENTS

3. What is the relationship between negative feedback and the bandwidth

of an op amp?
4. How does positive feedback affect the bandwidth of an op amp circuit?
5. What are the power capabilities of common types of op amps?
6. What is the purpose of using phase compensation in the circuit in Fig.
6-5?
7. What causes the output voltage of an op amp to shift in phase at high
frequencies?
8. What is the equation of the voltage gain in the circuit in Fig. 6-8?
9. What is ascaling adder?
10. What is meant by the term "weighting of asignal"?
11. How is a 50 volt peak-to- peak signal obtained in the circuit in Fig.
6-11?
12. What is one useful purpose of the OTA?
13. What is the purpose of bootstrapping an op amp circuit?
14. Compare the high-frequency response of an integrated NPN transistor
to that of an integrated PNP transistor.
15. What are some precautions that should be taken with an op amp?
7 • Specialized
Op-Amp
Applications

7 . 1 TIME-DIVISION MULTIPLEXING

Time- division multiplexing involves one of the important spe-

cialized applications of op amps. Multiplexing is the process of com-
bining several measurements (waveforms) in transmission over asingle
line or in asingle channel. Two principal types of multiplexing are em-
ployed. Time- division multiplexing uses a time-sharing pattern of
pulsed samples from the transmitted waveforms. Frequency- division
multiplexing utilizes data from each channel (waveform) to modulate
individual subcarriers which are then modulated on the carrier wave.
Op- amp application is chiefly concerned with time- division multi-
plexing. Figure 7-1 pictures four ways in which asine waveform may
be sampled by pulses. These are pulse- amplitude modulation (PAM),
pulse- duration or pulse- width modulation (PDM), pulse- position mod-
ulation (PPM), and pulse- code modulation (PCM). Note that PAM em-
ploys analog sampling, whereas the other forms of modulation utilize
digital sampling. Each of these sampling signals can be passed through
suitable demodulators to reconstitute the original unsampled signal.
With reference to Figure 7-2, aPAM waveform can be processed
by alow-pass filter to recover the original waveform. The time-constant
of the filter is chosen so that the pulse frequency falls beyond the cutoff
frequency of the filter, whereas the envelope frequency falls within the
cutoff frequency of the filter. More elaborate demodulating arrange-
ments are required to recover the original waveform when PDM, PPM,
or PCM is used. At this point, it is instructive to observe how time- divi-
sion multiplexing is applied to PAM. In Figure 7-3 three different wave-
forms are being sequentially sampled. A three- channel gated amplifier
comprising three OTA's is utilized, as depicted in Figure 7-4. Each
channel is sequentially activated by astrobe (gating) waveform to pass
its input waveform with a gain of approximately 20 dB. Figure 7-5
shows the timing of the strobe waveform. Note that acommon feed-

.131
132 . SPECIALIZED OP-AMP APPLICATIONS

Varying physical quantity

PAM

PDM

PPM

PCM

Fig. 7-1 Waveform sampling by various types of pulse modulation.

.2 4. "
--"F"
n.

o
Time-

la) lb)

Fig. 7-2 Processing of sampled waveform. (a) Input to low-pass filter; (

b) Output
from low-pass filter.
 SAMPLE- HOLD- READ CONFIGURATION . 133

Time_

Fig. 7-3 Example of time-division multiplexing.

waveform, the three output waveforms can be displayed one above the
other on the screen of an oscilloscope. Note that the sampling rate de-
picted in Figure 7-3 is comparatively slow— considerable distortion
would be observed in the reconstituted waveforms displayed on the
scope screen. Therefore, in practice, asufficiently rapid sampling rate
is employed to provide substantially undistorted output waveforms.
The chief disadvantage of rapid sampling rates is the comparatively
large bandwidth that is required in each channel.

7. 2 SAMPLE-HOLD-READ CONFIGURATION

Some sampling arrangements are designed to hold the value of the

sample for acertain length of time before it is displayed or otherwise
utilized. A pair of OTA's is employed in this application, as depicted
in Figure 7-6. C1 is the charging capacitor that holds the sampled value
until astrobe- read pulse is applied. Thereupon, an output pulse is pro-
duced which has the same amplitude as the sampled value. Next, when
the next strobe- sample pulse is applied, C, is charged or discharged in
accordance with the amplitude of the input signal at that instant. Note
that both OTA's are biased off unless astrobe pulse is present. C2 is a
small stabilizing capacitor. The maximum sampling rate is determined
134 . SPECIALIZED OP- AMP APPLICATIONS

10K

V+ = 6V
V— = 6V

V+

110K

To each
amplifier
Gating
strobe
input
input
77.
Channel 3
V
Strobe
— input

100K

Fig. 7-4 A three-channel gated-amplifier arrangement.

by the slew rate of the OTA's. Note that both OTA's operate as voltage
followers.

7.3 SAMPLE-HOLD-COMPARE
CONFIGURATION

Other sampling arrangements are designed to hold the value of a

sample while it is being compared with areference voltage. A pair of
OTA's is utilized in this application, as shown in Figure 7-7. When a
strobe- sample pulse is applied to the charging OTA, CI is quickly
charged to the amplitude of the input signal. Next, when astrobe- com-
pare pulse is applied to the comparator OTA, the voltage being held by
CI determines the amplitude of the resulting output pulse. Then, when
the next strobe- sample pulse is applied, CI is charged or discharged in
136 . SPECIALIZED OP- AMP APPLICATIONS

Input
signal Output
pulse

Strobe Strobe
to sample to compare

Fig. 7-7 A sample-hold-comparison configuration.

either positive or negative numbers, and multiplication of an algebraic

function by another algebraic function. The basis of four- quadrant
multiplication is pictured in Figure 7-8. Observe that xand yare both
positive in the first quadrant; xis negative and yis positive in the sec-
ond quadrant; xand yare both negative in the third quadrant; xis posi-
tive and y is negative in the fourth quadrant. Note that if xis squared
(multiplied by itself), the product falls in the first and second quadrants

Second +X First
quadrant quadrant

Third Fourth
quadrant quadrant

—Y
Fig. 7-8 Basis of four-quadrant multiplication.
 FOUR-QUADRANT MULTIPLIER CONFIGURATION . 135

1
-

Time

Fig. 7-5 Timing of the strobe waveform.

Input
signal
Output
pulse

Strobe Strobe
to sample to read

Fig. 7-6 Two OTA's in asample-hold- read configuration.

accordance with the amplitude of the input signal at that instant. The
charging OTA is biased off unless a strobe- sample pulse is present.
Similarly, the comparator OTA is biased off unless a strobe- compare
pulse is present; however, the comparator OTA does not operate in the
linear mode. In other words, when it is gated on, the OTA will go either
into positive saturation or into negative saturation, depending upon the
comparative amplitudes of the voltage on C, and the reference voltage.

7. 4 FOUR- QUADRANT MULTIPLIER

CONFIGURATION

Previous treatment of basic op- amp multiplier action has shown

how an input signal can be multiplied by aconstant such as 2, Vj, 7r,
and so on. We are now in agood position to consider multiplication by
 FOUR-QUADRANT MULTIPLIER CONFIGURATION . 137

(y is always positive). Again, if y is squared, the product falls in the

first and fourth quadrants.
Three OTA's are utilized in the basic configuration for a four-
quadrant multiplier as depicted in Figure 7-9. Op amp No. 1is con-
nected as an inverting amplifier for the xsignal. Op amp No. 2is con-
nected as anoninverting amplifier. Thus, the output from op amp No. 1
will have the opposite algebraic sign compared to the output from op
amp No. 2. Op amp No. 3 is connected as aunity- gain inverting am-
plifier, and supplies bias for op amp No. 1. It can be shown that the
output voltage from this configuration is equal to the product of input
voltages xand y, regardless of their signs. Thus, if input xis + 1unit and
input yis —2units, the output will be equal to —2units. Again, if input
xis sin 2rft (afunction of time), and input y is also sin 2rft (the same
function of time), the output will be equal to sin22rft (the square of the
input function).
Next, Figure 7-10 shows adetailed four- quadrant multiplier con-
figuration, with the adjustments required for precise differential input
and equalizing the gains of op amps No. 1and No. 2. Typical signal
multiplications are pictured in Figure 7-11. Thus, when a triangular
waveform is fed to both the xinput and the yinput, the output wave-
form is effectively the function y = x2.This is parabolic waveform as
seen in Figure 7-11(a). Note that the triangular waveform has both

Fig. 7-9 Basic configuration for afour-quadrant multiplier.

138 . SPECIALIZED OP- AMP APPLICATIONS

X nput 1M
Om{,ut

100 560K
0.02 Op
Amp 2 PC;
240K

V+ 100K V —
1.1M 24K 40-0
100K
•—/V.V\
RD

560K

o Op
Amp 3

270

r A/Sr— •

Fig. 7-10 Detailed four-quadrant multiplier configuration.

OV

OV
OV

OV
Al vw
(a) (b)

Fig. 7-11 Examples of waveform multiplications. (

a) Squaring of asawtooth wave-
form; (
13) Squaring of asine waveform.

positive and negative excursions, whereas the parabolic waveform has

positive excursions only. Next, if asine wave is fed to both the xinput
and the y input, the output waveform is effectively the function y -=
sid2rft. This is a double- frequency sine waveform, as seen in Figure
7-11(b). Although the sine waveform has both positive and negative
excursions, the sin 2 waveform has positive excursions only.
It is instructive to observe how an op- amp multiplier can be ap-
 FOUR-QUADRANT MULTIPLIER CONFIGURATION . 139

plied to simulate suppressed- carrier amplitude modulation. An ex-

ample of amplitude modulation is depicted in Figure 7-12. The equa-
tion of the modulated carrier is written:

e = E0(1 + m sin 27rf,t) sin 2rft (7-1)

where E0 is the peak value of the unmodulated carrier

m is the percentage of modulation

f, is the modulating frequency

fis the carrier frequency

When this equation is expanded, it takes the form:

mE 0 mE
s)t — —i--
e = Eosin 2/rft + —2— cos2r(f — f °cos2e(f + f
s)t (
7-2)

Next, if the carrier term is removed, the suppressed- carrier wave-

form will be given by the generalized equation:

1
e= —
1 cos ( x — y) — 2
— cos ( x + y) (7-3)
2

Observe that Equation (7-3) has the equivalent form:

1 1
(sin x)(sin y) = i cos (
x — y) — i (cos x + y) (7-4)

Therefore, the end result of suppressed-carrier amplitude modula-

tion can be obtained by using a four- quadrant op- amp multiplier to
develop the product of (sin x)(sin y). In other words, the waveform sin
2r(f — f a)tis applied to the xinput, and the waveform sin 27r(f + f g)t is

applied to the yinput. Note in passing that an AM waveform from which

the carrier has been removed has an envelope frequency that is double
the envelope frequency of the complete AM waveform. This circum-
stance follows from Equation (7-4), in which asin 2 term appears. With
reference to Figure 7-11(b), it was previously noted that asin 2waveform
has adouble frequency with comparison to the sin waveform. Finally,
Figure 7-13 shows the output waveform that is obtained in simulated
suppressed-carrier modulation of a sine wave with atriangular wave.
Four- quadrant op- amp multipliers are employed in analog com-
puters. In turn, it is instructive to consider the basic characteristics of
140 . SPECIALIZED OP- AMP APPLICATIONS

Audio
modulating t

signal EA

EA= ER
2
for 50%
modulation

\
i d I I EA
I

_
L•-
: 11/

I v____., It III
II I
I II I
I
I,I
It
I
II • I
Pi Emig). ER
I ____L_ 2
Emax = 3EA

Carrier V
Modulated wave

Fig. 7-12 Example of an amplitude-modulated sine wave.

OV

Fig. 7-13 Suppressed-carrier modulation of asine wave with atriangular wave.

analog computation. An analog is also called an analogy or a model.

In particular, an analog computer is aphysical or electronic model of a
mathematical operation or operations. As an illustration, an analog
computer can be employed to solve problems involving Ohm's law or
Newton's law, using the same op- amp configuration. In other words,
Ohm's Law and Newton's law are expressed by similar equations:

E = IR (7-5)

F = MA (7-6)

In turn, with reference to Figure 7-14, an electric circuit described

by Ohm's law is analogous to amoving object described by Newton's
law, and both are analogous to the action of a four- quadrant op- amp
multiplier. These analogies enable us to solve Equations (7-5) and (7-6)
by means of a suitably programmed multiplier. In these applications,
the terms I, R, M, and A may be variables, or some may be constants
and others variables, or all may be variables. In any case, proportional
voltages are applied to the xinput and the yinput of the four- quadrant
op- amp multiplier to obtain the product values of the input voltages. In
practical situations, an analog computer often accepts data from remote
 CHOPPER-STABILIZED OPERATIONAL AMPLIFIERS . 141

Source

Analogous equations

F = MA
E = IR

(a) (c)

Fig. 7-14 Example of analogies. ( a) Acceleration of amass by reaction of aforce;

(b) Motion of electric charge by application of avoltage; (
c) Mathemat-
ical analogs of the foregoing physical systems.

sensors and processes the data to obtain useful answers. As an illustra-

tion, precise aiming of an anti-aircraft gun requires the rapid processing
of data from several sensors.

7. 5 CHOPPER-STABILIZED OPERATIONAL
AMPLIFIERS '

When very low drift op- amp arrangements are required, chopper
stabilization is commonly employed. Basically, chopper stabilization
employs a dc amplifier to amplify ac signals that have been rectified,
and ac signals that have not been rectified. With reference to Figure 7-
142 . SPECIALIZED OP-AMP APPLICATIONS

15, observe that the input signal is separated into two components by a
high-pass filter and a low-pass filter. The high-pass filter comprises
R,C,, and the low-pass filter comprises R2C2.In turn, the output from
the low-pass filter is chopped and thereby changed into an ac signal.
Note that the output from the low-pass filter consists of dc and ac fre-
quencies of afew Hz. The output from the chopper is stepped up by an
op amp, and is then rectified (converted to dc). Next, both the output
from the rectifier or demodulator and the output from the high-pass
filter are stepped up by another op amp.
It can be shown that the drift in the system is reduced by this
chopper technique by the gain of the chopper, first op amp, and de-
modulator. Since this gain can be made quite large, the equivalent input
drift is reduced essentially to that of the chopping device. Various de-
vices are utilized for chopping, such as a light- operated LDR (light-
dependent resistor), a bipolar resistor, or a unipolar resistor. Only an
inverting input is available in a chopper- stabilized amplifier. Al-
though the arrangement is comparatively elaborate and costly, it finds
extensive application in systems that require very high stability.

Cl

Output

Demodulator

DC and LF

(a) (b)

Fig. 7-15 Plan of a chopper-stabilized op amp. (

a) Configuration; (
13) Symbol.

7.6 VARACTOR TYPE OF OP AMP

Another type "chopper" op amp is called avaractor op amp, as

depicted in Figure 7-16. A varactor is areverse- biased diode that oper-
ates as acapacitor. Its junction capacitance depends upon the value of
applied bias voltage. In a varactor op amp, apair of varactor diodes
operate in the arms of an ac bridge which is normally balanced and has
 D1, D2, varactor diodes (varicaps)
G, 100k Hz oscillator
D3, D4, phase sensitive demodulators
D5, blocking varactor
Cl, blocking capacitor

Output

£1,1 ' dWV JO AO 3dAl 21101DVIWA

Fig. 7-16 Plan of avaractor operational amplifier.
144 . SPECIALIZED OP-AMP APPLICATIONS

no output. However, when an input signal is applied to the varactor op

amp, the varactor capacitances become unequal, and the bridge be-
comes unbalanced. In turn, there is an output signal from the bridge
which is amplified and then demodulated to reproduce the original
waveform. The demodulated signal is finally stepped up through adc
amplifier. Note that when the bridge is unbalanced, a100- kHz output
is applied to the phase- sensitive demodulator.
A varactor operational amplifier converts low-frequency and dc
signals to ahigher frequency in the varactor bridge. In turn, amplifica-
tion can be provided at afrequency that introduces minimum transistor
noise. Note that transistor noise is most troublesome at frequencies
below 500 Hz. Since most of the noise in asystem is contributed by the
input stage, it is helpful to employ alow- noise input stage. The input
impedance of the varactor op amp depicted in Figure 7-16 is 10' 4 ohms
—an extremely high value. Note that only anoninverting input is avail-
able. The bias- current demand of the varactor op amp is extremely
small- 0.01 pA in this example. Chopping (switching) action introduces
anoise component called flicker noise. A varactor op amp has consid-
erably less flicker noise than other types of chopper- stabilized op amps.

7.7 BODE PLOTS

Most op- amp arrangements employ negative feedback, and it is

essential that the amplifier operate in astable manner. In other words,
the feedback must be negative over the entire frequency range of the
amplifier. All amplifier configurations have anonlinear phase charac-
teristic, and the phase shift is greatest near the high- frequency limit of
an op amp. It is evident that if the phase shift is excessive at afrequency
for which the amplifier gain is greater than unity, a negative- feed-
back loop can function as apositive- feedback loop and cause the ampli-
fier to oscillate at that frequency. Figure 7-17 exemplifies the frequency
and phase response of aconventional RC-coupled amplifier. Note that
the phase shift is leading at low frequencies, and lagging at high fre-
quencies. Low- frequency lead is caused by the series coupling capaci-
tors. High- frequency lag is caused by the stray and distributed shunt
capacitances in the amplifier. If adirect-coupled amplifier is employed
(such as an op amp), there is zero phase shift at low frequencies; how-
ever, the high- frequency phase shift is the same as in an ac- coupled
amplifier.
If an amplifier has a sharp high- frequency cutoff (rapid roll-off),
its phase characteristic changes more rapidly, or, its phase character-
istic becomes more nonlinear. Since there is adefinite relation between
 BODE PLOTS . 145

10
Relative gain- dB

20 (a)

30

—40
0.01 01 10 10 01 10 10 100

Actual frequency = j.. Actual frequency = f

Frequency for 70.7% point response f1 Frequency for 70.7% point response f2

F
-iP
7 80

40

o (b)

40

80

0.01 01 10 10 01 10 10 100

Actual frequency f Actual frequency _ f

Frequency for 70.7% point response f1 Frequency for 70.7% point response f2

Fig. 7-17 Characteristics of asimple RC-coupled amplifier. (

a) Frequency response
curve; (13) Phase response curve.

the frequency response and the phase response of an amplifier, it fol-

lows that its frequency characteristic shows whether the amplifier will
be stable or unstable under conditions of negative- feedback operation.
This criterion of amplifier stability is called aBode plot or aBode dia-
gram. With reference to Figure 7-17(a), observe that the frequency re-
sponse curve shows dB gain versus frequency. Note also that in the fre-
quency interval from 10 to 100, the gain decreases 20 dB, or 20 dB per
decade. This rate of decrease is the same as 6.4 dB per octave. An octave
means adoubling in frequency, such as 10 to 20, 20 to 40, 40 to 80, and
so on. We will now consider how the attenuation in dB per octave is re-
lated to op- amp stability. This criterion can also be stated as the per-
missible attenuation in dB per decade (afrequency change of 10 to 1).
With reference to Figure 7-18, afrequency response curve is shown
for a typical op amp. This curve indicates amaximum gain of 100 dB,
146 . SPECIALIZED OP- AMP APPLICATIONS

100
— — 3dB

90

80

70

60

50

40

30

20

10

10 100 103 104 10 5 10 6

Frequency, Hz

Fig. 7-18 Frequency response curve for atypical op amp.

with the —3 dB point at 10 Hz, and the 0dB point at 1MHz. The —3dB
point is commonly called the half- power point, and the 0 dB point is
called the unity gain bandwidth. To make aBode plot of this frequency
characteristic, astraight-line approximation is drawn, as shown in Fig-
ure 7-19. Two break points are located. The first break point occurs at
full gain and at the —3dB frequency. The second break point occurs at
the unity-gain (0dB) frequency. A straight line is drawn to connect the
break points. The slope of this line is then noted. In this example, the
gain decreases 100 dB in five decades, or 20 dB in one decade, or 6dB
per octave. Note carefully that the rule for op-amp stability when nega-
tive feedback is used stipulates:

The attenuation slope of the Bode plot

must not exceed 40 dB per decade.

It follows that the Bode plot depicted in Figure 7-19 represents a

stable op- amp frequency characteristic. Many op amps are designed to
have an attenuation slope of approximately 20 dB per decade. Or, an op
amp that is designed with an excessively steep attenuation slope will
have terminals available to which networks can be connected to modify
 AVOIDANCE OF DAMAGE TO OP AMPS . 147

Break
100 Point

90

80

70

60

50
CD

40

30

20

Break
10 Point

lo 100 103 104 10 5 106

Frequency, Hz

Fig. 7-19 A Bode plot for the frequency characteristic depicted in Fig. 7-18.

the attenuation slope. Some op amps are designed with attenuation

slopes of nearly 40 dB per decade. Figure 7-20 shows comparative Bode
plots of 20 dB per decade and 40 dB per decade. With all other things
being equal, an op amp with asteeper attenuation slope will have a
greater power bandwidth or full- power frequency response, as exempli-
fied in Figure 7-21. Thus, using anegative- feedback loop that provides
a30 dB gain with respect to a100 dB open-loop gain, aBode- plot slope
of 20 dB per decade provides apower bandwidth of 30 kHz, whereas a
Bode- plot slope of 40 dB per decade provides apower bandwidth of
180 kHz. In other words, asix- fold increase in power bandwidth is pro-
vided in this particular example, simply by increasing the attenuation
slope from 20 dB per decade to 40 dB per decade.

7 . 8 AVOIDANCE OF DAMAGE TO OP AMPS

Previous mention was made of the susceptibility of op amps to

heat damage. This danger occurs during soldering operations, and can
also occur if the op amp is made to function under overcurrent condi-
148 . SPECIALIZED OP- AMP APPLICATIONS

100

90

80

70

60

-o
50
co

40

30

20

10

10 100 103 10 4 10 5

Frequency, Hz

Fig. 7-20 Bode plots showing slopes of 20 dB and 40 dB per decade.

tions. Damage commonly results from excessive power- supply voltage,

accidental reversal of power- supply polarity, input- stage overloading,
and output- stage overloading. Excessive power- supply voltage causes
breakdown of IC transistor collector-base junctions. Although break-
down may not be destructive in itself, an overcurrent condition arises
which may burn out the transistor or melt the thin leads. Again, ex-
cessive input voltage may break down base- emitter junctions in the
input stage. In case an overcurrent situation occurs, the affected tran-
sistor(s) can be burned out. Damage can be caused by reversal of power-
supply polarity owing to overcurrent flow through junctions that are
normally reverse- biased. Finally, damage can be caused by output- stage
overloading owing to excessive heat dissipation. In other words, an op
amp may be destroyed if its output terminal is accidentally short-cir-
cuited to ground, for example.

REVIEW QUESTIONS

1. What is the difference between pulse-amplitude modulation and other

types of time-division multiplexing?
 AVOIDANCE OF DAMAGE TO OP AMPS . 149

100

90-

80 —

70 —

40 —

30
Closed- loop gain

20 —

ICI — T .

Éj I

4)
'

o
1 10 100 10 3 10 4 10 5 10 6

Frequency, Hz

Fig. 7-21 Comparative power bandwidths for 20 dB and 40 dB slopes.

2. In reference to Fig. 7-4, how would the three output waveforms be dis-
played one above the other on an oscilloscope?
3. What is an analog computer?
4. How does achopper- stabilized amplifier function?
5. What is avaractor diode?
6. What advantage does avaractor chopper have over other chopper ar-
rangements?
7. In an amplifier, is the phase shift leading or lagging at high frequencies?
8. What is the rule for op amp stability when negative feedback is used?
9. What is the relationship between the Bode- plot slope and the power
bandwidth of an op amp?
10. What are some of the possible causes for op amp failure?
8 • Principles of
Negative
Feedback

8 . 1 GENERAL CONSIDERATIONS

It has been shown that negative feedback extends the frequency

range of an op amp and makes its response more uniform. Negative
feedback also makes the amplifier response more nearly linear (reduces
distortion). On the other hand, these benefits are obtained at the cost
of gain. This gain reduction is apparent from the relations shown in
Figure 8-1. In other words, the negative- feedback signal opposes the
input signal and reduces the drive to the amplifier. There are several
methods of utilizing negative feedback. Two of the most basic methods
involve ( 1) voltage feedback and (2) current feedback. Thus, the feed-
back signal is made proportional to the output voltage in some ampli-
fiers, and proportional to the output current in other amplifiers. In volt-
age feedback, the voltage drop across part of the load impedance is
inserted in series with the input- signal voltage, as depicted in Figure
8-2. In current feedback, the current through the load impedance also
flows through the feedback circuit, and the voltage drop across this cir-
cuit is inserted in series with the input- signal voltage, as depicted in
Figure 8-3.
Note that the type of negative feedback that is used affects the
output impedance of the amplifier. As an illustration, the voltage- feed-
back arrangement depicted in Figure 8-2(b) evidently reduces the out-
put impedance of the amplifier because the load resistance RL is shunted
by the resistance of the T pad. On the other hand, the current- feedback
arrangement depicted in Figure 8-3(b) evidently increases the output
impedance of the amplifier because the load resistance RL is connected
in series with the resistance of the T pad. Observe also that the input
resistance of the amplifier is connected in series with the resistance of
the T pad in both Figure 8-2(b) and Figure 8-3(b). These arrangements
increase the input impedance of the amplifier. Next, observe that the
input terminals of the amplifier may be connected in parallel with the

150 .
 GENERAL CONSIDERATIONS . 151

Signal Vi
(less than Vs)

Signal Amplifier Output

Vs Vi

Feedback

Fig. 8-1 Basic principle of negative feedback.

(a) (b)

Fig. 8-2 A basic voltage-feedback arrangement. (

a) Block diagram; (
b) With Tpad
feedback circuit.

(a) (b)

Fig. 8-3 A basic current-feedback arrangement. (

a) Block diagram; (
b) With Tpad
feedback circuit.

T pad, if desired, in either the voltage- feedback or the current- feedback

arrangements, as depicted in Figure 8-4. Therefore, the arrangements in
Figure 8-4 decrease the input impedance of the amplifier.
Note in Figure 8-4 that the output impedance of the amplifier is
decreased in the voltage- feedback arrangement, because RL is shunted
by the resistance of the T pad. On the other hand, the output imped-
ance of the amplifier is increased in the current- feedback arrangement,
because RL is connected in series with the resistance of the T pad. The
1 . PRIN.( In FS OF NEF,ATI‘ F FFEDBM h

(a) (
b)

Fig. 8-4 Other basic negative-feedback arrangements. (a) Voltage feedback, paral-
lel connection to amplifier input; (
b) Current feedback, parallel connec-
tion to amplifier input.

foregoing examples serve to illustrate the fact that anegative- feedback

arrangement can be chosen which will increase the input impedance
and increase the output impedance of an amplifier, or, will decrease the
input impedance and decrease the output impedance, or, will increase the
input impedance and decrease the output impedance, or, will decrease
the input impedance and increase the output impedance. Note that the
arrangement in Figure 8-2 is called aseries- parallel (SP) configuration;
the arrangement in Figure 8-3 is called aseries- series (SS) configura-
tion; the arrangement in Figure 8-4(a) is called aparallel- parallel (PP)
configuration; the arrangement in Figure 8-4(b) is called aparallel- series
(PS) configuration.

8 . 2 BASIC NEGATIVE-FEEDBACK ANALYSIS

Referring to Figure 8-5, an amplifier that has an open-loop voltage

gain of A times develops avoltage Eo across its load in response to an
input voltage E. Note that aportion of the output voltage E0 from across
the load RL is fed back in series with the input source voltage E,. A frac-
tion, p, of the output voltage is fed back in opposing phase to E,. There-
fore, E. is equal to the difference between these two terms, as given by
the equation:

E; = Es — 0E 0 (8-1)

Note that Eo and E;are related by the equation:

Eo = AE ; (8-2)
 BASIC NEGATIVE- FEEDBACK ANALYSIS . 153

o
Amplifier
Es 4
1 - Eo
gain = A

Fig. 8-5 Feedback amplifier arrangement for analysis.

In turn, the system amplification with negative feedback is written:

=A = ° (8-3)
E, E„ -

Since a resistive load is indicated in Figure 8-5, pE o is the same

whether voltage- feedback or current- feedback is utilized. Conversely,
if the load is an impedance, sE owill have both areal (resistive) compo-
nent and an imaginary (reactive) component, and the load-voltage wave-
form will be different from the load-current waveform. As an illustra-
tion, Figure 8-6 shows an impedance load comprising a0.01 ¿.£F .capacitor

and a10 kresistor. The load voltage consists of a1- kHz sine wave with
a3- kHz harmonic, and the voltage waveform has asingle peak. On the
other hand, the load current has adouble peak, although it also consists
of a1- kHz sine wave and a3- kHz harmonic. This change is caused by
phase shift in the load; the third- harmonic current also has arelatively
greater amplitude than the third-harmonic voltage. Therefore, analysis
of negative feedback with impedance loads is comparatively involved.
Note that the T pads depicted in Figures 8-2, 8-3, and 8-4 may be
resistive, or they may have reactive components. In the latter case, the
feedback signal /3E ° will not have the same waveform as Eo.Wave fil-
ters sometimes employ multiloop feedback, and acombination of volt-
age feedback and current feedback may be utilized. This combination
is called bridge feedback. At this point, it is helpful to consider the
equivalent circuit for an op amp (OVA), inasmuch as the schematic dia-
gram for an op amp with negative feedback is simplified in equivalent-
circuit form. While referring to Figure 8-7, recall that the open- loop
and closed-loop gains of the system are given by the equations:

Open- loop Gain = I;

\
\ (8-4)

Closed-loop Gain = (8-5)

As noted previously, these are approximate equations, but are suf-

154 . PRINCIPLES OF NEGATIVE FEEDBACK

1 0.01

z.

10K

(b)

(c)
Fig. 8-6 Example of differing voltage and current waveforms. (
a) Impedance load;
(I)) Voltage across the impedance; (c) Current through the impedance
(voltage across the resistor).

ficiently accurate to be considered as exact in most practical situations.

When a large amount of negative feedback is used, V; becomes very
small, and may often be assumed to be zero for practical purposes. To
repeat an important point, when V. is virtually zero, the input circuit
becomes equivalent to a simplified circuit in which the input compo-
nent is connected to ground, instead of the op amp. Of course, the input
impedance of the amplifier is then virtually equal to the impedance of
the input component. Next, consider the relation between the input
current I. and the feedback current When V. is virtually zero, it fol-
I.

lows that I. and I

f are virtually equal and opposite. Or, expressed as an

equation:

= —I
; (8-6)

In the equivalent circuit to be drawn for an op amp, it will be de-

sirable to employ the variables Vs,4, and Vo.In other words, I f will be
 BASIC NEGATIVE- FEEDBACK ANALYSIS . 155

Zero
f
I

potential

Vo

_t
Fig. 8-7 Op-amp arrangement with negative feedback.

eliminated by substituting its negative equivalent —I i.For purposes of

substitution, it is helpful to change to +I iby reversing the direction

of I, in the equivalent circuit. Then, we may analyze the arrangement

in Figure 8-8 wherein I f has been reversed in direction and its equal

variable I isubstituted. Observe that since the inverting input of the op

amp is at virtually zero potential, we may consider that the feedback

component is connected to ground instead of to the op amp. When these
circuit- action principles are combined, they may be expressed as the
equivalent circuit for an op amp depicted in Figure 8-9. This equivalent
circuit has the advantage that it shows almost at aglance how the sys-
tem behavior will be changed by variation of the feedback- component
characteristics. Note that this equivalent circuit has been derived for a
parallel- parallel (PP) configuration.
It is instructive to observe how the equivalent circuit shown in
Figure 8-9 applies to the analysis of an op-amp integrating circuit. Fig-
ure 8-10 shows abasic integrator configuration and its equivalent cir-
cuit. Assume that astep- function voltage is applied to the input termi-
nals of the equivalent circuit. In turn, aconstant current I iis drawn by

the input circuit. This input circuit is isolated from the output circuit.
The value of I iis equal to EMIR, where Esis the value of the step- function

voltage. Next, the constant current I flows in the output circuit and
charges C to produce alinear ramp waveform. The output voltage is
dropped across C; if aload resistor RL is utilized, the output voltage is
dropped across C and RL operating as an output voltage divider. The
effect of RL is to reduce the output voltage without changing the ramp
waveform. Note that if RL has zero resistance, there will be zero output
voltage.
Next, consider how the equivalent circuit depicted in Figure 8-9
applies to the analysis of an op- amp differentiating circuit. Figure 8-11
shows a basic differentiator configuration and its equivalent circuit.
Assume that astep- function voltage is applied to the input terminals of
the equivalent circuit. In turn, an impulse current I. is drawn by capaci-
156 . PRINCIPLES OF NEGATIVE FEEDBACK

Zero I
i
potential

I
I

Input
Output

Fig. 8-8 Op-amp arrangement revised for obtaining an equivalent circuit.

Fig. 8-9 Equivalent circuit corresponding to Fig. 8-8.

I Ii-
.»
Input Output 4: 'IL

.1

(a) ( b)

Fig. 8-10 Op-amp integrator arrangement. (

a) Configuration; (b) Equivalent cir-
cuit.

tor C. Next, this same impulse current flows in the output circuit and
produces an I,R voltage drop across R. The output voltage is dropped
across R. If a load resistor R1,is utilized, the output voltage is reduced,
because the effective value of R is reduced by RI, operating as an output
voltage divider. Note that if RI,has zero resistance, there will be zero
output voltage. From a practical viewpoint, there is a limit to the volt-
age that can be dropped across R in Figure 8-11, just as there is alimit
to the voltage that can build up across C in Figure 8-10. This limit is
determined by the supply voltage for the op amp.
With reference to Figure 8-10(b), observe that the input impedance
 BASIC NEGATIVE- FEEDBACK ANALYSIS . 157

_— 1

Input Output <, R

Output
R,

(a) (b)

Fig. 8-11 Op-amp differentiator arrangement. (

a) Configuration; (
b) Equivalent
circuit.

of an op- amp integrator is purely resistive, and that the output imped-
ance is purely capacitive. Next, with reference to Figure 8-11(b), observe
that the input impedance of an op- amp differentiator is purely capaci-
tive, and that the output impedance is purely resistive. Consider the
voltage gains provided by these configurations. With reference to Figure
8-10(a), the gain of the integrator arrangement is evidently equal to the
quotient of Xc and R. Thus, the voltage gain is given by the equation:

1
= j2r fC
Gain = (8-7)

This equation states that the input current and the feedback cur-
rent are 90° out of phase with each other, as indicated by the jterm. The
equation also states that the gain is not constant, but is inversely pro-
portional to frequency. Thus, this is a simple example of the fact that
analysis of op- amp response with areactive negative-feedback loop is
comparatively involved. However, it is evident from the general form
of Equation (8-7) that when the frequency is very low, the gain will be
very high, inasmuch as the reactance of C will be very high and very
little negative feedback will occur. On the other hand, when the fre-
quency is very high, the gain will be very low, inasmuch as the reac-
tance of C will be very small, and avery large amount of negative feed-
back will occur.
Next, referring to Figure 8-11(a), the gain of the differentiator
arrangement is evidently equal to the quotient of R and X. Thus, the
voltage gain is given by the equation:

Gain --r (8-8)

1
j2r fC
158 . PRINCIPLES OF NEGATIVE FEEDBACK

Note that the jreference is different in Equation (8-8), compared

with Equation (8-7). In other words, the jterm in Equation (8-8) does
not involve the feedback loop of the op amp. Instead, the jterm states
that there is a90° phase difference between the driving voltage and the
input current. There is no phase shift in the feedback loop. Neverthe-
less, the gain analysis remains comparatively involved. It is evident
from the general form of Equation (8-8) that the gain is directly pro-
portional to frequency, and that when the frequency is very low, the
gain will be very low. On the other hand, when the frequency is very
high, the gain will be very high.

8.3 EQUIVALENT CIRCUIT FOR

OP-AMP LOW-PASS FILTER

It is instructive to observe the equivalent circuit for the basic low-

pass filter arrangement shown in Figure 8-12. Note that the output por-
tion of the equivalent circuit is the same as that for an op- amp integrator,
and that the input portion comprises aT- section low-pass RC filter with
its output terminal connected to ground. This T section has the same

Active filter

Passive filter

Input

RL

Ii-
Output 4
4> RL

(b)

Fig. 8-12 Basic low-pass op-amp filter arrangement. (a) Configuration; (

b) Equiv-
alent circuit.
 EQUIVALENT CIRCUIT FOR OP-AMP LOW-PASS FILTER . 159

frequency response as an L section, and is functionally aloaded L sec-

tion. Loading of an L section reduces the output voltage without chang-
ing its frequency response. In turn, the frequency characteristic of the
T section is given by the universal frequency- response chart depicted
in Figure 8-13. Effectively the T section and the op- amp integrator are
cascaded. In turn, the output from the first low-pass filter is multiplied
by the output from the second low-pass filter. The result is to produce a
sharper filter cutoff characteristic than can be provided by the passive
filter alone, or by the active filter alone. As an illustration, Figure 8-14
shows how the cutoff characteristic is sharpened when two identical
low-pass sections are operated in cascade.

100

80
Frequency
response
% of maximum output

60
Equivalent circuit

40

20

O
001 0.02 0.04 01 0.2 0.4 1.0 20 40 10

c,RC units

Fig. 8-13 Universal RC frequency- response chart for an L- section low-pass filter.

1.0

0.8

0.4

0.2

o
10 100 1,000 10,000

Fig. 8-14 Comparative one- section and two- section cutoff characteristics.
160 . PRINCIPLES OF NEGATIVE FEEDBACK

8 . 4 EQUIVALENT CIRCUIT FOR

OP-AMP HIGH-PASS FILTER

A basic op- amp high-pass filter arrangement and its equivalent

circuit are shown in Figure 8-15. This configuration comprises apassive
RC filter section and an amplifier. In turn, the frequency characteristic
is determined by the RC section, and the op amp merely steps up the
output amplitude from the filter. Note that the series resistor R, is in-
cluded to limit the gain at high frequencies. This is apractical require-
ment for system stability. To understand this requirement, consider
the basic differentiator arrangement and its Bode plot, pictured in Fig-
ure 8-16. As would be anticipated, the Bode plot for adifferentiator is
not as simple as the Bode plot for abasic amplifier, because of the input
capacitive reactance. At low frequencies, the capacitive reactance is
large, and at zero frequency (dc) the capacitive reactance is infinite.
Observe that the Bode plot must intersect the unity- gain (0dB) axis at
the frequency where Xc = R. As the operating frequency increases, Xc
decreases and the gain increases at approximately 6 dB per octave.
(Refer to Table 8-1).
Because of limitations in op- amp characteristics, the gain cannot
increase indefinitely as the frequency increases. However, since the

Amplifier

Passive
filter
Rs

(I))
Fig. 8-15 Basic op-amp high-pass filter arrangement. (
a) Configuration; (
b) Equiv-
alent circuit.
 EQUIVALENT CIRCUIT FOR OP- AMP HIGH-PASS FILTER . 161

lal

100

frequency

80

60
Transition point

2n RC 12dB
per octave

20

Xc = R

10 100 1K 10K 100K 1M

Frequency-.

(b)

Fig. 8-16 Basic differentiator arrangement. (

a) Configuration; (b) Bode plot

configuration has maximum gain at its highest response frequency,

random noise is aserious problem in the basic arrangement. Therefore,
it is desirable to limit the gain more or less at the high- frequency end.
Even more serious from apractical viewpoint is that the rate of closure
on the Bode plot is approximately 12 dB per octave, as indicated in Fig-
ure 8-16. In turn, the op amp is unstable in the basic configuration, and
it is necessary to employ some means of reducing the rate of closure.
One useful method is to insert an input " stop" resistor, as depicted in
Figure 8-17. As the operating frequency is increased, Xc decreases, and
162 . PRINCIPLES OF NEGATIVE FEEDBACK
TABLE 8-1
Reactance Chart

10M

w>4MMw>4
smweenw
>I 14e

1M
ieu .aurrdenetemdcww.l.
S A AWL 4dMMee
'1,10er1411r

100K
regwa. Inetymoreelne
r Iir dfflOW
1Wfflgqir

10K
ti441LAILAit
e jMdg i ell
're rVWF \ WI Iv. er
MMIIL.SL Atil.ASMS
1K
reztsgeleumegw- ItilireMne

wek4e4e4e
1Wr • 1p4r lwr

A‘Are4À
100
reUnKegelygpiiqezterIep
MORN& lininAl
,
10

lei ,WWNNOIN

LA. Ak..ILI‘Lek.A.-,à
I"R l'F1O'‘ORMR&IR
01
10
/e1 '
100
4WeMeMe
1K 10K 100K 1M 10M

Frequency ( Hz)

agreater proportion of the input voltage is dropped across the " stop"
resistor. In turn, the top of the Bode plot becomes truncated, as shown
in Figure 8-17, and the rate of closure is reduced to within stable limits.
To recapitulate, this is the reason for including R, in Figure 8-15(a).
Next, observe that the high- frequency gain of a basic differen-
tiator can also be reduced by employing acapacitor in shunt to the nega-
tive- feedback resistor, as shown in Figure 8-18. This is called a "stop"
capacitor. Thus, the configuration utilizes a "double stop". The chief
advantage of a " double stop" is improved noise rejection. On the other
hand, high- frequency gain is further reduced, so that differentiating
action is proportionally degraded. Because one slope change occurs
with respect to the input circuit, and the other slope change occurs with
respect to the negative-feedback circuit, the rate of closure in Figure
8-18(b) is actually 6 dB, and not 12 dB per octave, as would appear at
first glance.
 BODE PLOT FOR OP- AMP INTEGATOR . 163

(a)

•
•
dB voltage gain ___.....

6dB
per octave

10 100 1K 10K 1001( 1M

Frequency --.

lb)

Fig. 8-17 Basic differentiator arrangement with "stop" resistor. (a)Configuration;

(b) Bode plot.

8.5 BODE PLOT FOR OP-AMP INTEGRATOR

At this point, it is instructive to consider the Bode plot for abasic

op- amp integrator; the plot is very informative in evaluating the low-
pass characteristics of low-pass filter action. With reference to Figure
8-19, aBode plot is first drawn for the op amp alone, as depicted by the
dotted lines. Then, the frequency is calculated at which the reactance of
164 . PRINCIPLES OF NEGATIVE FEEDBACK

Cs

Rs

IllpLlt

100

•
80 •
•
•
•
•
dB voltage gain--1-

•
•
60 •
•
•
•
•
•
•
40 •
•
Xc = Rs
Xcs R ••
•
•

20
•
•
• \

10 100 1K 10K 100K 1M

Frequency --"-

(b)

Fig. 8-18 Basic differentiator with "double stop". (a) Configuration; (

b) Bode
plot.

the negative- feedback capacitor is equal to the input resistance. A line

is then drawn through this frequency, parallel with the first Bode plot
line. The second Bode plot line defines the frequency response of the
integrator configuration. Note that the low- frequency gain is limited
only by the capability of the op amp. Therefore, operating difficulties
will arise in practice. As an illustration, any small dc offset voltage would
 BODE PLOT FOR OP- AMP INTEGATOR . 165

100

80
•

20

10 100 1K 10K 100K 1M

Frequency

(D)

Fig. 8-19 Bode plot for the basic op-amp differentiator. (

a) Configuration; (
b) Con-
struction of plot.

be integrated by the configuration depicted in Figure 8-19, and the in-

tegrator would ramp up or down until it went into saturation. More-
over, if there is a residual charge on the negative- feedback capacitor
when the op amp is turned on, aheavy current could flow that would
destroy the op amp. The solution to both difficulties is to shunt the
negative- feedback capacitor with aresistor, as depicted in Figure 8-20.
Observe in Figure 8-20 that Rs operates as a negative- feedback
stabilizing resistor, and Ro operates as an offset-voltage balancing re-
166 . PRINCIPLES OF NEGATIVE FEEDBACK

0.1pF

la)

Effect of \
Rs

10 100 1K 10K 100K 1M

Frequency

(D)

Fig. 8-20 Practical op-amp integrator with negative-feedback stabilizing resistor.

(a) Configuration; (b) Bode plot.

sistor, as explained previously. Another stabilization factor in any

op- amp arrangement that employs negative feedback is the effect of
capacitive loading across the output terminals. Thus far, we have con-
sidered resistive loading only. When aresistive load is shunted by ca-
pacitance, the load voltage becomes shifted in phase, and this phase
 OP- AMP OUTPUT IMPEDANCE AND PP NEGATIVE FEEDBACK . 167

shift is a function of frequency. Since the negative- feedback voltage

source is the load voltage, the negative- feedback characteristic then
becomes a function of frequency, and high- frequency peaking occurs
as depicted in Figure 8-21. In turn, the slope of the open- loop response
is increased, and if the rate of closure approaches 12 dB per octave, the
system may break into oscillation. Therefore, the output load for an op
amp must not have acapacitive component sufficiently large that sys-
tem operation is disturbed.

8.6 OP-AMP OUTPUT IMPEDANCE AND

PP NEGATIVE FEEDBACK

Op amps are rated for open-loop output impedance, ranging from

approximately 3ohms to 1000 ohms. Most op amps have an open- loop
output impedance in the vicinity of 150 ohms. However, when negative
feedback is employed, the effective output impedance of the op amp
becomes considerably less, and in most applications the effective out-
put impedance will be less than one ohm. The lowest effective output
impedance is obtained when maximum negative feedback is used.
Thus, the voltage- follower configuration provides the lowest output
impedance. With reference to the voltage-follower arrangement shown
in Figure 8-22, the effective output impedance may be determined as
follows. Suppose that the load demand is increased by asmall amount
LII L.In turn, the amplifier output voltage e0 must increase by a small
amount AI LZ„,, where Z., is the rated open- loop output impedance of
the op amp. This change in output voltage corresponds to achange of
input voltage between the op- amp input terminals given by the equa-
tion:

AE Í= (8-9)
A

where A is the open- loop gain of the op amp.

With reference to Figure 8-22, since the output terminal is con-
nected to the inverting- input terminal of the op amp, it follows that E0
must decrease by Ae i.In turn, the effective output impedance is given
by the equation:

tiE„ _ AE 0 Zout _ Zout

(8-10)
= ,
dtIL A 3.e. A

As an illustration of the application of Equation (8-10), if the op

amp is rated for an open-loop output impedance of 150 ohms, and an
168 . PRINCIPLES OF NEGATIVE FEEDBACK

100

-•
80
•
• Peak from heavy
• capacitive loading
•
•
60
Peak from light
‘• capacitive loading
•

40

20

10 100 1K 10K 100K 1M

(b)

Fig. 8-21 Effect of capacitive loading across op-amp output terminals. ( a) Basic
negative-feedback configuration; ( 13) Bode plot modification produced
by capacitive loading.

open- loop gain of 20,000, its effective output impedance will be 0.0075
ohms in the voltage- follower configuration.

8 . 7 CONSTANT GAIN- BANDWIDTH

PRODUCT

The gain- bandwidth product of an op- amp was previously de-

fined as the frequency at which the open- loop gain is equal to unity,
or 0 dB. As an illustration, the gain- bandwidth product depicted by
 CONSTANT GAIN- BANDWIDTH PRODUCT. 169

Zout
Zeoi
Fo
Et

Fig. 8-22 Op-amp output impedance is decreased by PP negative feedback.

Voltage gain
equals 100,000
100

80

Voltage gain
"'equals 1,000
60

20c18 per
40 decade

Voltage gain
20 equals 10

Voltage gain
equals unity

10 100 1K 10K 100K 1M

Frequency

Fig. 8-23 Example of constant gain-bandwidth product ( 10 6).

the Bode plot in Figure 8-23 is 106.Next, observe that the gain- band-
width product of an op amp may be a constant for any value of full-
power closed- loop gain. The gain- bandwidth product will be constant
if the slope of the Bode plot is 20 dB per decade, as exemplified in Figure
8-23. Two values of negative feedback are depicted, which reduce the
open- loop gain to 60 dB and 20 dB, respectively. At 60 dB gain, the full-
power bandwidth is 1kHz, and the corresponding product of voltage
gain and frequency is 106.Next, at 20 dB gain, the full- power bandwidth
is 100 kHz, and the corresponding product of voltage gain and fre-
170 . PRINCIPLES OF NEGATIVE FEEDBACK

quency is 106.In other words, the gain- bandwidth product is aconstant,

provided that the slope of the Bode plot is 20 dB per decade, as is often
the case with operational amplifiers.

REVIEW QUESTIONS

1. What are the two basic methods of developing negative feedback?

2. How is voltage feedback developed?
3. What are the effects of voltage feedback?
4. What are the effects of current feedback?
5. Draw adiagram of each of the following circuits for feedback in an op
amp: series- parallel, series-series, parallel- parallel, and parallel-series.
6. What is the gain of an op amp when the output voltage with output
feedback is 1 mV, the input voltage is 10 µV and the feedback factor
is . 01?
7. What is the form of the input and output impedances of an integrator?
8. What is the form of the input and output impedances of adifferentiator?
9. What is the effect when two low-pass filters are operated in cascade?
10. What is the reason for resistor Rs in Fig. 8-15(a)?
11. What is the advantage of the "double stop" arrangement in Fig. 8-18?
12. What is the effect of excessive capacitive load across the output of an
op amp employing negative feedback?
13. What is the typical open- loop output impedance of an op amp?
14. Which circuit configuration gives the lowest output impedance?
ANSWERS TO REVIEW QUESTIONS

CHAPTER 1

1. differential
2. offset
3. special case of noninverting amplifier in which the gain is unity
4. Common mode— signal voltages are cancelled out.
5. by use of external phase-shift compensating networks
6. an overdriven amplifier
7. It causes amuch sharper cutoff frequency characteristic.
8. vs is the input signal
yo is the output signal
Vo/V i-= open loop gain
Vo/Vs= closed loop gain
f
o =- cutoff frequency

9. 159 Hz
10. ( a) no insertion loss
(b) op amp acts as abuffer
(c) lower output Z
11. 100 kHz
12. astate-variable filter
13. Its frequency and selectivity can be adjusted and it provides a very
sharp cutoff characteristic.
14. 159 kHz
15. Capacitors fail more often than resistors.
16. leaky capacitors, resistors off value, low ac voltages, cold solder joints,
cracked circuit board and defective op amp

.171
172 . ANSWERS

CHAPTER 2

1. linear— the output varies directly with input

nonlinear— the output does not vary directly with input
2. constant current sink
3. input R = 10k ohms
output R = 10 ohms
4. Offset is no problem when negative feedback is not used.
5. The voltages must be the same polarity; with ac the inputs must have
the same frequency and phase.
6. The frequency must not exceed the rated frequency of the op amp.
7. 101
8. practically equal to Ri
9. less than one megohm to several hundred megohms
10. R. of the circuit will be less than the output Rof the op amp itself.
11. the power supply
12. When the inverting amplifier goes into saturation, supplying negative
feedback that acts as positive feedback to hold the input stage in satu-
ration.
13. An excessive offset voltage is developed.
14. The op amp has greater gain than ajunction transistor.
15. an amplifier that amplifies the difference between two signals
16. 2millivolts
17. to prevent circuit loading
18. to prevent turning on the junctions of the op amp, thereby giving alow
reading
19. the maximum rate of change to an input signal that suddenly changes
from amaximum positive value to amaximum negative value

CHAPTER 3

1. the voltage induced in an inductor that opposes any change of current

in the inductor
2. Current lags the voltage by 90°.
3. Current leads the voltage by 90°.
 ANSWERS . 173

4. anetwork for simulation of inductance

5. oscillations
6. 10,000 Henrys
7. one that has two inputs and one output
8. in high-pass active filters
9. in low-pass active filters
10. Less current flows as the voltage is increased.
11. 200 µF
12. (a) open- loop DC voltage gain
(b) open- loop gain stability versus temperature
(c) open- loop gain stability versus supply voltage
(d) open- loop input Z
(e) open- loop output Z
(f) maximum output capacity
(g) open- loop bandwidth

CHAPTER 4

1. to act as an amplifier; to act as an integrator

2. as a current-balancing circuit to prevent an output due to input offset
current
3. acurrent differencing input stage to cause abalancing current
4. diode Dll
5. acurrent-operated device
6. used in fuel injectors, anti-skid controls, and speed controls
7. See Fig. 4-17.
8. . 5µvolts
9. See Fig. 4-17.
10. (a) input offset voltage (see formula 4-2)
(b) input voltage versus drift temperature (see formula 4-3)
(c) input voltage drift versus supply (see formula 4-4)
(d) input voltage drift versus time (see formula 4-5)
(e) input noise (see formula 4-6)
(f) input current offset (see formula 4-7)
(g) input current drift versus temperature (see formula 4-8)
(h) input current drift versus supply (see formula 4-9)
174 . ANSWERS

CHAPTER 5

1. frequency selection
2. 10 kHz

3. positive feedback and phase

4. the thermal lag of the bulb
5. 12.98 kHz
6. 1kHz
7. the op amp slew rate
8. the time constant of R3C1
9. the slew rate of the op amp
10. 0.5 volt per microsecond
àVout
11. drift =
10 meg
12. —3 dB
13. see Fig. 5-20 or 5-21
14. 8.66µsec
15. the op amp is loaded with acapacitor decade box until unstable opera-
tion occurs.
16. Z,„ = 9R,
17. see Fig. 5-22.

CHAPTER 6

1. 1,000 or 60 dB voltage gain

2. the gain increases steadily.
3. greater negative feedback, greater bandwidth
4. decreases the bandwidth
5. 100 mW to 750 mW
6. to prevent a peak at around 4.5 MHz
7. stray capacitance in the structure of the op amp

Vote — Zf
8.
Vin Zr
 ANSWERS . 175

9. acircuit that combines and amplifies two or more input signals

10. reducing the signals to aspecified fraction of their original value
11. The 30-volt supply voltage adds to both the inverting-output and the
noninverting-output section.
12. as an agc amplifier
13. increase the input Z
14. PNP has poorer frequency response.
15. Don't bend the leads too tight and don't overheat when soldering.

CHAPTER 7

1. PAM is analog and others are digital.

2. by adding dc voltages of different values
3. an electronic model of amathematical model
4. The dc signal is chopped to develop pulses that are proportional to the
dc signal, which can then be operated on as if it were an ac signal. This
limits dc drift.
5. a reverse biased diode that operates as avoltage controlled capacitor
6. less flicker noise
7. lagging
8. The attenuation slope of the Bode- plot must not exceed 40 dB per dec-
ade.
9. Decreasing the attenuation slope decreases the power bandwidth factor.
10, excess heat, power supply polarity reversal, excessive supply voltage,
shorted output, output stage overloading and input stage overloading

CHAPTER 8

1. current feedback and voltage feedback

2. Voltage drop across part of the load impedance is inserted in series with
the input-signal voltage.
3. decreased gain, increased bandwidth, decreased output Z and de-
creased or increased input Z.
176 . ANSWERS

4. decreased gain, increased bandwidth, increased output Z, and in-

creased input Z.
5. See Fig. 8-2,8-3,8-4a and 8-4b respectively.
6. A = 50. Note that beta is negative.
7. input purely capacitive and output purely resistive
8. input resistive and output purely capacitive
9. asharper cutoff characteristic
10. Rs is astop resistor used to provide stability to the circuit.
11. to provide stability and improve noise rejection
12. oscillation
13. 150 ohms
14. avoltage follower
APPENDIX A
Low- Power Triple Operational
Amplifier Integrated Circuit

FOR INVERTING AMPLIFIERS, VOLTAGE COMPARATORS, LOW- DRIFT SAMPLE-AND-HOLD

CIRCUITS, ACTIVE FILTERS, BATTERY-POWERED CIRCUITS

• External Control of Supply Current and Output Drive

• Operation with ± I.5 V to ± 15 V Power Supplies
• 80 dB Gain with 20 Id/ Load
• ± 30 V Differential Input Voltage Range
• Drives Large Capacitive Loads (> 1,000 pF)
• Internally-Compensated
• Continuous Short-Circuit Protection
• monolithic Construction
• Slew Rate 0.4 V/psec Typical

The LI44 is amonolithic low-power triple operational amplifier stabilized for all feedback configurations and capacitive loads
by internal gain compensation. Low power requirements permit high voltage operation across the rated temperature range, as
well as battery operation from ± I.5 V.

.179
180 . APPENDIX A

ABSOLUTE MAXIMUM RATINGS

Supply Voltage ± 18 V • For supply voltages <± 18 V, maximum input voltage
Differential Input Voltage ±30 V is equal to the supply voltage.
Input Voltage* (A Suffix) ± 18 V •• Continuous short circuit is allowed for case tempera-
(C Suffix) ± 15 V tures to + I25°C and ambient temperature to + 70°C.
Output Short Circuit Duration** Indefinite
Operating Temperature Range -55 to 125 °C *** All leads welded or soldered to PC board. Derate
Storage Temperature Range -65 to 160°C 10 mW/ °C for TO-86, 16 mWrC for TO- 116 above
Lead Temperature (Soldering, 60 Sec) 300°C +70°C, and 6.3 mW/ °C above 25 °C for plastic DIP.
Power Dissipation••• (T0-86) 750 mW
(T0-116) 1200 mW
Plastic DIP 470 mW

ELECTRICAL CHARACTERISTICS
All DC parameters are 100% tested at 25 °C. Lots are sampled-tested for AC parameters, high and low temperature limits, to
assure conformance with specifications.

Test Conditions (Unless Other-

L144A/B LI44C
wise Noted)
Characteristic 25 °C Unit
-See 125°0 0°C 25 °C 70°C Vs = il5 V, Rt, = 20 k3.1.,
-25°c 85°C
Fts ET -. 3MIP Pin Ito Pin 14

I i
np ,, i 00pu Max 6 5 6 10
— VOS mV Rs < so Ks-2
2 Voltage
TYP I 4 2 4
I
3 Input Offset Max 50 70
__ N
los Current
4 P lYP 2 5
nA
U
5 Max 200 200 250 250
IBM' Input Bias
— 6' T Current
Typ 100 125

7 Min ±10 ±10

—
Output Voltage
8 0 VOW. swing
TYP ±14 V
— 7 U
TYP 30.5 b3.4 Vs = ± 1,5 V, RsET . 120 l(S/
T
10 p Output Short Max 15
Circuit Current mA Hi, = 0
—11 U ISC TYP 1.5
T
12 TYP 17 12 12 12 12 12
DC Voltage
— AVOL 0,
0n V/mV
13 min 3.0 3.0 3.0 1.0 1.0 1.0

14
--- Sr Slew Rate TYP 0.4 0.4 V/psec
15
D
16
y Unity Gain
0.4 0.4 MHz
TYP
17 N Bandwidth
A
18 Crosstalk lYP -100 -100 f. 100 Hz
M
19 1 Min
CMRR Common Mode 80 70
C Rejection Ratio T yp
dB VIM= il2 V
—20
90 ao
21
— S PSRR Power Supply Min 80 go
22 0 Rejection Ratio
TYP 90 90

23 P Is Supply Current Max 350 400 MA Unity Gain VIN. = 0on all amps

•ICC is adjustable. See typical characteristics. CMAC

 APPENDIX A . 181

TYPICAL CHARACTERISTICS
Open Loop Gain Gain Bandwidth Product
vs Frequency vs Supply Current
1.2
100 • 16 V
SET MI
•77 MVRMS

g 00

g0.
0.4

à
1
0.2

103 11( 1014 1001 10001 10 rA 100pA 1mA 10 RA

10
FREQUENCY Uhl lee

Open Loop Gain DC Open Loop Gain

Slew Rate vs
vs Temperature vs Supp yCurrent
Supply Current
100
10 100

oo
Mud MI111 =MUM
1•1111111111•111 WM

.
o
e 70

5at
eo
rarliiarMEME
.01 11111111111111.1111111111 so so
10 100 1000 -60 20 20 60 100 140 10.A 1000A 1mA

lsupp y 1.461 TEMPERATURE CC) CC

Supply Cu rent vs Set Input Bias Current vs Supply Current

Resistor and Supply Voltage Supp yCurrent vs Temperature
320
10

200
IMMMIIMIIM•1111111MMM•181 .
î
mweioni
240

Mann'
200

100 1A e 100 .
3 100

. =Zeir;.•==.70.1:;;;1
MIM111,,.100•101•••1 120

210,,A d11111 eo
2
WARM 40

1111111 MI1111111 0
o .e .10 . 10 • 18 lO 100 1000 -60 -20 20 00 100 140

SUPPLY VOLTAGE IV) TEMPERATURE PCI

ISuiger 6.e)

Voltage Follower Small Signal

Pulse Response
182 . APPENDIX A

APPLICATIONS Active Filter

Instrumentation Amplifier

Ice.
O. ad

' •••.- vbc

Ot.
••v • 'Ill v.11.1 OM • • ...V

Double-Ended Limit Comparator

Precision Phase Splitter V. 10V

PD Tid.•

.010 • ..01O

500 Hz Tone Detector

meow. ne Co1.111/ IWO«

III V
Ode'

MO
r:
SdA

14.1 Yee

ma- -lc-
.

V 'Z •OO
WI.

WON

eee • el. ce

MECHANICAL DATA
•eY

dr, - f- tree

I-

1118

¡Wi

teen Meià) L. «me mewled •••••••••......... 0 \

1
,241,
TO-86 TO- 118
-4-
AL. 0.111PM010.• MO« t
L144AL, BL L144AP, BP, CJ
APPENDIX B
Micro- Power
Triple Op Amp

Marvin K. Vander Kooi

INTRODUCTION supplies ranging from ± I8 V to as low as ± I.5 V with quies-

The LI44 is amonolithic triple operational amplifier circuit cent supply currents of from 10 µA to greater than ImA
with an external programming feature for power dissipation independent of supply voltage. The schematic shown in
and input bias current control. It finds application in RC Figure 1reveals ageneral-purpose PNP input transistor op
active filters, instrumentation amplifiers, micro-power com- amp with an outstanding difference. The master bias cur-
parators, and numerous general signal processing circuits. rent is not set by an internal resistor strung from V+ to V—,
The LI 44 is a practical industry standard op amp wher- but isbrought out to an external pin. This allows the user to
ever low current drain, low voltage, low power, or very determine the operating currents of each stage through a
small physical size are the controlling criteria. system of current mirrors. Of special interest to the designer
are the equal collector currents of Qt and 02, which are de-
This Application Note describes the LI44, how to program rived from the output of Q. These collector currents,
it, what the effects of slew rate limiting are, and some prac- divided by abeta of approximately 50, determine the input
tical circuit applications. bias currents for each amplifier. The ratio between the set
current and the collector current of Q4 is unity, which al-
The LI44 has three operational amplifiers programmed by lows one to program the input bias current simply by chang-
one external current setting resistor. It operates from power ing the set current input of the device.

1973 by Siliconix incorporated

.183
184 . APPENDIX B

Input Bias Current and Supply Current Frequency Response

The relationship between supply current, supply voltage. At the data sheet standard supply current of 250 µA the
and the setting resistor is shown in the graph and set current typical Bode plot is as shown in Figure 4. The low fre—
model of Figure 2. The two diodes of the set current model quency gain of approximately 85 dB rolls into auniform
correspond to the base-emitter junctions of Qi6 and 017. -20-dB/decade slope until after the 0dB unity gain crossing
point. The variation of open loop gain with temperature is
typically minus 3 dB per 100°C of temperature rise. The
400 kHz unity gain crossover gives again bandwidth pro-

100
0 5E1 • 3Mu

Vs • 15 V
so
1
a

OPEN LOOP GAIN

• •—

[ ., ., .,,[,[1 • • ,.[[[ ill ,. , .[[ [ I [ [

10 100 IK 10« 100E 1000K

FREQUENCY DUI

L144 Open Loop Gain vs Frequency

Figure 4

duct ( GBWP) of 400.000. Figure 5shows the variation of

GBWP with supply current.

1.2
Vs - 15 V
VN 77 KIVRIAS

Figure 3 shows the essentially linear relationship between 0.8

input bias current and total quiescent supply current for

the LI44. The low input bias currents at low supply current
g es

levels allow the LI44 to maintain good input specifications «.> 0.4
even with the large feedback and load resistor values nor-
mally encountered in micro-power applications. e2

10 ” A 10001 IinA 10 enA

1000 'CC

1144 Gain Bandwidth Product vs Supply Current

fflaBMIIIIIMIIB11111111110.: , Figure 5
MIMBUIIIIMMUM5:11
..3111111111111113%11111 The vertical axis is linear whereas the horizontal Icc axis is
logarithmic, demonstrating that the GBWP does vary with
:re 'CC, but at much less than the I- to- Iratio observed for
a.. inzInm other parameters.
ffl1111B11111.5 MIMBBIIII
MVP.%d1111111MMIIIIMIIIII
Slew Rate

10
211111111311111111
100 1000
Slew rate is almost adirect function of supply current as
shown in Figure 6. This follows from the fact that slew rate
limiting is actually caused by the finite limits of the inter-
nal current sources ( which charge and discharge the second
Input Bias Current vs Supply Current stage compensation capacitor) varying with the externally-
Fie.., 3
determined set current. An amplifier output changes from
the small signal response shown on the Bode plot to aslew-
The slightly lower input bias currents at the higher supply rate-limited response when the rate of change of the out-
voltages are due to the narrower base width and higher beta put voltage exceeds the rate of change determined by slew
encountered at Vs = ± I5 V. rate limit of the amplifier. Since the maximum rate of
 APPENDIX B . 185

10
V is. 1SV

I V.

01
10 100 1000

'SUPPLY

Slew Rate Limits vs Supply Current

Figure 6

change of asine wave is afunction of peak amplitude it is 1144 Instrumentation Amplifier

Figure 8
possible to trade maximum frequency for peak signal ampli-
tude when operating at low power dissipation levels. Figure
7 shows the derivation Iof an equation relating slew rate
The first stage provides all of the gain while the second stage
is used to provide common mode rejection and double-
ended to single-ended conversion. The resistor RI deter-
mines the gain of the circuit according to the equation:

2117
AV = I + Ri

The reference point at the base of R7 can be used to deter-

mine the quiescent output voltage when there is no differen-
v • 1Sv tial input voltage. This provides an easy single point to zero
VOUT = Vonk on 2 "j1 any net offset voltage ( typically 0.45 mV referred to input)
dy_Qui and/or to insert atrim resistor to improve common mode
= 2-1 cos 2. 1,
rejection ratio (CMRR). The CMRR depends heavily on the
d±/Qint
. V 2 match between R4/R6 and R5/R7 and can be nulled if R7
d1 I V."
s0 is broken into a resistor and asmall-value trim potentio-
meter. Figure 9 shows the voltage gain and CMRR versus
s, cM&L

di
Vp..k 2- 1„„„ frequency for atypical instrumentation amplifier.The upper
curve shows acalculated CMRR referred to input. The fall-
'supply = 1320ii A. 5, 15 VO, sec ISUPPLY = 50,A. S, . 015 Vh.soc
off and final rise in CMRR is due to the mismatch in gain
PD = 24 mbV, Vu= 10 V po = 1.8 m181. Vp .i. 1V
rolloff between amplifiers in the first stage followed by a
- 24 kHz
falloff in gain and consequent increase in rejection of the
- 24 kHz
2-
second stage.
Slew Rate Limiting
Figure 7

I!
110 OALCut coca Cososs11.1

Sr,sine wave amplitude VpEAK, and frequency. The zero 100

crossing of asine wave is the point of maximum rate of

change as shown after the derivative is taken and maximized.
In both of the examples shown the maximum undistorted
operating frequency is kept constant while juggling power
dissipation, slew rate, and peak amplitude in an engineering
tradeoff.

Instrumentation Amplifier
Figure 8shows asingle L144 chip used to construct athree- 10

amplifier classical instrumentation amplifier. The entire cir-

10 100 18 108 15/
cuit consumes only 135pW of power from a ± I.5 V power
FREOUFNCV
supply. With again of 101 the instrumentation amplifier is
ideal in sensor interface and biomedical preamplifier appli- Common Mode Rejection Ratio and Gain vs Frequency
Figure 9
cations.
186 . APPENDIX B

BANDPASS FILTER DETECTOR SCHMITT TRIGGER

o 0 3E1

,„ ,„ 1606

II
VRE IX

SV
I It 1/3

I
P.:91.1

••••••

ISV
-03_ I-
60

e
.Son,4

Tone Detector Circuit

Figure 10

Tone Detector
In the example shown in Figure 10 the chosen value of k = 2
Another example of asingle LI44 providing the amplifiers and the passive components used resulted in ameasured Q
for an entire system is shown in Figure 10.This tone detector (121) which was much greater than the expected 25. Re-
circuit is made up of a two-amplifier multiple feedback ducing the value of R8 caused the Q to decrease to the cal-
bandpass filter followed by an AC- to- DC detector section culated value. ( For lower component sensitivities use the 3-
and a Schmitt Trigger. The bandpass filter ( with aQ of amplifier active filter shown in Figure 12). The center fre-
greater than 100) passes only 500 Hz inputs which are in quency of 498.4 Hz and H. of 9.226 were close to the cal-
turn rectified by DI and filtered by R9 and CA. This fil- culated values of 500 Hz and 10.
tering action in combination with the trigger level of 5V
for the Schmitt device insures that at least 55 cycles of The detector RC was designed to have a 3dB down fre-
500 Hz input must be present before the output will react quency of:
to atone input. The actual integrating capacitor waveform
f.
shown in Figure II was taken with a Ivolt peak 500 Hz f3dB = 7 00— (10)
sine wave input, The ratio between capacitor CA charge and
discharge is I: II, due to resistors R9 and RI 0-
while the Schmitt trigger operated around the reference
voltage with trip points determined by:
For frequencies other than the 500 Hz center frequency
shown in the example the relevant bandpass filter2 equa- VREF RB + 14 RA
VHIGH (11)
tions are:
RA + RB

GIVEN: Q. f
0,C VREF RB - 14 RA
(Q normally from 10 to 50) ( 2) (12)
VLOW =
RA + RB
LET: C=C3=C4 (3)
I < k < 10 (k chosen for component where ± I4 V is the output swing with ± I5 V supplies. The
value convenience) measured trip points agreed with the calculated values of
5.089 V and 4.81 V within 0.2 % in the circuit of Figure 10.
THEN: (4)
R7 - 2xf0C

R7 = Rl = R5 (5)

kQ
126 - R7 (6)
20 - I

R7
R, (7 )

kQ

10 msec/ cm -.-
R8 = kR7 (8)
Detector Output Voltage vs Time
Figure 11
H0=x/-
() k
-- (
9)
 APPENDIX B . 187

3 Amplifier Active Filter

The active filter shown in Figure 12 is adual-integrator
feedback resonator with band-pass, high-pass and low-pass
outputs. It is aclassical analog computer method of imple-
menting afilter using three amplifiers and only two capaci-
tors. With the LI44 triple op amp it becomes cost-effective
to use this configuration with its' attendant high Q values
and low sensitivities. 3 The theoretical maximum value for Q
is:

AVOL
Qmax = (13)

where AVOL is the open loop gain of amplifier Al.

3 AMPLIFIER ACTIVE FILTER

The controlling design equations are: FIgure 12

GIVEN: Q. f
0 . & Ho ( 14)

LET: R5 = R6 = R7 (Chosen for component ( 15)

HIGH-PASS
C1 = C2 value convernence)

THEN: -3
R4
n— = Ho- Ifor Ho <<
n.3 AVOL ( 16)
3

R2 C2 - 2e
Ho
0Q ( 17)

RI CI - -#
21 0A-
0 ( 18)

The design example shown on Figure 12 was calculated

as follows:
LOW-PASS

(19)
LET: Q = 26
= IkHz -40
100 IX IOU
Ho = 26 RE °MENG,' 010

R5 = R6 = R7 = 20k Bode plots of Active Filter Output

C1 = C2 = . 008 le Figure 13
R3= 10k
Micropower Double-Ended Limit Detector
THEN: R4= ( 3H 0 - 1) R3 = 770k == 750k (20)
The double-ended limit detector shown on Figure 14 uses
Ho three sections of an LI44 and aCD401 Itype CMOS NAND
R2= - 19.9k 20k ( 21)
fo GC2 V. • 101/

-2foH0C) - I9.9k 20k ( 22)

ir

giving an actual calculated f

o and Ho of

I-1 0 = 1/3(1 + R4 )= 25.3 ( 23)

R3
Q Ho
f
o = - - 994.7 Hz ( 24)
2ir RI CI Ho 2tr R2 C2 Q
VOUT • " LOVe WHEN
0o. 0 1,
V • 1
0V HECT CMOS OUTPUT

The measured values of Q. Ho ,and f

o using 1% components

were 26.9,26.3 and 996 respectively. Figure 13 shows the

MICROPOVVER DOUBLE- ENDED LIMIT DETECTOR
Bode plots of the high-pass, band-pass, and low pass out- Fogure 14
puts.
188 . APPENDIX B

gate to make avery low power voltage monitor. If the input Total power dissipation is typically 290 µW while in limit
voltage VIN is above VH1GH or below VLOW the output and 330 µW while out of limit. Within the ±9V input range
will be alogical high. If ( and only if) the input is between of the circuit the comparator resolution is typically 2mV
the limits will the output be low. The 1MO resistors I. R2. with the offset adjust determined by trimming VHIGH and
R3 and R4 translate the bipolar ± I
0V swing of the op amps VLow.Since the LI44 is operating at only 14.5 µA of sup-
to a 0to 10 V swing acceptable to the ground- referenced ply current the slew rate is acorresponding low .063V/
CMOS logic. elsec.
GLOSSARY

amplifier: adevice which draws power voltage. (The common- mode gain of
from asource other than the input sig- an ideal differential amplifier is zero.)
nal and develops an output signal that common-mode input: an input volt-
reproduces the essential features of the age common to the two inputs of a
input signal at an increased level of differential amplifier.
voltage, current, or power. common-mode voltage: the average of
analog: in electronic computers, asys- the two voltages applied to the inputs
tem in which the performance of of adifferential amplifier.
measurements provides information common-mode rejection ratio (CMRID:
concerning a class of mathematical
the ratio of the differential voltage
operations. gain of an amplifier to its common-
analog computer: a computer that mode voltage gain.
operates on the basis of a physical comparator: a differential- input am-
analogy of a mathematical operation. plifier utilized to compare the voltage
bandwidth: see Unity- gain Band- levels at its two inputs, and having
width; Full- Power Response. high gain so that only small voltage
bias current: see Input Bias Current. differences are required to switch the
output voltage from one polarity to
bode plot: a straight-line approxima-
the other.
tion to a frequency response curve
which provides phase- response cri- compensation: the shaping of an op-
teria. amp frequency response in order to
achieve stable operation in aparticular
breakpoint: a point on a Bode plot
configuration.
where aslope change occurs owing to
apole or zero at that frequency. A pole differential amplifier: an amplifier
is a frequency that makes a mathe- that steps up the voltage difference
matical function infinite; a zero is a between its two inputs.
frequency that makes the function differential input resistance: the ef-
zero. fective resistance between the two in-
chopper-stabilized amplifier: an am- puts of an op amp when operated in
plifier stabilized against dc drift by the open- loop mode.
breaking up the input signal to obtain differential-mode gain: the ratio of the
an ac waveform that can be processed output voltage of adifferential ampli-
by an ac-coupled amplifier. fier to the differential-mode input
closed-loop gain: the gain of an op voltage.
amp with a negative- feedback loop. differential-mode input: the voltage
common-mode gain: the ratio of the difference between the two inputs of
output voltage of a differential am- adifferential amplifier.
plifier to the common-mode input differential output amplifier: an am-

.189
190 . GLOSSARY

plifier that has two outputs of opposite amp and the ideal gain predicted by
gain polarity with respect to a given theory.
input. gyrator: an op- amp circuit that simu-
differentiator: apassive differentiator lates inductance; used in some active
employs aseries RC circuit to develop filters.
an output that is roughly equal to the hysteresis:a lag in transfer response of
rate of change (roc) of the input wave- comparators that are controlled by
form. An active differentiator also positive feedback, which results in
utilizes an op amp to obtain an output different trip points for the two direc-
that is precisely equal to the roc of the tions of output transition.
input waveform.
input bias current: the current that
drift: see Input Bias Current Drift; In- must be supplied to each input of an
put Offset Current Drift; Input Offset op amp to ensure proper biasing of
Voltage Drift. the differential input stage. These are
FDNR: an abbreviation for frequency- the bias currents that provide zero
dependent negative resistance; atype output voltage when the signal and
of active circuit employed in some low- input offset voltages are zero.
pass filter configurations.
input bias current drift: the rate of
feedback: return of a portion of the change of input bias current with tem-
output signal from adevice to the in- perature or with time.
put of the device.
input capacitance: see Common- Mode
feedback factor, 13: that fraction of an Input Capacitance: Differential Input
output signal that is fed back to the Capacitance.
input. input offset current: the difference be-
frequency compensation: see Com- tween the input bias currents flowing
pensation. into each input of an op amp, when the
full-power factor, f
p: the maximum op amp output is at zero potential.
frequency at which an op amp can input offset current drift: the rate of
supply its rated output voltage and change of input offset current with
current without significant distortion. temperature or with time.
function generator: an active configu- input offset voltage: the voltage that
ration that produces an output signal must be applied across the two inputs
related to an input signal (or locally of an op amp in order to produce zero
generated signal) by aspecified func- potential at the output.
tion or functions.
input offset voltage drift: the rate of
frequency response: see Unity-gain change of input offset voltage with
Bandwidth; Full- power Response. temperature or with time.
gain: see Open- loop Gain; Loop Gain. input protection: protective means ap-
gain-bandwidth product: the product plied to the input of adevice for pre-
of the closed-loop gain and the closed- vention of damage owing to applica-
loop bandwidth. Often a constant in tion of excessive input voltage.
op-amp configurations. input resistance: see Common-mode
gain error: the difference between the Input Resistance; Differential Input
measured closed-loop gain of an op Resistance.
 GLOSSARY . 191

instrumentation amplifier: a dc- associated input signal voltage with

coupled differential- input amplifier the feedback loop open-circuited.
with internal feedback for develop- operational amplifier, op amp: ahigh-
ment of a specified voltage gain. gain dc-coupled amplifier with differ-
integrator: a passive integrator em- ential input (or with both differential
ploys aseries RC circuit to develop an input and differential output), having
output that is roughly equal to the in- high input impedance and low output
tegral (summation) of the initial input impedance; also called an operational
current with respect to time. An active voltage amplifier.
integrator also utilizes an op amp to operational transconductance ampli-
obtain an output that is precisely equal fier: an op amp similar to the opera-
to the integral of the initial input cur- tional voltage amplifier, except that
rent with respect to time. it has very high output impedance.
inverting amplifier: an op amp with a output offset voltage: the output volt-
feedback configuration which pro- age of a negative- feedback op- amp
duces an output that is 180° out of circuit when the input voltage is zero.
phase with the input signal (produces An ideal op amp has zero offset volt-
an output polarity reversal). age.
isolation amplifier: an amplifier with output protection: protective means
high- impedance high-voltage isola- for the output of adevice, as output-
tion between input and output com- current limiting provided for an op-
mon components. erational amplifier.

latch-up: a characteristic of certain sample-hold circuit: adevice arranged

kinds of op amps to remain in positive to produce an output that follows an
or negative saturation when subjected input signal, and then holds the in-
to a differential input voltage higher stantaneous value of the signal when
than rated. the hold signal is applied.

logarithmic amplifier: an amplifier signal processor: adevice arranged to

that develops an output voltage which convert or operate on input signals by
is proportional to the logarithm of the analyzing, routing, rectifying, samp-
input signal. ling, averaging, etc.

loop gain, AO: also called closed- loop single-ended: denoting asingle input
gain; the gain around afeedback loop or output, instead of a pair as in dif-
formed by an amplifier and its feed- ferential input or output.
back network. slew rate: the maximum rate of change
noninverting amplifier: an op amp of the output voltage of an op amp as
with feedback which produces an out- it swings from positive to negative
put that is in phase with the input sig- saturation, or vice versa, in response
nal. to a square-wave push-pull (differ-
offset current: see Input Offset Cur- ential- mode) input.
rent. summing junction: ajunction of feed-
offset voltage: see Input Offset Voltage. back and input resistors of afeedback
open-loop gain: the ratio of the output network at which the signal currents
signal voltage of an op amp to the from input resistors are summed.
192 . GLOSSARY

unity-gain bandwidth, f,.: the fre- summing junction of an inverting op

quency at which the open-loop gain of amp, which junction rests virtually at
an op amp crosses zero dB (unity volt- ground potential owing to the very
age gain). high open-loop gain of the op amp.
varactor amplifier: a modulated-car- voltage follower an op amp with adi-
rier dc-coupled amplifier that employs rect feedback connection from output
capacitance modulation of varactor to inverting input which results in an
diodes in response to low-frequency output signal that follows the voltage
signals so that the signal can be proc- at the noninverting input of the op
essed by ac-coupled amplifiers. amp.
virtual ground: a characteristic of the
INDEX

Ac to dc converter, 74 Dc level shifting circuit, 126, 128

Active filter, 8, 11 Detector amplifier, 124
Adder/subtracter, 25 Detector network, 124
AGC, 92, 124 Differential amplifier, 6, 34
Amplifier configuration, 24 Differential capacitor, 6
Amplitude modulation, 139 Differential connections, 3
Analog-to-digital converter, 68 Differential current drift, 107
Audio mixer, 8 Differential input, 120
Automatic gain, 122 Differential mode, 35
Differential output, 120
Differentiator, 5, 161
Bandpass active filter, 13 Digital counter, 69
Bandpass frequency response, 10 Digital pulse, 117
Bias current offset, 33 Digital pulse amplifier, 115
Biquadratic bandpass section, 18 Digital voltmeter, 68, 70, 74
Bistable multivibrator, 103 Diode clamping, 32
Bode plots, 144, 161, 163 Diode limiter, 78
Bootstrap amplifier, 125 Distortion, 32
Double-ended input, 3, 123
Double-ended output, 122
Capacitor, defined, 48 Double stop circuit, 164
Capacitor loading, 109 Drift voltage vs. supply, 84
Capacitive loading, effect of, 168 Driving current, 3
Capacitor simulator, 51, 63 Dual-slope integrating DVM, 77
Chopper-stabilized op amp, 141
Common mode interference, 6
Emitter- follower mode, 3
Comparator, 41
Component value vs. frequency, 20
Component value vs. Q, 20 Flip-flop, 103
Constant-current source, 34 Four-quadrant multiplier, 135, 137
Constant-gain-bandwidth product, 168 Frequency-dependent negative-
Converter, 8 resistance circuit, 63
Coulomb, defined, 49 Frequency response, 19, 108, 114, 145
Converter electromotive force, 46 Full power response, 110
Current balancing, 73 Full-wave rectifier, 77
Current clipping, 32
Current generator, 60
Current mirror, 80 Gain controlled stage, 124
Current mode input impedance, 110 Gain controlled signal output, 124

.193
194 . INDEX

Gain stability vs. supply voltage, 65 Low-pass filter, 9, 132

Gain stability vs. temperature, 65 Low-pass frequency response, 10
Gated amplifier, 134 Lo-power ohmmeter, 39
Gated circuit, 134 Low-pass RC filter, 158
Glossary, 171 Lsection low-pass filter, 159
Gyrator, 58, 61

Modulator, 124
Handling operational amplifiers, 129 Monolithic IC, 1
Heat damage, 147 Monostable multivibrator, 103
Henry, defined, 47 Multiloop feedback filters, 15
High-pass filter, 9, 59, 160
Hum voltage, 6
Hybrid integrated circuit, 1 Narrow- band amplifier, 18
Negative-current feedback, 151
Negative feedback, 9, 113, 114, 150
Ideal inductor, 48 Negative-feedback analysis, 152
Ideal operational amplifier, 3 Negative-feedback resistance, 37
Impedance transformation, 32 Non- inverting input, 3
Inductance characteristics, 45 Non- inverting op amp, 30
Inductance simulation, 45 Nonlinear response, 30
Inductor simulator, 51, 55, 57 Notch filter, 13
Input- bias current, 36
Input current drift vs. supply, 86
Input current offset, 85 Op-amp differentiator, 157
Input drift voltage vs. temperature, 84 Op-amp integrator, 156
Input impedance, 3, 65, 81 Operational amplifier, 5
Input-offset current, 37 internal circuit, 5
Input-offset voltage measurement, 82 operation, 5
Input noise, 84 schematic symbol, 5
Input resistance, 33 stability, 6
Input resistance characteristics, 28 triggered time base, 80
Input temperature drift, 83 troubleshooting, 18, 38
Instrumentation application, 68 typical circuit, 8
Integrated circuit construction, 2 voltage gain, 6
Integrator, 6 Operational voltage amplifier, 60
Integrator, bode plot, 163 Open- loop bandwidth, 66
Inverting input, 3 Open- loop dc voltage gain, 64
Inverting op-amp, 30 Open- loop input impedance, 65
Open- loop output impedance, 66
Oscilloscope, 42
LCR circuits, 53 OTA gyrator, 58
Latch-up protection, 32 Output capacity, 66
Limiting amplifier, 8 Output impedance, 33, 66
Linear op-amp applications, 26 Output offset voltage, 36
Logarithmic amplifier, 16 Output resistance characteristics, 28
Low-pass active filter, 11 OVA, 60
 INDEX . 195

PP negative feedback, 167 Subtracter, 25

Parallel-T RC filter, 14 Suppressed-carrier modulation, 139,
Passive filters, 57 140
Phase relations, 53 Symmetrical op-amp pair, 82
Phase response curve, 145
Phase shifter, 26
Phase shift oscillator, 98 Tachometer, 83
Positive feedback, 121 Test oscillator, 40
Potentiometric DVM, 75 Test procedures, 64
Protective devices, 21 Three-port device, 62
Pulse-amplitude modulation, 131 Time-division multiplexing, 131
Pulse-code modulation, 131 Timing of strobe waveform, 135
Pulse compensation, 116 Transconductance characteristics, 123
Pulse generator, 106 Transient response, 59
Pulse handling capability, 115 Triangular wave generator, 104
Pulse-position modulation, 131 Triggered time base, 78
Pulse-width discriminator, 121 Troubleshooting, 17
Trouble techniques, 38
Tuned circuit, 119
Q values, 19 Twin-T- RC notch filter, 10
Typical circuits, 6

Ramp generator, 105

Regenerator amplifier, 120 Unity gain amplifier test circuit, 86
Rise-time measurements,42, 109 Unity gain test circuit, 109
Resistive adder, 27 Universal RC frequency-response
Resistive divider network, 3 chart, 159

Sample-hold comparison circuit, 136 Varactor, 142

Sample-hold read configuration, 133 Variable-frequency oscillator, 94, 98
Sawtooth generator, 105 Video amplifier, 116
Scaling adder, 118 Video amplifier to digital pulse, 117
Sectional isolation, 33 Voltage amplification, 28
Semiconductor locus diagram, 28 Voltage amplifier test procedures, 107
Sine-wave generator, 88 Voltage follower, 5
Single-ended input, 3 Voltage-to-frequency converter, 73
Single- loop feedback, 12 Voltage-to-time conversion, 70
Single port network, 62 Voltmeter, 38
Square-wave frequency spectrum, 101
Square-wave generator, 43, 100
Stability, 7 Wien- bridge oscillator, 88, 93
Stabilizing resistor, 166 Wide-band amplifier, 116
Staircase generator, 107
Stop resistor, 163
Strip recorder, 85
Strobe waveform, 131, 135
 e

AMIIIIIIK.
_