Ch5 : Synchronous Sequential Logic
0
Sequential Circuits
Asynchronous
Inputs Outputs
Combinational
Circuit
Memory
Elements
Synchronous
Inputs Outputs
Combinational
Circuit
Flip-flops
Clock
1
Latches
SR Latch
S R Q0 Q Q’
0 0 0 0 1 Q = Q0
R
0 0
Q
S Q
0 1
Initial Value
2
Latches
SR Latch
S R Q0 Q Q’
0 0 0 0 1 Q = Q0
0 0 1 1 0 Q = Q0
R
0 1
Q
S Q
0 0
3
Latches
SR Latch
S R Q0 Q Q’
0 0 0 0 1
Q = Q0
0 0 1 1 0
0 1 0 0 1 Q=0
R
1 0
Q
S Q
0 1
4
Latches
SR Latch
S R Q0 Q Q’
0 0 0 0 1
Q = Q0
0 0 1 1 0
0 1 0 0 1 Q=0
R
1 1 0 1 1 0 1 Q=0
Q
S Q
0 0
5
Latches
SR Latch
S R Q0 Q Q’
0 0 0 0 1
Q = Q0
0 0 1 1 0
0 1 0 0 1
R
0 0 0 1 1 0 1
Q=0
Q 1 0 0 1 0 Q=1
S Q
1 1
6
Latches
SR Latch
S R Q0 Q Q’
0 0 0 0 1
Q = Q0
0 0 1 1 0
0 1 0 0 1
R
0 1 0 1 1 0 1
Q=0
Q 1 0 0 1 0 Q=1
1 0 1 1 0 Q=1
S Q
1 0
7
Latches
SR Latch
S R Q0 Q Q’
0 0 0 0 1
Q = Q0
0 0 1 1 0
0 1 0 0 1
R
1 0 0 1 1 0 1
Q=0
Q 1 0 0 1 0
Q=1
1 0 1 1 0
1 1 0 0 0 Q = Q’
S Q
1 10
8
Latches
SR Latch
S R Q0 Q Q’
0 0 0 0 1
Q = Q0
0 0 1 1 0
0 1 0 0 1
R
1 10 0 1 1 0 1
Q=0
Q 1 0 0 1 0
Q=1
1 0 1 1 0
1 1 0 0 0 Q = Q’
1 1 1 0 0 Q = Q’
S Q
1 0
9
Latches
SR Latch
S R Q
R Q Q0 No change
0 0
0 1 0 Reset
1 0 1 Set
S Q 1 1 Q=Q’=0 Invalid
S S R Q
Q Invalid
0 0 Q=Q’=1
0 1 1 Set
1 0 0 Reset
R Q
1 1 Q0 No change
10
Latches
SR Latch
S R Q
R Q Q0 No change
0 0
0 1 0 Reset
1 0 1 Set
S Q 1 1 Q=Q’=0 Invalid
S S’ R’ Q
Q Invalid
0 0 Q=Q’=1
0 1 1 Set
Q 1 0 0 Reset
R Q0 No change
1 1
11
Controlled Latches
SR Latch with Control Input
R R S S
Q Q
C C
S Q R Q
S R
C S R Q
0 x x Q0 No change
1 0 0 Q0 No change
1 0 1 0 Reset
1 1 0 1 Set
1 1 1 Q=Q’ Invalid
12
Controlled Latches
D Latch (D = Data) Timing Diagram
S
C
D
Q
C D
R Q
Q
t
C D Q
Output may
0 x Q0 No change change
1 0 0 Reset
1 1 1 Set
13
Controlled Latches
D Latch (D = Data) Timing Diagram
S
C
D
Q
C D
R Q
Q
C D Q Output may
0 x Q0 No change change
1 0 0 Reset
1 1 1 Set
14
Flip-Flops
Controlled latches are level-triggered
Flip-Flops are edge-triggered
CLK Positive Edge
CLK Negative Edge
15
Flip-Flops
JK Flip-Flop
J
D Q Q
K
CLK Q Q
J Q
D = JQ’ + K’Q
K Q
16
Flip-Flop Characteristic Tables
J K Q(t+1)
J Q No change
0 0 Q(t)
0 1 0 Reset
K Q 1 0 1 Set
1 1 Q’(t) Toggle
17
Flip-Flop Characteristic Equations
J K Q(t+1)
J Q 0 0 Q (t)
Q(t+1) = JQ’ +
0 1 0
K’Q
K Q 1 0 1
1 1 Q’(t)
18
Flip-Flop Characteristic Equations
Analysis / Derivation
Q(t
J K Q(t+1)
)
0 0 0 0
J Q No change
0 0 1 1
0 1 0
K Q Reset
0 1 1
1 0 0
Set
1 0 1
1 1 0
Toggle
1 1 1
19
Flip-Flop Characteristic Equations
Analysis / Derivation
Q(t
J K Q(t+1)
)
0 0 0 0
J Q No change
0 0 1 1
0 1 0 0
K Q Reset
0 1 1 0
1 0 0
Set
1 0 1
1 1 0
Toggle
1 1 1
20
Flip-Flop Characteristic Equations
Analysis / Derivation
Q(t
J K Q(t+1)
)
0 0 0 0
J Q No change
0 0 1 1
0 1 0 0
K Q 0 1 1 0 Reset
1 0 0 1
Set
1 0 1 1
1 1 0
Toggle
1 1 1
21
Flip-Flop Characteristic Equations
Analysis / Derivation
Q(t
J K Q(t+1)
)
0 0 0 0
J Q No change
0 0 1 1
0 1 0 0 Reset
K Q 0 1 1 0
1 0 0 1 Set
1 0 1 1
1 1 0 1 Toggle
1 1 1 0
22
Flip-Flop Characteristic Equations
Analysis / Derivation
Q(t
J K Q(t+1)
)
0 0 0 0 K
J Q
0 0 1 1 0 1 0 0
0 1 0 0 J 1 1 0 1
K Q 0 1 1 0 Q
1 0 0 1
1 0 1 1
1 1 0 1
1 1 1 0
Q(t+1) = JQ’ +
K’Q 23
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