PRECISION CIRCUITS

CHAPTER 5
In the preceding chapters we dealt with many aspects of tail at the cleverness of the front-end stage of an exemplary
analog circuit design, including the circuit properties of precision digital multimeter.
passive devices, transistors, FETs, and op-amps, the sub- Then we advance to difference and instrumentation am-
ject of feedback, and numerous applications of these de- plifiers – these go to the head of the class both in terms of
vices and circuit methods. In all our discussions, however, digging out a difference signal in the presence of common-
we have not yet addressed the question of the best that can mode input, and in terms of gain accuracy and stability.
be done, for example, in minimizing amplifier errors (non- We show their internal designs and how they’re used, with
linearities, drifts, etc.) and in amplifying weak signals with extensive tables and graphs comparing popular parts. Fi-
minimum degradation by amplifier “noise.” In many appli- nally we take up fully differential amplifiers – these have
cations these are the most important issues, and they form differential inputs and outputs, and an output “common-
an important part of the art of electronics. Therefore, in mode control” input pin. Once again, we organize tables,
this chapter, we look at methods of precision circuit design internal circuit diagrams, and guidance for their use with
(deferring the issue of noise in amplifiers to Chapter 8). high-performance ADCs.
For readers looking for the basics, this chapter can be
Chapter overview skipped over in a first reading. Its material is not essential
This is a big chapter – and an important one. It deals with a for an understanding of later chapters.
range of topics, which need not be read in order. As guid-
ance, we offer this outline: we start with a careful examina-
5.1 Precision op-amp design techniques
tion of errors in circuits made with operational amplifiers,
and explore the use of an error budget. We explore issues of In the field of measurement and control there is often a
unspecified parameters and “typical” versus “worst-case” need for circuits of high precision. Control circuits should
component errors, and discuss ways to deal with them. be accurate, stable with time and temperature, and pre-
Along the way we deal with some neglected topics such as dictable. The usefulness of measuring instruments likewise
diode leakage at the sub-picoamp level, “memory effect” depends on their accuracy and stability. In almost all elec-
in capacitors, distortion and gain nonlinearity, and an ele- tronic subspecialties we always have the desire to do things
gant way to remedy phase error in amplifiers. We discuss more accurately – you might call it the joy of perfection.
op-amp distortion in detail, with comparative graphs and Even if you don’t always actually need the highest preci-
test circuits. sion, you can still delight in a full understanding of what’s
Next we discuss the dark side of rail-to-rail op-amps: going on.
their open-loop output impedance, and input common-
mode crossover errors. We provide detailed selection ta-
5.1.1 Precision versus dynamic range
bles for precision, chopper and high-speed op-amps, and
comparative graphs charting their noise, bias current, and It is easy to get confused between the concepts of precision
distortion. We show how to interpret the multitude of op- and dynamic range, especially because some of the same
amp parameters, and we discuss the tradeoffs you’ll have techniques are used to achieve both. Perhaps the difference
to make. can best be clarified by some examples: a 5-digit multime-
For those working in the low microvolt and nanovolt ter has high precision; voltage measurements are accurate
territory, we show the devastating effects of 1/ f noise, to 0.01% or better. Such a device also has wide dynamic
and how auto-zero (AZ) op-amps solve this problem; but range; it can measure millivolts and volts on the same scale.
there’s a tradeoff – the current noise of these devices that A precision decade amplifier (one with selectable gains of
is often overlooked. As an interlude we look in some de- 1, 10, and 100, say) and a precision voltage reference may

292
Art of Electronics Third Edition 5.1.2. Error budget 293

have plenty of precision, but not necessarily much dynamic 18 gain-determining resistors of ±1% tolerance in a cir-
range. An example of a device with wide dynamic range cuit, then the guaranteed performance must be specified as
but only moderate accuracy might be a 6-decade logarith- ±18%. The response of the other camp (which we might
mic amplifier (log-amp) built with carefully trimmed op- characterize as pragmatists) is “balderdash – it’s overly
amps but with components of only 5% accuracy; even with constraining to allow an extremely unlikely possibility to
accurate components a log-amp might have limited accu- limit the performance of a circuit design; and one can deal
racy because of lack of log conformity (at the extremes of with such eventualities with component test procedures,
current) of the transistor junction used for the conversion, finished circuit performance testing, and so on.” We’ll re-
or because of temperature-induced drifts. visit this controversy (and take sides in the debate) after
Another example of a wide-dynamic-range instrument running through an introductory example.
(greater than 10,000:1 range of input currents) with only
moderate accuracy requirement (1%) is the coulomb meter
described in §9.26 of the previous edition of this book. It 5.2 An example: the millivoltmeter, revisited
was originally designed to keep track of the total charge To motivate the discussion of precision circuits, let’s revisit
put through an electrochemical cell, a quantity that needs a circuit from the previous chapter. There we flirted, briefly,
to be known only to approximately 5% but that may be with issues of precision in §4.4.3, mostly to illustrate the
the cumulative result of a current that varies over a wide effects of input offset voltage VOS and input bias current
range. It is a general characteristic of wide-dynamic-range IB in a low-level dc application (a 0–10 mV millivoltmeter
design that input offsets must be carefully trimmed in or- with 10 MΩ input resistance1 ). Back then, with wide-eyed
der to maintain good proportionality for signal levels near naivety, we were astonished to see that our trusty LF411
zero; this is also necessary in precision design, but, in ad- op-amp was wholly inadequate to the task; it had way too
dition, precise components, stable references, and careful much offset, and too much input current as well. We found
attention to every possible source of error must be used to a solution in the form of either a precision low-bias op-amp
keep the sum total of all errors within the so-called error (an OPA336) or a chopper (also known as “auto-zeroing”)
budget. amplifier (an LTC1050).
As we’ll soon see, our celebration of that “solution” was
premature: we pronounced victory with an op-amp whose
5.1.2 Error budget
IB alone caused the maximum allowable zero-input error of
A few words on error budgets. There is a tendency for the 1%. A careful design must take into account the cumulative
beginner to fall into the trap of thinking that a few strate- effect of multiple sources of error.
gically placed precision components will result in a device
with precision performance. On rare occasions this will be
5.2.1 The challenge: 10 mV, 1%, 10 MΩ, 1.8 V single
true. But even a circuit peppered with 0.01% resistors and
supply
expensive op-amps won’t perform to expectations if some-
where in the circuit there is an input offset current multi- To make the problem more interesting, let’s further con-
plied by a source resistance that gives a voltage error of strain the specifications. This time we’ll ask that the 0–
10 mV, for example. With almost any circuit there will be 10 mV meter operate from a single +3 V battery (either a
errors arising all over the place, and it is essential to tally lithium cell or a pair of alkaline AAA cells); that forces
them up, if for no other reason than to locate problem areas us to worry about “single-supply” operation, in which the
where better devices or a circuit change might be needed. op-amp must work down to zero volts at both input and
Such an error budget results in rational design, in many output. Furthermore, it must work down to the end-of-life
cases revealing where an inexpensive component will suf- voltage of alkaline cells, which you see stated variously
fice, and eventually permitting a careful estimate of perfor- as 1.0 V/cell, or 0.9 V/cell; that means operation down to
mance. +1.8 V total supply voltage. And, as before, let’s require
To add some spice to the subject, we note that there an input resistance of 10 MΩ and insist that it indicates
is some controversy in the engineering community sur- 0 mV (±1% of full scale) when the input is either shorted
rounding this business of error budgets. One camp (which
we might characterize as strict constructionists) insists that 1 Note that it can be used as a sensitive current meter: with its 10M in-
you allow for the true worst case, or you are guilty of vio- put resistance and 1% accuracy, it can measure currents down to 10 pA
lating good engineering practice. For example, if there are (1%×10 mV/10 MΩ = 10 pA).
294 5.2. An example: the millivoltmeter, revisited Art of Electronics Third Edition

or open. Note that this “zero-error” specification is differ- protection network (which we blithely ignored in Chap-
ent from a full-scale accuracy (“scale error”) specification: ter 4’s example), and, most critically, the choice of op-amp.
we might be happy with ±5% full-scale accuracy, but we’d First, the protection network: the requirements seem easy
be most unhappy with a meter that reads 5% of full scale – clamp to a nondestructive op-amp input voltage (during
(here 0.5 mV) when there’s nothing connected to it. input overvoltages), and draw less than ∼10 pA leakage
Following the suggestion from last chapter’s design, current at the full-scale input voltage (10 mV), in both for-
let’s use current-sensing feedback, so the design is inde- ward and reverse directions. (That amount of diode current
pendent of the internal resistance of the analog meter. Fig- would reduce the input resistance by 1%.) As it turns out,
ure 5.1 shows the circuit. the datasheets don’t ordinarily tell you how much current
a diode draws at very low voltages. But if you go measure
+1.8 V to +5 V
(Li, or 2 × AAA) it, you’ll be surprised at what you find (Figure 5.2). Every-
one’s favorite jellybean signal diode (1N914, 1N4148) is
R2 Is = 40μA
AD8603 rather leaky, looking roughly like a 10 MΩ resistor at low
10k R3
+ + 10k voltages.3 There are some specialized low-leakage diodes
– like the (somewhat hard to get) PAD-1 or PAD-5 that do
V in R1 100μA
0–10 mV 10M C1 meter
much better; but you can do as well by using a diode-
10 nF
PN4117 connected low-leakage JFET like the n-channel PN4117
– R4
100k (i.e., tie the source and drain together to form the cathode,
R5 100Ω
0.1% and use the gate as the anode), or you can just use the diode
terminal pairs from an ordinary npn transistor.4 In this cir-
cuit the upstream 10k resistor R2 limits the clamp current,
Figure 5.1. Accurate millivoltmeter powered with single lithium while having no effect on the circuit accuracy.
cell. The input protection clamp uses low-leakage diode-connected And now for the op-amp. This was the stumbling block
PN4117 JFETs.
in Chapter 4, and it has gotten only more difficult here,
with the single low-voltage supply. We can separate the er-
rors into a “zero” error and an overall scale factor error. The
5.2.2 The solution: precision RRIO current source latter is the easy part: the circuit’s gain is accurately deter-
mined, so we merely require an accurate meter movement
We use a precise current-sensing resistor R4 , in this case (if we don’t want any trim adjustments; or we could reduce
a 0.1% 100 Ω resistor. Sounds exotic, but in fact these the sense resistor and add a resistor to produce a trimmable
things are commonplace: the ever-helpful DigiKey web- gain greater than unity). It’s the “zero” requirement that is
site shows over 100,000 in stock, from five different sup- the tough part, because of the high sensitivity plus the high
pliers, at prices down to $0.20 (in quantities of 10). Note mandated input resistance. We require a worst-case com-
the routing of the input common (“−” terminal) connec- bined effect of input offset and bias current of 100 μ V and
tion directly to the low side of the sense resistor, a precau- 10 pA individually. That is, each alone would cause a zero
tion that becomes increasingly important with small-value error of 0.1 mV (Verr =VOS +IB R1 ), so each must be smaller
sense resistors, in which the wiring resistance of the ground so that the worst-case combination meets specifications.
return may add significant error.2 Because the meter likely We looked at some promising contemporary op-amp of-
presents an inductive load (it’s a moving coil in a mag- ferings, which we’ve listed (along with the usual suspects)
netic field, which is both inductive in its own right and in Table 5.1 on page 296. The inexpensive jellybeans in the
reactive through its motor-like electromechanical proper-
3 For all these diodes, the straight-line portion at low voltages represents
ties), we took the precaution of dividing the feedback path
in the usual way (through R5 at low frequencies, C1 at high a resistance in parallel with a non-conducting diode; so the low-leakage
1N3595 looks like 10,000 MΩ for V 10 mV. These currents can be esti-
frequencies; see for example Figure 4.76). The 10k output
mated from other diode parameters, namely reverse-bias leakage current
resistor R3 limits meter current for off-scale inputs.
at low reverse voltage or forward current at specified forward voltage.
The more challenging parts of this design are the input More on this in Chapter 1x.
4 Or our friend John Larkin’s favorite, the collector-base junction of the
2 Small-value sense resistors used for accurate measurement of high cur- BFT25, a low-cost 5 V npn microwave transistor. Its leakage is less
rents are available as 4-wire resistors. This arrangement is known as a than 10 fA when reverse biased, and <40 fA when forward biased up
Kelvin connection, and the sense resistor is sometimes called a shunt. to 50 mV.
Art of Electronics Third Edition 5.2.2. The solution: precision RRIO current source 295

100 (a dual op-amp, with no single version we could find).5 As

10 T = 20ºC listed in Table 5.5, the AD8603 runs at 40 μ A quiescent
1μA current, and has 1 pA (max) input current and 50 μ V (max)
100
offset voltage at 25◦ C.
819
1N5
Forward Current

Are we done? Not quite. The specs in the table are for
10
operation at 25◦ C. It can get plenty warmer, with impres-
1nA 14
1N9 sive increases in bias current for CMOS devices (for which
100 711 the “bias” current is leakage current). Manufacturers will
1N5
10 0 02 ordinarily provide worst-case (and sometimes typical)
1N4

7A
411
1pA values at the high end of the operating temperature range
95
(e.g., 85◦ C for “industrial” temperature range devices).

2N
1N3
5 B-C
0.1
90 4 B-E
2N 3 For our chosen AD8603 they specify IB (max) = 50 pA at
0.01
0.1 1 10 100 85◦ C. No worst-case data for intermediate temperatures
Voltage (mV) are given; but that value is consistent with a doubling every
Figure 5.2. Diode datasheets are often skimpy with data like this, 10◦ C, so we can be confident that the circuit will meet
showing the low end of the current versus forward applied voltage. specs6 up to 50◦ C. It’s worth noting that manufacturers are
See Chapter 1x for lots more detail. sometimes rather lazy in setting worst-case leakage specs,
as for example with the LPV521 in the table, whose ratio
of “maximum” to “typical” IB is 100:1. One industry guru
first three rows are hopeless for this job, with both offset attributes that to an unwillingness to test production parts
voltage and bias current far worse than required (listed in to a tighter spec.
the bottom row). And they all fail to operate at +1.8 V; and
Exercise 5.1. We designed a ±10 mV meter in Chapter 4 (Fig-
the first two fail the “single-supply” requirement. So much
ure 4.56), but our design in Figure 5.1 is unipolar (i.e., 0 to
for el-cheapo op-amps. +10 mV). Your boss has asked you to modify the design for
The LPV521 is characteristic of the new breed of ±10 mV capability, using a ±100 μ A zero-center meter and re-
“low-voltage, low-bias, low-power” op-amps. It does those taining the feature of operating with either a single lithium cell
things just fine, but, in common with many CMOS op- (or pair of AAA alkaline cells). Hint: you may wish to look at
amps, its VOS specs are only so-so. It’s possible to do the AD8607 dual member of the AD8603 op-amp family. Extra
considerably better. For example, the CMOS precision credit: after finishing, you decide to impress your boss by enhanc-
OPA336 was our hero earlier; but look – its worse-case IB ing the design so it will work with a 0–100 μ A meter.
consumes our entire error budget, and it would require VOS
trimming anyway, which is not so easily done in a single-
5.3 The lessons: error budget, unspecified
supply setup (unlike our friend the LF411, this op-amp has
parameters
no trim pins). We brushed off such niceties earlier; but this
time let’s accept full responsibility for producing products From this rather simple first example we’ve learned some
that meet specs. That means adopting some serious worst- important basic principles: (a) first, you’ve got to identify
case discipline. and quantify the sources of error within a circuit in order to
What choices are left? Most designers would reach for create an error budget; and (b) strict worst-case design re-
an auto-zero (chopper) amplifier for a precision applica- quires that all components (passive and active) be operated
tion that does not require bandwidth and that is tolerant within their datasheet specifications, and that the effects of
of noise. The best candidate we found is the ADA4051,
5 Five other parts we considered (see Tables 5.5, pages 320–321, and 5.6,
with excellent VOS specs, but five times too much IB , if
page 335): the bipolar LT1077A, lower Is and VOS but too high Vs (min);
you believe the “maximum” specs. (Competing auto-zero
the bipolar LT6003, Is only 1 μ A, but too much offset voltage (a 5% er-
amplifiers had greater bias current, greater minimum sup-
ror); the CMOS LMP2232A, poor 1.5% offset voltage; the MAX9617
ply voltage, or both.) The last two op-amps are contempo- auto-zero op-amp, with 0.1% (versus the AD8603’s 0.5%) offset volt-
rary CMOS op-amps that qualify as “precision,” owing to age, but whoa, its input current through 10 MΩ amounts to a 1.4% off-
careful design and production-line offset trimming. Both set; and the ISL28133 auto-zero, but its 3% offset (from input current)
meet the error budget goals (but see below). We chose the again reveals the input current weakness of auto-zero amplifiers.
AD8603 because it meets the 1.8 V supply spec, and as a 6 The datasheet does provide a plot of “typical” IB versus temperature,
bonus it operates at 35% the supply current of the LTC6078 confirming its exponential behavior of a doubling every 10◦ C.
296 5.3. The lessons: error budget, unspecified parameters Art of Electronics Third Edition

Table 5.1 Millivoltmeter Candidate Op-amps

Vos Ibias Vcm Vs (total) Is Price
Input
typ max typ max neg lim min max typ 100 pc
Part # (μV) (μV) (pA) (pA) (V) Vout (V) (V) (μA) ($) Notes

uA741 BJT 2000 6000 80k 500k 2 1.5V from rails 10 40 1500 0.27 old HV BJT
LF411 JFET 800 2000 50 200 3 1.5V from rails 10 40 1800 0.88 HV JFET
LM358A BJT 2000 3000 45k 100k 0 0 to V+–1.2V 3 32 500 0.21 old HV SS
LPV521 CMOS 100 1000 0.01 1 –0.1 R-R 1.8 5.5 0.5 1.05 low-bias LV RRIO
OPA336 CMOS 60 125 1 10 –0.2 R-R 2.3 5.5 20 1.70 chap 4 "solution"
ADA4051 CMOS 2 17 5 50 0 R-R 1.8 5 15 2.20 LV auto-zero RRIO
LTC6078 CMOS 7 25 0.2 1 0 R-R 2.7 5.5 110 1.75 LV low-IB low-Vos RRIO dual
AD8603 CMOS 12 50 0.2 1 –0.3 R-R 1.8 5 40 1.40 LV low-IB low-Vos RRIO

Ckt Limit - 100 - 10 0 0 to anything 1.8 > 3.6 must budget contributions

their guaranteed worst-case errors be added (as unsigned you may have to set up a testing regime of incoming com-
magnitudes) to determine the overall circuit’s performance. ponents to ensure that you meet specs. And third, you may
So far, so good; and in this example the op-amp choice have to deal with a situation in which there are many com-
allowed us to meet (and exceed) our target zero-error spec- ponents contributing to the overall error budget by simply
ifications (1% of full scale, with input open or shorted), validating the performance of the overall circuit, subassem-
even under guaranteed worst-case values of IB and VOS . bly, or complete instrument at final test.
This approach may appear cavalier. But the fact is
A. Unspecified parameters: a pragmatic approach that there are many situations in which you simply can-
But, looking a little closer, we’ve also seen in this design not meet challenging specifications while staying within
example that an unspecified parameter (forward diode cur- the published worst-case specifications (or lack of spec-
rent at low voltages, 0–10 mV) figured into the overall er- ifications). Two examples help make this point: one of
ror.7 What should one do under such circumstances? the authors designed and manufactured a line of battery-
The authors belong to the camp of “pragmatists” on this powered oceanographic instruments, intended for long-
matter: first, you may have to be creative in reading the duration (from weeks to as long as a year) submerged ob-
datasheet (as we did in the case of op-amp input current), servations and data logging. A typical instrument might
particularly when the manufacturer’s worst-case numbers have 200 or more 4000B-series CMOS ICs. The datasheet
represent a statement that “I don’t want to test this parame- lists the 25◦ C quiescent current9 as “0.04μ A (typ), 10μ A
ter, so I’ll put a conservative guess in the datasheet”; this is (max).” Great. So 200 of these puppies probably draw a to-
particularly relevant with parameters like leakage current, tal of 8μ A, but they could draw (in a wildly improbable
where the limits of automated test equipment (ATE) and scenario) as much as 2 mA. A year’s worth of operation
testing time constraints encourage conservative worst-case would require 70 mAh (using typical values), but, under
datasheet specifications. Second, you may have to do some strict worst-case rules, we would have to allow for 17.5 Ah
testing8 of poorly specified (or unspecified) parameters (as (amp-hours). Here’s the rub: the substantial battery pack
we did with forward diode current). It may be sufficient to for these volume-constrained deep submergeable pressure
establish that the circuit effects of the unspecified parame- housings provided only 5 Ah of capacity (with some safety
ter are completely insignificant (as here, when the current margin of derating). And 80% of the battery capacity was
through the clamp diodes was less than 0.01 pA, or three budgeted for the sensors and recorders. So strict worst-case
orders of magnitude below budget); or, if it’s a closer call, design would require quadrupling the battery pack (and
7 As did the op-amp input current at modestly elevated temperatures.
8 If you buy in large quantities the manufacturer may be willing to do 9 Amusingly, the specs are the same for simple parts such as gates, or
these tests. complex parts such as counters or arithmetic logic units.
Art of Electronics Third Edition 5.4.1. Circuit description 297

expanding the pressure case), or, alternatively, removing some quantity (e.g., light transmission or RF absorption) as
a substantial volume of the instrumentation payload. The some condition of the experiment is varied. It is ordinarily
solution was (and still is) obvious: build the subcircuits, difficult to get accurate measurements of small changes in
and test them for conforming quiescent current. They in- a large dc signal, owing to drifts and instabilities in the
variably worked just fine, and the testing served mostly to amplifier. In such a situation a circuit of extreme precision
identify modules in which there was a defective compo- and stability is required.
nent, usually caused by improper handling of the sensitive Here we show the example of a strain gauge sensor,
CMOS components. which consists of a strain-sensitive resistive bridge whose
A second example is a commercial instrument, namely elements change resistance (slightly!) in response to
a sensitive electrometer from Keithley. These things will mechanical strain. A common resistance value is 350 Ω;
measure currents down to femtoamps (10−15 A), which re- and the sensitivity is such that, when biased with +5 V,
quires a front-end stage of extraordinarily low bias cur- the differential output voltage across the bridge changes
rent. They accomplish this with a JFET follower matched by ±10 mV in response to the rated full-scale mechanical
pair as input stage to a conventional precision op-amp, in strain.10 This small differential voltage sits on a dc level
a current-to-voltage configuration (the input is a summing of +2.5 V, so you’ve got to begin with a good differential
junction, at zero volts). And to keep the gate current low, amplifier.
they operate the JFETs at a very low drain voltage of just An important note at the outset: digital techniques offer
+0.55 V, with the source terminal sitting just a fraction of a an attractive alternative to the purely analog circuitry used
volt below the drain. Now, nowhere in the JFET datasheet here. A skilled designer would likely make use of preci-
will you find anything telling you what happens at such sion analog/digital conversion techniques, perhaps in a hy-
low voltages; and they won’t tell you what the gate leakage brid implementation (in which a stable DAC is used to cre-
is likely to be. You can throw up your hands and say that ate the nulling signal within an analog circuit like ours),
such an instrument cannot be made. Or you can do what or perhaps in an all-digital scheme that relies on the intrin-
Keithley did, which is to find a good source of JFETs and sic precision of a high resolution ADC alone.11 Regardless,
qualify them with in-house testing so that you can get on our all-analog example offers a smorgasbord of important
with the job. lessons in precision design. But the reader can confidently
Both examples illustrate that there are situations in look forward to exciting revelations in chapters to come.
which you simply cannot meet your design requirements
while staying within the manufacturer’s published worst-
case specs. Having said that, we note that there are some 5.4.1 Circuit description
engineers who will not deviate from strict worst-case spec- The front-end begins with an instrumentation amplifier U1 ,
ified component parameters in their circuit designs. They a configuration of three op-amps that we’ll talk about later
don’t want to use special parts, and they won’t touch such (§5.15); these are differential-input amplifiers that excel in
stuff with a 10-foot (3m) pole. We invite you to choose achieving high common-mode rejection, and allow gain se-
what you would do. lection with a single resistor (one or more are often pro-
vided internally). Here we’ve selected one with a good
combination of low input current, offset drift, and noise,
5.4 Another example: precision amplifier with
for reasons we’ll explain later. Its gain of ×100 is followed
null offset
with a noninverting ×10 gain stage (U2 ), for an overall gain
Having warmed up with the millivoltmeter, let’s tackle a of ×1000; that produces a full-scale output of ±10 V as in-
more complex design, one in which there are multiple er- put to the nulling circuitry (U3 –U5 ). If the input signal were
ror challenges. We describe the design choices and errors single ended (e.g., from a thermocouple, photosensor, mi-
of this particular circuit within the framework of precision crowave absorption detector, or whatever), you would omit
design in general, thus rendering painless what could oth- U1 , bringing in the signal at point “X,” and adjusting the
erwise become a tedious exercise. gain of U2 accordingly.
We designed a precision amplifier (Figure 5.3) that lets
you “freeze” the value of the input signal, amplifying any 10 The strain-gauge sensor sensitivity is “2mV-per-volt”; that’s pretty low.
subsequent changes from that level by gains of exactly 1, There are semiconductor strain sensors with higher sensitivity, but they
10, or 100. This might come in particularly handy in an may not be as stable.
11
experiment in which you wish to measure a small change in There’s an example of the latter in §13.9.11C.
298 5.5. A precision-design error budget Art of Electronics Third Edition

R4c
5.0 V R4b 1.0M
filter ref 100k
+5V R4a
10 100
11.11k
LT1167A R3 S2
350 350 + U1 OPA277
X 11.11k 1
U2 EXPAND
+ 0.1%
– 50 output
– – ±10 V
350 350 R13a R13b +
Rg = 499Ω 40.2k U3
R1 10.0k
(G = 100) R2 OPA277 R5b
strain gauge 90.0k 20% R5c
10.0k 100% 450k 5M
OFF +15
S1 U6
NULL 78L12
MODE
C1 COTO
R6 2.2μF polypro R5a 0.1
9202–12 μF
nulling phase: 10.0k 50k
R7 S3
R13 10.0k –
τnull = R5C1 –
R4 IN4148
U4 + 12 V
range f 3dB τnull 1% settle U5 + OPA129 coil NULL
100% 16Hz 110 ms 0.5 sec OPA277 R11 R12 Q1
20% 3Hz 550 ms 2.5 sec R10 200 1M 2N7000 HOLD
100.0k R 1000M
9 15 V
R8 1k –15 +15
20t cap leakage
trim R13 100k
0 to 10pA/V Vos trim ±3mV

Figure 5.3. Autonulling dc laboratory amplifier. Gain-setting resistors are 0.1% tolerance.

The nulling circuitry works as follows: the amplifier rent through R10 proportional to the voltage across C1 ; and
stage U3 is configured in the inverting configuration, per- (b) integrator U4 was selected for very low input current IB
mitting a dc offset according to a current added to the sum- (to minimize droop during “hold”), for which the tradeoff
ming junction. Nulling takes place when relay (switch) S3 is relatively poor offset voltage VOS ; so we added an exter-
is activated by a logic HIGH to coil driver Q1 ’s gate. Then nal offset trim (R11 –R13 ). This is not terribly critical, in any
U4 charges the analog “memory” capacitor (C1 ) as neces- case, because an offset here merely causes a nonzero null
sary to maintain zero output. No attempt is made to follow of the same magnitude.
rapidly changing signals, because in the sort of applica-
tion for which this was designed the signals are essentially
5.5 A precision-design error budget
dc, and some averaging is a desirable feature. When the
switch is opened, the voltage on the capacitor remains sta- For each category of circuit error and design strategy, we
ble, resulting in an output signal from U3 proportional to will devote a few paragraphs to a general discussion, fol-
the wanderings of the input thereafter. The gain about the lowed by illustrations from the preceding circuit. Circuit
input null level can be increased in decade steps (switch errors can be divided into the categories of (a) errors in
S2 ) to expand changes; the gain of the nulling integrator is the external network components, (b) op-amp (or ampli-
switched accordingly to keep the feedback bandwidth con- fier) errors associated with the input circuitry, and (c) op-
stant. Switch S1 selects the full-scale nulling range (100%, amp errors associated with the output circuitry. Examples
20%, or none). of the three are resistor tolerances, input offset voltage, and
There are a few additional features that we should de- errors that are due to finite slew rate, respectively.
scribe before going on to explain in detail the principles Let’s start by setting out our error budget. It is based on
of precision design as applied here: (a) U5 , in addition a desire to keep input drift (from temperature and power-
to providing the needed inversion of the nulling level, supply variations) down to the 10 μ V level, and nulled drift
participates in a first-order leakage-current compensation (primarily from capacitor “droop,” along with temperature
scheme: the tendency of C1 to discharge slowly through its and supply variations) below 1 μ V/min (referred to the in-
own leakage (≥100,000 MΩ, corresponding to a time con- put, or RTI). As with any budget, the individual items are
stant of ≥3 days) is compensated by a small charging cur- arrived at by a process of tradeoffs, based on what can be
Art of Electronics Third Edition 5.5.1. Error budget 299

done with available technology. In a sense the budget rep- 4. Hold amplifier (U4 : OPA129)
resents the end result of the design, rather than the starting
U4 offset tempco 10 nV/◦ C
point. However, it will aid our discussion to have it now. Power supply 10 nV/100 mV change
It’s important to understand that the items in such a Capacitor droop 0.4 μ V/min
budget come from several sources: (a) parameters that are (see current error budget)
specified in the datasheet; (b) estimates of poorly specified Charge transfer 1.1 nV
(or unspecified) parameters; and (c) parameters that you Current errors through C1 (needed for the preceding
may not even realize are important.12 We might paraphrase voltage error budget) are as follows:
these, respectively, as the knowns, the known unknowns,
Capacitor leakage
and the unknown unknowns. Maximum (uncompensated) (100 pA)
Typical (compensated) 10 pA
U4 input current 0.25 pA
U4 ’s nulled VOS /R10 0.1 pA
5.5.1 Error budget
Relay S3 OFF leakage 10 pA (1 pA typ)
These are all in the form of worst-case voltage errors (at Printed-circuit-board leakage 5.0pA
25◦ C) referred to the instrument input. Not bad, though you could complain about the 40 μ V in-
1. ×100 Difference amplifier (U1 : LT1167A) put offset – but we’d reply that a few tens of microvolts
Offset voltage 40 μ V of static offset is of no concern in a nulling instrument,
Noise voltage (0.1–10 Hz) 0.28 μ Vpp (typ – no “max” spec) it’s only the drift (with time and temperature) that matters.
Temperature 0.3 μ V/◦ C The various items in the budget will make sense as we dis-
Power supply 28 nV/100 mV change cuss the choices faced in this particular design. We orga-
Input offset current ×Rs 0.11 μ V/350 Ω of Rs nize these by the categories of circuit errors listed earlier:
2. ×10 Gain amplifier (U2 : OPA277) network components, amplifier input errors, and amplifier
Offset voltage 0.5 μ V
output errors.
Temperature 10 nV/◦ C We’ll address these errors quantitatively, in the context
Time 2 nV/month (typ – no “max” spec) of Figure 5.3, beginning in §5.7.6, after looking at error
Power supply 1 nV/100 mV change sources a bit more generally in the next section.
Bias current 0.3 μ V
Load-current heating 5 nV at full scale (5 mW, 0.1◦ C/mW)
3. Output amplifier (U3 : OPA277) 5.6 Component errors

Offset voltage 50 nV The degrees of precision of reference voltages, current

Temperature 1 nV/◦ C sources, amplifier gains, etc., all depend on the accuracy
Time 0.2 nV/month (typ – no “max” spec) and stability of the resistors used in the external networks.
Power supply 0.1 nV/100 mV change Even where precision is not involved directly, component
Bias current 30 nV accuracy can have significant effects, e.g., in the common-
Load-current heating 5 nV at full scale (1 kΩ load) mode rejection of a differential amplifier made from an op-
amp (see §§4.2.4 and 5.14), where the ratios of two pairs
of resistors must be accurately matched. The accuracy and
linearity of integrators and ramp generators depend on the
properties of the capacitors used, as do the performances
of filters, tuned circuits, etc. As we will see presently,
12 We discovered an example of the latter while measuring femtoamp there are places where component accuracy is crucial, and
leakage currents in a nice shielded test enclosure: after the box had
there are other places where the particular component value
been opened to change anything inside, it took quite a while for the
hardly matters at all.
measurements to settle down. Turns out that the process of moving
things caused some rearrangement of surface charge on the Teflon-
Components are generally specified with an initial ac-
insulated wires, with a long relaxation time. Pease talks about this in curacy, as well as the changes in value with time (sta-
his article “What’s All This Teflon Stuff, Anyhow?” – see the footnote bility) and temperature. In addition, there are specifica-
references in §5.10.7. We’ve experienced a similar bizarre manifesta- tions of voltage coefficient (nonlinearity) and bizarre ef-
tion with analog panel meters, where a swipe of the hand across the fects such as “memory” and dielectric absorption (for ca-
glass face can cause the needle to move way upscale. . . and stay there! pacitors). Complete specifications also include the effects
300 5.6. Component errors Art of Electronics Third Edition

of temperature cycling and soldering, shock and vibration, sometimes as a time constant (megohm-microfarads). In
short-term overloads, and moisture, with well-defined con- this circuit C1 must have a value of at least a few micro-
ditions of measurement. In general, components of greater farads in order to keep the charging rate from other cur-
initial accuracy will have their other specifications corre- rent error terms small (see budget). In that range of ca-
spondingly better, in order to provide an overall stability pacitance, film capacitors (polystyrene, polypropylene, and
comparable to the initial accuracy. However, the overall er- polyester) have the lowest leakage. Polypropylene capac-
ror that is due to all other effects combined can exceed the itors (from manufacturers such as Epcos, Kemet, Pana-
initial accuracy specification. Beware! sonic, Vishay, and Wima, generally with voltage ratings
As an example, RN55C 1% tolerance metal-film re- of 200–600 V) often have dc leakage specified in units of
sistors have the following specifications: temperature co- megohm–microfarads, with values in the range of 10,000–
efficient (tempco), 50 ppm/◦ C over the range −55◦ C to 100,000 MΩ μ F; thus for a capacitance of 2.2 μ F this
+175◦ C; soldering, temperature, and load cycling, 0.25%; amounts to a parallel equivalent leakage resistance of at
shock and vibration, 0.1%; moisture, 0.5%. By way of least 4.5–45 GΩ.
comparison, the legacy 5% carbon-composition resistors Even so, and adopting a plausible value of, say, 100 GΩ,
(Allen–Bradley type CB) have these specifications: tem- that’s equivalent to a leakage current of 100 pA at full
pco, 3.3% over the range 25–85◦ C; soldering and load output (10 V), corresponding to droop rates of roughly
cycling, +4%, −6%; shock and vibration, ±2%; mois- 3 mV/min at the output, the largest error term by far. For
ture, +6%. From these specs it should be obvious why that reason we added the leakage-cancellation scheme de-
you can’t just select (using an accurate digital ohmme- scribed earlier. It is fair to assume that the effective leakage
ter) carbon resistors that happen to be within 1% of their can be reduced to 10% of the capacitor’s worst-case leak-
marked value for use in a precise circuit, but are obliged age specification (in practice, we can probably do much
to use 1% resistors (or better) designed for long-term sta- better). No great stability is required in the cancellation
bility as well as initial accuracy. For the utmost in preci- circuit, given the modest demands made of it. As we will
sion it is necessary to use ultra-precise resistors or resis- see later when we discuss voltage offsets, R10 is kept in-
tor arrays, such as Susumu’s RG-series of SMT (surface- tentionally large so that input voltage offsets in U4 aren’t
mount technology) resistors (tolerance to 0.02%, tempco converted to a significant current error.
to 5 ppm/◦ C), Vishay’s MPM-series metal-film networks
(absolute tolerance to 0.05%, matched to 0.01%; absolute B. Dielectric absorption
tempco to 25 ppm/◦ C, matching tempco to 2 ppm/◦ C), or We’re not done with the capacitor, yet. An important ef-
their even better “Bulk Metal Foil” types (absolute toler- fect, quite apart from resistive leakage, is capacitor “mem-
ance to 0.005%, matched to 0.001%; absolute tempco to ory,” officially known as dielectric absorption.13 This is
0.2 ppm/◦ C, matching tempco to 0.1 ppm/◦ C). the tendency of capacitors to return, to some extent, to a
previous state of charge, as shown in the measured data of
5.6.1 Gain-setting resistors Figure 5.4 (each capacitor was held at +10 V for a day or
more, then discharged to 0 V for 10 s, then open-circuited
In the preceding circuit (Figure 5.3), 0.1% resistors are and observed while it did its thing); see also the discussion
used in the gain-setting network, R1 –R4 , for accurately pre- in §§1x.3, 4.5.1, 4.5.6, and 13.8.4.
dictable gain. As we’ll see shortly, the value of R3 is a com-
promise, with small values reducing offset current error in 5.6.3 Nulling switch
U3 but increasing heating and thermal offsets in U2 . Note
that 1% resistors are used in the offset attenuator network, In the previous edition of this book, the analogous circuit
R5 –R13 ; here absolute accuracy is irrelevant, and the stabil- (Figure 7.1, page 393) used MOSFETs (instead of relay S3 )
ity of 1% metal-film resistors is altogether adequate. to activate the nulling circuit. That choice provided plenty
of education, because we had to worry about (a) MOSFET
channel leakage, devastatingly large at about ∼1 nA, and
5.6.2 The holding capacitor
(b) gate charge injection, of order 100 pC in that circuit.
A. Leakage The solutions there were (a) the use of a series-connected
The largest error term in this circuit, as the error budget
shows, is capacitor leakage in the holding capacitor, C1 . 13 It is not entirely clear that what is called “leakage” in high-quality ca-
Capacitors intended for low-leakage applications give a pacitors is in fact distinct from dielectric absorption; see the footnote
leakage specification, sometimes as a leakage resistance, in §4.5.5.
Art of Electronics Third Edition 5.6.3. Nulling switch 301

non-polar tantalum high-K ceramic

0.2 10%

organic
electrolytic paper/oil } aluminum electrolytic
} tantalum

rd
da
silicon MOS trench

an
1% polyethylene (PEN)
ica
st

Voltage (fraction of Vsoak)

m C0G ceramic (brand X)
lu m
nt a } polyester (PET, Mylar)
Voltage (V)

ta
polyphenylene sulfide (PPS)
0.1 0.1% polycarbonate (PC)

mica
} polypropylene (PP)

} polystyrene PS)
polyester
0.01%
C0G ceramic (brand Y)
polycarb
polypro
teflon (PTFE)

0 0.001%
0 20 40 60 80 100 1 10 100
A. Time (seconds) B. Time (seconds)

Figure 5.4. Capacitors exhibit memory effect (dielectric absorption), a tendency to return to a previous state of charge. This is highly
unhelpful in applications (such as analog sample-and-hold) in which a capacitor is used to retain an analog voltage. A. linear plot, showing
the basic effect; B. log–log plot, revealing four decades of dirty laundry. Teflon is the uncontested winner; but it’s hard to find, so the plastic
film types (PS and PP) are generally your best choice. Ceramic C0G can be excellent, but beware brand variations.

MOSFET pair, such that the downstream MOSFET had all age in the holding capacitor C1 . It’s easy to estimate the
four terminals (source, drain, gate, and substrate) ordinar- error: the Coto relay specifies a coil-to-contact capacitance
ily at zero volts, and (b) a sufficiently large holding ca- of 0.2 pF (for our grounded-shield configuration), and thus
pacitor such that the error was negligible, along with the a corresponding charge transfer of ΔQ = 2.4 pC when the
observation that charge transfer was not of great concern 12 V coil is energized.14 That produces a voltage step of
because it resulted in a small offset of the auto-zero. ΔVC = ΔQ/C1 = 1.1 μ V across the 2.2 μ F capacitor C1 .
This time we have taken a more pragmatic (but less This is completely within our error budget; in fact, we’ve
educational) approach, by using instead a small signal re- likely overestimated the effect, because our calculation as-
lay. The Coto 9202-12 is a small (4 mm×6 mm × 18 mm) sumed that the entire coil undertook a 12 V step, whereas
shielded relay, energized by 12 Vdc at 18 mA, with a spec- the average step is half that value.
ified OFF resistance of 1012 Ω minimum (1013 Ω typical). For readers who harbor a deep-seated dislike of me-
The worst-case Roff value corresponds to a droop rate of chanical relays, we show in Figure 5.5 a switch imple-
0.3 mV/min, but ten times less for “typical” Roff . Relays mentation with series-connected JFETs. During HOLD the
isolate better than transistor switches (higher Roff and lower JFET gates are back-biased to −5 V, by the somewhat tor-
Coff , here < 1 pF), and they have better ON performance as tured level-shifting circuit Q1 –Q4 . The reader is invited
well (lower Ron than a low-capacitance analog switch, here to estimate the magnitude of droop (use the datasheet’s
<0.15 Ω). ID(off) =0.1 pA) and of charge injection (use the datasheet’s
Of course, there is capacitance between the coil and Crss =0.3 pF) for this circuit.
the contacts, and thus an opportunity for the same sort
of charge transfer as with a MOSFET switch (where the 5.7 Amplifier input errors
full-swing transitions at the gate couple capacitively to the The deviations of op-amp input characteristics from the
drain and source). As we remarked in Chapter 3 (§3.4.2E), ideal that we discussed in Chapter 4 (finite values of in-
the total charge transferred is independent of the transition put impedance and input current, voltage offset, common-
time and depends only on the total control-voltage swing mode rejection ratio, and power-supply rejection ratio, and
and the coupling capacitance: ΔQ = Ccoup ΔVcontrol . In this
circuit, charge transfer results in a simple voltage error of 14 Assuming care is taken in the wiring layout to maintain the low 0.2 pF
the auto-zero, because the charge is converted to a volt- capacitance of the HOLD signal.
302 5.7. Amplifier input errors Art of Electronics Third Edition

Table 5.2 Representative Precision Op-amps

CMRR
# per pkga Input Current Offset Voltage en Swing to

DIP avail
null pins
Supply p @25ºC Vos ΔVos @1kHz GBW Slew Supply Cost
Range IQ typ max typ max typ min typ typ typ IN OUT qty 25
Part # (V) (mA) (pA) (pA) (μV) (μV) (μV/°C) dB (nV/√Hz) (MHz) (V/μs) + – + – ($US) Comments
bipolar
LT1077A 1 2.2–44 0.05 7nA 9 nA 9 40 0.4 97 27 0.23 0.08 - - 3.84 single-supply
LT1013 2,4 3.4–44 0.35 12nA 20 nA 40 150 0.4 100 22 0.7 0.4 - - - 3.13 single-supply
OPA277P 1,2,4 4–36 0.79 0.5 nA 1nA 10 20 0.1 130 8 1 0.8 - - - - 3.17 improved OP-27
LT1012AC 1 8–40 0.37 25 pA 0.1nA 8 25 0.2 114 14 0.5 0.2 - - - - 5.11 superbeta, comp
LT1677 1 3–44 2.8 2nA 20 nA 20 60 0.4 109 3.2 7.2 2.5 3.07 or AD8675, 0.5nA
LT1468 1 7–36 3.9 3 nA 10 nA 30 75 0.7 96 5 90 23 - - - - 4.26 0.7ppm distortion
JFET
LF412Ab 1,2 12–44 1.8 50 200 500 1000 - 80 25 4 15 - - - - - 4.47 '411A Vos <0.5mV
OPA827 1 8–40 4.8 15 50 75 150 1.5 104 3.8 22 28 - - - - - - 9.00 0.1–10Hz: 0.25μVpp
CMOS
LMC6482Ab 2,4 3–16 0.5 0.02 4 110 750 1 70 37 1.5 1.3 - 1.88 LMC7101 = SOT23
MAX4236A 1 2.4–6 0.35 1 500 5 20 0.6 84 14 1.7 0.3 - - - 1.78 shdn, '37 decomp
OPA376 1,2,4 2.2–7 0.76 0.2 10 5 25 0.26 76 7.5 5.5 2 - - 1.32 etrim
auto-zero
AD8628 1,2,4 2.7–6 0.85 30 100 1 5 0.002 120 22 2.5 1 - - 1.92 SOIC-8, SOT23-5
Notes: (a) boldface indicated number in a package for the part # listed. (b) not precision, listed for comparison. (p) IQ, typical, per amplifier.

their drifts with time and temperature) generally consti- 5.7.1 Input impedance
tute serious obstacles to precision circuit design, and they
Let’s discuss briefly the error terms just listed. The effect of
force trade-offs in circuit configuration, component selec-
finite input impedance is to form voltage dividers in com-
tion, and the choice of a particular op-amp. The point is
bination with the source impedance driving the amplifier,
best made with examples, as we will do shortly. Note that
reducing the gain from the calculated value. Most often
these errors, or their analogs, exist for amplifiers of discrete
this isn’t a problem, because the input impedance is boot-
design as well.
strapped by feedback, raising its value enormously. As an
While reading through the following discussion, you
example, the OPA277P precision op-amp (with BJT-input,
may find it helpful to refer to Tables 5.2 and 5.3 where we
not FET-input stage) has a typical “differential-mode input
list ten favorite precision op-amps (plus two inexpensive
impedance,” of 100 MΩ. In a circuit with plenty of loop
and not-precision comparees). Those listings add quantita-
gain, feedback raises the input impedance to the datasheet’s
tive flesh to a somewhat abstract set of bony teachings.
“common-mode input impedance” 250,000 MΩ. If that’s
not good enough, FET-input op-amps have astronomical
values of Rin , for example 1013 Ω (differential) and 1015 Ω
(common-mode) for the OPA129 that’s used in this circuit.

(R5a)
5.7.2 Input bias current
Q2 PN4117A Q3
to U4 More serious is the input bias current. Here we’re talking
+15 R5 R6 about currents measured in nanoamps, and this already pro-
3.3M 33k
R1 duces voltage errors of microvolts for source impedances
15k R3
5k R4 as small as 1 kΩ. Again, FET op-amps come to the res-
Q1 10k
cue, but with generally increased voltage offsets as part of
2N7000 Q2
Q3 Q4
2N7000 2N7000 the bargain. Bipolar superbeta op-amps such as the LT1012
can also have surprisingly low input currents. As an ex-
R2
ample, compare the OPA277 precision bipolar op-amp
15V
5k with the LT1012 (bipolar, optimized for low bias current),
–15
the OPA124 (JFET, precision and low bias), the OPA129
Figure 5.5. Electronic switch replacement of mechanical relay S3 (ultra-low-bias JFET), and the LMC6001 (CMOS, lowest-
in Figure 5.3. A lot of work, and no improvement in performance. bias op-amp); these are some of the best you can get at the
Art of Electronics Third Edition 5.7.2. Input bias current 303

Table 5.3 Nine Low-input-current Op-amps leakage current, and it rises dramatically with increasing
Input current temperature: it roughly doubles for every 10◦ C increase in
Supply @25°C VOS TCVOS chip temperature, as seen in Figure 5.6. Because FET op-
Vtotal IQ typ max max typ max
Part # (V) (μA) (pA) (pA) (μV) (μV/°C) (μV/°C) amps often run warm (our jellybean LF412, for example,
bipolar dissipates 100 mW when run from ±15 V supplies), the
OPA277P 10–36 790 500 1000 20 0.1 0.15 actual input current may be considerably higher than the
superbeta
LT1012AC 8–40 370 25 100 25 0.2 0.6 25◦ C figures you see on the datasheet.15 By contrast, the
AD706 4–36 750 50 200 100 0.2 1.5 input current of a BJT-input op-amp is actual base current,
JFET relatively constant with temperature. So a FET-input op-
OPA124PB 10–36 2500 0.35 1 250 1 2
OPA129B 10–36 1200 0.03 0.1 2000 3 10
amp with impressive input-current specs on paper may not
MOSFET give such an improvement over a good superbeta bipolar
MAX9945 4.8–40 400 0.05 - 5000 2 - unit. As the graph shows, for example, the LT1057 JFET-
CMOS, low-voltage
LMP7721 1.8–6 1300 0.003 0.02 150 1.5 4
input op-amp with its ∼3 pA input current (at 25◦ C) will
LMC6001A 5–16 450 0.01 0.025 350 2.5 10 have an input current of about 100 pA at 75◦ C chip tem-
ADA4530-1 4.5–16 900 <0.001 0.02 50 0.13 0.5 perature, which is higher than the input current of the su-
perbeta LT1012 at the same temperature. And our jellybean
time of writing, and we’ve chosen the best grade of each LF412 JFET op-amp has an input current that is compara-
one (Table 5.3; and see also Table 5.5 on pages 320–321 ble to that of the LT1012 at 25◦ C and many times higher at
for greater detail, along with a wider selection of precision elevated temperatures.
op-amps with low offset voltage; as well as relevant tables
in Chapter 4x).
LT1013
Well-designed FET amplifiers have extremely low bias 10 1
41
currents, but with much larger offset voltages, compared LF

with the precision OPA277. Because the offset voltage can 1nA
OPA277
always be trimmed, what matters more is the drift with 115
0
temperature. In this case the FET amplifiers are 4 to 20 100 LTC
Input Current, IB

LT1012
times worse. The op-amp with the lowest input current uses
54
MOSFETs for the input stage. MOSFET op-amps are pop- 10 C 20
, LT 2 72
057 C2
ular because of the proliferation of inexpensive units like LT1 TL 29
A1
TI’s TLC270 series, as well as the ultra-low-bias-current 1pA OP 4 82
C6
LM
devices like National’s LMC6000-series parts. However,
100
in contrast to JFETs or bipolar transistors, MOSFETs can 62
C6
, LM BJT
have very large drifts of offset voltage with time, an effect 0 41
10 C6 JFET
that is discussed below. So the improvement in current er- LM
CMOS
auto-zero
rors you buy with a FET op-amp can be wiped out by the 1fA
larger voltage error terms. With any circuit in which bias –50 –25 0 25 50 75 100 125
current can contribute significant error, it is often wise to Temperature (˚C)
ensure that both op-amp input terminals see the same dc Figure 5.6. Op-amp input current versus temperature, plotted from
source resistance (see, e.g., Figure 4.55); then the op-amp’s datasheet values. See also Figures 5.38 and 3.48. JFET-input op-
offset current becomes the relevant specification. But be amps are indicated in plain (“roman”) type, BJT op-amps are italic,
aware that a number of precision op-amps use a “bias- CMOS op-amps are bold, and auto-zero op-amps are bold slant.
compensation” scheme to cancel (approximately) the input
current in order to make that error term smaller (look back
at Exercise 2.24 on page 125 to see how it’s done). With 15 Making this quantitative, the LF412’s maximum quiescent current is
op-amps of this type you generally don’t gain anything by 6.5 mA, thus 195 mW dissipation when run from ±15 V supplies. In a
matching the dc resistances seen by the two inputs, as the DIP-8 package that produces a 22◦ C temperature rise (the thermal re-
residual bias current and the offset current are comparable, sistance RΘJA =115◦ C/W), with a consequent quadrupling of the spec-
in a bias-compensated op-amp. ified IB =200 pA (max). If the op-amp were driving a load, you’d have
yet more dissipation. To put this in perspective, though, note that the
A. Variation with temperature driving impedance seen at the op-amp’s input would have to be greater
One additional point to keep in mind when using FET-input than 1 MΩ in order for this current-induced error to exceed the 1 mV
op-amps is that the input “bias” current is actually gate (typ) input offset-voltage error.
304 5.7. Amplifier input errors Art of Electronics Third Edition

1μA
JFET input
MOS input LT1630
LM6132
BJT input
BJT RR-input
1nA OPA277
82
AD86
LT1057
LTC6084
1pA
Input Current

LPV521
LMP7721
±1fA
OPA129

OPA627
–1pA
LT6003

–1nA
LT1013

–1μA
0 0.2 0.4 0.6 0.8 1.0
Common-mode Input, VCM / (VCC –VEE)

Figure 5.7. Op-amp input current (at 25◦ C) versus common-mode input voltage, plotted over their operating range from datasheet values;
BJT op-amps with rail-to-rail input stages (“BJT RR-input”) undergo an abrupt reversal of input-current polarity.

B. Variation with common-mode input voltage (nonchopper, see below) world of low offsets is the bipolar
Finally, a very important caution: when comparing op-amp OPA277P (±20 μ V, max), which, astonishingly, is equaled
input currents, watch out for some op-amp designs whose by the CMOS MAX4236A (though the latter’s drift is 12×
IB depends on the input voltage. This behavior is common worse, as one might expect).
in op-amps that are designed to operate over a rail-to-rail Although many good single op-amps (but not duals or
input (RRI) range, both FET-input and (especially) BJT- quads) have offset-adjustment terminals, it is still wise
input types. The spec sheet usually lists IB only at zero volts to choose an amplifier with inherently low initial offset
(or mid-supply), but a good datasheet will show curves as VOS max, for several reasons. First, op-amps designed for
well. See Figure 5.7 for some typical IB versus Vin behavior. low initial offset tend to have correspondingly low offset
The good performance of the OPA129 and OPA627 in this drift with temperature and with time. Second, a sufficiently
regard is due in part to their use of cascode input stages. precise op-amp eliminates the need for external trimming
The LMP7721 stands out not only for its 20 fA maximum components (a trimmer takes up space, needs to be adjusted
input current, but for its prize-winning trajectory on this initially, and may change with time). Third, offset voltage
graph. drift and common-mode rejection are degraded by the un-
balance caused by an offset-adjustment trimmer.
5.7.3 Voltage offset Figure 5.8 illustrates how a trimmed offset has larger
drifts with temperature. It shows also how the offset ad-
Voltage offsets at the amplifier input are obvious sources
justment is spread over the trimmer pot rotation, with best
of error. Op-amps differ widely in this parameter, ranging
from “precision” op-amps offering worst-case VOS values
generally in the 10s of microvolts to ordinary jellybean op- dence we added that “we expect to see further incremental improve-
amps like the LF412 with VOS values of 2–5 mV. At the ments in this area.” That confidence was evidently misplaced: the
time of writing,16 the champion (by a slim margin) in the Maxim website now says of the MAX400 “This product was manu-
factured for Maxim by an outside wafer foundry using a process that
16 In the previous edition of this book we awarded that honor to the is no longer available. It is not recommended for new designs. The
MAX400M, with its specified worst-case VOS of 10 μ V. With confi- datasheet remains available for existing users.” Sic transit. . .
Art of Electronics Third Edition 5.7.4. Common-mode rejection 305

resolution near the center, especially for large values of Rf

OPA277
trimmer resistance. Finally, you’ll generally find that the Rg LT1012
– etc +
recommended external trimming network provides far too
much range, making it nearly impossible to trim VOS down ±50μV + –
to a few microvolts; even if you succeed, the adjustment is ±50μV
100K
so critical it won’t stay trimmed for long. Another way to R4 R5 C1 Rf
100 0.1μF R9 Rg
think about it is to realize that the manufacturer of a pre- 100k
1M 1k
cision op-amp has already trimmed the offset voltage, in a
±50 mV C2
custom test jig using “laser-zapping” techniques; you may R3 0.1
be unable to do any better yourself. Our advice is (a) to R2 3.3k R8
R7 3.3k
1M 1M
use precision op-amps for precision circuits, and (b) if you
must trim them further, arrange a narrow-range trim cir- –15 +15 –15 +15
cuit similar that shown in Figure 5.3, with values adjusted R1 100K R6 100K
to produce a full-scale range of ±50 μ V, linear in trimmer A. Inverting B. Non-inverting
rotation (e.g., R11 =33 Ω and R12 =10M). Figure 5.9 shows
Figure 5.9. Narrow-range external trimming networks for precision
how to arrange narrow-range external offset trims for both op-amps.
inverting and noninverting amplifier configurations.
Because voltage offsets can be trimmed to zero, what
ultimately matters is the drift of offset voltage with time,
temperature, and power-supply voltage. Designers of pre- this design example. For applications in which drifts of a
cision op-amps work hard to minimize these errors. You few microvolts are important, the related effects of thermal
get the best performance from bipolar-input (as opposed to gradients (from nearby heat-producing components) and
FET) op-amps in this regard, but input-current effects may thermal emf’s (from voltages across junctions of dissimilar
then dominate the error budget. As shown in Table 5.2 on metals) become important. This will come up again when
page 302 the best op-amps keep drifts below 1 μ V/◦ C; the we discuss the ultraprecise chopper-stabilized amplifier in
OPA277P typifies the best drift specification (for a non- §5.11.
chopper op-amp): ΔVOS =0.2 μ V/◦ C, max. An important caution: when datasheets specify the par-
Another factor to keep in mind is the drift caused by ticular measurement conditions for a parameter like VOS ,
self-heating of the op-amp when it drives a low-impedance they mean it! A sobering example is shown in Figure 5.10,
load. It is often necessary to keep the load impedance above a plot of VOS versus VCM for the AD8615 op-amp, whose
10k to prevent large errors from this effect. As usual, that datasheet declares (on the front page) “Low offset voltage:
may compromise the next stage’s error budget from the 65 μ V max,” but whose tabular data reveal that the mea-
effects of bias current! We’ll see just such a problem in surement conditions are “VCM = 0.5 V and 3.0 V.”

5.7.4 Common-mode rejection

+15mV
Insufficient common-mode rejection ratio (CMRR) de-
T3 +10
T2
grades circuit precision by effectively introducing a volt-
pot turns
T1 age offset as a function of dc level at the input. This ef-
+5 fect is usually negligible, because it is equivalent to a
+1 +2 +3 +4 +5
small gain change, and in any case it can be overcome
–5 –4 –3 –2 –1 by choice of configuration: an inverting amplifier is insen-
–5 T1 sitive to op-amp CMRR, in contrast with a noninverting
T2
amplifier. However, in “instrumentation amplifier” appli-
–10 T3 cations you are looking at a small differential signal riding
on a large dc offset, and a high CMRR is essential. In such
–15mV cases you have to be careful about circuit configurations
and, in addition, you must choose an op-amp with a high-
Figure 5.8. Typical op-amp offset versus offset-adjustment poten- CMRR specification. Once again, a superior op-amp like
tiometer rotation for several temperatures. the OPA277 can solve your problems, with a CMRR (min)
306 5.7. Amplifier input errors Art of Electronics Third Edition

500 5.7.6 Nulling amplifier: input errors

400 Now we’re ready to embark on a detailed discussion of the
300 most serious error issues in the amplifier of Figure 5.3.
Offset Voltage (μV)

200 The circuit begins with an optional precision instrumen-

100 tation amplifier front-end U1 (more in §5.15), here chosen
0 for its stable and accurate differential gain of √100×, low
–100 input current, and adequately low noise (9 nV/ Hz typ at
–200 10 Hz). Its worst-case offset voltage and tempco (±40 μ V,
–300 0.3 μ V/◦ C) specs are a factor of two worse than a preci-
–400
sion op-amp like the OPA277 (in the best grade), but its
120 dB (min) CMRR as a difference amplifier, combined
–500
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 with 0.08% worst-case gain accuracy, 50 ppm/◦ C (max)
Common-mode Voltage (V) gain tempco, and low-voltage noise, make it a good front-
Figure 5.10. This op-amp specifies a maximum offset voltage of end for a low-level bridge application like this. Although
±60 μ V. But it also specifies the following conditions: Vs =3.5 V, and not important with the low source impedance in this ex-
VCM =0.5 V or 3.0 V. Moral: don’t ignore the footnotes! ample, its input current is satisfyingly low for a BJT-input
amplifier, at just 0.35 nA max.17
For single-ended inputs U1 is omitted, and the signal is
at dc of 130 dB, compared with our jellybean LF411’s mea- brought in at point “×” (add a 470 Ω series resistor, with
ger specification of 70 dB. We discuss high-gain differen- a pair of low-leakage clamp diodes – see Figure 5.2 – to
tial and instrumentation amplifiers later in the chapter, be- the rails, for overdrive protection). The OPA277’s accu-
ginning at §5.13. racy and stability rule here, though it is tempting to con-
sider substituting a FET-input part; but the 10× poorer
VOS tempco specification more than offsets the advantage
5.7.5 Power-supply rejection of low input current, except with sources of very high
impedance. The OPA277’s 1 nA (max) bias current gives
Changes in power-supply voltage cause small op-amp er- an error of 1 μ V/1 kΩ source impedance, whereas the best-
rors. As with most op-amp specifications, the power-supply in-class JFET OPA627B (at $35 apiece!), though providing
rejection ratio (PSRR) is referred to a signal at the input. negligible current error with its 5 pA (max) input current,
For example, the OPA277 has a specified PSRR of 126 dB would exhibit voltage offset drifts as large as 3 μ V/4◦ C
at dc, meaning that a 1 volt change in one of the power- (4◦ C is considered a typical laboratory ambient tempera-
supply voltages causes a change at the output equivalent to ture range of variation). In this circuit one could happily
a change in the differential input signal of 0.5 μ V. add an offset trim to U2 , preferably in the manner of Fig-
The PSRR drops with increasing frequency, approxi- ure 5.9. As mentioned earlier, feedback bootstraps the input
mately tracking the behavior of the open-loop gain, and a impedance to 250 GΩ and eliminates any gain errors from
graph documenting this scurrilous behavior is often given finite source impedance, up to 25 MΩ (for a gain error less
on the datasheet. For example, the PSRR (relative to the than 0.01%).
negative rail) of our favorite OPA277 begins dropping at U2 drives an inverting amplifier (U3 ), with R3 chosen
1 Hz and is down to 95 dB (typ) at 60 Hz and 50 dB at as a compromise between heat-produced thermal offsets
10 kHz. This rarely presents a problem, because power- in U2 and bias-current offset errors in U3 . The value cho-
supply noise is also decreasing at higher frequencies if you sen keeps heating down to 5 mW (at 7.5 V output, the
have used good bypassing. However, 120 Hz ripple could worst case), which works out to a temperature rise of
present a problem if an unregulated supply is used. 0.8◦ C (the op-amp has a thermal resistance RΘJA of about
It is worth noting that the PSRR will not, in general, be 0.15◦ C/mW, see §9.4), with a consequent maximum volt-
the same for the positive and negative supplies. Thus the age offset of ΔVOS = TCVOS ΔT = 0.12 μ V. The 11 kΩ
use of dual-tracking regulators doesn’t necessarily bring
any benefits. Note also that PSRR is often specified for 17 In fact, if noise is of primary concern you could substitute the ×4
G = 1, and can be considerably worse at higher gains; in quieter INA103 instrumentation amplifier at the front-end, paying the
fact, op-amps have been found that exhibit gain (!) from price in input offset current: a whopping 1 μ A (thus ±350 μ V) of static
one rail to the output at moderate gain settings. offset voltage created by the 350 Ω differential source resistance here.
Art of Electronics Third Edition 5.8.1. Slew rate: general considerations 307

source impedance seen by U3 results in an error due to bias- 5.8.1 Slew rate: general considerations
current offset, but, with U3 inside a feedback loop with U4
As we mentioned in §4.4.1K, an op-amp can swing its out-
and U5 trimming the overall offset to zero, all that matters
put voltage only at some maximum rate. This effect orig-
is the drift in the current error term. The OPA277 provides a
inates in the frequency-compensation circuitry of the op-
graph of typical bias-current change with temperature (not
amp, as we will soon explain in a bit more detail. One con-
often specified by manufacturers), from which the error re-
sequence of a finite slew rate is to limit the output swing at
sult of 0.2 μ V/4◦ C in the error budget is calculated. Reduc-
high frequencies to a maximum of V pp = S/π f , as shown
ing the value of R3 would improve this term, at the expense
in §4.4.2 and plotted here in Figure 5.11.
of the heating term in U2 .
A second consequence is best explained with the help
The dc input impedance of U3 comes closer to present-
of a graph of slew rate versus differential-input signal (Fig-
ing a problem. To estimate the error, we compare U3 ’s diff-
ure 5.12). The point to be made here is that a circuit that de-
erential input impedance of 100 MΩ with the worst-case
mands a substantial slew rate must operate with a substan-
(i.e., with gain set for ×100) impedance seen driving its in-
tial voltage error across the op-amp’s input terminals. This
put. The latter is just the feedback resistance (1M) divided
can be disastrous for a circuit that pretends to be highly
by the loop gain GOL /GCL , thus 10 Ω. So the worst-case
precise: the feedback loop is in error, more so as the out-
loading effect is 1 part in 107 , three orders of magnitude
put slews more rapidly, thus producing a distorted output
less than 0.01% error. This is one of the toughest examples
waveform. (Look ahead at the measured distortion plots in
we could think of, and even so the op-amp input impedance
Figure 5.19 on page 311 to see this effect, for example in
presents no problem, thus demonstrating that, in general,
the LT1013 for which S=0.8 V/μ s.)
you can ignore the effects of op-amp input impedances.
Drifts in offset voltage in both U2 and U3 over time, tem-
perature, and power-supply variations affect the final error Slew-rate-limited Output (Vpp) 30 “full-power BW”
equally and are tabulated in the budget. It is worth point-
ing out that they are all automatically cancelled at each 10 Vpp =
SR
πf
“zeroing” cycle, and only short-term drifts matter anyway.

SR
These errors are all in the microvolt range, thanks to a good

10 0
10
=0

1V
3

V/μ
choice of op-amp. U4 has larger drifts, but it must be a FET

V/μ
.1 V

/μs

s
s
type to keep capacitor current small, as already explained.
/μs
Note that errors in U4 ’s output are amplified by the gain
1
setting of U3 ; thus they are specified as input errors in the
budget.
Note the general philosophy of design that emerges 0.3
from this example: you work at the problem areas, choos- 100 1k 10k 100k 1M 10M 100M
ing configurations and components as necessary to reduce Frequency (Hz)
errors to acceptable values. Tradeoffs and compromises are Figure 5.11. Maximum output swing versus frequency.
involved, with some choices depending on external fac-
tors (e.g., the use of a FET-input op-amp for U2 would Let’s look at the innards of an op-amp in order to get
be preferable for source impedances greater than about some understanding of the origin of slew rate (see §4x.9
10 kΩ). for a more extensive discussion). The vast majority of op-
amps can be summarized with the notional “Widlar cir-
cuit” shown in Figure 5.13. A differential input stage,18
loaded with a current mirror, drives a stage of large voltage
5.8 Amplifier output errors gain with a compensation capacitor from output to input.
The output stage is a unity-gain push–pull follower. The
As we discussed in Chapter 4, op-amps have some serious compensation capacitor C is chosen to bring the open-loop
limitations associated with the output stage. Limited slew gain of the amplifier down to unity before the phase shifts
rate, output crossover distortion (§2.4.1A), and finite open-
loop output impedance can all cause trouble, and they can 18 We’ve simplified it slightly: the input stage of Widlar’s original LM101
cause precision circuits to display astoundingly large errors used a pnp differential pair, but it was configured as a common-base
if not taken into account. amplifier driven by an npn follower pair.
308 5.8. Amplifier output errors Art of Electronics Third Edition

IE of the differential pair. For a BJT input stage this occurs

with a differential input voltage of about 60 mV, at which
10 LF411 (JFET)
point the ratio of currents in the differential stage is 10:1.
At this point Q5 is slewing its collector as rapidly as pos-
Slew Rate (μV/us)

sible, with all of IE going into charging C. The transistor

0
Q5 and C thus form an integrator, with a slew-rate-limited
LT1007 (BJT) specified ramp as output. It’s not hard to derive an expression for the
“slew rates”
slew rate, knowing how bipolar transistors work – see the
discussion in §4x.9. The bottom line is that the classic BJT-
–10 input op-amp circuit of Figure 5.13 has a slew rate S given
by S ≈ 0.3 fT .
To get a higher slew rate, then, you can choose an op-
–1000 –500 0 500 1000
amp with greater bandwidth fT ; if you are operating at
Differential Input Voltage, ΔV in (mV)
closed-loop gains greater than unity, you can use a decom-
Figure 5.12. A substantial differential-input voltage is required to pensated op-amp (with its higher fT value). But there are
produce the full op-amp slew rate, as shown in these measured ways (as explained in §4x.9) to beat the limit S ≈ 0.3 fT
data. For BJT-input op-amps it takes ∼60 mV to reach full slew rate; (which assumed a unity-gain-compensated op-amp with
for JFETs and MOSFETs it’s more like a volt. a BJT differential input configured for maximum gain,
i.e., with RE =0). Namely: (a) use an op-amp with reduced
+VCC input-stage transconductance (either a FET-input op-amp
or a BJT-input op-amp with emitter degeneration); (b) use
IE an op-amp with a different input-stage circuit, specifically
designed for enhanced slew rate – examples are the “cross-
+1
coupled transconductance reduction” technique (used in
(–) Q1 Q2 C
the TLE2142 family; see the cross-coupled input stage cir-
cuit shown in §4x.9), and the Butler “wide dynamic range
(+) transconductance stage” (used for example in the OP275
Q5 and OP285; see the Butler input stage circuit in §4x.9); (c)
Q3 Q4 use a current-feedback (CFB) op-amp, or a CFB variant
(with a buffered inverting input) that mimics an ordinary
–VEE voltage-feedback (VFB) op-amp.
A. These tricks work. If we define an enhancement fac-
tor m (i.e., S=0.3m fT ), the LF411 (with JFET input) plot-
C
ted in Figure 5.12 has m = 12, compared with the bipolar
LT1007 (m=1.0); the TLE2141 (with cross-coupled BJT
A >> 1 +1
input stage) has m = 25, and the OP275/285 (with Butler
input stages) have m = 8; the LT1210 (a CFB op-amp) has
B. m = 55 with the recommended feedback resistor; and the
LT1351 (a CFB in VFB’s clothing) has m = 220.
Figure 5.13. Typical op-amp internal compensation scheme. For a deeper look at slew rate, turn to the extended dis-
cussion in Chapter 4x (§4x.9).
caused by the other amplifier stages have become signifi-
cant. That is, C is chosen to put fT , the unity-gain band-
5.8.2 Bandwidth and settling time
width, near the frequency of the next amplifier rolloff pole,
as described in §4.9. The input stage has very high output Slew rate measures how rapidly the output voltage can
impedance, and it looks like a current source to the next change. The op-amp slew-rate specification usually as-
stage. sumes a large differential input voltage (60 mV or more),
The op-amp is slew-rate limited when the input signal which (in spite of its potential for creating output distor-
drives one of the differential-stage transistors nearly to cut- tion) is not unreasonable, given that an op-amp whose out-
off, driving the second stage with the total emitter current put isn’t where it’s supposed to be will have its input driven
Art of Electronics Third Edition 5.8.3. Crossover distortion and output impedance 309

hard by feedback, assuming a reasonable amount of loop Settle to 1% in ≈ 5RC

gain. Of perhaps equal importance in high-speed precision 0.1% in ≈ 7RC
0.01% in ≈ 9RC
applications is the time required for the output to get where
it’s going following an input change. This settling-time
R
specification (the time required to get within the specified
accuracy of the final value and stay there; see Figure 5.14) C
is always given for devices such as digital-to-analog con-
verters, where precision is the name of the game, but it is RC 5RC
not normally specified for op-amps. Time

Figure 5.15. Settling time of an RC lowpass filter.

tsettle (to X%)

Vfinal ± X%
from TI is a precision fast-settling op-amp, with an fT of
90%
5.9 MHz. Our simple formula then estimates the inverting-
output configuration (i.e., G=2) response time to be 54 ns, thus a
trise
settling time of 378 ns (7τ ) to 0.1%. This is in good agree-
ment with the datasheet’s value of 340 ns.
There are several points worth making: (a) our simple
10%
model gives us only a lower bound for the actual settling
time in a real circuit; you should always check the slew-
tdelay*
rate-limited rise time, which may dominate. (b) Even if
slew rate is not a problem, the settling time may be much
input longer than our idealized “single-pole” model, depending
on the op-amp’s compensation and phase margin. (c) The
* sometimes defined to Vout = logic threshold, op-amp will settle more quickly if the frequency compen-
or to Vout = 0.5Vfinal sation scheme used gives a plot of open-loop phase shift
Figure 5.14. Settling time defined.
versus frequency that is a nice straight line on a log–log
graph (as in Figure 5.17); op-amps with wiggles in the
We can estimate op-amp settling time by considering phase-shift graph are more likely to exhibit overshoot and
first a different problem, namely, what would happen to a ringing, as in the upper waveform shown in Figure 5.14. (d)
perfect voltage step somewhere in a circuit if it were fol- A fast settling time to 1%, say, doesn’t necessarily guaran-
lowed by a simple RC lowpass filter (Figure 5.15). It is a tee a fast settling time to 0.01%, since there may be a long
simple exercise to show that the filtered waveform has the tail (Figure 5.16). (e) There’s no substitute for an actual
settling times shown. This is a useful result, because you settling-time specification from the manufacturer.
often limit bandwidth with a filter to reduce noise (more Table 5.4 lists a selection of high-speed op-amps suit-
on that later in the chapter). To extend this simple result to able for applications that demand high fT , high slew rate,
an op-amp, just remember that a compensated op-amp has fast settling time, and reasonably low offset voltage.
a 6 dB/octave rolloff over most of its frequency range, just
like a lowpass filter. When connected for closed-loop gain
5.8.3 Crossover distortion and output impedance
GCL , its “bandwidth” (the frequency at which the loop gain
drops to unity) is approximately given by Some op-amps (for example the classic single-supply
LM324/358) use a simple push–pull follower output stage,
f3dB = fT /GCL .
without biasing the bases two diode drops apart, as we dis-
As a general result, a system of bandwidth B has response cussed in §2.4.1. This leads to “class-B” distortion near
time τ ≈ 1/(2π B); thus the equivalent “time constant” of zero output, because the driver stage has to slew the bases
the op-amp is through 2VBE as the output current passes through zero
(Figure 5.18). This crossover distortion can be substan-
τ ≈ GCL /2π fT .
tial, particularly at higher frequencies where the loop gain
The settling time is then roughly 5–10τ . is reduced; see the measured data in Figure 5.19. It is
Let’s try our prediction on a real case. The TLE2141 greatly reduced in op-amp designs that bias the output
310 5.8. Amplifier output errors Art of Electronics Third Edition

Table 5.4 Representative High-speed Op-ampsx

dist. graph
# per pkg a
Iin Offset Voltage Swing to

DIP avail
en

null pins
Supply p @25ºC Vos ΔVos typr GBW Slew Iout Supply cost
range IQ typ typ max typ typ typ typ Cin IN OUT qty 25
Part # (V) (mA) (pA) (mV) (mV) (μV/ºC) ( nV ) (MHz) (V/μs) (mA) (pF) + – + – ($US) Comments
√Hz
bipolar
LT1468 1 7–36 3.9 3nA 0.03 0.08 0.7 5 90 23 22 4 - - - - - 4.26 0.7 ppm dist
LT1360 1,2,4 5–36 4 0.3μA 0.3 1 9 9 50 800 34 3 - - - - - 2.75 C-Load™
LM6171 1,2 5–36 2.5 1μA 1.5 3 6 12 100 3600 90 - - - - - - 2.57 VFB+CFB
AD844 1 9–36 6.5 0.2μA 0.05 0.3 1 9 330g 2000 60 2 - - - - - 5.23 CFB, comp pin
AD8021b 1 4.5–26 7 7.5μA 0.4 1 0.5 2.1 925 420 60 1 - - - - - - 2.42 comp pin, 16-bits
JFET
OPA604A 1,2 9–50 5.3 50 1 5 8 10 20 25 36 10 - - - - - 2.93 3ppm, dual '2604
OPA827A 1 8–40 4.8 15 0.08 0.15 1.5 3.8 22 28 30 9 - - - - - - - 9.00 quiet, accurate
ADA4637 1 9–36 7.0 1 0.12 0.3 1 6.1 80 170 45 8 - - - - - - d 10.12 decomp, G>7
low-voltage bipolar
LT6220 1,2,4 2.2–13 0.9 15nA 0.07 0.35 1.5 10 60 20 35 2 - - - 1.75 SOT-23
LMH6723 1,2,4 4.5–13 1 2μA 1 3 - 4.3 370 600 110 1.5 - - - - - - - 2.03 CFB, SOT23-5
ADA4851 1,2,4 3–12.6 2.5 2.2μA 0.6 3.4 4 10 125 200 85 1.2 - - - - 1.40 SOT23-5, shdn pin
LT1818 1,2 4–12.6 9 2μA 0.2 1.5 10 6 400 2500 70 2 - - - - - - - 1.35 VFB+CFB, fast
LT6200 1,2 3–12.6 16.5 10μA 0.2 1.2 8 0.95 165 50 70 4 - - - 2.99 1% dist at 50MHz
LT6200-10 1 3–12.6 16.5 10μA 0.2 1.2 8 0.95 1600 450 70 4 - - - 2.99 fastest RRIO
OPA698e 1 5–13 16 3μA 2 5 15m 5.6 450 1100 55 1 n - - - - 4.14 clipping
low-voltage JFET
OPA656 1 9–13 14 2 0.25 1.8 2 7 230 290 50 2.8 - - - - - - 5.59 low en·Cin noise
OPA657 1 9–13 14 2 0.25 1.8 2 7 1600 700 50 4.5 - - - - - - - 10.01 decomp, G>7
ADA4817 1,2 5–10.6 19 2 0.4 2 7 4 1050 870 70 1.5 - - - - - - 4.93 lowest en·Cin
CMOS
AD8616 2 2.7–6 1.7 0.2 0.02 0.06 1.5 7 24 12 150 7 - - - 1.52 '8615 SOT23-5
LMP7717 1,2 1.8–6 1.15 0.05 0.01 0.15 1 6.2 88 28 15 15c - - - - 2.18 decomp, G>10
OPA350 1,2,4 2.5–7 5.2 0.5 0.15 0.5 4 7 38 22 40 6.5 - - 1.67 6ppm
Notes: (a) boldface indicates number in a package for the part number listed. (b) for G<20 use ext Cc chosen to set f 3dB =200MHz.
(c) 15mA sinking, 47mA sourcing. (d) for DIP-8 see OPA637. (e) OPA699 decomp. (g) at G=10. (m) max. (n) distortion plot for
OPA699. (p) IQ, typical, per amplifier. (r) at 1kHz. (x) see also the fast op-amp table in Chapter 4x.

push–pull pair into slight conduction (“class-AB”), for ex- 10 kHz, whereas the low-voltage types have an advantage
ample the LT1013, which is an improved version of the above 200 kHz.
LM324. The right choice of op-amp can have enormous The open-loop output impedance of a typical split-
impact on the performance of low-distortion audio ampli- supply op-amp is highest when the output is near ground,
fiers. Perhaps this problem has contributed to what the au- because the output transistors are operating at their low-
diophiles refer to as “transistor sound.” Some modern op- est current into the (ground-returned) load. The output
amps, particularly those intended for audio applications, impedance also rises at high frequency as the transistor
are designed to produce extremely low crossover distor- gain drops off, and it may rise slightly at very low frequen-
tion. Examples are the LT1028, the AD797, and the excel- cies because of thermal feedback on the chip.
lent “LME49000” series from NSC, e.g., the LME49710. It is easy to neglect the effects of finite open-loop out-
The latter, for example, has less than 0.0001% distortion put impedance, thinking that feedback will cure everything.
over the full audio band of 20–20 kHz. (That’s the claim, But when you consider that some op-amps have open-loop
anyway; we may be overly gullible!) These amplifiers all output impedances of a few hundred ohms, it becomes
have very low noise voltage, as well; the LT1028, for ex- clear that the effects may not be negligible, especially at
ample, vies for the√title of world noise-voltage champion, low to moderate loop gains. Figures 5.20 and 5.21 shows
with en = 1.7 nV/ Hz (max) at 10 Hz. See the expanded some typical graphs of op-amp output impedance, both
plots of op-amp distortion in Figures 5.43 and 5.44, where with and without feedback.
various op-amps compete for the title of king of low dis- The finite output impedance contributes also to insta-
tortion. High-voltage op-amps have an advantage below bility when driving capacitive loads, as we discussed in
Art of Electronics Third Edition 5.8.4. Unity-gain power buffers 311

ΔV in ≈ 60 mV V+
0.1% settling slew rate
V limited

Vdriver Vout 0
Vout
Vout time
slewing
Vdriver
A. V– B.
t
A.
Figure 5.18. Crossover distortion in class-B push–pull output
stage.

settling time 1
LT1013

Harmonic Distortion (%)

error

0.1
0.01% 8
44
1
/3 5 LF
324
time LM

B. 0.01
741
4 82 10
Figure 5.16. A. The slewing decreases when input error ap- C6 11 97
LM LF4 E4
proaches 60 mV. B. Settling to high precision can be surprisingly 0.001 LM
&
it,
lengthy. im
a sl
OPA 227
7 me

0.0001
100 1k 10k 100k
Frequency (Hz)
120 0
Figure 5.19. Measured harmonic distortion versus frequency for
Open-loop Gain, GOL (dB)

100 45 several popular op-amps (1 Vrms output, unloaded). See also Fig-
phase
Phase (degrees)

phase margin = 47°

80 90 ures 5.43 and 5.44.

60 135
1000
40 180 LF441
gain
20 225 LMC6482
Output Impedance (Ω)

0 270 23 6
MA X4
TLC2272
–20 gain
100 OP97 057
margin = 9 dB LMP7731 LT1
–40
LT1007 6
–60 37 7
PA 27 8*
OPA LF411 35
10 100 1k 10k 100k 1M 10M 100M O
LM
Frequency (Hz) LT1468
LME49710
Figure 5.17. OP-42 gain and phase versus frequency.
10
10k 100k 1M 10M
Frequency (Hz)

Figure 5.20. Measured open-loop output impedance versus fre-

§4.6.2, owing to the additional lagging phase shift within quency for a selection of op-amps. Parts shown in bold have
the feedback loop that is created by Rout in combination CMOS output circuits. * With output pulldown resistor.
with Cload . Several common solutions were shown in Fig-
5.8.4 Unity-gain power buffers
ure 4.78, including a split feedback path or the inclusion
of a unity-gain buffer within the loop. The latter is worth a If the technique of split feedback paths is unacceptable, one
mention here. solution is to add a unity-gain high-current buffer inside
312 5.8. Amplifier output errors Art of Electronics Third Edition

Exercise 5.2. Derive the foregoing expression for gain error.

Closed-loop Output Impedance (Ω)

100
LF411
The resulting frequency-dependent gain error is far from
10
negligible. For instance, an LF411 with its 106 dB of low-
AV = 100 frequency open-loop gain will have a gain error of 0.5%
at low frequencies when configured for a closed-loop gain
1.0 AV = 10 of 1000. Worse yet, the open-loop gain drops 6 dB/octave
AV = 1 above 20 Hz, so our amplifier would have a gain error of a
0.1 OP-27, LT1007 whopping 10% at 500 Hz! Figure 5.22 plots calculated gain
(AV = 1) error versus frequency for the OPA277, with its extraordi-
nary 140 dB of low-frequency open-loop gain, when con-
0.01 figured for closed-loop gains of 100 and 1000. It should
10 100 1k 10k 100k 1M 10M
be obvious that you need plenty of gain and a high fT to
Frequency (Hz)
maintain accuracy at even moderate frequencies.
Figure 5.21. Closed-loop output impedance versus frequency for
the LF411 and LT1007 op-amps, from manufacturers’ datasheets. 1% 107
GOL δG
OPA277 δG

Open-loop Gain, GOL

the loop, as, for example, in the general-purpose labora-

Gain Error, δ G
tory amplifier of Figure 4.87. The LT1010 in that circuit 0.1% 10 6
0 0
has adequate bandwidth (>10 MHz) in which it adds little 10
=
L
phase shift; thus it can be within the feedback loop with a GC 0
10
0.01% = 10 5
small amount of external compensation. G CL
These “power boosters” can, of course, be used for loads
that require high current (for example, driving a terminated
0.001% 104
coax cable), regardless of whether or not there are prob- 0.01 0.1 1 10 100
lems with capacitance. And unity-gain buffers are useful Frequency (Hz)
even with loads of only moderate current, in the context Figure 5.22. OPA277 gain error.
of precision circuit design, because they prevent thermal
drifts by keeping the heat out of the low-offset amplifier. We plotted these curves from the graph of open-loop
You can see a couple of examples of power boosters in gain versus frequency given in the datasheet. Even if your
Figures 5.47 and 13.119, as well as in the discussion in op-amp datasheet provides a curve, it’s best to work back-
Chapter 4x. ward from the specified fT (i.e., the datasheet’s GBW; see
Figure 5.42 and associated discussion) and dc open-loop
gain, figuring the open-loop gain at the frequency of in-
5.8.5 Gain error
terest, and thus the gain error (as above) as a function of
There’s one more error that arises from finite open-loop frequency. This procedure yields
gain, namely, an error in closed-loop gain owing to finite 1 f
loop gain. δG = ≈ ,
1 − jB fT / f B fT
We calculated in Chapter 2 (§2.5.2) the expression for
where B is, as usual, the gain of the feedback network, and
closed-loop gain in a feedback amplifier, G = A/(1 + AB),
the approximation is valid for the useful case B fT / f  1.
where A is the open-loop gain and B is the “gain” of the
Of course, in some applications, such as filters, B may also
feedback network. You might think that the A ≥ 100 dB
depend on frequency.
or so of op-amp open-loop gain is plenty, but when you
try to construct extremely precise circuits you are in for Exercise 5.3. Derive the foregoing result for δG ( f ).
a surprise. From the preceding gain equation it is easy to
show that the “gain error,” defined as 5.8.6 Gain nonlinearity
G − Gactual
δG = gain error ≡ ideal , Op-amps have lots of open-loop gain at low frequen-
Gideal
cies, and the excess (GOL /GCL ) is the loop-gain feedback
is just equal to 1/(1 +AB) and ranges from 0 for A = ∞ to mechanism that contributes to accuracy and the reduction
1 (100%) for A = 0. of the op-amp’s intrinsic nonlinearities, as discussed first
Art of Electronics Third Edition 5.8.6. Gain nonlinearity 313

in §2.5.3. Ideally, then, we want lots of open-loop gain types (sadly, none from other manufacturers), operating
in a precision circuit. And that’s why auto-zero ampli- as unity-gain inverters with a full-swing output; he made
fiers (§5.11) and precision op-amps are built with high measurements both when the op-amps were unloaded, and
open-loop gains, for example ∼160 dB for the auto-zero when they were driving a 1 kΩ load. The basic scheme is
LMP2021, and ∼150 dB for the precision LT1007. shown in Figure 5.23A, where a ’scope looks at the am-
For accuracy, then, we want lots of loop gain. For pur- plifier input error versus output swing. For Pease’s actual
poses of linearity, however, it’s OK to have less loop gain measurements he used the subtle variant in Figure 5.23B,
– what matters more is the intrinsic linearity of the op- in which the op-amp amplifies its error by ×1000, deliver-
amp, combined with an open-loop gain characteristic that ing the bad news directly.
changes linearly (if at all) with output swing. The intrinsic
linearity is strongly influenced by the output-stage design,
particularly when the amplifier is driving a load: crossover
distortion is always bad, as is an output stage that is asym-
65μV 4.8mV
metric in its source/sink capabilities (like the LM358, with
a Darlington npn pullup and single pnp pull-down). And a –10V +10V –10V +10V
poor layout within the chip can create nonlinearities from
the thermal offsets produced by local heating when driving
a load. LM358 LM8262
R
Figure 5.24. Gain nonlinearity traces for two op-amps with output-
R stage deficiencies. In these x–y displays the vertical axis shows the
– G V = –1
(small) differential input signal required to produce the (full-swing)
triangle + output signal indicated on the horizontal axis. To estimate gain er-
wave in RL ror, divide the vertical deviation from a best-fit straight line by the
x1000 full-swing output.
aux ’scope
amp (x-y mode)

The sorts of things you see (with a loaded op-amp) are

1000ΔV in shown in Figure 5.24, where we’ve sketched Pease’s traces
V H
A. for the aforementioned LM358 (afflicted with asymmetric
source/sink) and the LM8262 (fast, but afflicted with some
crossover distortion). An exemplary op-amp like the very
V low distortion LM4562 presents an ideal nearly-horizontal
1M 1M straight line. The LF411 (single) and LF412 (dual), our
JFET jellybeans, show an interesting contrast: according
1M to Pease, the LF411 chip layout is sub-optimal (in terms
of gain and thermal effects), with great effort rewarded by
–
H better results in the dual LF412.
1k
+ Here are some of his summary results for op-amps driv-
ing a somewhat lighter load (4 kΩ). In general, the mea-
B. sured gain nonlinearity, when unloaded, was far smaller
Figure 5.23. Low-frequency gain nonlinearity test circuit. A. No- than these listed values. Keep in mind that these measure-
tional: an auxiliary amplifier makes visible the μ V-scale differen- ments were made at very low frequencies (generally just a
tial input voltage versus output swing. B. Circuit used by Pease for few hertz), where the loop gain is maximum.
measurements in AN-1485 (see footnote on the current page).

In a nice set of measurements, Bob Pease19 explored the

low-frequency gain nonlinearity of a selection of op-amp
(or, “What’s All this Output Impedance Stuff, Anyhow?”). Gain non-
19 National Semiconductor App Note AN-1485: The Effect of Heavy linearity data can be found in some datasheets, for example the AD620
Loads on the Accuracy and Linearity of Operational Amplifier Circuits instrumentation amplifier.
314 5.8. Amplifier output errors Art of Electronics Third Edition

HV BJT (Vsig =±10 V) “tuning” of the compensation network to match the fre-
LM8262 12 ppm xover dist. quency response of the particular op-amp specimen itself;
LM358 1 ppm asym. output stage and because the op-amp’s characteristics change with tem-
LF411 1.4 ppm poor layout – thermal perature, the network must do likewise. A third possibility
LF412 0.3 ppm better layout is to cascade two stages, each configured for lower gain
LM4562 0.025 ppm pro-audio, GOL = 107 (and therefore smaller phase error).

R1
CMOS RRO (Vsig = ±4 V) 499 A1
in +
LMC6482 1.1 ppm jellybean out
LMC6062 0.2 ppm precision –
R2
4.99k
A2
CMOS auto-zero (Vsig = ±2 V) +
R3
LMP2012 0.2 ppm precision 549
–
R4
4.99k

5.8.7 Phase error and “active compensation”

R5
We’ve talked mostly about the gain error caused by lim- 549

ited op-amp bandwidth (and therefore falling loop gain

with increasing frequency). But limited loop gain also pro- Figure 5.25. Phase-error reduction by means of “active compen-
duces phase error, which can be important in applications sation,” exploiting the closely matched frequency responses of dual
such as video, interferometry, and so on. And the effect is op-amp pair A1 and A2 .
not at all negligible – recall (§1.7.9) that a single RC-like
rolloff creates a phase shift of ∼6◦ at a frequency of fC /10, But an elegant solution is active compensation, a clever
and ∼0.6◦ at fC /100; the latter is two full decades below technique that uses a second matching op-amp to create a
the −3 dB breakpoint. If we model an op-amp’s rolloff of replica of the error, which can then be subtracted from the
open-loop gain similarly (a “single-pole” rolloff), we can main amplifier. Figure 5.25 shows how this can be done.20
expect comparable phase shifts. The bandwidth of the main amplifier is unchanged, but
In this approximation, the resultant phase shift for an its phase error is reduced dramatically, as shown in the
op-amp voltage amplifier is thus given by SPICE simulation and measured data of Figure 5.26. There
  is some peaking in the amplitude response – about +3 dB
f f
φ = tan−1 ≈ (radians) , at the frequency at which the phase error is 45◦ – but gen-
fC fC
erally insignificant within the frequency range over which
where the −3 dB breakpoint fC is the frequency at which the phase error is small (e.g., +0.1 dB at f =0.1 fT /GCL ). A
the loop gain has fallen to unity: fC = fT /GCL . Here GCL is circuit configured for low closed-loop gain will generally
the closed-loop gain (as set by the feedback network), and exhibit greater peaking.21 Under the assumption that the
fT is the gain–bandwidth product (GBW) of the op-amp
(for a single-pole rolloff that’s the same as the frequency 20 See “Active Feedback Improves Amplifier Phase Accuracy,” by
at which the open-loop gain is unity; but for typical op- J. Wong, EDN Magazine, 17 Sept 1987; reprinted as Analog Devices
amps, with more complicated rolloffs, you want to use the AN-107. Wong credits the idea to Soliman in a 1979 paper, and Soli-
GBW figure). Multiply by 57.3 (180/π ) to get the answer man credits the idea to Brackett and Sedra in a 1976 paper. But Wong’s
in degrees. The approximate result (the last expression) is paper is the most useful reference for understanding the configuration
of Figure 5.25.
reasonably accurate for small-to-moderate phase shifts, up 21 In SPICE simulations we found that the peaking increased to ∼7 dB
to 0.5 radian, say.
for the LF412 model configured for G=2; this can be tamed by adding
There are several ways to address this problem. The a compensation capacitor Cc across feedback resistor R2 . Choosing Cc
simplest is to use an amplifier of greater bandwidth. If you to match the op-amp’s fT (i.e., Cc = 1/2π fT R2 ) reduced the peaking
don’t want to (or cannot) do that, another possibility is to to 4 dB, at the expense of tripling the (pretty small) phase error. In his
introduce an RC network in the feedback path to cancel article, James Wong warns that the technique may result in an unstable
the phase error (in s-plane language, you are introducing a amplifier for low gains, below G=5 for example. He shows also how the
zero to cancel a pole). This can be effective, but requires technique can be further improved if A2 is made from two amplifiers.
Art of Electronics Third Edition 5.8.7. Phase error and “active compensation” 315

amplifiers are matched, it can be shown that this technique +1º

produces a phase shift given approximately by
 3 0º

Phase Shift
f –10%
φ≈ (radians),
fC –1º matched

again accurate for small-to-moderate phase shifts ( 30◦ , single stage

+10%
–2º
say, i.e., the small-angle approximation).
–3º
1k 10k 100k 1M
0º SPICE
–0.03º measured Frequency (Hz)
@ 30kHz
– 4º Figure 5.27. Active compensation of phase error requires
Phase Shift

single stage matched op-amp bandwidths, as seen in this SPICE simulation

two stages
– 8º for which the fT of the compensation op-amp A2 has been varied
active comp ±10% relative to that of the signal path op-amp A1 .
–12º single-stage
–45º (–3dB)
@ 350kHz
Single, 2-stage,
√ Active, Single,
–16º G=10 each G= 10 comp fT =10 fT0
1k 10k 100k 1M 0.001 fT0 −0.57◦ −0.36◦ −0.00006◦ −0.006◦
Frequency (Hz) 0.003 fT0 −1.7◦ −1.1◦ −0.0015◦ −0.17◦
Figure 5.26. SPICE simulation and measured data of the phase
0.01 fT0 −5.7◦ −3.6◦ −0.06◦ −0.57◦
shift versus frequency for the circuit of Figure 5.25, implemented 0.03 fT0 −17.2◦ −10.9◦ −1.5 ◦ −1.7◦
with an LF412 dual JFET op-amp. For comparison the analogous 0.1 fT0 −45◦ −36◦ −45 ◦ −5.7◦
data are plotted for both a single G=10 stage and for a cascade
√ It’s clear that the remarkable (and underutilized) technique
of two stages, each with G= 10. The measured part’s fC was
of active compensation represents an efficient use of re-
295 kHz, somewhat lower than the SPICE model’s 350 kHz.
sources. The noninverting G = 2 case looks especially use-
ful, e.g., to drive backterminated 75 Ω video cables.23
Real op-amps are not perfectly matched. To see how
a mismatch in fT affects the phase compensation, we ran
a SPICE simulation with an fT mismatch of ±10% (Fig- 5.9 RRIO op-amps: the good, the bad, and the
ure 5.27). Evidently our test-bench part, chosen quite at ugly
random (dip fingers into parts bin, grasp first part touched,
In Chapter 4 (§§4.4.1, 4.4.2, and 4.6.3) we introduced rail-
extract, measure), has a considerably better fT matching, as
to-rail op-amps, including (a) op-amps that operate prop-
suggested by Wong: “Monolithically matched dual or quad
erly with common-mode inputs over the full supply volt-
op-amps can provide the frequency-matching characteris-
age range (RRI), (b) op-amps that can swing their outputs
tics (to within 1% to 2%) necessary for the success of the
over the full supply range (RRO), and (c) op-amps that can
active-feedback approach.”22
do both (RRIO). With lower supply voltages increasingly
It’s interesting to compare predicted phase shifts for
in vogue, you see many new op-amps with these desirable
several scenarios mentioned at the outset: (a) a single
capabilities.
amplifier of given bandwidth (call it fT0 , 3 MHz for the
Desirable, but to be used with caution. These benefits
√ gain G = 10; (b) two
LF412), configured for a closed-loop
come at a cost, which we’ll discuss here in the context of
cascaded stages, each with G = 10; (c) the active com-
precision design (with further discussion in Chapter 4x). In
pensation method of Figure 5.25; and (d) a single amplifier
circuits that strive for accuracy there are some hidden com-
of greater bandwidth (10 fT0 , say). Here are the calculated
promises in the designs of these op-amps about which the
results:
datasheet may be, uh, understated (or completely silent).
Here are the important ones.
22 We went back to the bench and measured a handful of LF412 dual op-
amps. Among different specimens the fT values ranged over ±20%, 23 Or sometimes called “double-terminated”, as in Figure 12.110. We
but within any single part the fT ’s of its two op-amps matched typically suggest trying your amplifier of choice, taking care to terminate the
to 0.1%, with one outlier showing a 1.5% mismatch. second op-amp with 150 Ω.
316 5.9. RRIO op-amps: the good, the bad, and the ugly Art of Electronics Third Edition

5.9.1 Input issues which typically display a figure showing a tangle of over-
lapping curves measured on multiple op-amp samples (if
A. Input-current crossover
they’re willing to show any data at all about this seamy
Most RRI op-amps use a complementary pair of differ-
topic). Here you can see by comparison the uncomplicated
ential input stages, with their inputs driven in parallel, to
(and downright boring) behavior of an RRI op-amp with
handle the full supply voltage range (Figure 5.28). This
an on-chip charge pump powering a single input amplifier.
causes a shift in input current because the signal path
This variation of VOS with VCM is not only undesirable, it
changes from one pair to the other, as seen clearly in Fig-
is also unpredictable, as you can see in Figure 5.30.
ure 5.7 (particularly the BJT-input RRI op-amps: LT1630,
This problem is nicely circumvented by the use of an
LM6132). An abrupt change in input current causes in-
inverting configuration, which holds constant the common-
put errors from finite driving impedance. Some RRI op-
mode input voltage. More generally, always consider using
amps avoid this problem by using an on-chip charge pump
an inverting configuration to prevent any circuit misbehav-
to generate a supply voltage beyond the rail, so a sin-
ior caused by op-amp dependence on VCM .25
gle input amplifier allows rail-to-rail inputs. Examples
The OPA350 datasheet shows a nice example (Fig-
are the OPA360-series,24 the AD8505 and ADA4505, the
ure 5.31) of input crossover effects in RRI op-amps,
MAX4162-series, and the MAX4126-series. Except for the
namely a 17 dB increase in audio distortion in a G=1 fol-
BJT-input MAX4126, these all use MOS inputs.
lower when the 3 Vpp sinewave input is shifted upward to
enter the crossover region.26 The same graph illustrates
nicely how increased closed-loop gain causes increased
Q1 Q2 Q3 Q4
distortion owing to decreased loop gain.
+50
+40 LTC6078
Offset Voltage, Vos (μV, typ)

+30 OPA369 “Zerø-Crossover”

(ΔVos from Vos ≈250μV typ)
+20
in+
+10 LMP7731
in– 0

Figure 5.28. A typical rail-to-rail input circuit consists of a pair of –10

complementary differential amplifiers, with downstream circuity to –20
select the active pair’s output. –30
LMP7701
–40
In situations where you need RRO but don’t need full –50
rail-to-rail input (a voltage amplifier with G>2, say), be 0 1 2 3 4 5
Common-mode Input Voltage (V)
sure to consider an RRO op-amp with input extending to
the negative rail only (sometimes called “ground sensing”). Figure 5.29. Op-amps with rail-to-rail inputs usually exhibit a shift
Note also that, by using an op-amp in an inverting circuit of VOS as the input voltage passes control from one input pair to
configuration, you avoid this problem completely (but you the other. The OPA369 circumvents this by using a single input
probably would not choose an RRI op-amp for such a con- pair, powered beyond the rail by an on-chip charge pump.
figuration anyway).

B. Input offset-voltage crossover 5.9.2 Output issues

The dual input stages of RRI op-amps cause similar mis-
A. Output impedance
chief in terms of their input offset voltage VOS , as seen
The output stage of a conventional (not RRO) op-amp is
in Figure 5.29. The abrupt change can occur close to ei-
ordinarily a complementary push–pull follower (or some
ther end of the supply range, as seen in the LMP7701 and
25 As Jim Williams liked to say, “Use an inverting configuration, unless
LMP7731 op-amps from the same manufacturer. These
curves were adapted from their respective datasheets, you can’t.”
26 See also Bonnie Baker’s article (in the Baker’s Best series) “Where did
all that racket come from?” in EDN Magazine, 23 April 2009, available
24 Playfully named “Zer∅-Crossover” amplifiers, or ZCOs. at edn.com.
Art of Electronics Third Edition 5.9.2. Output issues 317

+60 +VCC

LTC6078 @ 5V
+40 8 typical parts
Offset Voltage, Vos (μV)

Q1
+20
Q4
RE
0 25Ω +VCC (“VDD”)

–20 Q5

RE Q1
–40 25Ω
drive
–60 Ccomp ck’t
Q2
0 1 2 3 4 5
Q2
Common-mode Input Voltage (V) Q3

Figure 5.30. The shift of offset voltage in an RRI op-amp can

be unpredictable (even as to the sign of the effect!), as seen in –VEE –VEE (“VSS”)
these data, adapted from the unusually forthcoming manufacturer’s
datasheet.
A. Follower (not RRO) B. Amplifier (RRO)
Figure 5.32. The classic (not rail-to-rail) op-amp output stage is a
1 push–pull unity-gain follower with inherently low output impedance,
OPA350 (RRIO) biased (via Q4 Q5 ) to suppress crossover distortion; it has straight-
R L = 600Ω forward biasing and current limiting. By contrast, a rail-to-rail out-
0.1 G=100, 3Vpp (Vo=1V to 4V) put stage (usually implemented in CMOS) is a push–pull common-
source amplifier (G > 1) with inherently high output impedance; it
THD+N (%)

requires considerable trickery in its biasing and current limiting.

0.01 G=10, 3Vpp (Vo=1V to 4V)

G=1, 3Vpp (Vo=1V to 4V)

(input goes through transition region) internal feedback around the output stage (the capacitors in
0.001 Figure 5.32B), so that the gain and output impedances are
G=1, 2.5Vpp (Vo=0.25V to 2.75V)
(input does not go through transition region) reasonably well controlled except at low frequencies – see
0.0001 for example Figures 5.33 and 5.34.27
10 100 1k 10k 100k
Frequency (Hz)
B. Saturation at the rails
Figure 5.31. Distortion versus frequency for the OPA350 RRIO op- Some “rail-to-rail output” op-amps (in particular, those
amp. The two lowest curves show the dramatic increase in distor- with a BJT output stage) don’t quite make it the last few
tion when the input signal enters the input crossover region. In- millivolts; that’s because the output transistor’s saturation
creasing closed-loop gain causes further distortion because of re-
voltage is not zero. (This is not usually a problem with
duced loop gain.
MOSFET outputs, which look like an Ron to one rail or the
other when driven full range.) Usually this doesn’t matter,
variation thereupon), biased with some conduction overlap because what you care about most is getting full use of a
to prevent crossover distortion at mid-supply (see §5.8.3). limited supply voltage (when operating with low-voltage
By contrast, the output complementary pair in an RRO op- supplies). But it does matter, for example, if you’ve got a
amp is configured as a push–pull common-source ampli- single-supply setup in which the op-amp is driving an ADC
fier; see Figure 5.32. That’s necessary for the output to whose conversion range goes clear down to ground.
reach the rails (absent a second set of beyond-the-rails sup- In such a case be sure to check the specifications. Some
ply voltages). But it creates problems, owing to its inher-
ently high output impedance. 27 It’s unusual to see plots (or even tabulated values) of open-loop output
The high Zout means that the output-stage gain (and impedance on datasheets; and in cases where a graph is shown, it rarely
therefore the loop gain) depends on the value of load re- extends to very low frequencies. It is likely that other op-amps, includ-
sistance; and a capacitive load creates large phase shifts, ing some with conventional (follower) output stages, also exhibit a rise
compromising the loop stability (see, for example, Fig- in open-loop output impedance at very low frequencies. This is rarely
ure 4.79). These problems are addressed in part by use of of concern, though, owing to the very high loop gain down there.
318 5.9. RRIO op-amps: the good, the bad, and the ugly Art of Electronics Third Edition

120 40 dB worse than their conventional (non-RRO) counter-

RL = 500kΩ parts in terms of distortion, as seen in the pair of plots in
100 LMC6482
Figures 5.43 (non-RRO) and 5.44 (mostly RRO);28 see also
Open-Loop Gain (dB)

80 RL = 2kΩ GOL vs f
the SPICE plots in §4x.11.
60
RL = 600Ω
40
D. Monticelli’s output circuit
20 An elegant RRO circuit solution was devised by Monti-
0 celli,29 and it is shown here in simplified form in Fig-
–20 ure 5.35 (there’s a full discussion in §4x.11). It has the ef-
fect of biasing the push–pull pair Q1 Q2 in such a way that
0.1 1 10 100 1k 10k 100k 1M 10M there is current overlap at crossover, and, better still, there
Frequency (Hz) is continuing current through both transistors throughout
Figure 5.33. The low-frequency gain of rail-to-rail output op-amps the output swing. We might call this “push–pull class-A”
may depend strongly on load resistance, as seen here for the mode (though it seems to have been named already: “class-
LMC6482. AA”). It is used, for example, in the CMOS OPA365 and
in the BJT OPA1641. And it works – these parts have
−114 dB and −126 dB harmonic distortion, respectively.
Open-loop Output Impedance (Ω)

1k
OPA1641 +VDD
Z OL vs f
100 +
bias
Q1

Q3
10

sig in
1 Q4
10 100 1k 10k 100k 1M 10M 100M Q2
Frequency (Hz)
+
bias
Figure 5.34. For some RRO op-amps the open-loop output
impedance rises markedly at low frequencies, owing to internal ca-
pacitive negative feedback around the output stage that becomes –VSS
ineffective at low frequencies. But, not to worry, there’s lots of loop
Figure 5.35. The Monticelli rail-to-rail output circuit.
gain at low frequencies in typical op-amp applications.

Here’s a capsule description of the Monticelli circuit’s

RRO op-amps will warn you that the output will not reach operation: first, think of Q3 and Q4 each as unity-gain
the negative rail (e.g., 10 mV for the bipolar LT6003); oth- current amplifiers whose source terminal is the “summing
ers will instruct you to add an external pull-down resis-
tor or current sink (e.g., the bipolar LT1077, which satu- 28 In fairness, we note that some of the poorer “distortion” results (which
rates to 3 mV with no pull-down, and 0.1 mV with a 5kΩ are actually THD+N – distortion plus noise) may be due to the lower
pull-down). Op-amps with clean MOSFET saturation will supply voltages of the RRO op-amps, necessitating lower signal levels,
tell you not to worry – the unloaded output will go all the thus causing noise to loom larger.
way to ground (e.g., 0.1 mV for the CMOS AD8616 or 29 See his patent US4570128, and his IEEE JSSC paper (SC-21, #6,
AD8691). 1986), in which he says “The output stage (Figure 8) must solve a
level shifting problem that has plagued rail-to-rail designs for some
time. Elaborate solutions have been proposed that combine multiple
C. Distortion embedded feedback loops that are in effect op amps within op amps.
The rail-to-rail output stage (Figure 5.32B) presents real To succeed as a general-purpose quad, a simpler solution had to be
challenges to the chip designer when it comes to quies- found.” Although originally developed at NSC, this circuit (or close
cent biasing and reduction of crossover distortion. Despite variations) is popular with op-amp designers at Analog Devices and at
heroic efforts, these amplifiers generally perform some 20– TI (even before it swallowed NSC).
Art of Electronics Third Edition 5.10.1. “Seven precision op-amps” 319

junction” (because the gate is held at fixed voltage). Now the level of detail in the following treatment may be, well,
imagine an increasing input signal current, which reduces “not superficial enough.”31
the net current sunk at Q4 ’s source. This reduces its VGS , As we begin our tour of precision op-amp parameters
which increases Q2 ’s VGS , thereby increasing the output and their significance, we invite you to bury yourself in the
pull-down current. Meanwhile, the reduced drain current in data. With your circuit design goals in mind, start with an
Q4 causes less of Q3 ’s source current to be diverted, thus important op-amp parameter and look for the best choices.
increasing the VGS of Q3 ; that causes a reduction in Q1 ’s After zeroing in on a winning value, you can examine other
VGS , and therefore a lower output pullup current. The over- parameters for that op-amp: do some of the other parame-
all quiescent current is set by the dc bias applied to Q3 and ters for our winning op-amp now look like poor choices?
Q4 . So it’s a nicely balanced circuit, with a single-ended Maybe your op-amp isn’t a winner after all. Or perhaps
current input and a push–pull current output. you’ve got to return to your design goals and adjust them
This is one cool circuit! In §4x.11 there’s a more com- in accordance with reality, and repeat the process. Remem-
plete description, including SPICE simulations of a BJT ber always that “engineering is the art of compromise.”
implementation, and comparison with a conventional (not
rail-to-rail) class-AB push–pull emitter follower. This in-
herently symmetrical circuit also works well with differen- 5.10.1 “Seven precision op-amps”
tial current drives to the drains of both Q3 and Q4 , a con- Seven is a nice number, and, in preparation for the ex-
figuration you’ll often see. tended discussion of the very practical issue of choosing
a precision op-amp, we provide in Table 5.5 (pages 320–
321) a comparison of the important specifications for an
5.10 Choosing a precision op-amp updated listing of seven of our favorite precision op-amps.
If there’s no such thing as a perfect operational amplifier, The problem is, we just couldn’t restrict ourselves to a mere
then that’s especially true for precision op-amps. Although seven – it’s closer to seven dozen! Spend some time with
sufficient perfection may be achieved in a few parameters, it (and check off your own seven faves!) – it will give
the design tradeoffs required for achieving this invariably you a good feeling for the trade-offs you face in high-
degrade other parameters. For example, if we need a very performance design with op-amps. Note particularly the
quiet medium-frequency op-amp, a world-class quiet IC, trade-offs of offset voltage (and drift) versus input current
we won’t be able to enjoy world-class low-input-bias cur- for the best bipolar and JFET op-amps. You also get the
rents.30 That’s because the amplifier will use bipolar input lowest noise voltage from bipolar op-amps, trending down-
transistors, which will have to be operated at fairly high ward with increasing bias current; we’ll see why that hap-
collector currents, and you know what that means for the pens later in Chapter 8 when we discuss noise. The awards
base currents (e.g., look at the LT1028). Another example: for low-input current, however, always go to the FET op-
if we want micropower operating current, we won’t be able amps, again for reasons that will become clear later. In gen-
to enjoy world-class fast settling time, because we won’t be eral, choose FET op-amps for low-input current and cur-
able to have a high fT and fast slew rates; that takes power, rent noise; choose bipolar op-amps for low-input voltage
and lots of it. offset, drift, and voltage noise.
In this section we take an in-depth look at the process Among FET-input op-amps, those using JFETs domi-
of choosing a precision op-amp that is right for the job nate the scene, particularly where precision combined with
at hand, linked closely to a broad selection of exemplary low noise is needed (but not all JFET op-amps: note that
parts in Tables 5.5 (pages 320–321) and 5.6 (on page 335). our jellybean favorites, the LF411/412, are not precise
If you’ve got a circuit design that you’ve been struggling enough to qualify for membership in the table). That dom-
with, this section should hit the spot. The nitty-gritty level inance is being challenged, though, by some low-voltage
of detail that follows is essential to the careful design CMOS parts like the factory-trimmed MAX4236A and
that distinguishes an excellent circuit from a compromise- OPA376, and by parts like the TLC4501A that use tricks
ridden also-ran. For the casual reader, on the other hand, such as auto-zeroing at power-up.32

31 A phrase lifted from a student’s reply in an end-of-course question-

naire: “This course was not superficial enough for me.”
30 In §8.6.3 we show a discrete op-amp circuit where both of these goals 32 There was traditionally a problem peculiar to MOSFETs, which has
are achieved. been largely solved through process improvements. MOS transistors
 Table 5.5 “Seven” precision op-amps (page 1: high voltage)
Noise t
Offset Voltage
Input Current ΔVos en i nk,o Swing to
Supply p Supply

CMRR
@25ºC Vos typ max Vnpp 1kHz 1kHz GBW Slew Cost

Settled
Range IQ t typ max typ max μV μV min dcb nV typ typ Cin IN OUT qty 25
( ) ( ) ( ) ( fA )

dist. graph

# per pkga
null pins
DIP avail

comp pin
shdn pin
Part # (V) (mA) (pA) (pA) (μV) (μV) °C °C dB (μV) √Hz √Hz (MHz) (V/μs) (μs) pF + – + – ($US) Comments
HV bipolar
❑ LT1077A 1 2.2-44 0.05 7 nA 9 nA 9 40 0.4 1.6 97 0.5 27 65 0.23 0.08 - - low - - - - 3.84 single-supply
❑ LT1490A 2,4 2.5-44 0.04 1 nA 8 nA 110 500 2 4 84 1 50 15 0.2 0.07 - - 4.6 - - - 3.25 over-the-top
❑ AD8622A 2,4 4-36 0.22 45 nA 200 nA 10 125 0.5 1.2 125 0.2 11 150 0.56 0.48 - 5.5 - - - - - - 5.33
❑ LT1013f 2,4 3.4-44 0.35 12 nA 20 nA 40 150 0.4 2 100 0.55 22 70 0.7 0.4 - - low - - - - - 3.13 single-supply
❑ OPA277 1,2,4 4-36 0.79 0.5 nA 1 nA 10 20 0.1 0.15 130 0.22 8 200 1 0.8 16 low - - - - - - 3.17 improved OP-27
❑ TLE2141A 1,2,4 4-44 3.5 0.7 μA 1.5 μA 175 500 1.7 - 85 0.5 10.5 1900 5.9 45 0.4 - low - - - - 1.15 cross-coupled slew
❑ LT1677 1 3-44 2.8 2 nAe 20 nAe 20 60 0.4 2 109 0.09 3.2 1200 7.2 2.5 5 - 4.2 - - 3.07 an “RRIO LT1007”
❑ AD8675 1,2 9-36 2.5 0.5 nA 2 nA 10 75 0.2 0.6 114 0.1 2.8 300 10 2.5 - - - - - - - 2.22 0.6ppm dist, dual='76
❑ OPA2209 1,2,4 4.5-40 2.2 1 nA 4.5 nA 35 150 1 3 120 0.13 2.2 500 18 6.4 2.1 - 4 - - - - - - - - 4.04 0.25ppm dist, SOT23
❑ LT1007g 1 4-44 2.7 10 nA 35 nA 10 25 0.2 0.6 117 0.06 2.5 400 8 2.5 - - - - - - - - 2.48 '37 decomp 60MHz
❑ ADA4004 1,2,4 9-36 2.2 40 nA 90 nA 40 125 0.7 1 110 0.15 1.8 3500 12 2.7 - - - - - - - - - - - 4.20 family, SOT23
❑ LT1468 1 7-36 3.9 3 nA 10 nA 30 75 0.7 2 96 0.3 5 600 90 23 0.8 4 - - - - - - 4.26 0.7ppm dist
❑ AD8597 1,2 9-36 4.8 40 nA 210 nA 10 120 0.8 2.2 120 0.08 1.1 4300 10 16 2.0 12 - - - - - - - 3.71 1ppm dist
❑ LT1028Ah 1 8-44 7.4 25 nA 90 nA 10 40 0.2 0.8 108 0.04 0.85 4700 75 15 - - 5 - - - - - 6.48 lower IB than AD697
HV superbeta
❑ n
LT6010A 1,2,4 2.7-40 0.14 20 110 10 35 0.2 0.8 107 0.4 14 100 0.35 0.11 45 4 - - - - 2.22 replace LT1012, w/RRO
❑ LT1012ACm 1 2.4-40 0.37 25 100 8 25 0.2 0.6 114 0.5 14 (20) 0.5 0.2 - - low - - - - - 5.11 has overcomp pin

320
❑ OP97E 1,2,4 4.5-40 0.40 30 100 10 25 0.2 0.6 114 0.5 14 (20) 0.9 0.2 - low - - - - - 5.52 dual='297, quad='497
❑ AD706 2,4 4-36 0.8 50 200 30 100 0.2 1.5 106 0.5 15 50 0.8 1.5 - - 2 - - - - - - - 4.05 AD704 quad
❑ LT1884A 2,4 3.5-40 0.85 150 400 25 50 0.3 0.8 114 0.4 9.5 50 2 0.9 10 - - - - - - - 5.23 LT1882 slower, lower IB
HV JFET
❑ AD795 1 8-36 1.3 1 2 100 500 3 10 90 1 9 0.6 1.6 1 11 - 2.2 - - - - - - - - 7.97 replace OPA111
❑ OPA124PB 1 10-36 2.5 0.35 1 100 250 1 2 100 1.6 8 0.5 1.5 1.6 10 - 3 - - - - - - 6.40 substrate pin
❑ OPA140 1,2,4 4.5-40 1.8 0.5 10 30 120 0.35 1 126 0.25 5.1 0.8 11 20 0.9 - 10 - - - - - 3.75 0.5ppm dist
❑ AD711C 1,2 9-36 2.5 15 25 100 250 2 5 86 2 16 10 4 20 1.0 5.5 - - - - - - 2.19 AD712 low-cost dual
❑ LT1055Cx 1 20-40 2.8 10 50 120 700 3 12 85 2 15 1.8 4.5 12 1.8 - 4 - - - - - - 2.52 1057 dual, 1058 quad
❑ ADA4000 1,2,4 5-36 2 5 40 200 1700 2 - 80 1 16 10 12 2.7 - - 5.5 - - - - - - - 1.46 jellybean, AD711 subst
❑ OPA192 1,2,4 4.5-40 1 5 20 5 25 0.2 0.5 120 1.3 5.5 1.5 10 20 0.9 - 0.6 - - - - 3.87 CMOS, e-Trim™
❑ OPA134 1,2,4 5-36 4 5 100 500 2000 2 - 86 - 8 3 8 20 1 - - - - - - - 1.60 0.8ppm dist, jellybean
❑ OPA1641 1,2,4 4.5-40 1.8 2 20 1000 3500 - - 120 - 5.1 0.8 20 11 - 8 - - - - - 2.76 0.5ppm dist, family
❑ AD8620A 1,2 10-27 2.5 2 10 85 250 0.5 1 90 1.8 6 5 25 60 0.6 15 - - - - - 11.86 caution, ±12V max
❑ OPA827 1 8-40 4.8 15 50 75 150 1.5 - 104 0.25 3.8 2.2 22 28 0.55 - 9 - - - - - - - - 9.00 cheaper than 627
❑ OPA627B 1 10-36 7 1 5 40 100 0.4 0.8 106 0.6 4.5 1.6 16 55 0.55 7 - - - - - - 30.00 ADA4627B 2nd-source
❑ OPA637B 1 10-36 7 1 5 40 100 0.4 0.8 106 0.6 4.5 1.6 80 135 0.45 7 - - - - - - 30.00 ADA4637B 2nd-source
❑ AD549KH 1 10-36 0.6 75 fA 0.1 150 250 2 5 90 4 35 0.5 1 3 5 - 1 - - - - - - - 28.00 -L=60fA, TO-99 pkg
❑ OPA129B 1 10-36 1.2 30 fA z 0.1 500 2000 3 10 80 4 17 0.1 1 2.5 - - 2 - - - - - - - 12.00 lowest IB for HV part
HV chopper
❑ LTC1150 1 4.8-32 0.8s 10 100 0.5 10 0.01 0.05 110 1.8 high (1.8) 2.5 3 - - n - - - 6.00 only HV AZ w/int caps
❑ ADA4638 1 4.5-33 0.85 45 90 0.5 4.5 - 0.08 130 1.2 66 100 1.5 1.5 4 - 9 - - - - 5kHz noise spike
❑ OPA2188 1,2,4 4-40 0.42 160 850 6 25 0.03 0.09 120 0.25 8.8 750 2 0.8 27 - 9.5 - - - - new
 Table 5.5 “Seven” precision op-amps (page 2: low voltage)
Noise t
Offset Voltage
Input Current ΔVos en i nk Swing to
Supply p Supply

CMRR
@25ºC Vos typ max Vnpp 1kHz 1kHz GBW Slew Cost

Settled
Range IQ t typ max typ max μV μV min dcb nV typ typ Cin IN OUT qty 25
( ) ( ) ( ) ( fA )

dist. graph

# per pkg a
null pins
DIP avail

comp pin
shdn pin
Part # (V) (mA) (pA) (pA) (μV) (μV) °C °C dB (μV) √Hz √Hz (MHz) (V/μs) (μs) pF + – + – ($US) Comments
LV bipolar
❑ LT6003 1,2,4 1.5-18 0.001 40 140 175 500 2 5 73 3 325 12 0.003 0.001 slow - 6 - - - - 1.60 SOT-23, '6004 dual
❑ EL8176 1 2.4-6 0.055 0.5 nA 2 nA 25 100 0.7 - 90 1.5 28 160 0.4 0.13 - - - - - - 2.30 SOT-23, charge pump
❑ LMP7731 1,2 1.8-6 2.2 1.5 nA 30 nA 6 500 0.5 5.5 101 0.08 2.9 1100 22 2.4 - - - - - - 1.98 SOT-23, 3nV/√Hz
❑ LT6220 1,2,4 2.2-13 0.9 15 nA 150 nA 70 350 1.5 5 85 0.5 10 800 60 20 0.3 - 2 - - - - 1.75 SOT-23
❑ LT6230 1,2,4 3-12.6 3.3 5 μA 10 μA 100 500 0.5 3 96 0.18 1.1 2400 215 70 0.05 - 7 - - - - - 2.72 -10=decomp, 1.3GHz
LV JFET
❑ OPA656 1 9-13 14 2 20 250 1800 2 12 80 - 7 1.3 230 290 0.02 2.8 - - - - - - - - 5.59 '657 for 1.6GHz G>5
LV CMOS
❑ LMP2232A 1,2,4 1.8-6 0.01 0.02 1 10 150 0.3 0.75 81 2.3 60 0.1c 0.13 0.06 slow - - - - - 3.29 '31 single, '34 quad
❑ TSV611A 1,2 1.8-6 0.01 1 10 - 800 2 - 61 - 105 - 0.12 0.04 - - - - - - - 0.82 '612 dual
❑ AD8603 1,2,4 1.8-6 0.04 0.2 1 12 50 1 4.5 85 2.3 25 50 0.4 0.1 23 - 23 - - - - 1.36 SOT-23, 1pA
❑ LTC6078 2,4 2.7-6 0.055 0.2 1 7 25 0.2 0.7 95 1 18 0.25c 0.75 0.05 24 - 18 - - - - 3.54 Vos degrades near V+
❑ LTC6081 2,4 2.7-6 0.33 0.2 1 - 70 0.2 0.8 93 1.3 13 0.5 3.6 1 6 7 - - - - 4.75 degrade Vcm>Vcc –1.5V
❑ MAX4236A 1 2.4-6 0.35 1 500 5 20 0.6 2 84 0.2 14 0.6 1.7 0.3 1 7.5 - - - - 1.78 not AZ, '4237 decomp
❑ LMC6482A 2,4 3-16 0.5 0.02 4 110v 750 1 - 70 - 37 30 1.5 1.3 - - 3 - - - 1.88 '7101=SOT-23
❑ OPA376 1,2,4 2.2-7 0.76 0.2 10 5 25 0.26 1 76 0.8 7.5 0.25c 5.5 2 2 13 - - - - 1.32 CMOS etrim™

321
❑ OPA364 1,2 1.8-5.5 0.85 1 10 - 500 3 - 74 10 17 0.6 7 5 1.5 - 3 - - - 2.18 chg-pump, 20ppm dist
❑ TLC4501A 1,2 4-7 1 1 60 10 40 1 - 90 1.5 12 0.6 4.7 2.5 2.2 8 - - - - - 3.06 0.3s self-cal at pwr-on
❑ OPA743 1,2,4 3.5-13 1.1 1 10 1500 7000 8 - 66 11 30 2.5 7 10 15 4 - - - - 1.58 jellybean
❑ LMP7715 1,2 1.8-6 1.15 0.05 1 10 150 1 4 85 - 5.8 10 17 9.5 - - 15 - - - - - 2.05
❑ LMP7717 1,2 1.8-6 1.15 0.05 1 10 150 1 4 85 - 6.2 10 88 28 - - 15 - - - - - 2.18 decomp, G>10
❑ AD8692 1,2,4 2.7-6 0.85 0.2 1 400 2000 0.3 6 68 1.6 8 50 10 5 1 - 5 - - - - - 1.36 0.6ppm dist
❑ AD8616 1,2,4 2.7-6 1.7 0.2 1 23 60f 1.5 7 80 2.4 7 50 24 12 0.5 - 7 - - - - 1.52 jellybean, '15 SOT-23
❑ OPA350 1,2,4 2.5-7 5.2 0.5 10 150 500 4 - 74 - 7 4 38 22 0.5 - 6.5 - - - 1.67
❑ OPA380 1,2 2.7-7 7.5 3 50 4 25 0.03 0.1 100 3 5.8 10 90 80 2 - 3 - - - - - 5.39 transimp, w/auto-zero
❑ LMC6001A 1 5-16 0.45 10 fA 25 fA - 350 2.5 10 83 - 22 0.13 1.3 1.5 - - - - - - - 12.19
❑ LMP7721 1 1.8-6 1.3 3 fAy 20 fA 26 150 1.5 4 83 - 7 10 17 10 - - - - - - - 11.89 very low en for 20fA!
LV chopper
❑ MAX9617 1 1.6-6 0.06 10 140 0.8 10 0.01 0.12 116 0.42 42 100 1.5 0.7 - - - - - - 1.60 charge pump
❑ AD8638 1,2 5-16 1 1.5 40 3 9 0.01 0.06 118 1.2 60 noisy 1.35 2.5 3 4 - - - - - 3.31 auto-zero; SOT23
❑ LTC2050H 1 2.7-11 0.8 7 50 0.5 3 - 0.03 120 1.5 - - 3 2 - - 1.7 - - - - 2.19 replaces LTC1050
❑ AD8551 1,2,4 2.7-6 0.7 10 50 1 5 0.01 0.04 120 1 42 (2) 1.5 0.4 50 - - - - - 2.34
❑ OPA735 1,2 2.7-13 0.6 100 200 1 5 0.01 0.05 115 2.5 135 40 1.8 1.5 - - 10 - - - - 3.38 auto-zero, "chopper"
Notes: (a) boldface indicates number in a package for the part number listed. (b) 0.01Hz–10Hz or 0.1Hz–10Hz. (c) calculated. (d) usually to 0.01%.
(e) for VEE+1.4V < VCM < Vcc –0.7V. (f) LTC suggests LT1490/1. (g) LTC suggests LT1677. (h) LTC suggests LT6200/30. (k) at 1kHz or 10kHz (i.e., above the 1/f corner), except
10Hz for chopper op-amps. (m) LT1097 cheaper. (n) dual & quad have degraded IB and Vos; ‘6013=decomp. (o) values in parenthesized (thin italics) should not be relied upon;
measured values often are as much as 5x–100x larger; see discussion in Chapter 8. (p) per amplifier. (s) can be reduced to 200μA. (t) typical. (v) Vos is insensitive to VCM.
(x) the (hard-to-get) -A version has Vos=50μV typ, 150μV max. (y) special pinout for guard. (z) special pinout for guard+substrate pin.
322 5.10. Choosing a precision op-amp Art of Electronics Third Edition

Finally, the so-called chopper-stabilized (here and in with parts ordered more or less by IQ , the quiescent sup-
Table 5.6 on page 335) amplifiers form the most important ply current, in each category. Battery-powered applications
exception to the generalization that FET op-amps, particu- benefit from low supply currents, but some low-drift appli-
larly MOSFET types, suffer from larger initial offsets and cations do as well, because op-amp self-heating tempera-
much larger drifts of VOS with temperature and time than do ture effects will be less. Some parts offer a version with
bipolar-transistor op-amps. In fact, these devices (known a power-shutdown (SHDN) pin. For example, the LT6010
also as auto-zero or zero-drift amplifiers) are the ampli- current drops from 135 μ A to 12 μ A in shutdown (but a
fiers with the smallest offset voltage and drift, typically in gotcha: the shutdown pin itself takes another 15 μ A) and it
the ±1 μ V and ±0.05 μ V/◦ C range. They use MOSFET takes 25 μ s to turn ON or OFF. Other parts do better, e.g.,
analog switches and amplifiers to sense, and correct, the the OPA364 draws 0.9 μ A when off.
residual offset error of an ordinary op-amp (which itself is Circuits operating with high-voltage supplies benefit
often built with MOSFETs, on the same chip). This is not from using high signal levels, such as ±10 V full scale.
without compromise, however: chopper-stabilized ampli- An offset voltage, say VOS =40 μ V, is a smaller fraction of
fiers have some unpleasant characteristics that make them 20 Vpp than it is of 0 to 4 V. With the exception of chopper
unsuited for many applications, as we’ll see in §5.11. op-amps, you don’t get any offset-voltage improvement for
low-voltage parts.
Low-voltage parts finish the table (most are 5.5 V max-
5.10.2 Number per package imum total supply, but some permit 11 V or higher, suit-
The first column in Table 5.5 gives the choices available for able for ±5 V operation), but it’s important to realize that
the number of devices per package (the number in boldface many “high-voltage” parts are designed and specified to
shows which choice matches the part number). We gener- work well at low voltages, even under 3 V. Some work well
ally list single op-amp parts, even though in practice the with ±3 V to ±5 V supplies and should not be rejected
dual op-amps are more useful and popular (in some cases simply because they can also work at higher voltages. But
distributors don’t even stock the single types). Special fea- be warned, you need to examine the common-mode in-
tures such as pins for external offset-nulling, compensa- put range and output-swing range. For example, although a
tion, and shutdown are available only for the single op-amp 44 V op-amp like the LT1490 works with 3 V supplies and
package types and are indicated in the right-hand columns. allows rail-rail inputs and outputs, another fine 44 V LTC
Generally the specs are identical for the different dies and op-amp, the low-noise LT1007 (which works down to 4 V)
appear on the same datasheet, but not always. is limited to inputs and outputs no closer than 2 V from the
rails – nearly useless when running from ±2 V. Clearly it’s
not meant to be a low-voltage part. Your quick guide to
5.10.3 Supply voltage, signal range these issues is the “swing to supply” columns; the LT1490
It’s likely your first consideration will be supply-voltage has all four checks whereas the LT1007 has no checks.
range and signal levels. High-voltage parts (able to oper-
ate from ±15 V, i.e., 30 V total) are listed first in the table,
5.10.4 Single-supply operation
are susceptible to a unique debilitating effect that neither FETs nor If you’re running with low supply voltages, you may want
bipolar transistors have. It turns out that sodium-ion impurity migra- to use a single-supply power arrangement. Op-amps capa-
tion and/or phosphorus polarization effects in the gate insulating layer ble of single-supply use have at a minimum the ability to
can cause offset voltage drifts under closed-loop conditions, in extreme operate their inputs and outputs to the negative rail (i.e.,
cases as much as 0.5 mV over a period of years. The effect is increased ground). Many permit operation with outputs also to the
for elevated temperatures and for a large applied differential-input sig- positive rail, and claim rail-to-rail outputs on the front page
nal, with some datasheets showing a typical 5 mV change of VOS over
of the datasheet. But be warned, there’s usually a perfor-
3000 hours of operation at 125◦ C with 2 V across the input. This
mance degradation when outputs are near the supply rails.
sodium-ion disease can be alleviated by introducing phosphorus into
the gate region. Texas Instruments, for example, uses a phosphorus-
Some op-amps offer zero-volt or below-the-rail operation
doped polysilicon gate in its “LinCMOS” series of op-amps (TLC270- if you add a pulldown resistor.33
series) and comparators (TLC339 and TLC370-series). These popu- Seven high-voltage op-amps on our list offer single-
lar inexpensive parts come in a variety of packages and speed/power
selections and maintain respectable offset voltages with time (50 μ V 33 Many op-amps can do this, but without saying so. That’s because their
eventual offset drift per volt of differential input). pullup transistor and drivers work all the way down to the negative
Art of Electronics Third Edition 5.10.6. Voltage noise 323

supply operation; some, like the LT1013, excel at it. Two table, but they have their own selection table (Table 5.6 on
offer full rail-to-rail input-output, or RRIO, operation. The page 335) that you should examine if they look good for
fast-slewing TLE2141 is especially interesting (fast set- your design. They have their own problem issues, such as
tling, but high bias current), as is the low-noise LT1677 current noise, which we discuss in §5.11.
(lower bias current, but slow slewing and settling). All but Offset voltage variation with common-mode input volt-
two of the low-voltage parts offer single-supply operation. age is a serious issue for some parts, especially for RRIO
There are some precision op-amps with low supply op-amps (see Figure 5.29), and is not addressed on the
currents, down to 10–60 μ A, although this will severely table. It’s always important to follow up an initial choice
limit your choices for other parameters. There’s even a re- from the table with a careful examination of the datasheet.
spectable 0.85 μ A (and 1.8 V) op-amp, the LT6003. Some For example, the OPA364 and MAX9617 use internal
op-amp types, such as the JFETs, don’t offer any low- charge pumps to power their input stages, eliminating this
power parts. Nonetheless you might choose one for its low problem completely.
noise and low bias current. Offset voltage drift with temperature is an important pa-
rameter when stability of measurements matters. This pa-
rameter is not production tested. The maximum drift spec
5.10.5 Offset voltage
may not be very reliable, and some manufacturers have
Perhaps the single parameter most often associated with stopped providing such a spec.
precision amplifiers is input-voltage error. To measure Offset voltage drift with time is a parameter that used to
small offset voltages, use the op-amp’s gain to magnify the appear in precision op-amp datasheets, with values of or-
effect, as shown in Figure 5.36. Offset voltage was our re- der 300–400 nV/month; a few high-performance parts like
quired parameter to gain entry into the table; few op-amps the LT1007 claimed 200 nV/month, and chopper-stabilized
with maximum offset voltages above 250 μ V made the op-amps generally claim drifts of 50 nV/month.34 This is
grade. There are plenty of parts with <10 μ V typical offset somewhat uncharted territory, and some people claim that
voltages, but “typical” isn’t a reliable spec when you’re in drift slows with time, or perhaps it is more akin to a ran-
the business of manufacturing precision instruments. Bipo- dom walk, in either case suggesting that√ a drift specifica-
lar input stages have an advantage over JFET and CMOS tion should perhaps have units of nV/ month.
in the table, but they suffer from higher input bias currents.
The “superbeta” parts are a pleasant exception, especially
5.10.6 Voltage noise
at high temperatures (see Figure 5.38), but none of these
parts has inputs that operate to either supply rail. Voltage noise is the in-band variation of op-amp input–
offset voltage that’s indistinguishable from signal. It’s use-
10Ω
+
DUT
Vo
ful to view it as a “noise spectral density” function en ( f ),
which tells you the rms noise voltage in a 1 Hz bandwidth
–
(see §8.2.1) centered at frequency f . Figure 5.37 shows
Vo
VOS = an idealized plot of input voltage-noise density as a func-
10Ω 10k 1000
tion of frequency for some of the op-amps in the table.
For most op-amps en ( f ) is essentially flat for frequencies
Figure 5.36. Offset-voltage test circuit. The ×1000 voltage gain
above its “1/ f corner frequency,” with en increasing
√ be-
makes submillivolt offsets in the device under test (DUT) easily
measurable. Input current effects are negligible, owing to the small
low the corner frequency, approximately as 1/ f . (Auto-
(10 Ω) resistances seen at the op-amp’s inputs. Add a 200 Ω resis- zero, or “chopper-stabilized,” op-amps are not shown. They
tor at the output if you want to drive a cable. behave differently, because low-frequency “noise” is re-
moved by the auto-zero process, so their en is flat at low
Many low-offset parts have disappeared since the sec- frequencies. We’ll discuss them shortly; see §5.11.)
ond edition of our book, especially in the JFET category. The voltage–noise column in Table 5.5 (pages 320–321)
They’ve become too expensive for the market and have lost shows en at its commonly specified frequency of 1 kHz,
the competition with low-voltage chopper and auto-zero
34
op-amps. The latter have a few token representatives in this Although it’s possible to do considerably better, for example the mea-
sured 6 nV/month reported by Bob Pease for the LMP2011. See Ta-
rail, without sourcing current to the output. Some require a minimum ble 8.3 and Figures 8.60, 8.61, 8.110, and 8.110. The IF3602 is a large-
pull-down current, e.g., 0.5 mA for the OPA364. geometry dual JFET available from InterFet, shown for comparison.
324 5.10. Choosing a precision op-amp Art of Electronics Third Edition

LMC6482 A. “1/f ” noise

LMC6001 1000
LF412 We discuss 1/ f noise in greater detail in Chapter 8 (where

Voltage Noise Density, e n (nV/√Hz)

TLC22722
LT1057 we show how to determine the 1/ f noise corner, etc., in
OPA376
OPA627 §8.13.4, but here we address the practical question “What
OPA277 100 effect do the scary-looking rising noise-density curves in
LT1012
LT1007 Figure 5.37 have on my circuit noise?” The noise density
en is indeed higher at low frequencies, but that density gets
10 multiplied by a smaller frequency span. Put another way,
LT1028
IF3602 the total noise voltage (as contrasted with the noise density
en ) contributed by an op-amp depends both on its en and on
1 the circuit’s bandwidth. More precisely, the mean square
noise voltage is the integral of e2n over the bandpass:
 fb
0.1 vn2 = e2n ( f )d f ,
0.1 1 10 100 1k 10k fa
Frequency (Hz)
where en ( f ) is the noise spectral density (often plotted in
Figure 5.37. Voltage noise density en for a selection of representa- datasheets), and the bandpass (or observation band) ex-
tive op-amps, showing the increase of noise power below the 1/ f tends from fa to fb . We then get the rms noise voltage by
corner frequency. Some op-amps that have good specs at 1 kHz taking the square root of vn2 .
don’t look so good at 0.1 Hz. Figure 5.54 shows the resulting volt- We perform the integrations and show the devastating
age noise vn when such a noise density is integrated over fre-
effects of 1/ f noise in the integrated-noise plots later, in
quency.
Figure 5.54 (in the context of auto-zero op-amps). More
bandwidth
√ means more noise, and all of the curves rise
as f at the high end. The op-amps are ranked in or-
der by their high-frequency en values; it’s interesting to
compare their positions in Figure 5.37 with the rankings
comfortably in the flat region above in Figure 5.54. At the low frequency end, the noise volt-
√ the 1/ f corner of most
op-amps; en varies √ from 0.85 nV/ Hz for the high-current age of conventional op-amps levels off, because their rising
LT1028 to 325 nV/ Hz for the current-starved LT6003. 1/ f noise density makes up for the reduced bandwidth,35
We discuss noise in greater detail below, and in Chap- whereas the noise voltage of the auto-zero amplifiers con-
ter 8, but let’s start with the simple relationship tinues its downward trend.
√ relating
voltage-noise density en (given in units of nV/ Hz) to the Let’s use Figure 5.54 to explore a revealing √ example.
value of integrated total voltage noise Vn (in units of nV, or The LT1012 has an en (at 1 kHz) of 14 nV/ Hz, and a
μ V; and either rms or peak-to-peak) over some frequency 2.5 Hz corner frequency.36 If it were used in a precision
passband. In the flat (i.e., white noise) region of en at fre- amplifier with a high-frequency cutoff beyond 1 Hz, for
quencies above the example, it would be less noisy than an OPA277, even
√1/ f corner, the integrated noise voltage
is simply Vn = en BW. though√ the latter has a lower noise density at 1 kHz of
As we’ll see, for circuits with bandwidths of 1–10 kHz 8 nV/ Hz, because the latter has a 20 Hz noise corner (in-
or more, the noise voltage Vn is dominated by the noise dicated by black dots). But the OPA277 wins back some re-
density at high frequencies. Datasheets for most op-amps spect when we √ see that it’s dramatically quieter than a com-
give an en value at 1 kHz, but some also specify it at peting 9 nV/ Hz part, the TLC2272, which suffers from a
10 kHz, 100 kHz, or even 1 MHz; and they usually pro- much higher 330 Hz noise corner.37
vide graphical plots of en versus frequency. Because the 35 Well, not exactly: if the noise power density were truly to continue
integrated noise voltage is dominated by en at the high-
rising as 1/ f , the integral would diverge at zero frequency (dc). For
frequency end of the operating range, be sure to use that Figure 5.54 we set the low frequency limit to be 0.01 Hz.
value (or a frequency-weighted eyeball average) in the sim- 36 How to determine the corner frequency? See the discussion in §8.13.4.
ple formula above. Using a high-frequency en value is par- 37 The LT1012 and OPA277 are BJT parts, and the TLC2272 is a CMOS
ticularly important for transimpedance amplifiers, which op-amp. The ’2272 boasts a miniscule 60 pA max bias current, far bet-
suffer from “en ω C” current noise (in = en 2π fCin ) at high ter than the ’277’s 1 nA, but not much better than the ’1012’s amazing
frequencies. 100 pA.
Art of Electronics Third Edition 5.10.7. Bias current 325

The integrated-noise plots are revealing, but it’s help- 10

ful to have a single number in the table to evaluate our
1nA
op-amps. The “Vn pp” parameter in the table is the peak- AD711
to-peak voltage noise over a 0.1-10 Hz band. This shows 24

Input Current, I B
100 5/7 1
5 PA
an op-amp’s “dc noise” as seen in the flat part of the curves LT10 O
LT1881 (BJT) 9 5&
A7
in Figure 5.54. The values range up to 11 μ Vpp (but parts 10 OP

like the LMC6482 avoid the competition by not listing any ADA4000
spec at all). The LT1028 is the winner with 35 nVpp, but 1pA
7
the LMP7731 is a notable part at 80 nVpp, with its RRIO OPA62 OPA376 1
100 00
C6
capabilities and its SOT-23 package. The ADA4075, with LM

}
its 1 mV offset, didn’t make the precision table, but its AD549
10 OPA129 +2V
+1V LMP7721
60 nVpp noise level is attractive. 0V
Precision op-amps that suffer from 1/ f noise (i.e., all 1fA
–40 –25 0 25 50 75 100 125
except auto-zero types) have a Vn pp spec whose lower fre- Temperature (˚C)
quency limit is usually 0.1 Hz. If you need a lower start-
ing frequency (such as 0.01 Hz, used in the plots), mul- Figure 5.38. Input current versus temperature for a representative
set of op-amps from Table 5.5 on pages 320–321, taken from man-
tiply the low-frequency noise-voltage value listed by the
ufacturers’ datasheets. See also Figures 5.6 and 3.48.
square root of the number of additional low-end decades
you want (that’s an interesting 1/ f noise factoid). As long
as the 1/ f corner is multiple decades higher, you can ig- high-temperature performance and improved offset volt-
nore the white-noise contribution to the spectrum. ages and drift, see Figure 5.6.
The Vn pp parameter is your primary clue about an op- Low-input-current op-amps generally have higher offset
amp’s long-term drift performance. voltage and offset voltage drift, and they’re usually more
noisy. The OPA627 and ADA4627 JFET op-amps are ex-
ceptions, and they’ve served us well, but they’re expensive.
5.10.7 Bias current Happily the new JFET OPA827 has lower noise and offers
The available input bias currents range from femtoamps to some price relief. The AD743, not in the √ table because of
microamps (nine orders of magnitude!). In some applica- its 1 mV offset voltage, sports a 2.9 nV/ Hz spec. Looking
tions this is the parameter that rules out entire classes of at CMOS parts (which are low voltage), we find that √ the
op-amp choices. Parts featuring very low typical input cur- LMP7715 is the best low-noise contender, at 5.8 nV/ Hz,
rents often have unimpressive maximum specs; this is due but a √low-cost part like the AD8616, with 1 pA bias and
to the difficulty and expense of automated testing at cur- 7 nV/ Hz noise, may offer a good compromise.
rents below 10 pA or so. For example, the $1.88 low-cost High-speed op-amps often have high input bias cur-
LMC6482A CMOS op-amp has a 20 fA “typical” spec, but rents, typically 200 nA to as much as 20 μ A. They also tend
the datasheet shows a 4 pA maximum value – that’s 200× to have high offset voltages, above 0.5 mV, so most parts in
worse.38 However if you’re willing to pay over $10, you this category didn’t even make it into the precision table,
can get an LMP7721 with a 20 fA maximum spec. but appear in the high-speed op-amp category in Table 5.4
As we’ve said earlier (and will say again), the “bias” on page 310. TI’s fast OPA656 and ’657 low-voltage JFET
current of JFET and CMOS op-amps is a leakage current, op-amps, with 2 pA typical bias current, 290 V/μ s slew
and it increases exponentially with temperature; see Fig- rate, and 20 ns settling time, demanded and were granted
ure 5.38. That’s the bad news. The good news (as we’ve residence in both tables. The OPA380 is a 90 MHz op-
also said before) is that there are some op-amps (like the amp meant for fast transimpedance applications, featuring
LT1012 and AD706) that have low JFET-like input cur- 50 pA and 25 μ V maximum offset. This part uses an auto-
rents, but which have BJT inputs and therefore enjoy better zero circuit to achieve 25 μ V offset, but avoids excess cur-
rent noise with an isolating filter (Figure 5.41).

38 Note 13 on the LMC6482 datasheet says “Guaranteed limits are dic- A. Measuring bias current
tated by tester limitations and not device performance. Actual perfor- To measure input currents (or offset currents) down to the
mance is reflected in the typical value.” That’s illuminating, but not nanoamp level or so, you can use the simple circuit in
entirely helpful for the designer of a mass-production instrument. Figure 5.39. For really small currents, though, you’ve got
326 5.10. Choosing a precision op-amp Art of Electronics Third Edition

to play some clever tricks: a current down in the fem-

toamps (10−15 A) develops only microvolts across a gi- –
Iin V
gaohm! (And you’ll never see that, because offset volt- +
DUT –Vo
ages are much larger.) Instead, accumulate the tiny input t
C1 10 pF
current in an integrator (itself constructed with an ultra- t
low-input-current op-amp), as shown in Figure 5.40A.39 R1
S1a S1b 100M
Here the short length of shielded cable (with Teflon di-
electric) serves as the integrator’s feedback capacitance C1
–
(standard 50 Ω coax has a capacitance of almost exactly – Vo
C2 R2
1M +
1 pF/cm, see Appendix H). You can watch the ramp di- + 10 nF
rectly, or, if you want to get fancy, add a differentiator as
shown. A.

DUT –Vo
RS1
+ Vo
+VCC t
– Iin
RS2 Vo
1.0k I= 1 DUT
101 RS + Vo to ’scope
50 to 500 pF or DMM
C –
(air, vacuum)
10Ω

–VEE
B.
Figure 5.39. Input current (set one of the Rs ’s to zero) and input
offset current (Rs1 = Rs2 ) test circuit. Use Rs values large enough Figure 5.40. Integrate the input current to measure in the picoamp
so that the voltage developed across them is at least some 10s of range (and below). A. With a separate MOS-input op-amp integra-
millivolts, so that errors due to offset voltage can be ignored. Add a tor whose input current is in the low femtoamps (e.g., an LMP7721,
200 Ω resistor at the output if you want to drive a cable. IB =3 fA typ, 20 fA max). Use electromechanical relays (not MOS
switches) for S1 , for example the COTO 9202 series shown in Fig-
ure 5.3. B. More simply, let the device’s input current charge a small
A somewhat simpler method, which has worked well
capacitor, and observe the ramp at the G=1 output.
for us, is to wire the op-amp as a follower, with a small
capacitor from the (+) input to ground (Figure 5.40B); the
op-amp’s input current then generates an input ramp, faith- 5.10.8 Current noise
fully reproduced at the output. At first we struggled with The op-amp’s input current noise density in flows through
memory effects in mica and film capacitors, but we finally the source impedance seen at the amplifier’s input ter-
settled on an air (variable) capacitor, of the sort that were minals, contributing an equivalent noise voltage density
used to tune AM radios in the good ol’ days. With the ca- in Zs ; this is often negligible compared with the amplifier’s
pacitor set to 365 pF we got an output ramp of 0.20 mV/s en . We can define a “noise impedance” for the op-amp,
from an LMC6482, and thus an input current of 73 fA. You Zn ≡ en /in , so that we can safely ignore current noise when
can “reset” this circuit by collapsing the supply rails. Be the source impedance Zs  Zn . √ √
sure to put the whole business in a metal box: these open Typical in values range from 0.1 fA/ Hz to 50√fA/ Hz
inputs are really sensitive beasts! for CMOS and JFET op-amps, and up to 5 pA/ Hz for
low-noise BJT-input op-amps that operate at relatively high
39
input currents. The superbeta BJT LT1012 (with √ its low in-
Based on nice techniques worked out by Paul Grohe and Bob
put current) does considerably better, at 20 fA/ Hz. But
Pease at National Semiconductor. See Paul Rako’s article “Mea-
note that the high-in LT1028 is the voltage-noise winner,
suring Nanoamperes” (EDN, 26 April 2007), and two riffs by
Pease from his series in Electronic Design: “What’s All This
for which we pay the penalty of high current noise. Its noise
Teflon Stuff, Anyhow?” (14 Feb 1991) and “What’s All This impedance Zn = 850 Ω, which means that unusually low
Femtoampere Stuff, Anyhow” (2 Sept 1993). Nicely readable ver- circuit resistances must be used, say 300 Ω or less, to ob-
sions currently available at http://electronicdesign.com/ tain the full benefit from its low voltage noise. By contrast,
test-amp-measurement/whats-all-teflon-stuff-anyhow the BJT LT1013 single-supply op-amp has Zn = 315 kΩ, a
and . . . /whats-all-femtoampere-stuff-anyhow. comfortably high value.
Art of Electronics Third Edition 5.10.8. Current noise 327

Cf rent noise.√For example, the LT1007, with its quiet

en =2.5 nV/ Hz, has a 10 nA bias-current spec, √ from which
Rf we calculate a shot-noise current√of 56 fA/ Hz, but the
manufacturer’s spec is in =400 fA/ Hz. That’s seven times
+5V
too high! What’s going on? To achieve low-noise volt-
+VS
age they run the input transistors at high collector cur-
OPA380
rents. That creates a high base current, which would be
–in the op-amp’s input current if they hadn’t used the old
– out Vout
1M 67pF base-current-cancellation trick (§4x.10). So the dc bias cur-
+ 0 to
+4.4 V rent is small, but the current noise is large. The ultralow-
– RP
100k
(opt.
en LT1028 also uses bias-current cancellation, keeping
photo
diode + auto- 75pF
pulldown) its bias current down to 25 nA, but with a current noise
zero 10 times higher than the calculated shot-noise value. And
+in
–5 V for the LT6010, whose input current is brought down to
–VS just 20 picoamps (the kind of low currents you see in FET-
input op-amps), the current noise is 40 times larger than
calculated shot noise.
Figure 5.41. The OPA380 achieves 4 μ V typical voltage offset us-
√ In other words, it’s important to realize that the input
ing an auto-zero feature, yet it has only 10 fA/ Hz current noise
at 10 kHz. It is ideal for transimpedance applications such as the noise current of a bias-cancelled op-amp will be consider-
photodiode preamp shown here. ably larger than you would expect if you were to calculate
the shot noise arising from the net (i.e., cancelled) input
The manufacturer’s spec gives the current-noise den- bias current. Rather, you need to calculate the shot noise
sity at a high frequency like 1 kHz or 10 kHz, chosen to from the√ uncancelled base currents (and then apply a fac-
be well above the current-noise 1/ f corner frequency. The tor of 2 to account for the additional noise in the can-
current-noise 1/ f corner typically comes at much higher cellation current). For example, using the LT6010’s value
frequencies than the voltage-noise 1/ f corner. For exam- of IB = ±20 pA (typ), you’d√incorrectly estimate a shot
ple, the OPA277 has a 20 Hz voltage-noise corner, but a noise current of in ≈ 2.5 fA/ Hz, whereas the datasheet
200 Hz current-noise corner; for an LT1007 it’s 2 Hz and lists a typical √
value (at 1 kHz, well above the 1/ f cor-
120 Hz. The differing 1/ f corner frequencies mean that √ Hz; similarly for the√LT1028 (which spec-
ner) of 100 fA/
we’ll get different Zn values at low frequencies. Returning ifies 1000 fA/ Hz, versus the 90 fA/ Hz you would incor-
to the LT1028, for example, its relatively higher current rectly estimate from the net IB ). Table 5.5 does not tell you
noise at low frequencies lowers Zn to 212 Ω at 10 Hz. This if a BJT amplifier employs bias-current cancellation, but
requires that we push down further our circuit resistances there’s a convenient bias-cancel column in the low-noise
for optimum performance, to 100 Ω or less. BJT op-amp Table 8.3a on page 522. Op-amps with bias-
At high frequencies the current noise may consist current cancellation generally do not have rail-to-rail input
largely of the fundamental (and unavoidable) shot noise, stages.40
the statistical fluctuations of electron flow (eq’n 8.6). For A caution: some datasheets list greatly optimistic values
√ bias (or leakage) current IB that lower bound is
an input for in , evidently making exactly this error. For example,
in = 2qI√ B ; for a bias current of 10 pA that evaluates to the bias-cancelled LT1012’s datasheet shows a typical in
√
in =1.8 fA/ Hz (from which you can conveniently scale up leveling off to 6 fA/ Hz (beyond the 1/ f corner), which is
or down by the square root of IB ). The typical and maxi- what you’d calculate from the specified net (i.e., cancelled)
mum bias-current specs vary widely, as we saw; evidently input current of ±100 pA max, whereas you would expect
many manufacturers simply list the calculated shot-noise a value about 10 times larger (assuming the uncancelled
value corresponding to the typical bias-current spec. For
example, the LT1013 has IB =12 nA typ, from √ which we can 40 The LT1677 listed in Table 8.3a is an exception. Its datasheet has a
calculate a current-noise√density of 62 fA/ Hz; the manu- graph labelled “Input Bias Current Over the Common Mode Range,”
facturer’s spec is 70 fA/ Hz. showing that the bottom 1.4 V and top 0.7 V of the common-mode
An important exception comes in the case of BJT- range suffer from high bias currents. The op-amp’s offset voltage is
input op-amps with bias-current cancellation circuits: that also degraded in these regions. But, hey, we warned you about that in
greatly reduces the dc input current, but not the cur- §5.9.1!
328 5.10. Choosing a precision op-amp Art of Electronics Third Edition

base current is about 100× larger). We were skeptical of The power-supply rejection ratio, PSRR (not shown in
the datasheet’s claimed in , so we measured it (along with Table 5.5 (pages 320–321) tells how much VOS varies with
others that √appeared to be similarly in error), and found41 power-supply voltage. Typical dc values are 60–80 dB for
in ≈ 55 fA/ Hz. This error shares some of the characteris- the LMC6482, up to 130 dB for the OPA277 (but only
tics of an epidemic, having infected also the datasheets of 100 dB for the AD8622). Study your datasheets!
auto-zero op-amps. For example, the exemplary AD8628A Frequently one rail is much worse than the other, espe-
(listed in Table 5.6 on √
page 335) specifies an input noise- cially for ac PSRR, because of the op-amp’s compensation
current density of 5 fA/ Hz; imagine our surprise when we capacitor (see Figure 4.43, where Q5 and Q6 are referenced
measured a value 30 times larger. Not to be outdone,√the to the negative rail). For example, the OPA277 suffers by
MCP6V06 auto-zero op-amp’s specification of √ 0.6 fA/ Hz an extra 25 dB on its negative rail. The ac PSRR is sig-
is rather at odds with its measured 170 fA/ Hz. See the nificant in two regions, 100–120 Hz (and harmonics) for
discussion in §§5.11. power-supply ripple, and at high frequencies for cross-talk
It’s important to note that, in the case of chopper and from other circuitry.
auto-zero op-amps, the input current noise spec is usually A common defense against PSRR problems, in sensitive
given at a low 10 Hz frequency, because that’s below the re- applications such as low-level input stages, is to add an RC
gion of very high switch charge-injection current noise (see filter in the supply rails.
§3.4.2E). If you take the trouble to measure an auto-zero’s
input noise, you’ll see something like the plots shown in
5.10.10 GBW, f T , slew rate and “m,” and settling
Figure 5.52. This is an unfortunate situation, with insuffi-
time
cient guidance (and perhaps deliberate obfuscation) from
manufacturers. We discuss this further in §5.11. It’s tempting to think one can never have too much GBW
(gain–bandwidth product, or fT , its original name that we
favor, see Figure 5.42). After all, a higher GBW means
5.10.9 CMRR and PSRR
greater loop gain, and higher loop gain means lower er-
The common-mode rejection ratio, CMRR, tells how much ror (gain, phase, distortion). What’s more, with higher fT
the input offset voltage VOS varies with common-mode in- we’re well on our way to having a faster slew rate, via the
put voltage. The problem, of course, is that such a change formula S=0.32m fT as discussed in detail in §4x.9.
in VOS masquerades as a change in the input signal voltage. Furthermore, a faster slew rate means a greater full-
The CMRR values vary from 70 dB (min) for our fa- power bandwidth (FPBW): a sinewave V (t) = A sin ω t has
vorite LMC6482 (an inexpensive CMOS dual op-amp), a peak slew rate S = ω A, so FPBW = S/π Vpp. Finally, be-
up to 130 dB for the precision OPA277. Degradation of cause the first step on the way to waveform settling is
CMRR at high frequencies often matters, and there’s usu- the slewing delay t = ΔV /S, a higher fT is an important
ally a plot in the op-amp’s datasheet (check out a few for step (and often the primary determinant), toward a faster
yourself, for example these two; we show CMRR plots for settling-time spec. The data in Tables 5.4 (page 310), and
other types of op-amp in Figures 5.73 and 5.82). For ex- 5.5 (pages 320–321) let you explore the essential question
ample, the LMC6482 typical CMRR starts falling upward “what price higher bandwidth?”
of 1 kHz, and it’s down to 80 dB at 10 kHz. It’s interesting
that both the OPA277 and the AD8622 (another expensive A. An aside: GBW and f T
high performer at dc) degrade to about 80 dB by 10 kHz, First, a short riff on “GBW” and “ fT .” Figure 5.42 shows
joining our jellybean CMOS friend. Other parts do better, a plot of open-loop gain versus frequency for a THS4021
such as the LT1007 (114 dB typ at 10 kHz). And to repeat a wideband op-amp. This is a “decompensated” op-amp, sta-
warning we made elsewhere: the CMRR spec often applies ble for closed-loop gains ≥ 10, with a textbook Bode plot.
to only a limited common-mode range; read the datasheet The term GBW properly describes the product of open-
carefully. loop gain times frequency in the region in which the gain is
Note this universal cure: a time-honored way to avoid dropping at 6 dB/octave (i.e., GOL ∝ 1/ f ). Its extrapolation
CMRR troubles is to use an inverting configuration. crosses the GOL =0 dB axis at a frequency equal to GBW.
At that frequency, however, the gain is less than unity, ow-
41 Datasheets for the closely similar OP-97 and LT1097 make the same ing to the effect of additional higher-frequency poles in the
error, evidently corrected in that of the later LT6010 (the recommended amplifier. Strictly speaking, the symbol fT is used for the
successor to the LT1012). (lower) frequency at which GOL = 1.
Art of Electronics Third Edition 5.10.11. Distortion 329

But we like the simpler variable fT , and so do plenty 1% distortion at 50 MHz, and it’s even RRIO to boot.43
of other folks; so it’s loosely used in place of GBW. Per- And there’s the LT6200-10 variant, with 1.6 GHz of GBW.
haps this is excusable, given that fT is pretty close in value Nice!
to GBW for op-amps that are compensated for stability at We did include some admirable high-speed op-amps
unity gain (this describes most op-amps). In any case, un- in Table 5.5, (pages 320–321), overlooking in one case
less stated otherwise, we will use fT to mean GBW. an, uh, underwhelming VOS . One such favorite of ours
is the OPA656, a member of a small family of highly
100 useful op-amps offered by the Burr–Brown division at
THS4021 TI: it combines 230 MHz GBW, 290 V/μ s slew rate, and
80
20 ns settling time. With its 2 pA JFET inputs having less
Open-loop Gain (dB)

60 than 3 pF of input capacitance, we readily forgive its

1.8 mV√ offset voltage, and we’re happy enough with its
40 7 nV/ Hz of input voltage noise. It is excellent for a trans-
impedance amplifier of the sort used with photodiodes –
20 see §§4x.3 and 4x.9. The OPA656 even has a distortion
GBW
plot in Figure 5.44 (see next subsection), where we see
0 it has less than 0.1% distortion to 10 MHz and beyond.
fT
And it has a 1.6 GHz cousin, the OPA657. When we need
–20
10k 100k 1M 10M 100M 1G 10G higher operating
√ voltage, and crave lower en , we turn to
Frequency (Hz) the 4.5 nV/ Hz OPA637; it has somewhat greater capac-
itance (7 pF), and less bandwidth (80 MHz). And there’s
Figure 5.42. An op-amp’s gain–bandwidth product (GBW) is the
the 90 MHz OPA380 shown above. Very fine products from
frequency at which the extrapolation of the open-loop gain curve
crosses the unity-gain axis. It’s often loosely called “ fT ,” though
BB/TI.
the latter is properly the frequency at which the closed-loop gain On the subject of low distortion, Linear Technology of-
is unity. The arrows indicate the dominant and second poles. The fers the LT1468 (90 MHz, 75 μ V, ±15 V supply), which
data here are taken from the THS4021 datasheet, which also claims 0.7 ppm distortion with a 10 V signal; and with its
shows the phase shift reaching 180◦ by 400 MHz. 0.8 μ s settling time, it’s a good candidate to feed hungry
ADCs. Not to be outdone, National Semiconductor offers
the LMP7717, a CMOS op-amp with an 88 MHz fT , yet
B. Milking stools and barstools drawing just 1 mA, working down √ to a 1.8 V total supply
If offset voltage is one leg of the precision op-amp stool,42 (!), and offering 1 pA IB , 6 nV/ Hz en , and 150 μ V VOS
bandwidth and speed certainly comprise another. Many of input specs, along with rail-to-rail outputs. Parts like these
the fast op-amps we wanted to include in the precision Ta- suggest that maybe we can have our speed + precision cake
ble 5.5 (pages 320–321) were passed over because they and eat it too.
had too much offset voltage – so some of them have gotten
their own Table 5.4 (page 310). For example, in that√ table 5.10.11 Distortion
we have the LT6200, with 165 MHz GBW, 0.95 nV/ Hz,
and 1.0 mV of offset. It’s a conventional voltage-feedback Although much of the precision analog-design field con-
(VFB) op-amp offering 50 V/μ s slewing and 140 ns set- cerns dc and low frequencies, there are applications that re-
tling time, so whatever is wrong with it? Only 50 V/μ s, quire accuracy at higher speeds: audio and video, commu-
with m = 1? A limited 10 V (±5 V) supply with a high nications, scientific measurement, and so on. With falling
16.5 mA current? And a very high 40 μ A (!) max bias op-amp loop gain, input errors are rising, output impedance
current? The point here is that there’s a price to pay for is rising, and slew-rate limitations may come into play.
high fT , and maybe this part is not so attractive after all. We need a way to evaluate an op-amp’s performance at
√ mid to high frequencies. Some manufacturers help by pro-
But at least the LT6200 has less than 1 nV/ Hz of noise,
viding harmonic distortion curves in their datasheets. If
42 Three-legged, or four? We’ve found that city folks don’t know why it is 43 Yeah, OK, but read carefully: on page 10 of the datasheet you’ll see
that milking stools have three legs, whereas barstools have four. Those that there are ∼1 mV shifts of offset voltage when the input is within
with rural upbringing can tell you, in a flash. 1.5 V of the rail! A powerful incentive to use inverting mode!
330 5.10. Choosing a precision op-amp Art of Electronics Third Edition

it’s painful going through hundreds of datasheets looking concentrate on specific distortion products, e.g., the 2nd
for tabulated specs to compare, it’s doubly painful leafing or 3rd harmonic. These hidden choices affect an op-amp’s
through their back pages looking for distortion curves. standing on the charts.
Here we provide some “value added” (hey, this book Second, the distortion plots sometimes reveal artifacts
isn’t cheap!) by compiling distortion plots from the of the measurement process – for example, the curves in
datasheets of fifty selected high-performance op-amps: Figures 5.43 and 5.44 begin with a flat distortion profile
Figure 5.43 (for high-voltage op-amps) and Figure 5.44 for starting at dc, which, however, often continues well past the
low-voltage and RR-output op-amps (including some HV frequency at which we know the op-amp’s open-loop gain
types). The op-amps listed in Tables 5.4 (page 310) and 5.5 is falling (i.e., past the primary pole). This is contrary to
(pages 320–321) have a check in the “dist graph” column expectations, and likely reveals a noise-floor instrumental
if they appear in one of these graphs. We’ve also measured limitation, rather than reality; i.e., the op-amp is better than
the distortion and made plots for some popular older op- advertised.
amps that don’t have datasheet plots; see Figure 5.19. Third, the curves ultimately show the expected rising
Burr–Brown/TI’s OPA134 and OPA627, along with Na- distortion at higher frequencies; this is due to internal op-
tional Semi’s LME49990 and other LME49700-series op- amp nonlinearities and to loss of loop gain, both within and
amps, are the winners in the high-voltage category. LTC’s outside the op-amp. But this region is heavily dependent on
LT1468 stands out as well. Analog Devices’ AD8021 signal size and on load, with varying choices by different
stands out at high frequencies, and they often recommend it manufacturers. At some higher frequency the upward curve
for driving ADCs. TI’s THS3061, which has an impressive may steepen sharply. This is usually due to third-harmonic
7000 V/μ s slew rate, looks pretty good above 100 kHz, and distortion. We cannot generalize about where second- or
as a bonus it can deliver 145 mA into 50 Ω. The OPA1632 third-harmonic distortion will dominate for any given op-
and LME49724 are fully differential amplifiers, see §5.17. amp, but it seems that second-order distortion is the most
The low-voltage and RR op-amp table comprises mostly common culprit. This is surprising, given an effort in many
parts running from ±5V supplies, or lower. Most of these op-amps to fully balance the design.
have rail-to-rail outputs, demonstrating that RRO op-amps Fourth, when you’re in the <10 ppm territory all kinds
can compete in the precision arena. Some low-voltage op- of strange things can bite you. As wise guru Jim Williams
amps are at a disadvantage relative to their HV cousins, be- once remarked, “If you think you’ve measured some-
cause they have to use abnormally low signal levels. Con- thing to 1 ppm, you’re probably wrong.” Figure 5.45 il-
sider the graph’s OPA1641 JFET winner, at 0.5 ppm. It’s a lustrates an often-overlooked issue. Here we have a pre-
high-voltage part with RR outputs, and it gets tested with cision OPA1641 op-amp that’s capable of distortion per-
8.5 Vpp signals, a luxury not available to the low-voltage formance below 1 ppm at 1 kHz, and in noninverting mode
RRO parts. The OPA376 is the low-voltage winner in this the op-amp has just over 20 ppm of distortion at 100 kHz.
category, at 3 ppm, while being tested with 2.8 Vpp. It’s It’s a JFET op-amp with 8 pF of input capacitance (rea-
interesting that both of these op-amps use the Monticelli sonably
√ low, especially considering the op-amp’s low
output stage (see Figure 5.35 and §4x.11). 5 nV/ Hz noise spec). In an admirable display of candor,
the datasheet warns us that “The n-channel JFETs in the
A. Distortion: some caveats FET input stage exhibit a varying input capacitance with
Some caution is advised here: it’s tempting to look at the applied common-mode input voltage,” and it provides plots
distortion plots and think that you know how the op-amps of increasing distortion arising from an input source resis-
compare. But some of the distortion measurements need to tance driving the op-amp’s dynamically-changing capaci-
be taken with more than a grain of salt, and a few caveats tance. For example, with Rs = 600 Ω the 100 kHz distortion
are in order. First, there are no de facto standards for op- increases dramatically, to 100 ppm. They suggest carefully
amp distortion, and manufacturers have chosen different matched input impedances to reduce this type of distortion
operating conditions.44 Some use THD, others THD+N (an effect that is not confined to this particular op-amp: be
(total harmonic distortion plus noise), and still others may warned!). Better yet, use the inverting configuration.
Finally, a look at the test circuit used by many man-
44 Manufacturers use different voltage levels (2 Vpp, 3 Vrms, 10 V peak, ufacturers to make sub-100 ppm distortion measurements
and 20 Vpp), different loads (100 Ω, 600 Ω, 2k, 10k and open circuit), (Figure 5.46). The trick is to reduce op-amp’s loop gain by
different common-mode voltages, different analyzer filters, and even a factor of 100, thus increasing the distortion by the same
different gains for their measurements. factor; the reported distortion is then gotten by dividing the
 1% –40dB

21
57
13

80
71

LT

AD
61
0
0.1% –60dB

10 24
LM
01

0Ω
L= 6
6

R H6
LT

15

LM
18
277

LT
51
13
OPA
97

LT
OP
0.01% –80dB
4 1
553 06 )
Distortion

NE S 3 C FB
T H (
6 0

71
13
LT

86
AD8610
0 07

AD
10 ppm –100dB LT1
OPA604, OPA1632
AD8597 6 8
R L=600Ω 14
R L=2kΩ
LT
11 27
1ppm –120dB AD7 6
8 675 O
PA LME49710
AD
R L=600Ω High-Voltage (≥30V)
R L=2kΩ LME49724} Op-amp Distortion
LME49990
0.1ppm –140dB
100 1k 10k 100k 1M 10M
33
4 X9 6
OPA13 MA Frequency (Hz)

Figure 5.43. Harmonic distortion versus frequency for a selection of “high-voltage” (≥30 V total supply) op-amps, from manufacturers’
datasheets.

1% –40dB
2
731

5
9
13
LMP

LT
A)

er
μ

d
(10

0.1% –60dB 9 or
69 d
2

2n
23

PA 11
P2

O
MAX4236 64
LM

3 LT
TLC4501 4
A7 LMP7731
0.01% –80dB OP er
Distortion

38
ord

86
AD
3rd

LT6200, AD8352
10 ppm –100dB AD8622 OPA690, OPA656
(JFET)
AD8610, AD8132 AD8007
LTC6081, LMP7721 5
804
AD
OPA376
OPA725
1ppm –120dB R L=600Ω
}
R L=2kΩ OPA1641
Low-Voltage (≤18V)
Op-amp Distortion

0.1ppm –140dB
100 1k 10k 100k 1M 10M
Frequency (Hz)

Figure 5.44. Harmonic distortion versus frequency for selection of “low-voltage” (≤18 V total supply) op-amps, from manufacturers’
datasheets. Most of these have rail-to-rail output stages. See also Figure 5.19.

331
332 5.10. Choosing a precision op-amp Art of Electronics Third Edition

0.01% deal with the high loop gain of a G=1 circuit, as we show
OPA1641 in §4x.5.
G = +1
Vs = ±15V
In Chapter 4x’s discussion of composite amplifiers we
600Ω
0.001% Vsig = 3Vrms show a robust amplifier configuration in which the second
THD + Noise

300Ω
150Ω op-amp’s gain is reduced to unity at a frequency well above
Rs =0Ω the first op-amp’s fT , allowing loop-gain flexibility. In ad-
dition, no restrictions are placed on common-mode volt-
0.0001%
ages or amplifier input connections in this approach. It’s
a good configuration to consider, although as often as not
you’ll find plenty of variations in real-world composite am-
0.00001% plifier implementations.
20 100 1k 10k 100k
Frequency (Hz)
A. Design example: precise high-current piezo
Figure 5.45. The variation of input capacitance with signal voltage
positioner
causes additional distortion at higher frequencies, dependent on
source resistance.
A nice application for a composite amplifier is a precision
microscope stage positioner, implemented with a pair of
measured distortion by 100. But an immediate concern is multilayer piezo elements. These devices are both swift
the artificial nature of the test, with the op-amp seeing an and stiff – our chosen part, for example, is good to tens
artificially low source impedance. It’s safe to conclude that of kilohertz and tens of kilograms – and they provide stable
we all can likely benefit from further work in this area.45 and accurate positioning (at the nanometer scale) over their
limited motion (here 6 μ m). On the down side, they present
a difficult load, being highly capacitive (here 0.75 μ F) and
+
requiring relatively high drive voltage (here 100 V full-
R1 –
10.1Ω scale).
signal gain = 1 A suitable circuit is shown in Figure 5.47. We’d like a
R
distortion gain = 1 + 2
R2
1.0k
R1 moderately fast response, say 1 V/μ s slewing speed, which
requires I = CdV /dt = 1.5 A of drive capability into the
Figure 5.46. Distortion test circuit. With the values shown, the op- piezo pair’s 1.5 μ F of capacitance. Our signal source is a
amp’s effective loop gain is reduced by ×100. Add a series resistor 16-bit DAC8831, with a +5 V full-scale output (R-2R lad-
at the output if driving a cable.
der, Rout =6.25 kΩ) with a fast SPI interface. Running the
DAC with a 5 V reference produces a least-significant bit
(LSB) step size of 76 μ V. Its Rout of 6.25k requires an op-
5.10.12 “Two out of three isn’t bad”: creating a amp whose input current is less than 12 nA in order not
perfect op-amp to add error greater than an LSB. And the op-amp has to
swing to +100 V while driving 1.5 μ F.
We recognized at the outset that there’s no such thing as a So, we’re evidently looking for a muscular 150 V, 1.5A
perfect operational amplifier – but not to fear, there is usu- op-amp with an input offset less than 75 μ V, and bias cur-
ally a workaround. If you find the input performance specs rent less than 10 nA. Looking, looking. . . no joy! No such
you need in one op-amp, and the output specs in another, part is available, so we’ll solve the problem by rigging up
it may be possible to combine them into a “composite am- a composite amplifier with a gain of 20. We’ll specify a
plifier” circuit that acts as a single op-amp (combining the frequency response to 25 kHz (which is about 20% of the
best features of each) in your feedback loop. Or you can piezo’s mechanical self resonant frequency).
create a composite op-amp by adding a discrete input or For the input op-amp we chose the AD8675 from Ta-
output stage to the op-amp IC of your choice. If your over- ble 5.5 (pages 320–321). It has low input errors (75 μ V
all feedback circuit has very high gain, such as a G=10,000 and 2 nA max), and enough output swing to drive a high-
amplifier, you may not need to worry about compensation voltage G = 20 stage. For our output amplifier we chose
(e.g., see Figure 5.61). However, it’s not terribly difficult to the Apex PB51, a power driver capable of 300 V and 1.5 A
(but subject to a safe-operating-area constraint, for exam-
45 OK, we plead guilty-as-charged to that conclusion favored by all aca- ple limited to 130 V drop when driving 2 A for 100 ms). Its
demics – “needs more study (and a grant proposal is in the mail).” maximum input errors are 1.75 V (!) and 70 μ A (!) – that’s
Art of Electronics Third Edition 5.10.12. “Two out of three isn’t bad”: creating a perfect op-amp 333

+130
A2 PB51
ILIM 0 to +100 V
1V/μs.
+5.0 DAC8831
16 bits 2Ω
0–5 V +12
AD8675 0.47Ω
Ro = 6.25k A1
DAC +
52.3k 5Ω CL
C1 (G = 20)
1.5nF – 6.2k
(10 μs) 0.1μF
C2 GAIN
SPI –12 3.1k
1nF
(25kHz) NEC Tokin
–12 AE0505D08
2 × 0.75μF
f res = 138 kHz
R1 R2
(G = 20.1) 0 to 100 V
6.49k 124k

Figure 5.47. Precision composite amplifier for driving a 1.5 μ F piezo positioner: output to 100 V and 1.5 A, with 75 μ V maximum offset,
2 nA maximum input current, and response to 25 kHz. The specified piezo actuator moves 6 μ m per 100 V.

why they call it a driver rather than an op-amp! Its gain is can be found in §4x.5 and in Figures 5.58, 5.59, 5.61, 8.49,
set with an external resistor, here 52.3 kΩ (for G = 20) to 8.50, 8.78, 8.80, and 13.48.
match the desired overall gain. And other examples of techniques that exploit the “two-
The single feedback path R1 R2 sets G = 20 for the com- out-of-three” concept of adding external amplifier blocks
posite amplifier. A general scheme for compensating com- are (a) discrete JFET front-end for a BJT op-amp (e.g.,
posite amplifiers is suggested in §4x.5. Here we use a dif- Figure 5.58), (b) output unity-gain buffer (§5.8.4), and (c)
ferent scheme, with C2 isolating the input op-amp A1 from bootstrapped power supplies to extend voltage range, or to
the output amplifier A2 at frequencies above 25 kHz. That improve CMRR (e.g., Figure 5.79).46
way we don’t have to worry about A2 ’s response at high
frequencies, where it’s struggling with its capacitive load. 5.11 Auto-zeroing (chopper-stabilized)
This is really a “custom” configuration, forced on us by amplifiers
the, uh, challenging load; what is has in common with Even the best of precision low-offset op-amps cannot
other composite amplifier configurations is the single over- match the stunning VOS performance of the so-called
all feedback path that determines its gain over most of its “chopper-stabilized” or “auto-zero” (also called “zero-
operating regime. drift”) op-amps. Ironically, these interesting amplifiers are
To get an understanding of circuit operation, imagine built with CMOS, otherwise famous for its mediocrity
a 2 V input step from the DAC. This causes a 2 V step at when it comes to offset voltage or drift. The trick here is
the output of A1 (which acts like a follower at high speeds, to put a second nulling op-amp on the chip, along with
owing to C2 ), which is approximately the right signal to tell some MOS analog switches and offset-error storage capac-
A2 to drive current into CL and move its output by 40 volts itors. One of several possible configurations is shown in
(that’s why we chose G=20 for the output stage). As ampli- Figure 5.48. The main op-amp functions as a conventional
fier A2 approaches this goal, op-amp A1 takes charge and (imperfect) amplifier. The nulling op-amp’s job is to mon-
presents correction signals to cause the output to hone in itor the input offset of the main amplifier, adjusting a slow
on the precise value. correction signal as needed in an attempt to bring the input
A few additional circuit details: the DAC’s response is offset exactly to zero. Because the nulling amplifier has an
slowed by C1 to a 10 μ s time constant – no point in jolt- offset error of its own, there is an alternating cycle of oper-
ing the amplifier, given its limited bandwidth. The series ation in which the nulling amplifier corrects its own offset
RC across the output promotes stability, both by reduc-
ing A2 ’s open-loop gain at high frequencies and by pro- 46 If you’re considering piezo positioners for a precision application, be
viding lossy damping; it’s widely used in audio power am- aware that they exhibit some nonlinearity and hysteresis when driven
plifiers. Note that substantial bypass capacitors (as much from a voltage source. These issues are said to be ameliorated when the
as 100 μ F, not shown) are needed with such large signal drive signal is quantified by charge instead of voltage. See Chapter 3x
currents. for a precision current-drive circuit that circumvents this problem and
Further examples of the composite amplifier technique makes fast linear piezo steps.
334 5.11. Auto-zeroing (chopper-stabilized) amplifiers Art of Electronics Third Edition

voltage. Both amplifiers have a third “nulling” input termi- smaller selection that can run up to 15 V, and just one48
nal, analogous to the offset trim seen in some op-amps. older generation part (the LTC1150) that can operate at
±15 V.
main amp
Of greater importance is the problem of clock-induced
(–) –
input output noise. This is caused by charge coupling from the MOS
(+) + null switches (see §3.4.2E) and can cause wicked spikes at the
output. The specifications are often misleading here, be-
cause it is conventional to quote input-referred noise with
C2
null amp RS = 100 Ω and also to give the specification for only
+ very low frequencies. For example, a typical input-referred
– null
noise voltage might be 0.3 μ Vpp (dc to 1 Hz, with RS =
100 Ω). However, with zero input signal the output wave-
square- form might consist of a train of 5 μ s-wide 10 mV spikes of
wave C1
oscillator alternating polarity!

Figure 5.48. The original ICL7650 and ICL7652 auto-zero

(“chopper-stabilized”) op-amps. Capacitors C1 and C2 are external.

LTC1150
The auto-zeroing cycle goes like this. (a) Disconnect the
nulling amplifier from the input, short its inputs together,
and connect its output to C1 , the holding capacitor for its
correction signal; the nulling amplifier now has zero off-
set. (b) Now connect the nulling amplifier across the in-
put and connect its output to C2 , the holding capacitor for
the main amplifier’s correction signal; the main amplifier MCP6V06
now has zero offset (assuming that the nulling amplifier
has not drifted). The MOS analog switches are controlled
by an on-board oscillator, typically running in the range of
1–50 kHz.
AD8628A
5.11.1 Auto-zero op-amp properties
Auto-zero op-amps do best what they are optimized for,
LMP2021
namely delivering VOS values (and tempcos) 5–50 times
better than the best precision bipolar op-amp (see Table 5.6
on the next page). What’s more, they do this while deliver- Figure 5.49. Output waveforms from four auto-zero op-amps, con-
ing full op-amp speed and bandwidth.47 They also have ex- figured for G = 100, with the input connected to ground through a
traordinarily high open-loop gain at low frequencies (typi- 100 Ω resistor. Vertical: 2 mV/div; horizontal: 100 μ s/div.
cally 130–150 dB, a consequence of their “composite am-
plifier architecture”); and, happily, they are inexpensive,
particularly when compared with conventional precision The internal switching also causes spikes of input
op-amps. current, which means that input signals of high source
That’s the good news. The bad news is that auto-zero impedance Rs will exhibit larger input-referred spikes. Fig-
amplifiers have a number of diseases that you must watch ures 5.49 and 5.50 show this behavior, measured with Rs of
out for. Being CMOS devices, most of them have a severely 100 Ω and 1 MΩ, in several auto-zero op-amps configured
limited supply voltage – often 6 V total supply, with a

47 Unlike an earlier generation of synchronous amplifiers that were also

called “chopper amplifiers,” but that had bandwidth limited to a frac- 48 Some old high-voltage types that require external (correction-signal)
tion of the chopping clock frequency. capacitors may still be available.
 Table 5.6 Chopper and Auto-zero Op-amps
Noiset,u
Ibiasa Offset Voltage Swing to
en in
IQ @25°C @25°C Tempco GBW Supplies?

tsettle
trecovery
CMRR Vnpp 1kHz 10Hz HF Cost
Supply typ typ max typ max typ max min dcd Noise typ Slew typ typ IN OUT qty 25
( nV ) ( fA )
Part # Comments

# per pkg
(V) (μA) (pA) (pA) (μV) (μV) (nV/ºC) (nV/ºC) (dB) (μV) √Hz √Hz (>kHz) (MHz) (V/μs) (μs) (μs) + – + – ($US)
ADA4051-1 1,2 1.8-6 15 20 70 2 15 20 100 110 2 95 100 40 0.13 0.04 110 120 1.86 auto-zero, -2=dual
OPA333 1,2 1.8-7 17 70 200 2 10 20 50 106 1.1 55 100 >20 0.35 0.16 45 80 2.57 auto-cal, dual=2333
ISL28133 1,2 1.65-6.5 18 30 300 2 8 20 75 118 1.1 65 79 8 0.4 0.1 35 ? 1.69 dual=28233
OPA330 1,2 1.8-7 21 200 500 8 50 20 250 100 1.1 55 100 >20 0.35 0.16 45 80 2.56 auto-cal, dual=2330
MAX9617 1,2 1.6-6 59 10 140 0.8 10 5 120 122 0.42 42 100 50 1.5 0.7 - ? 1.60 RRIO, charge pump
OPA378 1,2 2.2-6 125 150 550 20 50 100 250 100 0.4 20 200 15 0.9 0.4 9 4 c 2.16 auto-cal, '2378=dual
LTC2054 1,2 2.7-6 140 1 150 0.5 3 20 30 120 1.6 85 - - 0.5 0.5 - 4000 - 2.25 dual=2055
AD8538 1,2 2.7-6 150 15 25 5 13 30 100 115 1.2 52 h - 1,15 0.43 0.4 5 50 1.80 self-calibrating, duals
MCP6V06 1,2 1.8-6.5 200 1 - - 3 - 50 140 1.7 82 (0.6) 1 1.3 0.5 300 100 1.42 low-cost, dual = 6V07
LTC1049 1 5-16 200 15 50 2 10 20 - 110 3 100 (2) 10 0.8 0.8 - 6000 - 2.85 miniDIP pkg avail
OPA335 1,2 1.8-7 285 70 200 1 5 20 50 110 1.4 55 20 10 2 1.6 6 50 - 2.56 auto-cal, dual=2335
MAX4238 1 2.7-6 600 1 - 0.1 2 10 - 120 1.2 30 - ? 1 0.35 1000 3300 - 1.62 '4239=decomp, G=5
OPA734 1,2 2.7-13 600 100 200 1 5 10 50 115 2.5 135 40 17 2 1 - 8 - 2.56 auto-cal, dual=2734
AD8551 1,2,4 2.7-6 700 10 50 1 5 5 40 120 1 42 (2) 3.5 1.5 0.4 50 50 2.34 auto-zero

335
AD8572 1,2,4 2.7-6 700 10 50 1 5 5 40 120 1.3 51 (2) 2.3 1.5 0.4 - 50 3.34 auto-zero
LTC2050HV 1 2.7-11 750 25 75 0.5 3 - 30 115 1.5 - ? 3 2 - 2000 - 3.20 OK for ±5V supplies
AD8628 1,2,4 2.7-6 850 30 100 1 5 2 20 120 0.5 22 (5) 15 2.5 1 - 50 1.92 self-cal, dual, quads
LMP2011 1,2,4 2.5-5.8 930 3 - 0.12 25 15 - 95 0.85 35h - 25 3 4 - 50 - 2.55 copper leadframe
TLC4501A 1,2 4-6 1000 1 60 10 40 1000 - 90 1.5 12 0.6 none 4.7 2.5 2 0 - 2.88 self-zero at powerup
AD8638 1,2 5-16 1000 1.5 40 3 9 10,40 60 118 1.2 60 - 8 1.35 2.5 3 50 - 2.29 self-calibrating, duals
LTC1050 1 4.75-16 1000 10 30 0.5 5 10 50 114 1.6 (1.8) 2.5 2.5 4 - 3000 - 2.85 favorite
LMP2021 1,2 2.5-5.8 1100 25 100 0.4 5 4g 20 105 0.2 11 350 30 5 2.5 - 50 - 3.38 EMI-rej, '2022=dual
MAX4236Ab 1 2.4-6 350 1 500 5 20 600 2000 84 0.2 14 0.6 none 1.7 0.3 1 0 - 1.78 comp low Vos CMOS
AD8616 b 1,2,4 2.7-6 1.7 0.2 1 23 60f 1500 4000 80 2.4 7 2 none 24 12 0.5 0 1.52 comp CMOS
LT1028 b 1 8-44 7400 25nA 95nA 10 40 200 800 108 0.04 0.9 4700 none 75 15 - 0 - - - - 6.31 comp low-noise BJT
high-voltage
LTC1150 1 4.8-32 800 10 60 0.5 10 10 50 110 1.8 - 0.5 1.8 1.5 - 20ms - n n 5.84 OK for ±15V supplies
LT1012Ab 1 2.4-40 380 25 100 8 25 200 600 114 0.5 14 20 none 0.8 0.2 - 0 - - - - 5.11 comp low IB bipolar
LT1007Ab 1 7-44 3000 10nA 35nA 10 25 200 1000 117 0.06 2.5 1500 none 8 1.7 - 0 - - - - 5.83 comp low en bipolar
Notes: (a) check datasheets for plots of Ibias vs common-mode input voltage. (b) conventional (not auto-zero) precision op-amps, for comparison. (c) crossover region.
(d) 0.01Hz to 10Hz. (f) at VCM=0.5V and 3.0V (with Vs=5.5V), but as much as 400μV near VCM=2V. (g) 1nV/ºC at Vs=2.5V. (h) 150nV/√Hz hump above 2kHz. (n) near to rails w/o load.
(t) typical. (u) current noise values indicated with light italics should not be relied upon; measured values appear to be greater by factors of 100 or more, see discussion in Chapter 8.
336 5.11. Auto-zeroing (chopper-stabilized) amplifiers Art of Electronics Third Edition

the way, that these plots specify an input signal of zero

source impedance.
It’s always instructive to make some actual measure-

LTC1150 150

Voltage Noise Density, en (nV/√Hz)

(400μs/div) AD8551 Rs=0Ω
125 (fixed fosc)

100
AD8571
75 (spread fosc)

MCP6V06
(100μs/div) 50

25
LMP2021
(100μs/div)
0
0 5 10 15 20 25
Figure 5.50. Output waveforms from three auto-zero op-amps, Frequency (kHz)
configured for G = 100, with the input connected to ground through
Figure 5.51. Spectra of noise voltage, adapted from their
a 1 MΩ resistor. Vertical: 100 mV/div.
datasheets, for a pair of auto-zero op-amps. The AD8571 varies its
oscillator frequency in order to suppress sharp spectral features.
for a voltage gain of 100.49 There is considerable variation
among these parts, with the conventional auto-zero config-
uration (Figure 5.48, used in the LTC1150 and MCP6V06) 10000
exhibiting greater clock feedthrough compared with that of
Current Noise Density, i n (fA/√Hz)

alternative designs (as in the AD8628A and LMP2021) that

are intended to reduce these undesirable effects.50
The datasheets do reveal this unseemly behavior, indi-
rectly, in plots of voltage noise versus frequency.51 Fig- 1000
ure 5.51 shows a pair of such plots for two auto-zero
products from Analog Devices: the AD8551 has a ∼4 kHz
fixed-frequency oscillator, whereas their AD8571 has a de-
liberately variable (spread-spectrum) oscillator to elimi-
100
nate sharp spectral lines (which can create undesirable in-
termodulation with nearby signal frequencies). Note, by
30
Voltage Noise Density, en (nV/√Hz)

49 The waveforms in the latter show 8 nApp current spikes for the 1000
LTC1150, 1 nApp noise for the MCP6V06 (despite its impressive spec:
√
0.6 fA/ Hz at 10 Hz), and 0.2 nApp “rumble” for the LMP2021 (which
√
sports a 0.35 pA/ Hz current-noise spec).
50 From the AD8628A datasheet: “The AD8628/AD8629/AD8630 fam-
ily uses both auto-zeroing and chopping in a patented ping-pong ar- 100
rangement to obtain lower low frequency noise together with lower
energy at the chopping and auto-zeroing frequencies, maximizing the
signal-to-noise ratio for the majority of applications without the need
for additional filtering. The relatively high clock frequency of 15 kHz
simplifies filter requirements for a wide, useful noise-free bandwidth.” 10
51 100 1k 10k 50k
Watch out, though, for claimed values of noise current – the low val- Frequency (Hz)
ues listed in many datasheets are completely incorrect, sometimes by
factors of ×10 to ×100, evidently having been calculated a priori as Figure 5.52. Measured voltage-noise density (bottom) and
the shot noise corresponding to the dc input current; see the discussion current-noise density (top) for an MCP6V06 auto-zero amplifier.
in §5.10.8 and in §8.9.1F. Switch-induced clock noise at 9 kHz (and harmonics) is prominent.
Art of Electronics Third Edition 5.11.1. Auto-zero op-amp properties 337

TLC2272
(conventional)

LTC1150
(auto-zero)

H: 10 sec/div, V: 0.5μV/div; 0.33Hz BW H: 0.1 sec/div, V: 1μV/div; 33Hz BW

Figure 5.53. At very low frequencies a chopper-stabilized op-amp has lower noise than a conventional op-amp, but with 100× greater
bandwidth it has more noise, as seen in these measured traces. See also Figure 5.54

ments yourself, if for no other reason than for “fact check- Another way to put it is that auto-zero √ amplifiers have
ing” the manufacturer. We ran some spectral noise plots lots of wideband voltage noise √ (∼50 nV/ Hz at 1 kHz,
for a half-dozen auto-zero amplifiers, with a particular in- compared with just a few nV/ Hz for a good low-noise
terest in chopper-induced narrowband noise at the clock op-amp), but their noise density holds constant at very low
frequency and its harmonics. For these measurements we frequencies, as contrasted with the ∼1/ f (“flicker-noise”)
took data with Rs = 0 (to reveal the input voltage noise divergence of conventional op-amps (and everything else;
en ), and then with Rs =1M Ω (to reveal input current noise see Chapter 8). For example, a conventional √low-noise
in ). Figure 5.52 shows the results, for one specimen from BJT op-amp like the LT1007 has en = 2.5 nV/ Hz (typ)
our collection of auto-zero amplifiers. The low-frequency at 1 kHz, but its noise power density rises as 1/ f√be-
measured√ en agrees well with the datasheet’s value of low its “corner frequency” of 2 Hz, thus en ∼100 nV/ Hz
82 nV/ Hz, but, as noted above, the measured current- at 0.001 Hz. Compare that with an √ auto-zero like the
noise density
√ in is far greater than the specified value of AD8551, with roughly flat en = 42 nV/ Hz: the latter will
0.6 fA/ Hz – a factor of ×400 in this case. have far smaller fluctuations on time scales of minutes. In
For low-frequency applications you can (and should) fact, the AD8551’s datasheet even specifies a peak-to-peak
RC-filter the output to a bandwidth of a few hundred hertz, noise voltage from “0 Hz to 1 Hz” of 0.32 μ V (typ); no con-
which will suppress output spikes. This spiky input-current ventional op-amp would dare to project its drift out to infi-
noise is also of no importance in applications with low in- nite time!
put impedances, in integrating applications (e.g., integrat- A final problem with auto-zero amplifiers is their unfor-
ing ADCs; see §13.8.3), or in applications in which the out- tunate overload recovery. What happens is this: the auto-
put is intrinsically slow (e.g., a thermocouple circuit with a zeroing circuit, in attempting to bring the input difference
meter at the output). In fact, if you want only very slow out- voltage to zero, implicitly assumes there is overall feed-
put response, and therefore lowpass-filter the output to ex- back operating. If the amplifier’s output saturates (or if
tremely low frequencies (below 1 Hz), a chopper amplifier there is no external circuit to provide feedback), there will
will actually have less noise than a conventional low-noise be a large differential input voltage, which the nulling am-
op-amp; see Figures 5.53 and 5.54. plifier sees as an input offset error; it therefore blindly
338 5.11. Auto-zeroing (chopper-stabilized) amplifiers Art of Electronics Third Edition

10μV z
/√H z
nV /√H
Integrated Noise 80
2 0 nV
z
/√H
) nV
LMC6482 (MOS 14 √Hz 10μV

Integrated Noise Voltage, vn (peak-to-peak)

V/
Integrated Noise Voltage, vn (rms)

1μV (M OS ) 8n
LMC60 01 Hz
nV/√
(MOS) 5
TLC2272 2.
Hz
T) T) V/√
LT1057 (JFE ( BJ . 8 5n 1μV
0
100nV 07
OPA277 (BJT )
T10 /√H
z
L nV
1012 (BJT )
LT 3
T) 0 .
( BJ
28
10
V0
6 LT 100nV
10nV uncertain C P6
M 51
85
AD 28 rete JFET )
86 IF3602 (disc
AD 1
02 10nV
M P2 0.1˚C tempco limit
1nV L

34420A (DMM) 1/f corner

100sec 10sec 1sec

1nV
0.1nV
0.001 0.01 0.1 1 10 100 1k 10k 100k
Frequency (Hz)
Figure 5.54. Integrated RMS voltage noise versus amplifier bandwidth. The “zero-drift” aspect of auto-zero amplifiers causes their low-
frequency integrated noise voltage vn to fall at low frequencies, proportional to the square root of the lowpass bandwidth. In contrast,
√
the rising noise density en ∝ 1/ f of conventional op-amps causes a plateau in the integrated noise voltage vn below the 1/ f corner
frequency, as seen in these computed curves. (We chose a lower limit of 0.01 Hz, when integrating the latter because the unbounded
integral is divergent. This plot lets you see the region where the auto-zero op-amp wins or loses, compared with the op-amp of your
choice. You can draw in estimated plots for other parts if you know en and the 1/ f corner frequency. See §8.13.4.) See Figure 5.37 for
the spectral noise-density plots behind these curves, and see Figure 8.63 for graphs of three dozen more op-amp types.

generates a large correction voltage that charges up the • Accurate in-circuit dc conditioning, for example creating
correction capacitors to a large voltage before the nulling precise sets of voltages from a voltage reference
amplifier itself finally saturates. Recovery is slow – tr can • “Normal-bandwidth” applications that want low-voltage
extend up to several milliseconds. One “cure” is to sense and low-IB CMOS, can tolerate broadband noise, require
when the output is approaching saturation, and clamp the low offset voltages (1 mV), and don’t want to pay the
input to prevent it. You can prevent saturation in chopper cost premium of precision CMOS op-amps.
amplifiers (and in ordinary op-amps, as well) by bridging
the feedback network with a bidirectional zener (two zen-
ers in series), which clamps the output at the zener voltage, 5.11.3 Selecting an auto-zero op-amp
rather than letting it limit at the supply rail; this works best
in the inverting configuration. Table 5.6 on page 335 lists a nice selection of currently
Alternatively, you can do an end run around this prob- available auto-zero op-amps, plus a few conventional op-
lem by choosing a part with fast recovery time, for example amps for comparison. This is a good place to go first when
the OPA378 or OPA734 (with tr = 4 μ s and 8 μ s, respec- you need an auto-zero amplifier. It’s also a good place to
tively). learn about some of the common properties, and some of
the quirks, of these amplifiers. Here are some comments,
to get you started.
5.11.2 When to use auto-zero op-amps
Supply voltage All but one of the parts are low voltage,
• Slow but accurate measurements from transducers: 5.5–6 V max, and many will operate down to 2 V or
weigh scales, thermocouples, current shunts less. Five can operate from ±5 V supplies. The supply
Art of Electronics Third Edition 5.11.3. Selecting an auto-zero op-amp 339

currents range from 15 μ A to 1.1 mA. The parts are heating of the die than say the 60 μ A MAX9617 with its
listed approximately by supply current. 5 nV/◦ C spec. No manufacturer can afford to perform
Input current Auto-zero amplifiers are built with CMOS, temperature tests on production parts, so these specs
so the input currents are typically in the picoamps. should be taken with a grain of salt.
We might expect the input currents to be in the sin- Is this performance believable? At the level of nV/◦ C
gle picoamp territory like other CMOS op-amps. Al- you have to worry seriously about thermocouple ef-
though there are a few parts for which this is true (e.g., fects in external connections, and even within the chip’s
MAX4238, MCP6V06 and LTC2054), most have con- lead frame itself: typical thermal EMFs are of order 5–
siderably higher currents, up to 0.5 nA max, no doubt 40 μ V/◦ C – that’s 1000× (or more) the specified tem-
because of input-switch charge coupling. Even most pco of these auto-zero op-amps!
conventional JFET op-amps do better except at high Voltage noise Auto-zero amplifiers exhibit higher broad-
temperatures, where auto-zeros are usually much bet- band noise than conventional op-amps, owing to their
ter. For example, IB of the auto-zero LMP2021 typi- CMOS inputs and associated switching elements. The
cally stays below 75 pA at 125◦ C (for any common- voltage noise density en√ at 1 kHz (the usual benchmark)
mode voltage), compared with the (conventional) JFET is of order 50–100 nV/ Hz, bested by many conven-
OPA124 (0.5 nA) and LF412 (10 nA). Auto-zero input tional CMOS parts, and all BJT parts. But, unlike con-
currents are not as low as the best conventional CMOS ventional op-amps, the noise density does not rise at low
parts (with their femtoamp currents), but considerably frequencies, so the low-frequency integrated noise volt-
better than conventional precision BJT-input parts like age (which you can think of as fluctuations, or drift) is
the LT1028 or LT1007 on the table.52 better than even the best low-noise op-amps (as seen
Offset voltage This is where auto-zero amplifiers really in Figures 5.53 and 5.54). Speaking approximately,
√ the
shine, with maximum offset voltages ranging from 0.1– integrated-noise voltage falls as the 1/ t (or propor-
5 μ V typical (and 2 μ V–25 μ V maximum – in the pre- tional to the square root of lowpass frequency).
cision design business you’ve often got to pay seri- In addition to en , a useful parameter in the table is the
ous attention to “maximum” specifications). A few con- 0.1–10 Hz peak-peak voltage noise (vn ) specification.
ventional (not auto-zero) parts can approach this figure The AD8628, MAX9617, and OPA37853 do very well
(20 μ V for the CMOS MAX4236A, 25 μ V for the BJT with 0.5 μ V to 0.4 μ Vpp noise specs, but√ the LMP2021
LT1012A and LT1007), but they cannot begin to match is the clear winner with an en of 11 nV/ Hz and a vn of
the excellent tempco of the auto-zero parts (generally in 0.26 μ Vpp. This part is available in a convenient SOT23
the range of 5–20 nV/◦ C), gained, of course, by contin- package.
ual offset correction. Conventional op-amps also suffer A note of caution, here: the very low-frequency ex-
from the devastating effects of 1/ f noise, which sets trapolation (i.e., long-term drift) must eventually be-
performance floors in the 10–100 nV region; see Fig- come dominated by other drift sources (e.g., diffusion
ure 5.54 and associated discussion. of impurities); see Bob Pease’s column, “What’s All
The auto-zero amplifiers have typical offset-voltage This Long-Term Stability Stuff, Anyhow?” (published
tempco drifts from 4–100 nV/◦ C. The maximum specs in Electronic Design, 20 July 2010).
range up to 250 nV/◦ C (and beyond? many parts don’t Noise current The noise current density in √must be at
list a maximum spec). The AD8628 and LMP2021 are √ by in = 2qIB , with
least the shot noise value (given
the winners in this category. But these parts consume q = 1.6 × 10−19 C; thus 1.8 fA/ Hz for a bias current of
about 1 mA and thus can be expected to have more self- IB =10 pA) corresponding to the √ input current IB , gener-
52
ally in the range of a few fA/ Hz. In fact, for most of
Some parts warn that for high source impedances the bias current may
these parts it is much larger – by as much as factors of
change dramatically as a function of input capacitance! For example,
the input current of an LMP2021 with Rs = 1 GΩ varies from −25 to
10–100.
+25 pA for an input shunt capacitance Cs ranging from 2 to 500 pF. The current noise is 125× higher than shot noise for
Note that such input currents create large offsets with such high source
resistances: 25 pA into 1 GΩ is 25 mV. A graph in the datasheet shows 53 A favorite of Phil Hobbs, who gushes “The OPA378 is a really beau-
that the input current IB goes through zero for Cs =22 pF. Other man- tiful zero-drift chopper-CAZ mutation that doesn’t exhibit switching
ufacturer’s parts show similar effects. In a transimpedance amplifier noise, and has constant 35 nV [per root hertz] noise down to DC. I’ve
with high RF , using a large feedback capacitor CF can dramatically used it in an etalon-locked diode laser for downhole applications, and
reduce the bias-current error. it’s a thing of great charm.”
340 5.11. Auto-zeroing (chopper-stabilized) amplifiers Art of Electronics Third Edition

the LMP2021, which was the winner of the voltage- CMRR spec, and “Vcm = Vs /2” next to its 1 μ V offset-
noise competition. Parts that claim to do well in this re- voltage spec.
gard (i.e., with input noise current approximately equal Packages A few of the (older) Linear Technology types
to the calculated shot noise54 ) include the AD8572, are available in DIP-8 packages for easy breadboarding.
AD8551, and LTC1050. The MCP6V06 is the √win- Otherwise you can use a SOIC-to-DIP or SOT23-to-DIP
ner of the current-noise competition, with 0.6 fA/ Hz. adapter (check out offerings from Aries or Bellin Dy-
This spec predicts 2 μ V from current noise through a namic Systems).
1 GΩ resistor in a 10 Hz bandwidth, about equal to the
part’s 1.7 μ V voltage noise vn . The TLC4501A does
equally well because it does its auto-zero only once, 5.11.4 Auto-zero miscellany
at powerup. But we know that the TLC4501A, unlike A. ac-coupled “chopper amp”
the MCP6V06, will do well at higher frequencies and When considering auto-zeroing chopper amplifiers, be sure
with wider bandwidths because it has no busy auto-zero you don’t confuse this technique with another “chopper”
oscillator and switches. But it will do poorly at long technique, namely the traditional low-bandwidth chopper
time scales because of 1/ f noise and multiple sources amplifier in which a small dc signal is converted to ac
of drift. (“chopped”) at a known frequency, amplified in ac-coupled
A caution, loyal reader, as you make your choices – amplifiers, then finally demodulated by multiplying with
seven otherwise-attractive parts in the table, like the the same waveform used to chop the signal initially (Fig-
AD8538 and LMP2011, don’t have any current-noise ure 5.55). This scheme is quite different from the full-
specs or plots. You may need to go to the bench to get bandwidth auto-zeroing technique we’ve been considering,
your answer. in that it rolls off at signal frequencies approaching the
Slew rate and settling time For the listed parts the slew clock frequency, typically just a few hundred hertz. You
rates range from 0.04 to 2.5 V/μ s, and the gain– sometimes see it used in chart recorders and other low-
bandwidths range from 0.13 to 4.7 MHz. The faster frequency instrumentation.
parts are meant to compete for use in ordinary op-amp
sockets. For these parts, the settling time ts is dominated signal
input ac amplifier
by slew rate. But there are anomalies, for example the (dc-coupled) G = 60 dB 1μF
MCP6V0655 and MAX4238, whose settling times are 1μF 1μF signal
+G 100k output
one or two orders of magnitude longer than the compe- – dc-1 Hz
tition. This may be related to recovery time – the parts
+
with recovery times in the milliseconds have very long 100k
settling times (the MAX4238), or they aren’t willing to
say (five other parts).
Input voltage range Most auto-zero op-amps do not sup- osc 100Ω
port input voltages to the positive rail (though they 500 Hz
G = 60 dB
all are rail-to-rail output). The MCP6V06, OPA333,
ISL28133, MAX9617, and most of the Analog Devices Figure 5.55. An ac-coupled chopper amplifier.
parts are notable for full rail-to-rail input operation,
without VOS or CMRR degradation. The MAX9617
achieves this using an internal above-the-rail charge- B. Thermal offsets
pump power supply. Note also that the VOS specifica- When you build dc amplifiers with submicrovolt offset
tions may be conditioned on a restricted range of in- voltages, you should be aware of thermal offsets, which are
put voltage – most of the way to V+ for some, oth- little thermally driven batteries produced by the junction of
ers only partway. Be sure to read the fine print in the dissimilar metals. You get a Seebeck-effect “thermal EMF”
specification! For example, the OPA335 datasheet says when you have a pair of such junctions at different temper-
“(V− ) − 0.1V < Vcm < (V+ ) − 1.5V” next to its 130 dB atures. In practice you usually have joints between wires
with different plating; a thermal gradient, or even a little
54 At 10 Hz, who knows about higher frequencies?! draft, can easily produce thermal voltages of a few micro-
55 The curious part number reminds us old timers of a favorite vacuum volts. Even similar wires from different manufacturers can
tube of yesteryear. produce thermal EMFs of 0.2 μ V/◦ C, 10 to a 100 times the
Art of Electronics Third Edition 5.11.4. Auto-zero miscellany 341

typical drift spec of the auto-zero amplifiers in Table 5.6 LM675

on page 335! The best approach is to strive for symmet- VS to ±30 V
Iout to ±3A
rical wiring and component layouts, and then avoid drafts VOS = 10 mV max
R1 R2 e.g.
and gradients.
V in THS4011
Here, for approximate guidance when worrying about f T = 200 MHz
parasitic thermocouples, Peltier shifts, and the like, are U1 SR = 300 V/μs
–
VOS = 6mV max
some thermoelectric-pair voltages (from Agilent AN-
+
1389-1): R2
Vout = – V
R3 R1 in
Copper-to- Approx μ V/◦ C Ri R4 100k
100k 1k
Copper <0.3 Cn
100 nF
Cd–Sn solder 0.2 1μF C i Rn
10k
Sn–Pb solder 5
+2.5
Gold 0.5 –
Silver 0.5 + U2
Brass 3 (auto-zero)
–2.5
Be–Cu 5
Figure 5.56. External auto-zeroing. But watch out for U1 ’s high
Aluminum 5
bias current.
Kovar 42
Silicon 500
Copper oxide 1000 E. External auto-zero
You can use an auto-zero op-amp as an external offset
trim for a conventional op-amp. This can be handy when
C. Power-up self-calibrating op-amps you need a high-voltage, high-power, or high-speed op-
Texas Instruments has an interesting approach to circum- amp whose input offset is too large. Figure 5.56 shows
venting clocking noise in auto-zero amplifiers, namely to the scheme, which works most naturally with the inverting
do it only once! Their TLC4501 family of “Self-calibrating configuration, as shown.
(Self-Cal™) precision CMOS rail-to-rail output opera- The (low-voltage) auto-zero op-amp U2 is configured as
tional amplifiers” comes to life at power-up, performing an integrator, looking at the error voltage at the inverting
an auto-zero and holding the correcting offset in an on-chip input of the conventional op-amp (U1 ). The integrator’s
DAC. The good news is that you get no chopping noise and output is attenuated by ×100 to trim the voltage at the
pretty good offset specs (10 μ V typ, 40 μ V max), at least noninverting accordingly. With the values shown, the inte-
compared with those of typical CMOS op-amps. The less grator’s output responds according to dV /dt = −ΔV /RiCi ;
good news, as you might expect, is that the drift of offset thus a 10 μ V error produces a −100 μ V/s integrator output
with temperature is unspectacular (you might say “worst and a −1 μ V/s correction at the noninverting terminal of
in class”), at ±1000 nV/◦ C typ, compared with ∼20 nV/◦ C U1 . A long time constant is both desirable (op-amp offsets
for true auto-zero op-amps (see Table 5.6 on page 335). drift only very slowly), and necessary (to prevent loop os-
cillation). Here the correction range is set by divider R3 R4 ,
so that a ±1 V integrator output produces a ±10 mV cor-
D. The non-chopper competition rection. The LM675 is a nice high-power op-amp (3 A out-
You can’t beat the ∼1 μ V (typ) offset specs of these auto- put current, supply voltage to ±30 V, with sophisticated on-
zero and chopper amplifiers, but you can do pretty well chip safe-operating-area and thermal protection), but with a
with the very best factory-trimmed precision op-amps. maximum offset voltage of ±10 mV. The auto-zero reduces
Bipolar op-amps like the LT1007 or LT1012 do quite well, that by a factor of 1000. Similarly, the THS4011 is a fast
at 10 μ V (typ), and the remarkable CMOS MAX4236A op-amp ( fT = 200 MHz, SR = 300 V/μ s) with a maximum
has an offset spec of 5 μ V typ (and 20 μ V max). Note, offset voltage of ±6 mV. An additional noise filter RnCn
however, that these factory-trimmed op-amps cannot come at the output of the auto-zero, as shown, may be needed
close to the drift specs of a true auto-zero: ±200 nV/◦ C to suppress switching noise in the (slow) correction loop
(typ) for the bipolar types, and ±600 nV/◦ C for the CMOS, when this technique is used with small √ signals and low-
compared with ∼20 nV/◦ C for true auto-zero. noise parts like the THS4011 (7.5 nV/ Hz). You can think
342 5.12. Designs by the masters: Agilent’s accurate DMMs Art of Electronics Third Edition

of this technique as a discrete implementation of the inte- fully provided in their service manuals.56 Let’s see how the
grated scheme of Figure 5.41. real pros do it!

5.12.1 It’s impossible!

F. Auto-zero instrumentation amplifiers
At first glance, the task is impossible. Here’s why.
In §5.13 we discuss instrumentation amplifiers, which
are differential-input amplifiers with very high input Accuracy We need accuracy and linearity at the parts-
impedance (10 MΩ–10 GΩ), wide gain range (GV =1– per-million level, in a meter whose full-scale ranges go
1000, set by internal or external gain-setting resistors), and down to a fraction of a volt (100 mV for the 34401A,
very high CMRR at higher gains (110–140 dB at GV = 1 mV for the 34420A). That’s far down in the nanovolt
100). These are largely built with conventional (not auto- range.
zero) circuitry; but some are of the CMOS auto-zeroing Low noise Accuracy is useless if the instrumental noise
flavor, with very low offset voltage and drift (to 10 μ V and makes successive measurements bounce around by
20 nV/◦ C max). Table 5.8 (page 363) lists a good selec- many LSBs. So we need input voltage noise levels down
tion of instrumentation amplifiers, which include auto-zero at the nanovolt level for the most sensitive ranges.
types such as the AD8553, AD8230, AD8293, INA333, High input impedance A voltmeter should have high in-
LTC2053, and MAX4209. Some conventional instrumen- put impedance to minimize circuit loading. So, for mea-
tation amplifiers that compete in this low-drift arena are surements at the ppm level, you’d like Rin to be some-
the LTC1167/8 (40 μ V, 50 nV/◦ C max) and the AD8221 thing like a million times as large as typical circuit
(25 μ V, 300 nV/◦ C max). impedances. That puts you in the gigaohm range, with
input currents down in the picoamps.
Hence the quandary: gigaohms and picoamps means
G. Do it yourself FETs. Conventional FET op-amps won’t deliver this per-
If you like to get down into the guts of circuits, take a formance, though, owing to relatively large offset voltage,
look at the LTC1043 “Precision Instrumentation Switched drift, and voltage noise. AZ op-amps (see Table 5.6 on
Capacitor Building Block.” It lets you make your own page 335) are considerably more accurate, but they suf-
high-CMRR differential amplifier. That’s just one of its fer from plentiful current noise. And discrete JFETs (those
many tricks, which include switched-capacitor filters, with large
√ area can have very low voltage noise, less than
oscillators, modulators, lock-in amplifiers, sample-and- 1 nV/ Hz) with their uncertain ID versus VGS characteris-
hold, frequency-to-voltage conversion, and “flying capac- tics (§3.1.5) would seem to be hopeless at the fractional
itor” voltage inversion, multiplication, and division. The microvolt level. End of discussion.
datasheet makes great bedtime reading.
5.12.2 Wrong – it is possible!
But it can be done. The trick is to realize that a digital in-
5.12 Designs by the masters: Agilent’s accurate strument (with its on-board microprocessor brain) can cal-
DMMs ibrate away offsets (with a “zero” measurement) and scale
errors (with a “full-scale” measurement), so that what mat-
This is another in the series of featured “Designs by the ters is not the presence of offsets per se, but their stability
Masters,” in which we take a close look at some exem- (drift) during the measurement time.57 That allows the use
plary circuit designs. Think of these as master classes in
circuit design. You can learn a lot by cracking open a 56 In the good ol’ days, manufacturers proudly published their circuits.
well-designed instrument. A fine example is provided by
Nowadays it’s far less common – for example, circuit diagrams are ab-
the excellent digital multimeters from Agilent, specifically sent from the service manual for the Agilent 34410A (successor to the
their 34401A (6.5-digit) and 34420A (7.5-digit) benchtop 34401A). Happily, some manufacturers (e.g., Stanford Research Sys-
meters. In Chapter 13 (§13.8.6) we discuss the precision tems) continue to display their circuit ingenuity, with full schematics
“multislope ADC” technique they use. Here, in the context and parts lists.
of precision analog design, we look in some detail at the 57 A further trick is to average many such calibrate-measure cycles (up to
clever front ends they’ve designed, from schematics help- 2 minutes’ worth, in the 34420A) to beat down the scatter.
Art of Electronics Third Edition 5.12.4. The 34401A 6.5-digit front end 343

of discrete dual JFETs, with their unbeatable combination uators for the 100 V and 1000 V ranges58 ) provides gains
of low en and low IB , in a JFET-enhanced op-amp config- of ×100 (100 mV range), ×10 (1 V range), and ×1 (10 V
uration. That way you can get the high loop gain you need range) with Rin > 10 GΩ; the input attenuator kicks in for
for linearity, particularly in the sensitive ranges where the the 100 V and 1000 V ranges, for which Rin = 10 MΩ.
front-end gain is 1000 or 10,000. The basic structure is a low-noise precision op-amp (an
That’s not the end of the story. You need precise resistor OP-27), driven by a JFET source-follower pair, as shown
networks with low voltage coefficient, a circuit configura- in Figure 5.58A. (The configuration in Figure 5.58B, where
tion that maintains its accuracy over a large common-mode a JFET common-source differential amplifier replaces the
input range (to ±10 V), and of course a voltage reference follower, is used in the 34420A to provide the additional
whose stability determines the instrument’s overall accu- loop gain and lower voltage noise needed for its more sen-
racy. sitive 1 mV and 10 mV full-scale ranges). The BJT-input
◦
√ lots (120 dB) of stable (0.2 μ V/ C) low-
op-amp provides
noise (3 nV/ Hz) gain, but at a price: an unacceptable
5.12.3 Block diagram: a simple plan input current of ±15 nA,√with correspondingly high in-
These instruments leverage the power of “embedded con- put current noise (1.7 pA/ Hz). The JFET follower cures
trol” (an on-board microcontroller) to deliver great perfor- problems of input current and noise, at the expense of
mance from an architecture of great simplicity. The basic offset stability√(40 μ V/◦ C!) and significant added voltage
scheme (Figure 5.57) is simplicity itself: it consists of a noise (10 nV/ Hz). The tradeoff sounds bad – but it’s
single amplifier, configured in the familiar noninverting op- good enough for this instrument. (It’s not good enough
amp connection, with floating ground referenced to the (−) for the more accurate and sensitive 34420A, as we’ll see
input jack. The microcontroller is the boss, here: its code presently.)
implements the high-accuracy ADC (§13.8.6), and takes
care of the multiple on-the-fly calibrations that are needed
to wring part-per-million (or better) performance out of a + – –
collection of inexpensive parts. Let’s dive into the guts of +
these two DMMs to see how it all works. –
+ –
+

1mV to 10V Vref

ranges A. B.
+
FS Figure 5.58. Basic JFET-enhanced op-amp configurations for the
– CAL
AMP
Agilent DMMs: A. source follower, used in the 34401A; B. common-
MEAS
+ source differential amplifier, used in the 34420A.
ADC μC
ZERO –
CAL
The full circuit is shown in Figure 5.59. Note first the
bootstrapped drain supply for the JFET pair: Q2 maintains
a constant drain-source voltage across Q1 (equal to Q2 ’s
VGS at the operating current, the latter held constant by the
complicated-looking current sinks on Q1 ’s source termi-
Figure 5.57. The Agilent DMMs: extreme simplicity. . . at the block nals). This is essential, because the JFET pair Q1 is any-
diagram level. thing but precise (would you believe, VOS (max)=40 mV?!),
and so the variation of this mediocre offset voltage with
varying input signal (thus varying VDS ) would surely tor-
pedo any expectation of accuracy. But by bootstrapping
5.12.4 The 34401A 6.5-digit front end the drains to follow the sources, the transistors don’t even
The 34401A made its debut in 1991, surprising the T&M know that there’s any input signal variation; they don’t
(test and measurement) world with astonishingly good per- know, so they can’t mess things up. Furthermore, the low
formance (resolution to 6.5 digits, measurements to 1000/s, operating voltage (1–2 V) keeps the gate leakage small
accuracy to 20 ppm) at an affordable price (∼$1k). The in-
put amplifier (preceded by protection circuitry, and atten- 58 All have 20% “overrange,” e.g., ±12 V on the “10 V” range.
344 5.12. Designs by the masters: Agilent’s accurate DMMs Art of Electronics Third Edition

and unchanging with input voltage variations over the full from Figure 5.59, you’ll find that the compliance extends
±15 V input signal range. Clever!59 down to −14 V (emitter is at −14.6 V), and that the indi-
vidual source pull-down currents are 680 μ A. The design-
+18
Q2
ers used Darlington transistors to keep the base current er-
A2
’4392 – ror small (roughly Ic /4500, assuming a transistor beta of
OUT 200).
+

+IN Q1
–IN
(dual) VREF R2
U406 I= •
R1 R3
+ OP27 GAIN
1
– +VREF
’6429 (4)
A1 180k +
10 R1
Q3 Q4 –
18k R4

21.5k 100
(2) R2 R3
2k –
– – +
2k
+ (2) + –VEE
A3 A4

680μA × 2 Figure 5.60. Agilent 34401A reference-based current sink.

21.5k 2k 1.36mA

+10
14.7k –16
A5
5.12.5 The 34420A 7.5-digit frontend

Figure 5.59. Agilent 34401A frontend amplifier, capable of mea- With the 6.5-digit 34401A as a warmup, let’s look at
surements with 0.1 μ V resolution. The input is single-ended, ampli- its wiser sibling, the 34420A 7.5-digit DMM. It boasts
fied and measured with respect to the instrument’s input common both improved resolution and greater sensitivity (1 mV
terminal. fullscale), putting real demands on the accuracy, stability,
and noise of the front end. On its most sensitive range the
The circuit’s voltage gain is set accurately by the ana- frontend amplifier has a gain of 10,000 (to bring the ±1 mV
log switch and matched resistor network, implemented in input to the ±10 V ADC span), requiring lots of open-loop
a custom gain-switching IC. gain to maintain accuracy and linearity. With sensitivity
The source pull-down circuitry is a current sink pair, and resolution comes a demand for low noise; for exam-
based on the stable +10 V reference that is used also for ple, the specifications list a “DC Voltage Noise” (with 2-
the downstream ADC (see §13.8.6). It’s easier to under- minute averaging) of 1.5 nV(rms) on the 10 mV range –
stand in the redrawn form of Figure 5.60, in which only that’s 0.15 ppm.
one of the current sink pair is shown and the Darlington To meet these demands, the designers used the config-
is replaced with a single npn transistor. The left-hand op- uration of Figure 5.58B, in which the JFET pair is config-
amp generates a voltage across R2 of VREF R2 /R1 ; hence the ured as a common-source differential amplifier for greater
sink current shown in the figure. In its DMM, Agilent uses loop gain and reduced noise. The full amplifier circuit is
a matched network for R2 and the pair of R3 ’s (one for each shown in Figure 5.61.
source pull-down). The extra resistor R4 offsets the emitter Once again the JFETs are operated at constant
voltage downward, to VE = −VREF R4 /R1 , to provide the current (2 mA each), with bootstrapped drains (held
needed compliance for input signals that range over ±15 V VZ −2VBE −1 V above the source, i.e., VDS ≈ 2.5 V). They
(±12 V operating range, plus an additional 3 V to accom- chose JFETs with much larger geometry for greatly√ re-
modate ripple and noise). If you plug in the resistor values duced noise voltage (an impressively low en =0.4 nV/ Hz
59 It’s necessary that Q1 ’s VGS at 0.7 mA be less than Q2 ’s VGS at 1.4 mA, at 10 Hz). These are monster JFETs: IDSS =50 mA min,
because the difference is Q1 ’s VDS operating voltage. It’s likely that 1000 mA max (how’s that for a parameter spread?!), with
Agilent has an incoming batch inspection to ensure that this condition an input capacitance of order 500 pF, and an unenvi-
is met. able offset voltage spec of ±100 mV (with no tempco
Art of Electronics Third Edition 5.12.5. The 34420A 7.5-digit frontend 345

+22 leakage correction

1k 1k frontend amp
13.3k IN
+
OUT
’5087 (3) –
CC
3.3nF 499

GAIN 180k
A1 +
1
– 1–100 10
’4393 (2)
+ –
OUT 4.5k 100 18k
1k
10nF LT1124 (2)

MC34081 450 2k
10k –
’6429 (4)
X + A2 ±5V
10 nF
10 nF 2k 2k 50
5k
2k 20k
1.9mA
4.7V 499 A3 5k
Q1 –
+IN IF3602 (dual) –IN
(0.3 nV/√Hz) + OFFSET
current balance DAC

K1 0.2mA
RS RS Figure 5.62. Agilent 34420A range-switching feedback circuit,
500 500 wrapped around the “amplifier” of Figure 5.61. See §13.3.3 and
2.5V Figure 13.15 for the leakage-correction circuit.
MC1403
LM358 4 mA
+

amplifier’s output when the offset DAC is set to zero and

619Ω the gain to ×100.
–18 The “offset DAC” is used to dispatch the big elephant
Figure 5.61. Agilent 34420A frontend gain block, used for mea- in the room (the JFET pair’s offset, which can range to
surements of 0.1 nV resolution with G=10,000 (gain-switching feed- ∼50 mV). This it does by generating a voltage output
back shown in Figure 5.62). (±5 V range), which offsets the node marked “x” over a
range of ±50 mV. Follower A2 replicates that offset at the
bottom of the right-hand gain-setting divider, establishing
specified). This latter parameter would not appear to bode
an effective ground-reference point for the first-stage di-
well for nanovolt measurements! (As we’ll see presently,
vider. Here’s a subtle point: with a circuit of this preci-
there’s provision for continually trimming the measured
sion (in the 1 mV range, the LSB is just 1 nV) you have
offset.) These things are brutes, but they sure are quiet.
to worry about stuff you normally ignore – for example
We’ll return to this circuit shortly, to deal with issues of
the effect of voltage drops through ground path resistance.
gain, bandwidth, and noise. First, though, a look at the
Here the offset DAC may sink or source up to 1 mA (5 V
overall gain-setting loop.
across 5 kΩ), which would push “ground” around by an
unacceptable 100 nV if its path had, say, 0.1 mΩ of resis-
A. Two-stage gain-setting loop tance. That’s why the designers added A3 , whose output
What’s shown in Figure 5.61 is the bare amplifier, which pushes a balancing current of opposite sign into the same
sits in the feedback and trimming circuit of Figure 5.62. ground node; if that current is matched to 1%, the error is
The gain selection is made with two stages of precision at- reduced to 1 nV.
tenuators of high stability (these are custom modules), iso- This raises a related point: when talking nanovolt sta-
lated by precision op-amp A1 whose offset can be read and bility, don’t we have to worry about A1 ’s drift? Quite so
cancelled as part of the measurement cycle (by comparing – but the effect of splitting the gain-setting attenuator into
the amplifier’s output with the two possible G=1 configu- two sections is to reduce that drift by the attenuation of the
rations). The offset of A2 can also be measured, from the left-hand divider, i.e., ×100 in the most sensitive range.
346 5.12. Designs by the masters: Agilent’s accurate DMMs Art of Electronics Third Edition

B. Care and feeding of the JFETs ential transconductance is reduced to 1/2Rs (1 mS), thus
An important rule to follow when doing low-distortion pre- fT =50 kHz.
cision design using discrete transistors: use a circuit con-
figuration that keeps the transistor’s operating conditions G =10k
(Vds and Id ) unchanged as the input signal changes. Both
of these amplifier designs carefully follow this rule, but in
1k

Voltage Gain (log)

different ways, to achieve their good performance. Both de- K1 closed

signs also operate the JFETs at low drain-source voltages

to reduce gate leakage and to minimize self-heating (see 100

§3.2.8). fT
K1 open
This same rule is followed (in the second design) with 10
respect to the MC34081 JFET op-amp’s input voltages,
which are both pinned to 2VBE +1.9 V below the +22 V rail. 1
Likewise the mirror transistors see no change in voltage for 1 10 100 1k 10 100 1M
a signal-input swing from −15 to +15 V. Only the feedback Frequency (Hz)
capacitor Cc sees a change in voltage.
Finally, despite the low VDG operating voltage for the Q1 Figure 5.63. Differential gain for the amplifier of Figure 5.61.
JFETs, there is still an issue of small gate leakage currents
to worry about. Agilent has added an input-bias-current
correction circuit, with an 8-bit DAC, to solve this problem.
We discuss how this interesting circuit works in §13.3.3. D. Sub-nanovolt amplifier noise
Finally, the important issue of noise. This is a big deal
when you’re talking nanovolts; it’s the reason the de-
C. Amplifier gain: ×1 to ×10,000, stable to 0.1 ppm signers chose huge-geometry JFETs, in spite of their, uh,
Turning back to the amplifier (Figure 5.61), we can under- less-than-ideal characteristics (offset voltage, input capac-
stand some nice subtleties. A closed-loop gain of ×10,000 itance). Noise matters most in the most sensitive range,
is needed in the 1 mV range, for which lots of open-loop where full scale is 1 mV (1.2 mV, to be precise, owing to
gain is needed. The JFET differential amplifier provides the 20% overrange), and the 6.5-digit LSB is 1 nV.
gain ahead of the op-amp; though the gain is not easily cal- There are several noise sources here. The JFETs
culated at dc (it depends on the impedance of the current- contribute about
√ 1 nVrms in a 3 Hz band around 1 Hz
mirror drain load), we can estimate its gain–bandwidth (en =0.4 nV/ Hz each, multiplied by 1.4 for uncorrelated
product fT by noting that compensation capacitor Cc makes noise). To explore further the measurement fluctuations,
the differential gain roll off according to G = gm XC /2, take a look at Figure 5.54, where we show the voltage noise
where gm is the transconductance of each JFET at the op- of various op-amps, of both conventional and chopper-
erating current (relay K1 is closed for the 1 mV and 10 mV stabilized varieties. The traces show the integrated rms
ranges, removing the 500 Ω source degeneration resistors). noise voltage up to a cutoff frequency (x-axis), including
fT is the frequency at which the gain of the composite am- the effect of the component’s 1/ f noise. The IF3602 is the
plifier has fallen to unity, i.e., fT = gm /4π Cc . To estimate lowest-noise part on the graph. If we assume an integration
gm , we note that these JFETs are operating well down in the time of 100 PLC (powerline cycles) or 1.67 s, to achieve
subthreshold region (their IDSS is typically 300 mA), where 7.5-digit performance, that interval corresponds to a 0.6 Hz
FETs behave more like BJTs (ID exponential in VGS ; see cutoff frequency, and about 3 nV rms of noise. If we aver-
Figure 3.15), with their transconductance proportional to age 64 such measurements over a two-minute period, we
drain current and with gm only somewhat less than a BJT could hope for the rms fluctuations to be reduced by 8×, to
operating at the same current. For the IF3602 JFET run- about 0.4 nV. Agilent claims 1.3 nV in their datasheet, ev-
ning at ID =2 mA, then, we can estimate gm ≈60 mS (a BJT idently allowing for some nonrandom variations and other
would have gm =40Ic mS), thus fT =1.5 MHz. errors.
Running this backward, we find that the open-loop gain Noise in the current sink is of lesser importance be-
is about 106 at 1 Hz, as seen in Figure 5.63. Source de- cause the differential stage cancels it to a high degree;
generation is enabled for the low-gain ranges, to maintain that’s a good thing, because this design uses a noisy volt-
stability. The rolloff is easy to calculate, because the differ- age reference! (the MC1403 is an early bandgap design,
Art of Electronics Third Edition 5.12.5. The 34420A 7.5-digit frontend 347

with unspecified noise voltage).60 The 34420A’s digitiz- to be driven by a low impedance; inputs typically can
ing capability drops from 7.5 to 6.5 digits when operating go beyond rails.
faster than 20 PLC, or 1.5 readings/sec, and further drops Instrumentation amplifier differential in, single ended
to 5.5 digits above 25 rd/s, and 4.5 digits above 250 rd/s, so out; very high input impedance (10 MΩ–10 GΩ), wide
rising high-frequency amplifier noise wouldn’t be noticed. gain range (GV =1–1000), and very high CMRR at
higher gains (110–140 dB at GV =100); §5.15, e.g., Fig-
E. Going beyond the specifications ure 5.77.
When pushing the limits of the possible, you often find that Differential amplifier differential or single ended in, dif-
the job cannot be done while respecting worst-case com- ferential out; most are low voltage, fast settling, and
ponent specifications. Here, for example, the critical JFET wideband; ideal for twisted-pair cable drivers and fast
transistor pair has a worst-case specified gate leakage cur- differential-input ADCs; §5.17, e.g., Figure 5.95.
rent of 500 pA (at 25◦ C), whereas the instrument specifies An obvious application is the recovery of a signal that
a maximum input current of 50 pA. What to do? is inherently differential, but that rides on some common-
If you are a major manufacturer, you can often persuade mode level or that is afflicted by common-mode interfer-
the supplier to screen parts to a tighter specification. In any ence. Figure 5.64 shows an example of each.
case, you can do the job yourself. Be aware, though, that The first example is the strain gauge we saw earlier
there’s generally no guarantee of process continuity, and (§5.4), a bridge arrangement of resistors that converts
the availability of better-than-specified parts; worse still, strain (elongation) of the material to which it is attached
the special parts you need may be discontinued altogether! into resistance changes; the net result is a small change
One possibility, if you’re willing to hazard a guess as to in differential-output voltage when powered by a fixed dc-
an instrument’s long-term popularity, is to buy a lifetime bias voltage. The resistors all have approximately the same
supply of a critical part. resistance, typically 350 Ω, but they are subjected to dif-
fering strains. The full-scale sensitivity is typically ±2 mV
5.13 Difference, differential, and instrumentation per volt, so that the full-scale output is ±10 mV for 5 V dc
amplifiers: introduction excitation. This small differential-output voltage (propor-
tional to strain) rides on a +2.5 V dc level. The differential-
These terms describe a class of dc-coupled amplifiers input amplifier must have extremely good CMRR in or-
that accept a differential signal-input pair (call them Vin+ der to amplify the millivolt differential signals while re-
and Vin− ), and output either a single-ended signal or a jecting the ∼2.5 V common-mode signal and its varia-
differential-output pair that is accurately proportional to tions. For example, suppose you want a maximum error
the difference: Vout = GV ΔVin = GV (Vin+ − Vin− ). Their of 0.1% of full scale. That’s ±0.01 mV, riding on 2500 mV,
shared claim to fame is high common-mode rejection, which amounts to a CMRR of 250,000:1, or 108 dB. This
combined with excellent accuracy and stability of voltage overestimates the needed CMRR: in practice you would
gain. Here are their distinctive features, as commonly un- perform a “zero calibration,” so that the CMRR need be
derstood among circuit designers. adequate only to reject variations in the +5 V bridge bias;
Difference amplifier differential in, single ended out; op- something like 60 dB would suffice here.61
amp plus two matched resistor pairs (Figure 4.9, §4.2.4, The second example (Figure 5.64B) comes from the
and Figure 5.65); CMRR 90–100 dB; accurate but low world of professional audio, where you encounter some
gain (GV =0.1–10); input impedance 25–100k, intended pretty impressive challenges. In a concert recording sit-
uation, for example, you may have microphones hang-
60 For single-ended amplifiers we would want the current-source ing from a high ceiling, with connecting cables 100 m or
noise in to be less than en (amp)gm . We can use the expression more in length. The peak signal levels may be around
en (ref)/en (amp) = gm RS to determine the allowable voltage noise a volt, dropping to a millivolt during quiet portions of
in the current-source reference. For this circuit that ratio is 37, thus the music. But you’ve got to keep powerline pickup and
√
only 11 nV/ Hz for a noise contribution comparable to that of the
√ 61
0.3 nV/ Hz JFET. The MC1403 reference is about 20× worse than We’ll see the strain gauge again, in connection with analog-to-digital
this. Evidently the Agilent engineers are relying on the matched noise converters, in §13.9.11C (Figure 13.67). A similar biased bridge ar-
currents in the two JFETs to cancel to better than 5%, enforced by the rangement is used in the platinum resistance temperature detector
1% current-mirror resistors. At frequencies above about 10 Hz, how- (RTD), which is the sensor used in the microcontroller-based thermal
ever, the 10 nF capacitor defeats this cancellation. controller in §15.6.
348 5.14. Difference amplifier Art of Electronics Third Edition

+5V

ΔV = ±10 mV xfmr difference amp,

R R shield twisted pair instrumentation amp

– –
mic +
R +
R high CMRR
3-pin XLR high Zin (CM)
diff
drvr connector
R = 350Ω, typ
A. B.
Figure 5.64. Inherently differential signals, for which good common-mode rejection is required. (a) Strain gauge. (b) Audio balanced line
pair.

other annoyances (e.g., switching noise from lighting dim- 5.14 Difference amplifier
mers) another 40 dB below that – the human ear is dis-
Let’s look first at the difference amplifier: its basic oper-
tressingly sensitive to extraneous sounds. Add up the dBs
ation, some applications, a closer look at its performance
– we need 100,000:1 suppression of pickup (<10 μ V)!
parameters, and finally some clever circuit variations.
Seems impossible; but recording engineers have been do-
ing this successfully for decades by the simple expedi- 5.14.1 Basic circuit operation
ent of transporting audio signals on a balanced differen-
tial pair (with a standard signal impedance of 150 Ω or The classic difference amplifier (Figure 5.65) consists of
600 Ω). For this they use a well-shielded twisted-pair ca- an op-amp with matched resistor pairs Rf and Ri , for which
ble, terminated in the legendary 3-pin XLR latching con- the differential gain is
nector (which can take plenty of abuse – it’s got a tough Vout
Gdiff ≡ = Rf /Ri .
metal shroud, good strain relief, and so on). And to keep Vin+ −Vin−
the signal fully balanced they use either a high-quality Assuming an ideal op-amp, the common-mode rejection
audio transformer or a well-designed differential-output
driver (at the transmit end), and another transformer or Ri Rf
a well-designed differential-input amplifier (at the receive 40k 20k sense
–in 2 5
end).
Lest we leave a misleading impression, we hasten to 7 V+
–
note that differential-input amplifiers are helpful also in 6 OUT
+
situations in which the signals themselves are not inher- 4 V–
ently differential. Two common examples are accurate +in 3 1
Ri Rf ref
low-side current sensing (Figure 5.68a), and the use of 40k 20k
differential-input amplifiers when sending signals between A.
instruments (Figure 5.67). In the latter, the flexibility pro-
vided by a difference amplifier’s output REF pin enables sense V in –
us to avoid ground loops while transporting a signal be- V in – – –
tween a pair of instruments whose local grounds are not V in+ + +
identical. ref
V in+
The tricks involved in making good instrumentation am-
plifiers and, more generally, high-gain differential ampli- G = 0.5 G = 2.0
B.
fiers are similar to the precision techniques discussed ear-
lier. Bias current, offsets, and CMRR errors are all impor- Figure 5.65. Classic difference amplifier, with the resistor values
tant. Let’s begin by discussing the design of difference am- used in the AD8278/9 (G=0.5 or 2).
plifiers for less critical applications, working up to the most
demanding instrumentation requirements and their circuit is limited by the matching of the Rf /Ri ratio in the two
solutions. paths; with discrete resistors of 1% tolerance, for example,
Art of Electronics Third Edition 5.14.2. Some applications 349

single ground separate gnd refs

sense
– – – – –

+ + + + +
ref

A. G = +2 B. G = +0.5 C. G = +1 or –1 D. G = +1 E. G = –1

B –
(VA – VB)
A + – –
1
VA + VB (V + VB )
A + A + 2 A
–
– (VA – VB) B B
+

F. differential output G. sum H. average

Figure 5.66. The tricks that a unity-gain difference amplifier can play. Note the separate ground symbols for (D) and (E).

you could expect a CMRR of ∼40 dB at low frequencies 5.14.2 Some applications
(where the op-amp itself has a higher CMRR and where
A. Single-ended input
effects of capacitive imbalance are negligible). That’s ad-
It’s perfectly OK to use a difference amplifier with a single-
equate for situations in which only a modest CMRR is
ended input, for example, to get a precise and stable gain.
needed, for example low-side current sensing. For bet-
Figure 5.66 shows some simple configurations. Note that
ter performance you could trim one of the resistors or
differential nature of its inputs is not “wasted” when a dif-
use resistors of tighter tolerance (for example the com-
ference amplifier is used as in (D) and (E), because its
monly available 0.1% types, typically $0.10–$0.20 in 100-
independent REF pin accommodates small differences in
pc quantity, or the inexpensive Susumu RG-series, with
ground potential at input and output. Put another way, the
0.05% tolerance and 10 ppm/◦ C tempco, about $1); or, bet-
output voltage, relative to its ground, is precisely ±1.0 (in
ter, use matched resistor pairs (e.g., the not-inexpensive
this case) times the input voltage, relative to its ground.
Vishay MPM-series, with ratio tolerances down to 0.01%
and ratio tempcos to 2 ppm/◦ C or the LT5400 matched B. Ground-loop isolation
quad, with similar ratio tolerance and with ratio tempco This property is just what you need for the ground-loop
of 1 ppm/◦ C max). isolating application of Figure 5.67. In the first circuit, the
But don’t get carried away. . . because there are plenti- driver side permits its output reference to float to the po-
ful offerings of complete integrated difference amplifiers tential of the (non-floating) receive side. The small-value
of excellent performance, costing a lot less than you’ll resistor and bypass capacitor allow a small voltage differ-
spend rolling your own. We’ve listed many of these in ence when forced by the receive end. Both sides are happy.
Table 5.7 on page 353. In the “normal” configuration the In the second circuit we’ve allowed the receive side’s
SENSE line is connected to the output and the REF line input common to float, as forced by the (non-floating)
is connected to circuit ground. But you can run it in re- driver. These circuits resolve minor ground-loop problems
verse, as shown in Figure 5.65B. To give a sense of the in single-ended cable connections; but they are no substi-
performance you get with these integrated difference am- tute for the fully isolated and/or balanced approach that’s
plifiers, the worst-case specifications for the AD8278B in needed in demanding applications like professional audio
the figure are gain accuracy of ±0.02% (for G=0.5 or G=2); or video.
gain tempco of 1 ppm/◦ C; offset voltage and tempco of
100 μ V and 1 μ V/◦ C; and a CMRR of 80 dB. It costs about C. Current sensing
$3. Figure 5.68 shows difference amplifiers used for low-side
and high-side current sensing, perhaps as part of a constant-
350 5.14. Difference amplifier Art of Electronics Third Edition

isolated +
BNC
– ctrl G
(to +200 V) RS
+ load
+dc

G=10 G=1
10 nF 33Ω –
–
RS + load
+
INA117
A. floating driver INA106

A. low-side B. high-side
isolated
BNC Figure 5.68. Current sensing for measurement or control. Low-
– side sensing (A) is forgiving of CMRR, unlike high-side sensing (B),
for which the difference amplifier shown would introduce significant
+
error in a high-voltage and high-current supply (where only a small
33Ω 10 nF drop across Rs can be tolerated).

of dissipated power, if this were a powerful 10 A dc sup-

B. floating receiver
ply as in the other example. So this scheme is adequate for
Figure 5.67. Exploiting the REF pin to prevent powerline-frequency a low-current 200 V supply; but there are better ways to
ground loops in connected instruments. do high-side sensing, for example by floating the amplifier
and relaying the output down to earth as a current or (via
an opto-isolator) as a digitized quantity.
current control, or simply for precise load-current moni-
toring. At first glance it may seem unnecessary to use a
difference amplifier for the low-side sensing configuration, D. Current sources
because the sense resistor returns to circuit ground. But Figure 5.69 shows how to rig up a difference amplifier so
imagine that we’re dealing with lots of power, say up to that the (differential) input signal controls the voltage drop
10 A load current. We’d use a low-value precision sense re- across a series sense resistor Rs ; in other words, it’s a cur-
sistor, perhaps 0.01 Ω, to keep its power dissipation below rent source. You’re welcome to use a single-ended control
1 W. Even though one side of it is connected to ground, it input, if you want. The output current can be of either po-
would be unwise to use a single-ended amplifier, because a larity, and these circuits don’t know, or care, whether the
connection resistance of just a milliohm would contribute load returns to ground or to some other potential.
10% error! A differential-input amplifier is the solution, The op-amp follower U2 should be chosen for an input
connected as shown to a 4-wire “Kelvin-connected” sense bias current that is small compared with the minimum load
resistor. Note that the difference amplifier need not have current, and an offset voltage that is small compared with
particularly good CMRR, because the low side isn’t mov- the drop across Rs at minimum load current. You might be-
ing far from ground. gin by choosing Rs for ∼1 V drop at IL (max), or smaller
The same is not true of the high-side configuration (Fig- for high IL (max) or for low supply voltage, then see if
ure 5.68B), where the common-mode voltage is far greater Rs IL (min) is at least 100 μ V or so. For a large dynamic
than the differential voltage. Here we’ve specified a unity- range, say IL (max)/IL (min) ≥ 104 , you’ll need low-offset
gain difference amplifier intended for high-voltage appli- amplifiers for both U1 and U2 ; candidates are listed in Ta-
cations, which permits common-mode input voltages to bles 5.2 (page 302), 5.3 (page 303), 5.5 (pages 320–321)
±200 V (its internal circuit uses a 20:1 resistive divider and 5.6 (page 335).
at the front end, see §5.14.3). Let’s look at the numbers: The circuit in Figure 5.69A is good for low currents. For
the dc voltage can range from 0 to 200 V; so the specified load currents greater than ∼5 mA use a power buffer (Fig-
minimum CMRR of 86 dB (1:20,000) would interpret that ure 5.69B); that can be a wideband (for stability) unity-gain
as equivalent to a differential input variation of 10 mV. Is IC buffer like the LT1010, or (if you need only one polar-
that bad? You bet! To maintain 1% accuracy of sensed cur- ity of output current) a MOSFET or BJT follower. A fa-
rent we’d need to size Rs to drop 1 V at full load current. vorite trick is to use a 3-terminal adjustable regulator (like
That’s a lot of “voltage burden,” and it’s a whopping 10 W an LM317) as a “power buffer,” thus taking advantage of
Art of Electronics Third Edition 5.14.2. Some applications 351

its internal thermal and overcurrent protection. To use it E. High-level line driver
this way, you drive the ADJ pin, and the OUT pin “follows” Professional audio lives and breathes differential analog
1.25 V higher (should this be called a voltage leader?!). As signaling, in the form of balanced lines terminated (usu-
always, feedback takes care of the offset. ally) in a nominal 600 Ω bridging resistance. And the levels
We like using G = 10 difference amplifiers, such as are substantial: pro-audio equipment adopts a “0 dB” stan-
INA106 or INA143, connected “backwards” for G = 0.1, dard of 1.23 Vrms,63 and you’ll generally see additional
because the sense voltage is then one-tenth of the pro- specified headroom of 16 dB to 20 dB without clipping. So
gramming voltage and thus doesn’t eat up so much of the a +20 dB level is 12.3 Vrms, or a differential amplitude of
output compliance range. In common with other current 17.4 V (34.8 Vpp). That requires some serious attention to
sources whose output comes from an op-amp, these con- line drivers, which should not compromise the low noise
figurations become more like voltage sources at high fre- and distortion qualities of the program material.
quencies, where op-amp compensation and slew-rate ef-
Rf
fects dominate (see §§4.2.5 and 4.4.4).62 Better perfor-
Rg
mance at high frequencies can be gotten with an active cur- + 50
rent source based on an instrumentation amplifier, config-
–
ured with an inherently high impedance output terminal, as R
shown in Figure 5.87 in §5.16.9.
R
2R f
G=
U1 R Rg
LM LME LME
B – RS IL R 7372 49713 49990

+ Io ±150 ±100 ±25 mA

A
U2 en 14 1.9 0.9 nV/√Hz
+ – 50
– load THD 100 4 0.1 ppm
+
@freq 1000 1 1 kHz
GBW 120 132 110 MHz
A. low current, IL~
< 5mA slew 3000 1900 22 V/μS

Figure 5.70. Differential high-level line driver for professional au-

dio.

high-current buffer
G≈1
Figure 5.70 shows a nice G = 2 circuit for the job, based
U1
around a pair of unity-gain difference amplifiers. These
B – RS IL are implemented here with wideband op-amps of sub-
A + stantial output-current capability, allowing for an overall
U2 gain (differential-output voltage divided by single-ended
+ load
– input voltage) other than ×2. The particular listed op-amps
all run from supply voltages to ±18 V, producing output
swings (on each line of the pair) to ±15 V or so (signif-
B. “any” current, RS : mΩ to GΩ
icantly greater than the ±9 V corresponding to a 20 dB
Figure 5.69. Precision current sources: IL = Gdiff (VA −VB )/RS . The pro-audio headroom). Three op-amp choices are shown, of
(bipolarity) output current in (A) is limited to U1 ’s Iout (max). Adding comparable bandwidth (∼100 MHz) but aimed at different
a unity-gain power buffer (an IC wideband buffer, or a transistor fol- applications. The LM7372 is well specified out to 10 MHz
lower) in (B) allows large output currents (follower U2 can be omit- and intended for video and broadcast applications, whereas
ted if RS is less than 0.2 Ω or so). These circuits don’t know, or care, the LME49xxx parts are optimized for audio bandwidths,
where the load returns. with pretty impressive specifications out to 20 kHz. It’s not
often (more like never!) that you see amplifiers with to-
tal harmonic distortion (THD) specifications of 0.1 ppm
63 The base unit for audio level is “0 dBu,” an rms voltage corresponding
62 You can define an effective current-source output capacitance to 1 mW into a 600 Ω load; that works out to 0.775 Vrms. Pro-audio’s
Ceff =Iout /S (where S is the output slew rate) as a way to characterize 0 dB level is +4 dBu, hence 1.23 Vrms; home audio is considerably less
this shortcoming. muscular, at −10 dBu, or 0.25 Vrms.
352 5.14. Difference amplifier Art of Electronics Third Edition

(−140 dB),
√ here combined with very low voltage noise mode) and its effect on gain when driven with finite source
(1.4 nV/ Hz at 10 Hz).64 impedance or its effect on CMRR when driven from an
Some interesting alternatives are the DRV134 and the unbalanced source impedance; common-mode input range;
LME49724, which integrate a fully differential output cir- and amplifier bandwidth and its effect on CMRR. It’s time
cuit, capable of comparable performance, into one IC. The to peel the onion.
latter are examples of fully-differential amplifiers, with dif-
ferential inputs as well; one input can be grounded to work A. Input impedance
with single-ended signal sources. We’ll see these later, in From Figure 5.65 it might seem that the input impedance
§5.17. of a difference amplifier is Ri (or maybe some multiple of
that), and that all is well if the signal driving it has a source
F. Wideband analog over twisted pair (Thev́enin) impedance RS that is much less, perhaps our
Twisted-pair network cable (“Cat-5e,” etc.) is ordinarily usual seat-of-the-pants criterion of RS  10Ri .
used for digital data transmission on local area networks Not so! These amplifiers revel in their precise gain (the
(LANs), but it can be used successfully for analog sig- selections in Table 5.7 on the next page have worst-case
nals as well. The ubiquitous Cat-5e and Cat-6 cables con- gain errors of 0.1% or better), and that gain accuracy is
tain four unshielded pairs (hence “UTP” – unshielded compromised unless RS is smaller than the amplifier’s RI
twisted pair), which interestingly are twisted with differing by at least that factor. That’s because the signal’s source
(incommensurate) pitches to minimize normal-mode cou- impedance is effectively in series with RI , reducing the gain
pling. by the factor RI /(RI + RS ).
However, there’s plenty of common-mode coupling, That gain reduction is actually the lesser of two prob-
both between pairs and to the outside world. So you need lems. If you read the fine print on the datasheet, you’ll dis-
to use a differential driver (§5.17) combined with a differ- cover that the excellent CMRRs of these amplifiers (surely
ence amplifier at the far end. And, for wideband transmis- their greatest claim to fame) is invariably specified for
sion over anything longer than a few inches you need to (drumroll) RS = 0 Ω! You could reasonably expect that the
terminate the pair in its characteristic impedance of 100 Ω CMRR would be maintained if you drive both inputs with
(see Appendix H). equal source impedances, because that should maintain the
Figure 5.71 shows how to use a difference amplifier as resistor ratio match. You could expect that, but you would
an analog “line receiver” for such signals (we’ll show the be disappointed: the CMRR degrades rapidly with rising
driving end later, in §5.17.2). This circuit comes from the source impedances, even if they are precisely matched.
AD8130’s datasheet, illustrating the use of some “peaking” Why is that? During manufacture the internal resistors
to compensate for the signal attenuation at high frequencies are laser trimmed, so that the ratio RF /RI of the upper re-
in the rather long (300m!) cable. The amplifier has G = 3 sistor pair precisely matches the corresponding ratio of the
at low frequencies, with R4C1 kicking in around 1.6 MHz lower pair. The ratios are what are matched, at the expense
(where C1 ’s reactance equals R3 ) to boost the sagging re- of the absolute values; the two input resistors RI may dif-
sponse. The result of this simple “equalizer” is to produce fer somewhat.65 So, if you drive it with a signal pair of
an overall response flat to ±1 dB from dc to 9 MHz. The matched source impedances RS , you get a mismatch in
×3 low-frequency gain is needed (a) to compensate for the the feedback ratios, hence degraded CMRR. Bottom line:
signal that is lost because of the resistive divider consisting drive these puppies from an op-amp output, or from a sig-
of R1 and the cable pair’s 50.5 Ω round-trip resistance (a nal source of very low RS (e.g., a low-value current-sense
factor of 1.5), and (b) to double the output signal so it can resistor).
drive a “back-terminated” video cable (see Appendix H). That’s not always possible, of course. What can be
done to raise the input impedance? The first thought
5.14.3 Performance parameters might be simply to raise all the resistor values by some
large factor. That has several drawbacks, the most se-
In the preceding sections we glossed over some impor- rious of which are (a) the Johnson noise contribution
tant issues: input impedance (both differential and common

64 You’ve got to keep source impedances quite low in order not to degrade 65 And the overall resistor scaling is typically good to only ±20% of the
such a low en ; even a 100 Ω resistor has an open-circuit voltage noise nominal value on the datasheet: absolute resistance value is sacrificed
√
of 1.3 nV/ Hz. See Chapter 8. on the altar of resistor ratio matching.
Art of Electronics Third Edition 5.14.3. Performance parameters 353

AD8130
R1 + gm 0
100 with
–
cat-5 equalizer
cable –10 ±1 dB
+ to 9 MHz

Gain (dB)
R2 cable
– gm 1k –20

–30
R4 R3
100 499
C1 –40
200 pF 10k 100k 1M 10M 100M
Frequency (Hz)

Figure 5.71. Differential line receiver for wideband analog over twisted pair. The “treble boost” provided by C1 R4 compensates for the
high-frequency rolloff of a 300m length of Cat-5 cable, as shown. See also Figure 5.101.

Table 5.7 Selected Difference Amplifiers

Offset Noisek,t
a Voltage CMRR V
Diff’l n(pp) enr BW Settle Supply
Config

Filter?
ΔG VCM Curve

DIP?
max ±max typ max typ min Zin dcb nV –3dB 0.01% Range I s Cost
Part # Gain (%) (Vpp) (μV) (μV) (dB) (dB) (kΩ) (μV) (√Hz ) (MHz) (μs) (V) (mA) ($US) Comments
INA105K A 1.0 0.025 20 50 500 100 72 1 50 2.4 60 1 5 - 10–36 1.5 8.88 legacy
AMP03G A 1.0 0.008 20 25 750 95 75 1 50 2 20c 3 1 - 10–36 2.5 5.86
INA134 A 1.0 0.075 26 75 250 90 74 4 50 7d 52 3.1 3 - 8–36 2.4 2.36 audio, < 5ppm dist
INA154 A 1.0 0.1 25 75 1500 90 74 4 50 2.6 52 3.1 3 - 8–36 2.4 2.36 - low cost
INA132P A 1.0 0.075 28 75 250 90 76 5 80 1.6 65c 0.3 88 - 2.7–36 0.16 4.62
AD8271B Am 0.5,2 0.02 >18 300 600 92 80 10 20 1.5 38 15 0.55 - 5–36 2.6 3.50 - Gdiff = 0.5,1,2
AD8273 A 0.5,2 0.05 >18 200 1400 86 77 7 24 7d 52 20 0.75 - 5–36 2.5 3.13 - dual audio, 6ppm dist
THAT1206 F 0.50 0.5 26 - 10mV 90 70 - 48 - 28n 34 - - 24–40 4.7 4.75 ZCM=10M, <6ppm dist
AD8278B A 0.5,2 0.02 >18 50 100 100 80 1 80 1.4 47 1 9 - 2–36 0.2 2.72 - Gdiff = 0.5,2; dual '79
INA106 A 10 0.025 11 50 200 100 86 1 20 1 30 5 10 - 10–36 1.5 11.00 0.10, legacy
INA143U A 10 0.1 15 100 500 96 86 4h 20 1 30 0.15 9 - 4.5–36 1.0 3.36 - 0.10, dual=INA2143
LT1991A Am 1,4,10 0.06 27 15 50 100 77 8h 90 0.25 46 0.11f 48 f 2.7–40 0.10 2.50 - 3,9,12, includes filter
LT1996A Am 9-117 0.07 27q 15 50 100 80 - 33q 0.25 18 0.04 85 f 2.7–40 0.10 5.72 - 9,27,81, includes filter
LT1995 Am 1-7 0.2 31q 600 4000 87 75 - 4q - 14 32 0.1 - 2.7–40 7 3.78 - 1,2,4,6
INA146 B 0.1o 0.1 100 1000 5000 80 70 11 200 10 550 0.55 80 4.5–36 0.57 4.25 high-voltage inputs
INA117P C 1.0 0.02 200 120 1000 94 86 8 800 25 550 0.2 10 - 10–36 1.5 5.54 high-voltage inputs
AD629B C 1.0 0.03 270 100 500 96 86 6 800 15 550 0.5 15 - 5–36 1.2 7.21 high-voltage inputs
INA149 C 1.0 0.02 275 350 1100 100 90 1 800 20 550 0.5 7 - 4–40 0.8 6.00 - high-voltage inputs
AD8479 C 1.0 0.01 600 500 1000 96 90 u 2000 30 1600 0.13 11 - 5–36 0.55 9.66 highest CM voltage
AD628A C ext 0.1 120 - 1500 - 75 220 15 300 0.6 40 4.5–36 1.2 3.36 - HV inputs, filter+gain
low-voltage
AD8275B D 0.2 0.024 27 150 500 96 80 2 108 1c,e 40e 15 0.45 - 3.3–15 1.9 4.23 - 5, with Vref/2 offset
AD830 Eg 1-10 0.6 24 1500 3000 100 90 12 370 - 27 85 0.025 p 8–36 14 4.86 - G=1+R2/R1, V in < 2V
AD8129 Eg 10-100 0.6 20 200 800 105 92 12 1000 - 4.6 200 0.02 p 4.5–25 10 2.90 - G=1+R2/R1, V in < 2V
AD8130 Eg 1–20 0.6 20 400 1800 105 90 12 6000 - 12.3 250 0.02 p 4.5–25 11 2.90 - G=1+R2/R1, V in < 2V
EL5172 Eg 1–20 1.5 20 7mV 25mV 95 75 - 300 - 26 250 0.01 p 4.7–12 5.6 1.27 - G=1+R2/R1, V in < 4V
INA152EA A 1.0 0.1 18 250 1500 94 80 3 40 2.4 87 0.8 25 - 2.7–20 0.5 3.60 - 0.5,1,2, RRIO
MAX4198 A 1.0 0.1 0,5 30 500 90 74 9h 50 7.8 58 0.175 34 - 2.7–7 0.05 2.38 -
Notes: (a) maximum common-mode voltage. (b) 0.01–10Hz or 0.1–10Hz. (c) at 100Hz. (d) 20 to 20kHz. (e) RTO (referred to output). (f) includes
4pF filter caps. (g) circuit E from Fig. 5.89. (h) CMRR curve flattens at BW frequency. (k) RTI (referred to input) unless noted. (m) multiple resistors.
(n) noise = –107dBu, 20kHz BW. (o) includes extra opamp filter stage. (p) for G>1. (q) depends on gain. (r) at 1kHz. (t) typical. (u) between 5 & 6.

1 √ √
(en =0.13 R 2 nV/ Hz, thus a devastating 130 nV/ Hz for amp followers at the inputs. That’s OK, but there’s a better
resistor values of ∼1 MΩ; see Chapter 8), and (b) the band- way still, in circuit configurations such as the “three-op-
width penalty caused by distributed stray capacitances. The amp instrumentation amplifier,” in which a front-end dif-
second thought would be to put a pair of precision op- ferential stage of high CMRR and high impedance drives a
354 5.14. Difference amplifier Art of Electronics Third Edition

difference amplifier output stage. We’ll see these wonder- differential input impedance based on the net input-current
fully useful amplifiers a bit later. change, as shown. Datasheets most often list this value,
without explanation: you’ve been warned!
normal
common mode A final observation: you won’t generally see difference
mode (diff’l) amplifiers with gains greater than 10, because Ri , and there-
common
ΔV Ri GRi mode fore the differential input impedance, becomes unman-
ΔV
2
0V
ageably small. For example, to get G = 1000 you might
I–
– choose Ri =100 Ω and Rf =100k. OK, maybe you can live
I+ + diff’l with ∼100 Ω input impedance; but you’d have to match
GΔV the signal source impedances to 0.001 Ω in order not to de-
ΔV
2 Ri GRi grade the CMRR. The take-away: use an instrumentation
amplifier (§5.15), not a difference amplifier, for high-gain
differential-input applications.
common mode: Zin (each) = (G + 1)Ri
Zin (combined) = 1 (G + 1)Ri
2 B. Common-mode input range
ΔV G +1 The voltage divider formed by Ri and Rf permits the stan-
differential mode: Zin (–) ≡ =2 R
ΔI 2G + 1 i
dard difference amplifier to accept input signals beyond
ΔV– G + 1
Zin (+) ≡ = Ri the supply rails: protection diodes are at the internal op-
ΔI+ 2
ΔV G +1 amp inputs, so the input signals could in principle swing
“Zin” ≡ = Ri
Δ(I– – I+) G as far as ±VS (G + 1)/G with supply voltages of ±VS (fig-
ure out why). For example, the AD8278 has Ri = 40k
Figure 5.72. The several input impedances of the difference am-
and Rf = 20k, so it can be connected for G = 0.5 (“nor-
plifier.
mal”) or G = 2 (reversed). It specifies the common-mode
Circling back around to the initial question, what ex- input range for both gains: −3(VS +0.1) to +3(VS −1.5)
actly is the “input impedance”? There are several answers for G = 0.5 (that is, about ±40 V with ±15 V supplies,
– look at Figure 5.72. By common-mode input impedance which can be very useful indeed!), and −1.5(VS +0.1) to
we mean the incremental impedance seen at either input66 +1.5(VS −1.5) for G = 2 (i.e., ±20 V with ±15 V sup-
when both are driven together. With common-mode drive plies). But check the specs – not all difference amplifiers
the two impedances are equal (apart from minor mismatch- let you go that far.
ing, as described above), because the output is fixed. A few of the difference amplifiers in Table 5.7 on the
The differential-input impedance is a longer story. preceding page) do better still; for example, the INA117
Taken individually (by grounding the other input), the two has a common-mode range of ±200 V while maintaining
inputs exhibit different Rin : the inverting input connects to a differential gain of unity. This it does by using a pair
a virtual ground by way of Ri , so its Rin = Ri , whereas the of 200:1 voltage dividers at the input to bring the ±200 V
noninverting input sees Rin = Ri + Rf . For a difference am- signal within the op-amp’s common-mode range of ±10 V
plifier with G=10, for example, these differ by a factor of (the circuit is shown in Figure 5.75C). The price it pays is
eleven. This is a useful result, particularly if you plan to degraded√ offset and noise: typical values of 120√μ V and
use a difference amplifier in a single-ended configuration 550 nV/ Hz, compared with 25 μ V and 20 nV/ Hz for
like Figures 5.66D and E. A purist could argue, though, the conventional AMP03.67
that we’ve done it wrong: a single-ended input change is An important point: when using difference amplifiers
really a combination of a purely differential input plus a with large input voltage ranges, beware of the large equiv-
common-mode offset of half that value. To satisfy such alent input errors created by imperfect common-mode re-
a person we’ve calculated the expressions in Figure 5.72, jection. For example, the AD629B specifies a typical dc
based upon a “pure” (symmetrical) differential input. Even CMRR of 96 dB, but you’ve got to consider the worst-
when defined this way the input impedances seen at the two case (minimum) value of 86 dB. With that CMRR, a 200 V
inputs are different. This leads us to a final definition of
67 There’s another way to boost VCM without such compromise, by using
66 Some manufacturers specify half that value, i.e., the impedance with a second op-amp to cancel the common-mode signal; see Figure 7.27
both terminals tied together; the datasheet usually tells you which they in the previous edition of this book. We are unaware of any commercial
mean. difference amplifiers that use this trick.
Art of Electronics Third Edition 5.14.4. Circuit variations 355

common-mode input has an input-referred differential er- plots, such as the AD827368 and our favorite AD8275. The
ror of 10 mV, completely swamping the 0.5 mV specified transconductance-balancing AD8129 does very well, but is
maximum offset voltage. Put another way, the error that limited to small inputs and high gains. This information is
is due to finite CMRR is larger than the specified VOS for not shown in the datasheet specifications; it’s necessary to
input |VCM | > 10 V. And the situation is worse still at sig- look for performance plots to make the comparisons.
nal frequencies: you might imagine using such a difference Common-mode rejection at higher frequencies is de-
amplifier for powerline current monitoring. At 60 Hz the graded also by the effects of stray inductance and by asym-
CMRR of the INA117 (similar to that of the AD629B at dc) metrical capacitive loading. It is necessary to balance the
degrades to 66 dB (min). So the 160 V peak powerline sig- circuit capacitances to achieve good CMRR at high fre-
nal produces a huge 80 mV input error. And ideally you’d quencies. This may require careful mirror-image place-
want to monitor currents on powerlines at higher voltages ment of components. Even when so symmetrized, the de-
still, perhaps to 400 V. There are better ways to do this; take creasing input capacitive shunt reactance at higher frequen-
a look at §13.11.1 if you’re curious. cies creates an increasing sensitivity to any unbalance in
signal source impedance.69
100 6 1 7 12
2
3 5.14.4 Circuit variations
5 4
10
80
11 A. Filter node
CMRR (dB)

The difference amplifiers in Table 5.7 (page 353) include

8 one (the INA146) with a node brought out for noise (low-
60 pass) filtering of the difference stage (G = 0.1) by a capac-
9
itor to ground (Figure 5.75B). It includes a second single-
ended stage, with gain set by a pair of external resistors; so
40
you can have overall gains from 0.1 to 100. The low first-
100 1k 10k 100k 1M 10M stage gain gives you a large ±100 V common-mode range,
Frequency (Hz) though at the expense of noise and offset.
Figure 5.73. Common-mode rejection ratio versus frequency for
B. Offset trim
the difference amplifiers in Table 5.7 on page 353 (identified in the
Integrated difference amplifiers are factory trimmed to
“Curve” column).
pretty good precision, with typical values in the 25–100 μ V
range (but with worst-case offsets an order of magnitude
larger). As with any op-amp circuit, you can rig up an
C. Bandwidth
external trim, as in Figure 5.74A. Here R2 R3 divides the
Difference amplifiers are built with op-amps, frequency
trimmer’s ±15 V range to ±1 mV at the REF pin; R1 bal-
compensated for stability with the by-now familiar 1/ f
ances the 10 Ω added resistance to ground, to preserve the
open-loop gain rolloff. As with any op-amp circuit, loop
CMRR. The amplifier’s gain is slightly reduced by the ra-
gain is responsible for good behavior and the loss of loop
tio Rf /(Rf + R2 ); for a typical Rf of 25k, that’s 0.04%, in
gain at higher frequencies not only limits the bandwidth
the same range as the amplifier’s specified gain accuracy.
of a difference amplifier (and its linearity, constancy of
If this bothers you, use a smaller R2 .
gain, low output impedance, etc.), it also degrades the all-
68
important CMRR. Figure 5.73 shows this behavior, for Although the datasheet graphs for the AD8273 show a best-in-class
the difference amplifiers listed in Table 5.7 (page 353). CMRR of 100 dB below 40 kHz, the tabulated typical CMRR is shown
Not surprisingly, amplifiers with greater closed-loop band- as only 86 dB. We like the plot better, but the designer may be stuck
with the worst-case spec of 77 dB. Some users may want to perform
width (therefore with op-amps of greater fT ) maintain high
incoming inspections to settle the issue.
CMRR to higher frequencies. 69 The professional audio people are keenly aware of these effects,
Note that some amplifiers perform well near dc but and they don’t mince words. As stated pithily by Whitlock and
poorly at high frequencies, for example classic parts like Floru in an Audio Engineering Society paper, “Noise rejection in
the INA105, AD829 and LT1991, whereas others not so a balanced system has absolutely NOTHING to do with signal
well rated at dc may look better at high frequencies, such symmetry (equal and opposite signal voltage swings). It is the balance
as the AD8271 and the MAX4198. A few are outstanding of common-mode impedances that defines a balanced system!”
performers from dc to high frequencies, according to the [emphasis in the original].
356 5.15. Instrumentation amplifier Art of Electronics Third Edition

Ri Rf sense Ri Rf
– –

– out –
+ out
+ +
–
ref R2
+ +
Ri Rf RG
Ri Rf filter
ref external

Cf R1

A. B.

Ri Rf Ri Rf sense
– –

– out – out
Ri
+ + +
2R f ref 2 VREF
Rd + +VREF (not )
R f || Rd Ri 2
2R f ref 1
ref– ref+

C. D.
Figure 5.75. Circuit configurations for the difference amplifiers in Table 5.7 on page 353 (identified in the “Config” column). The “E” form
is shown in Figure 5.89. The “C” form is used for high voltages (e.g., ± 270 V for the AD629B).

C. CMRR trim put signals over a ±10 V range, and its gain of 0.2 takes
Likewise, you can trim out residual CMRR (caused by a ±10 V differential input to a 0–4 V output. You can, of
slight mismatch of resistor ratios Rf /Ri in the two paths) course, use a lower reference voltage. It’s often convenient
with the circuit of Figure 5.74B. It’s important to limit to use Vref = 4.096 V when driving an ADC; this makes the
the trim range, to permit an accurate and stable trim to step size come out in round numbers, e.g., 1 mV/step for a
something considerably better than the off-the-shelf 80 dB 12-bit conversion.
(worst-case) CMRR specification. You can’t get any old
value of trimmer, and it’s best not to use values less than
100 Ω (even if you can find them) if you care about sta-
bility. Here we’ve chosen standard resistor values and a 5.15 Instrumentation amplifier
100 Ω trimmer to produce a resistance range of 20–30 Ω The difference amplifiers of the previous section are in-
from the REF terminal to ground, providing a ±5 Ω sym- expensive, and fine for many applications; and they have
metrical variation around R1 . For the 25k resistor values the nice feature of accepting inputs beyond the rails. But
of this unity-gain difference amplifier (rather typical; see they have limited gain (≤10) and CMRR (85 dB min), √
Table 5.7 on page 353), this corresponds to a trim range √ make them somewhat noisy (20 nV/ Hz
their resistors
adequate to null an initial CMRR of 75 dB. You can, of to 50 nV/ Hz), and their relatively low input resistance
course, add an offset null to this circuit, as indicated. (∼10k to ∼100k) limits their utility to situations where
the driving signals are of low impedance (op-amp outputs,
D. Single-supply offset low-Z balanced lines, low-R sense resistors).
One of the difference amplifiers in Table 5.7 (page 353) If you need lots of gain, or a high input impedance, or
helpfully splits the reference feedback resistor into a par- superior CMRR, you need something different. It’s called
allel pair (Figure 5.75D), so it’s easy to offset the output an instrumentation amplifier. These impressive devices
voltage range. For example, you could run the amplifier on have input impedances upward of 109 Ω, gains from√unity
a single +5 V supply, with REF 2 driven from a clean ref- to 1000 or so, low voltage noise (down to ∼1 nV/ Hz),
erence of that same voltage. With no difference signal the and worst-case CMRRs of 100–120 dB (look ahead to Ta-
output will be +2.5 V. The amplifier can accommodate in- ble 5.8 on page 363).
Art of Electronics Third Edition 5.15.2. Classic three-op-amp instrumentation amplifier 357

Ri Rf sense does not improve the CMRR, which is still limited by the
R1
resistor ratio matching of Rf /Ri : it’s really hard to do bet-
– 10.0Ω ter than 100,000:1 with on-chip laser trimming (both initial
+
trim and stability with time and temperature). In fact, this
ref
±1mV circuit degrades the CMRR somewhat, with two more am-
trim
plifiers in the signal path.
Ri Rf
R2 R3
10.0Ω 150k

Vos 5.15.2 Classic three-op-amp instrumentation

trim amplifier
–15 +15
A. 50k The circuit in Figure 5.77 is much better. It is the stan-
dard “three-op-amp instrumentation amplifier,” one of sev-
eral configurations that provide the desirable combina-
Ri Rf tion of high CMRR, high Rin , low en , and plenty of gain
25k 25k
when you need it. The input stage is a clever configura-
R1 tion of two op-amps that provides high differential gain and
– 24.9Ω
unity common-mode gain without requiring close resistor
+
+ 499k (VOS matching. Its differential output represents a signal with
trim) substantial reduction in the comparative common-mode
–
Ri Rf signal (when configured for Gdiff  1), and it is used to
25k 25k R2 R3 drive a conventional differential amplifier circuit. The lat-
38.3Ω 42.2Ω 20Ω
to 30Ω
ter is usually arranged for unity gain and is used to generate
R4
100Ω a single-ended output while removing the common-mode
CMRR signal.
trim
B.
U1
–in + R R sense
Figure 5.74. Trimming the offset and CMRR of a difference ampli-
fier. –

5.15.1 A first (but naive) guess Rf U3

– out
Rg
High input impedance – that’s easy, just add op-amp fol- +
lowers to the difference amplifier (Figure 5.76); and then Rf
the resistors Ri and Rf can be smaller, reducing their John-
U2
son noise contribution. – ref

+in + R R
U1
– in + Ri Rf

–
U3 GCM = 1
– 2R f
Gdiff = 1 +
Rg
+
U2
+in + Figure 5.77. The classic three-op-amp instrumentation amplifier.

– Ri Rf
It’s worth looking more closely at this circuit. We’ve
hinted that it can deliver very high CMRR and very low en .
Figure 5.76. A first stab at improving the difference amplifier. But that is true only when configured for large differential

Indeed, this circuit has the enormous input impedance have matched source impedances relative to the common-mode signal,
we expect from an op-amp follower, so there is no longer because the input capacitance of the circuit forms a voltage divider in
a problem from any reasonable source impedance.70 But it combination with the source resistance. “High frequencies” may even
mean 60 Hz and its harmonics, because common-mode ac powerline
70 At least at dc. At higher frequencies it again becomes important to pickup is a common nuisance.