V850E/MA1

V850 family 32-bit RISC Microcontroller

Product Letter

Description The single-chip V850E/MA1 microcontroller is a member of NEC’s 32-bit RISC V850 family.
Implementing the latest CPU core architecture, the device is optimized for highest speed
and performance. The on-chip memory controller makes it capable of interfacing directly to
various memory types such as synchronous DRAM, without the need for external logic.
New instructions make for more compact code size while maintaining object-code
backward compatibility to V850 standard products.

Applications V850E/MA1 devices are used in embedded applications requiring sophisticated real-time
controlling. The automotive sector, telecommunications, data processing, multimedia/
Internet but also the industrial sector are all part of this market. With a performance of
62 Mips, the V850E/MA1 has enough power for time-consuming computing tasks.

• Enhanced 32-bit RISC CPU core with additional instructions

Features • 256-Mbyte linear address space
• 64-Mbyte external address space
• 20 ns minimum instruction execution time (50 MHz max. clock)
• 32 general-purpose registers
• 4 or 10 Kbytes internal RAM
• ROMless, Mask ROM (128/256 Kbytes), Flash EPROM (256 Kbytes)
• DSP functionality with 32-bit multiplication and saturation logic in a single clock cycle
• Bus controller including memory controller supporting EDO DRAM, SDRAM and page ROM
• 4 channel DMA controller
• Real-time pulse units/timers
• PWM timers
• Serial interfaces with baud generators
• Clock generator with PLL
• Power saving functions: HALT/IDLE/STOP modes
• 144-pin plastic LQFP package

Block Diagram
NMI HLDRQ
CPU HLDAK
INTP100 to INTP103, Interrupt CS0, CS7
INTP110 to INTP113, Controller PC Instruction DRAMC CS1/RAS1, CS3/RAS3
INTP120 to INTP123, CS4/RAS4, CS6/RAS6
INTP130 to INTP133 Flash/ queue
CS2/IORD
ROM CS5/IOWR
INTP000 to INTP001, SELFREF
INTP010 to INTP011, Barrel Shifter Multiplier
REFRQ
INTP020 to INTP021, BCYST
INTP030 to INTP031 MEMC LBE/SDCAS
RPU Bus
System Control UBE/SDRAS
TO00 to TO03 SDCLK
Registers Unit
TO00, TI010,
A SDCKE
L WE
TI020, TI 030 RD
U
General ROMC OE
SIO RAM Registers UWR/UCAS/UDQM
SO0/TXD0 LWR/LCAS/LDQM
SI0/RXD0 UART0/CSI0 WAIT
SCK0 A0 to A25
D0 to D15
SO1/TXD1
BUSCLK
SI1/RXD1 UART1/CSI1
SCK1 DMARQ0 to DMARQ3
DMAC DMAAK0 to DMAAK3
TXD2 TC0 to TC3
UART2
RXD2
SO2
SI2 CSI2
SCK2
CKSEL
Ports CLKOUT
PWM0 PWM0 X1
CG
X2
CVDD
PDL0 to PDL15
PAL0 to PAL15
PAH0 to PAH 9
PCS0 to PCS7
PCT0, PCT1, PCT4 to PCT7
PCM0 to PCM5
PCD0 to PCD3
PBD0 to PBD3
P70 to P77
P50 to P52
P40 to P45
P30 to P37
P21 to P27
P20
P10 to P13
P00 to P07

PWM1 PWM1 CVSS

MODE0, MODE1
MODE2/VPP
ANI0 to ANI7 System
AVREF/AVDD RESET
ADC Controller
AVSS VDD
ADTRG VSS
 Functional Block Description

CPU The enhanced 32-bit V850E RISC CPU core is based on Harvard architecture. Most
instructions are executed in a single clock cycle under control of a 5-stage pipeline.
Additional instructions reduce the code size. Backward compatibility to V850 standard
products is maintained. An on-chip 32 x 32-bit hardware multiplier with 64-bit result offers
DSP functionality. The saturation logic can detect overflow and underflow conditions and
clip the results to the maximum or minimum values. A 32-bit barrel shifter and bit
manipulation instructions speed up complex bit operations.

BCU The Bus Control Unit (BCU) initiates the bus cycles using physical addresses generated by
the CPU. It includes a direct interface to external page-ROM, FPM EDO-RAM and SDRAM
devices.

RAM The internal RAM (4/10 Kbytes) is mapped from addresses FFFFC000H. The CPU can
access any data in one clock cycle.

ROM The internal ROM (128/256 Kbytes) or Flash EPROM (256 Kbytes) is mapped from address
00000000H or 00100000H. MODE pins control ROM/Flash access. The CPU can access
any address of the ROM/PROM in one clock cycle to fetch an instruction, even during high-
speed operation.

PROM Programming The Flash EPROM can be written and erased electrically. VPP and MODE pins control
programming.

Ports The V850E/MA1 has 115 input/output port pins that can be used alternatively as control
pins.

Interrupt Controller The interrupt controller handles the interrupt request issued by up to 33 internal peripheral
hardware or 25 external sources. Up to 8 interrupt priority levels can be specified for each
interrupt request. Multiplexed processing control is also supported.

Clock Generator The clock generator produces the CPU operating clock. The internal frequency can be
selected as 10x, 5x, 2.5x or 1x of crystal frequency using the internal PLL or 1/2x crystal
frequency without PLL. An external clock can be used instead of the clock generator. A
clock-out signal is available.

RPU/Timers The Real Time Pulse Unit (RPU) includes four 16-bit timer/event counters with two capture/
compare registers each. Additionally, four 16-bit interval timers with compare registers are
integrated on chip.

PWM Unit The two channel PWM unit can be operated with 8/9/10 or 12-bit resolution.

Serial Interface The serial interface includes two UART (Asynchronous Serial Interface) channels and two
additional CSI (Clocked Serial Interface) channels. The UART transfers data via the TxD and
RxD pins. The baud rate is determined by the on-chip dedicated baud rate generator. The
CSI transfers data via the SO, SI and SCK pins at a baud rate determined by the on-chip
dedicated baud rate generator or an external clock.

DMA A 4-channel DMA controller is available for 8/16-bit transfers.

A/D Converter An 8-channel A/D converter with 10-bit resolution is integrated.

 V850E/MA1
32-bit RISC Microcontroller

Ordering Information

Devices Part Number Max. freq. ROM Flash RAM

(MHz) (Kbytes) (Kbytes) (Kbytes)
µPD703103 50 MHz - - 4
µPD703105 50 MHz 128 - 4
µPD703106 50 MHz 128 - 10
µPD703107 50 MHz 256 - 10
µPD70F3107 50 MHz - 256 10

Documentation Doc Number Devices Type

U14707EE1V0CD00 V850 & VR Series Catalog 2000 CD-ROM
U12842EE2V0PF00 V850 Chipshop Pamphlet
U14559EJ1V0UM00* V850E1 Architecture Manual
U14359EJ2V0UM00* V850E/MA1 User’s Manual
*Preliminary Document

Tools Order Number Devices Description Type

CPDW9X/NT-CDR-V85X V850(E) C/C++ Compiler (GHS) Software
EWEMUL-W9X/NT-CDR-V85X V850(E) C/C++ Compiler (IAR) Software
IE-V850E-MC-A V850E Emulator Hardware
IE-703107-MC-EM1 V850E/MA1 Emulation Board Hardware
IE-70000-PCI-IF-A V850(E) PCI Interface Card Hardware
IE-70000-CD-IF-A V850(E) PCMCIA Interface Card Hardware
SC144SDN V850(E) Emulation Probe Extension Hardware
SWEX144SD V850(E) Emulation Probe Extension Hardware
FlashMASTER V850(E) Programmer Hardware
FA-144GJ-UEN V850(E) Programming Adapter Hardware

For further information on NEC’s V850 family or other NEC products visit our European
website at www.nec.de
 V850E/MA1
32-bit RISC Microcontroller

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© Published by NEC Electronics (Europe) GmbH, Printed in Germany, December 2000

Document No. U15148EE1V0PL00

With compliments

NEC makes no warranty with respect to this documentation and disclaims any implied warranties of merchantability or fitness for particular
purpose. NEC does not assume any responsibility for circuits shown or claim that they are free from patent infringement. Product specifications are
subject to change without notice. To ensure that you have the latest product data, please contact your local NEC sales office.
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