EE JULY/AUGUST 1988
will start running. The clock frequency, off, and the stationary stator current is References:
i.e., the step rate, is adjustable with P2. reduced to the value set with R2. The
The monostable will remain set via D2, above arangement keeps the dissi- alt Universal control for stepper motors.
and Ti will conduct, as long as clock pation of the motor and the driver within Elektor Eelectronics, January 1987.
pulses are applied to the motor driver. reasonable limits. PI Stepper motor control. Elektor Elec-
The amount of ever reversing stator cur- The current consumption of the com- tronics, July/August 1986.
rent is limited by the stator inductance, plete circuit is practically that of the
but can still be increased with the aid of motor alone (700 mA max.). The motor
Pi. When the motor stops, Ti is turned driver IC consumes about 70 mA.
NON-INTERLACED
PICTURE FOR ELECTRON
Owners of the Acorn Electron home 1
computer may well object to its interlac-
ed, and therefore slightly instable, pic-
ture. There is a trace of display flicker in
non-moving areas on the screen, and
this is mainly due to the internal video
procesing circuitry operating on the
basis of interlacing, a technique used in
conventional TV transmission for
smoothing the appearance of moving
picture areas. Arguably, interlacing is
not very useful in computers, since
these work with text in most appli-
cations. Special displays with a rela-
tively long afterglow time are no
remedy for this awkward problem, and
that is why the present circuit was de-
signed. It effectively switches off the in- first second
terlace function, and so ensures a restful raster raster
display, albeit that the individual lines
that make up the characters become flyback
slightly more prominent. = = = (blanked)
Figure 1 shows that a TV picture is com-
posed of 625 lines divided between 2
rasters of 312.5 lines each. In an inter-
laced picture, these rasters are vertical-
ly shifted by one line. This is done by
starting the second raster x and a half
time later than the first raster. Inter-
lacing can thus be rendered ineffective
by starting the second raster half a line
period earlier (i.e., after 312 lines rather
2
.e 5V
R2
than 312.5). To retain the normal number P1
16
of lines (625), the second raster is ar- 5k
ranged to comprise 313 lines. IC 2 IC,
The ULA chip (Uncommitted Logic Ar- R1
•
O
ray) in the Electron computer provides a
horizontal and a composite synchroniz- C1 C2
ation signal, which are shown in Figs. 3a I 1— VSYNC
(HS) and 3b (CSYNC) respectively. With
reference to Fig. 3c, and the circuit
diagram in Fig. 2, MMVI forms a new
15
27n
14
9
—0 A
7
27n
6
12
•5 0—
O
H 0
vertical synchronization pulse, VS, with
the aid of the CSYNC signal. The period CSYNC MMV1 MMV2
of pulse VS is different for the first and 0
CSYNC
second raster, so that MMV2 is needed 0'0 CLR CLR 0
to make VSYNC equally long in both. 11
MMV2 is triggered on the first line
pulse (HS) that occurs when VS is active, HS
and is retriggered when VS goes low— HSYNC
see Fig. 3d. The length of the VSYNC
pulse so made is about 160 ps, or about 13 0
2.5 times the line time (64 ps). The HS MMV 1, MMV 2 = IC 1 = 74 HCT 123
and the new VS signal are combined in N1 .. N4 = IC 2 = 74 LS 86
XOR gate N2 for driving the video • 631
modulator. Gate Ni serves to buffer the moo
HS output of the ULA.
The final results obtained with the cir- 87485-3
cuit depend mainly on the type of TV
42 SUPPLEMENT
EE JULY/AUGUST 1988
3 set or display used, and may not be opti-
mum when the TV is driven via its RF in-
a) ULA HS put. On an older type monochrome set,
the central area of the picture was
b) first stable, but the upper and lower areas
ULA raster gave a less favourable look. Good
CSYNCi
second results were obtained, however, from
raster the use of Type TX chassis, which are
currently the basis of TV sets sold under
c) o f VSYNC many different names and licenses.
i
first raster Even better performance can be ex-
M MV 1 VSYNC pected from a video monitor, whose
second (TTL compatible) H and V synchroniz-
raster
ation inputs can be driven by N4 and N3
d) Q/MMV2 respectively. The polarity of the sync
signals can be selected with the aid of
e) 4/N2 CSYNC wire jumpers. Connections c and c'
result in VSYNC and HSYNC . The
choice between jumper a or b depends
11 = period of MMV 1 on the type of display used. Preset Pi is
12 = period of MMV 2 87485-2
adjusted until the picture appears ver-
tically synchronized: the adjustment is
fairly critical when jumper a is used.
The final results obtained with the cir-
•54
cuit can be judged from looking at a few
characters in the upper and lower area
•0 v V2
IC13
of the screen. The modest current con-
CCI VCC2 VCC2
CAS OUT
R13
10
923 1005 1.37.
Rn sumption of the circuit, 10 mA, makes it
105
2204 UK
CASSETTE
possible to power it direct from the
Electron computer.
CAS RC 03
as1
D. Sv CONVECT°.
1424 252
CAS MO E=1 l 06
BC 239
1016 C26
1nS
CAS •1 04
IC13 .1.P4
314 1.4n74
SV
ULA OV 6
403 0
n)D°
ma. ." LIP
R46 611R CSYNC
SOUND 0/P
ROB
R7
96M 04 1 +5v 6 031111EC T01 0 MMV1/1
2131
1__1 on
TART
• C9
IDF
5, Sv
CSYNC
OV 139 "'ALI
COT NC IMO 1 660 0 40 N2/6
BLUE 66 1=y1 741506 SxJ
R31 353
• BLUE
4 1=1
GREEN R32 150
; GREEN 1=, [1
1 00,1 61C 309 Or
RED RED
.111)t O
ICI -411-4-•-••
0, .
O CO 21
U SG9
534 MO
CLOCK
lx 0346 Oma 3 9 150 1 1 541 We.. "3
LEN LOT 526 OIR
443- 11 -I- 47
t56 152
OV vc, ~l 5x4
549 ONO
C7
3,9
Cw
4199 -T
r ?MA' W 1111-EM P4,
3-1C1:y=41
On 4.•44
I 0,
3435" 604 10
Ics
9 150
NEC NISC 5606
GREEN
ICIS
741.566
606 4a0P ,,,so a".
OWE
1-171 1 N I''S'C ONLY
IC16
743500
s. ICI I
744500
IC
744546
w•,C1.
IALSOL
1011
36304 9 COLOUR IILPST 12 Sus
no %LSO(
I=7 •
=1.J Ic1c NOT 11110
0 66001
ozw- 743500 ON NISC
Main PCB Circuit Diagram
HS
0 N1/1
87485-4
SUPPLEMENT 43
