03.10.

2022

VISVESVARAYA TECHNOLOGICAL UNIVERSITY, BELAGAVI

B.E: Electronics & Communication Engineering / B.E: Electronics & Telecommunication Engineering
NEP, Outcome Based Education (OBE) and Choice Based Credit System (CBCS)
(Effective from the academic year 2021 – 22)
VII Semester

Advanced VLSI
Course Code 21EC71 CIE Marks 50
Teaching Hours/Week (L:T:P:S) 3:0:0:1 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 3 Exam Hours 3
Course objectives:
 Learn overview of VLSI design flow
 Emphasise on Back end VLSI design flow
 Learn basics of verification with reference to System Verilog
Teaching-Learning Process (General Instructions)
The sample strategies, which the teacher can use to accelerate the attainment of the various course
outcomes are listed in the following:
1. Lecture method (L) does not mean only the traditional lecture method, but a different type of
teaching method may be adopted to develop the outcomes.
2. Show Video/animation films to explain the functioning of various techniques.
3. Encourage collaborative (Group) Learning in the class
4. Ask at least three HOTS (Higher-order Thinking) questions in the class, which promotes critical
thinking
5. Adopt Problem Based Learning (PBL), which fosters students’ Analytical skills, develop thinking
skills such as the ability to evaluate, generalize, and analyze information rather than simply recall
it.
6. Topics will be introduced in multiple representations.
7. Show the different ways to solve the same problem and encourage the students to come up with
their own creative ways to solve them.
8. Discuss how every concept can be applied to the real world - and when that's possible, it helps
improve the students' understanding.
Module-1
Introduction to ASICs: Full custom, Semi-custom and Programmable ASICs, ASIC Design flow, ASIC
cell libraries. CMOS Logic: Data path Logic Cells: Data Path Elements, Adders: Carry skip, Carry bypass,
Carry save, Carry select, Conditional sum, Multiplier (Booth encoding), Data path Operators, I/O cells,
Cell Compilers. Text Book 1
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Module-2
Floor planning and placement: Goals and objectives, Measurement of delay in Floor planning, Floor
planning tools, Channel definition, I/O and Power planning and Clock planning. Placement: Goals and
Objectives, Min-cut Placement algorithm, Iterative Placement Improvement, Time driven placement
methods, Physical Design Flow.
Routing: Global Routing: Goals and objectives, Global Routing Methods, Global routing between blocks,
Back annotation. Text Book 1
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3

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Module-3
Verification Guidelines: The verification process, basic test bench functionality, directed testing,
methodology basics, constrained random stimulus, randomization, functional coverage, test bench
components, layered testbench.
Data Types: Built in Data types, fixed and dynamic arrays, Queues, associative arrays, linked lists,
array methods, choosing a type, creating new types with type def, creating user defined structures,
type conversion, Enumerated types, constants and strings, Expression width.
Text Book 2
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Module-4
Procedural Statements and Routines: Procedural statements, Tasks, Functions and void functions,
Task and function overview, Routine arguments, returning from a routine, Local data storage, time
values.
Connecting the test bench and design: Separating the test bench and design, The interface construct,
Stimulus timing, Interface driving and sampling, System Verilog assertions.
Text Book 2
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Module-5
Randomization: Introduction, What to randomize? , Randomization in System Verilog, Random
number functions, Common randomization problems, Random Number Generators.
Functional Coverage: Coverage types, Coverage strategies, Simple coverage example, Anatomy of
Cover group and Triggering a Cover group, Data sampling, Cross coverage, Generic Cover groups,
Coverage options, Analyzing coverage data, measuring coverage statistics during simulation.
Text Book 2
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Course outcomes (Course Skill Set)
At the end of the course the student will be able to:
1. Understand VLSI design flow
2. Describe the concepts of ASIC design methodology
3. Create floor plan including partition and routing with the use of CAD algorithms
4. Will have better insights into VLSI back-end design flow
5. Learn verification basics and System Verilog
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%.
The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50). A student
shall be deemed to have satisfied the academic requirements and earned the credits allotted to each
subject/ course if the student secures not less than 35% (18 Marks out of 50) in the semester-end
examination (SEE), and a minimum of 40% (40 marks out of 100) in the sum total of the CIE (Continuous
Internal Evaluation) and SEE (Semester End Examination) taken together.
Continuous Internal Evaluation:
Three Unit Tests each of 20 Marks (duration 01 hour)
1. First test at the end of 5th week of the semester
2. Second test at the end of the 10th week of the semester
3. Third test at the end of the 15th week of the semester
Two assignments each of 10 Marks
4. First assignment at the end of 4th week of the semester
5. Second assignment at the end of 9th week of the semester

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VISVESVARAYA TECHNOLOGICAL UNIVERSITY, BELAGAVI

B.E: Electronics & Communication Engineering / B.E: Electronics & Telecommunication Engineering
NEP, Outcome Based Education (OBE) and Choice Based Credit System (CBCS)
(Effective from the academic year 2021 – 22)
VII Semester

Optical & Wireless Communication

Course Code 21EC72 CIE Marks 50
Teaching Hours/Week (L:T:P:S) 2:0:0:1 SEE Marks 50
Total Hours of Pedagogy 30 Total Marks 100
Credits 2 Exam Hours 3
Non-MCQ pattern of CIE and SEE
Course objectives:
This course will enable students to:
 Learn the basic principle of optical fiber communication with different modes of light propagation.
 Understand the transmission characteristics and losses in optical fiber.
 Study of optical components and its applications in optical communication networks.
 Understand the concepts of propagation over wireless channels from a physics standpoint
 Understand the multiple access techniques used in cellular communications standards.
 Application of Communication theory both Physical and networking to understand GSM systems that
handle mobile telephony.
Teaching-Learning Process (General Instructions)
The sample strategies, which the teacher can use to accelerate the attainment of the various course
outcomes are listed in the following:
1. Lecture method (L) does not mean only the traditional lecture method, but a different type of
teaching method may be adopted to develop the outcomes.
2. Show Video/animation films to explain the functioning of various techniques.
3. Encourage collaborative (Group) Learning in the class
4. Ask at least three HOTS (Higher-order Thinking) questions in the class, which promotes critical
thinking
5. Adopt Problem Based Learning (PBL), which fosters students’ Analytical skills, develop thinking
skills such as the ability to evaluate, generalize, and analyze information rather than simply recall
it.
6. Topics will be introduced in multiple representations.
7. Show the different ways to solve the same problem and encourage the students to come up with
their own creative ways to solve them.
8. Discuss how every concept can be applied to the real world - and when that's possible, it helps
improve the students' understanding.
Module-1
Optical Fiber Structures: Optical Fiber Modes and Configurations, Mode theory for circular
waveguides, Single mode fibers, Fiber materials.
Attenuation and Dispersion: Attenuation, Absorption, Scattering Losses, Bending loss, Signal
Dispersion: Modal delay, Group delay, Material dispersion.
[Text1 : 3.1, 3.2, 2.3[2.3.1 to 2.3.4], 2.4[2.4.1, 2.4.2],2.5, 2.7].
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Module-2
Optical Sources and detectors: Light Emitting Diode: LED Structures, Light source materials,
Quantum efficiency and LED power, Laser Diodes: Modes and threshold conditions, Rate equations,
External quantum efficiency, Resonant frequencies, Photodetectors: The pin Photodetector, Avalanche
Photodiodes.

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WDM Concepts: Overview of WDM, Isolators and Circulators, Fiber grating filters, Dielectric thin-film
filters, Diffraction Gratings.
[Text1: 4.2 ,4.3, 6.1, 10.1, 10.3, 10.4, 10.5, 10.7]
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Module-3
Mobile Communication Engineering: Wireless Network generations, Basic propagation Mechanisms,
Mobile radio Channel.
Principles of Cellular Communications: Cellular terminology, Cell structure and Cluster, Frequency
reuse concept, Cluster size and system capacity, Frequency Reuse Distance, Cochannel Interference and
signal quality.
[ Text2: 1.4, 2.4, 2.5, 4.1 to 4.4, 4.6, 4.7]
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Module-4
Multiple Access Techniques: FDMA, TDMA, CDMA, SDMA, Hybrid Multiple Access Techniques,
Multicarrier Multiple Access Schemes.
A Basic Cellular System: A basic cellular system connected to PSTN, Parts of basic cellular system,
Operation of a cellular system.
[Text2: 8.2, 8.3, 8.4.5, 8.5, 8.6, 8.10, 9.2.2, 9.2.3, 9.3]
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Module-5
Global System for Mobile (GSM): GSM Network Architecture, GSM signalling protocol architecture,
Identifiers used in GSM system, GSM Channels, Frame structure for GSM, GSM Call procedures, GSM
hand-off Procedures, GSM Services and features.
[Text2: 11.1, 11.2,11.3,11.4, 11.5, 11.8, 11.9. 11.10]
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Course outcomes (Course Skill Set)
At the end of the course the student will be able to:
1. Classification and characterization of optical fibers with different modes of signal propagation.
2. Describe the constructional features and the characteristics of optical fiber and optical devices
used for signal transmission and reception.
3. Understand the essential concepts and principles of mobile radio channel and cellular
communication.
4. Describe various multiple access techniques used in wireless communication systems.
5. Describe the GSM architecture and procedures to establish call set up, call progress handling and
call tear down in a GSM cellular network.
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%.
The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50). A student
shall be deemed to have satisfied the academic requirements and earned the credits allotted to each
subject/ course if the student secures not less than 35% (18 Marks out of 50) in the semester-end
examination (SEE), and a minimum of 40% (40 marks out of 100) in the sum total of the CIE (Continuous
Internal Evaluation) and SEE (Semester End Examination) taken together
Continuous Internal Evaluation (CIE):
CIE will be the same as other core theory courses.

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VISVESVARAYA TECHNOLOGICAL UNIVERSITY, BELAGAVI

B.E: Electronics & Communication Engineering / B.E: Electronics & Telecommunication Engineering
NEP, Outcome Based Education (OBE) and Choice Based Credit System (CBCS)
(Effective from the academic year 2021 – 22)
VII Semester

DSP Algorithms & Architecture

Course Code 21EC733
21EC723 CIE Marks 50
Teaching Hours/Week (L:T:P:S) 3:0:0:1 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 3 Exam Hours 3
Course objectives:
This course will enable the students to
 Understand the concepts of digital signal processing techniques.
 Understand the computational building blocks of DSP processors and its speed issues.
 Understand the various addressing modes, peripherals, interrupts and pipelining structure of the
TMS320C54xx processor.
 Learn how to interface the external devices to the TMS320C54xx processor in various modes.
 Understand DSP algorithms and applications with their implementation using TMS320C54xx
processor.
Teaching-Learning Process (General Instructions)
The sample strategies, which the teacher can use to accelerate the attainment of the various course
outcomes are listed in the following:
1. Lecture method (L) does not mean only the traditional lecture method, but a different type of
teaching method may be adopted to develop the outcomes.
2. Show Video/animation films to explain the functioning of various techniques.
3. Encourage collaborative (Group) Learning in the class
4. Ask at least three HOTS (Higher-order Thinking) questions in the class, which promotes critical
thinking
5. Adopt Problem Based Learning (PBL), which fosters students’ Analytical skills, develop thinking
skills such as the ability to evaluate, generalize, and analyze information rather than simply recall
it.
6. Topics will be introduced in multiple representations.
7. Show the different ways to solve the same problem and encourage the students to come up with
their own creative ways to solve them.
8. Discuss how every concept can be applied to the real world - and when that's possible, it helps
improve the students' understanding.
Module-1
Introduction to Digital Signal Processing: Introduction, A Digital Signal – Processing system, Major
features of programmable Digital signal processors, The Sampling Process, Discrete Time Sequences,
Discrete Fourier Transform (DFT) and Fast Fourier Transform (FFT), Linear Time-Invariant Systems,
Digital Filters, Decimation and Interpolation.
Section 1.3, 2.1 to 2.8 of Text 1
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Module-2
Architectures for Programmable Digital Signal Processing Devices: Introduction, Basic
Architectural Features, DSP Computational Building Blocks, Bus Architecture and Memory, Data
Addressing Capabilities, Address Generation Unit, Programmability and Program Execution, Speed
Issues, Features for External Interfacing.
Section 4.1 to 4.9 of Text 1
Teaching-Learning Chalk and talk method, Power point presentation

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Process RBT Level: L1, L2, L3

Module-3
Programmable Digital Signal Processors: Introduction, Commercial Digital Signal-processing
Devices, Data Addressing Modes of TMS32OC54XX, Memory Space of TMS32OC54xx Processors,
Program Control. Detail Study of TMS320C54X & 54xx Instructions and Programming, On – Chip
Peripherals, Interrupts of TMS32OC54XX Processors, Pipeline Operation of TMS32OC54xx Processor.
Section 5.1 to 5.10 of Text 1
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Module-4
Implementation of Basic DSP Algorithms: Introduction, The Q – notation, FIR Filters, IIR Filters,
Interpolation and Decimation Filters (one example in each case).
Implementation of FFT Algorithms: Introduction, An FFT Algorithm for DFT Computation, Overflow
and Scaling, Bit – Reversed Index. Generation & Implementation on the TMS32OC54xx.
Section 7.1 to 7.6 and 8.1 to 8.6 of Text 1
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Module-5
Interfacing Memory and Parallel I/O Peripherals to Programmable DSP Devices: Introduction,
Memory Space Organization, External Bus Interfacing Signals. Memory Interface, Parallel I/O Interface,
Programmed I/O, Interrupts and I/O Direct Memory Access (DMA).
Interfacing and Applications of DSP Processors: Introduction, Synchronous Serial Interface, A
CODEC Interface Circuit, DSP Based Bio-telemetry Receiver, A Speech Processing System, An Image
Processing System.
Section 9.1 to 9.8, 10.1 to 10.5 and11.1 to 11.5 of Text 1
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Course outcome (Course Skill Set)
At the end of the course the student will be able to:
1. Comprehend the knowledge & concepts of digital signal processing techniques.
2. Apply knowledge of various types of addressing modes, interrupts, peripherals and pipelining
structure of TMS320C54xx processor.
3. Develop assembly language programs to implement FIR, IIR filters and FFT algorithms.
4. Build the Applications on Programmable DSP devices.
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%.
The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50). A student
shall be deemed to have satisfied the academic requirements and earned the credits allotted to each
subject/ course if the student secures not less than 35% (18 Marks out of 50) in the semester-end
examination (SEE), and a minimum of 40% (40 marks out of 100) in the sum total of the CIE (Continuous
Internal Evaluation) and SEE (Semester End Examination) taken together.
Continuous Internal Evaluation:
Three Unit Tests each of 20 Marks (duration 01 hour)
1. First test at the end of 5th week of the semester
2. Second test at the end of the 10th week of the semester
3. Third test at the end of the 15th week of the semester
Two assignments each of 10 Marks
4. First assignment at the end of 4th week of the semester
5. Second assignment at the end of 9th week of the semester
Group discussion/Seminar/quiz any one of three suitably planned to attain the COs and POs for 20

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VISVESVARAYA TECHNOLOGICAL UNIVERSITY, BELAGAVI

B.E: Electronics & Communication Engineering / B.E: Electronics & Telecommunication Engineering
NEP, Outcome Based Education (OBE) and Choice Based Credit System (CBCS)
(Effective from the academic year 2021 – 22)
VII Semester

IoT & Wireless Sensor Networks

Course Code 21EC741
21EC731 CIE Marks 50
Teaching Hours/Week (L:T:P:S) 3:0:0:0 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 3 Exam Hours 3
Course objectives:
 To provide an exposure to the broad perspective of Internet of Things with respect to the
characteristics, design, technologies and applications.
 To provide a basic understanding of the important aspects of Wireless sensor networks covering
applications, sensor and transmission technology & systems, middleware, performance and traffic
management.
Teaching-Learning Process (General Instructions)
The sample strategies, which the teacher can use to accelerate the attainment of the various course
outcomes are listed in the following:
1. Lecture method (L) does not mean only the traditional lecture method, but a different type of
teaching method may be adopted to develop the outcomes.
2. Show Video/animation films to explain the various concepts.
3. Encourage collaborative (Group) Learning in the class
4. Ask at least three HOTS (Higher-order Thinking) questions in the class, which promotes critical
thinking
5. Adopt Problem Based Learning (PBL), which fosters students’ Analytical skills, develop thinking
skills such as the ability to evaluate, generalize, and analyze information rather than simply recall
it.
6. Topics will be introduced in multiple representations.
7. Show the different ways to solve the same problem and encourage the students to come up with
their own creative ways to solve them.
8. Discuss how every concept can be applied to the real world - and when that's possible, it helps
improve the students' understanding.
Module-1
Internet of Things: Introduction, Physical design, Logical design, Enabling technologies, Levels &
deployment templates.
Text 1: Chapter 1
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Module-2
Domain Specific IoTs: Home automation, cities, environment, energy, retail, logistics, agriculture,
industry, health & lifestyle.
Text 1: Chapter 2
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Module-3
Wireless Sensor Networks: Introduction, applications of sensor networks, basic overview of the
technology, basic sensor network architectural elements, present day sensor network research,
challenges and hurdles, examples of Category 2 WSN applications, examples of Category 1 WSN
applications

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Text 2: Chapter 1 – 1.1, 1.1.2, 1.2, 1.2.1, 1.2.2 (phase 4), 1.2.3 Chapter 2: 2.4, 2.5
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Module-4
Wireless sensor technology: Introduction, sensor node technology – overview, hardware and
software, sensor taxonomy, WN operating environment, WN trends.
Wireless Transmission technology and systems: Introduction, Campus applications, MAN/WAN
applications.
Text 2: Chapter 3: 3.1, 3.2 – 3.2.1, 3.2.2, 3.3, 3.4, 3.5 Chapter 4: 4.1, 4.3.1, 4.3.2
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Module-5
Middleware for WSNs: Introduction, principles, architecture, data related functions
Performance and traffic management: background, WSN Design issues, performance modelling of
WSNs.
Text 2: Chapter 8: 8.1, 8.2, 8.3, 8.3.1 Chapter 11: 11.2, 11.3, 11.4
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Course outcome (Course Skill Set)
At the end of the course the student will be able to:
1. Understand the characteristics, building blocks, enabling technologies of the IoT systems
2. Describe the characteristics and applications of domain specific IoTs.
3. Discuss the overview of the Wireless sensor networks characteristics and applications.
4. Present the sensor, transmission technology and systems associated with WSN.
5. Understand the concepts of middleware, performance evaluation and traffic management in WSN.
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%.
The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50). A student
shall be deemed to have satisfied the academic requirements and earned the credits allotted to each
subject/ course if the student secures not less than 35% (18 Marks out of 50) in the semester-end
examination (SEE), and a minimum of 40% (40 marks out of 100) in the sum total of the CIE (Continuous
Internal Evaluation) and SEE (Semester End Examination) taken together.

Continuous Internal Evaluation:

Three Unit Tests each of 20 Marks (duration 01 hour)
1. First test at the end of 5th week of the semester
2. Second test at the end of the 10th week of the semester
3. Third test at the end of the 15th week of the semester
Two assignments each of 10 Marks
4. First assignment at the end of 4th week of the semester
5. Second assignment at the end of 9th week of the semester
Group discussion/Seminar/quiz any one of three suitably planned to attain the COs and POs for 20
Marks (duration 01 hours)
6. At the end of the 13th week of the semester
The sum of three tests, two assignments, and quiz/seminar/group discussion will be out of 100 marks
and will be scaled down to 50 marks
(to have less stressed CIE, the portion of the syllabus should not be common /repeated for any of the
methods of the CIE. Each method of CIE should have a different syllabus portion of the course).
CIE methods /question paper is designed to attain the different levels of Bloom’s taxonomy as per

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