Q. No.

1) Explain single-register load-store addressing modes i)Pre index with write back ii)Pre index
iii)Post index
Q. No. 2) Explain the following ARM instructions i)SWP ii)SWPB iii)MRS iv)MSR
Example for SWPB is

Before Execution (PRE):

• Memory at address 0x9000: 0x12345678

• r0 = 0x00000000
• r1 = 0x11112222
• r2 = 0x00009000

SWP r0, r1, [r2]

After Execution (POST):

• Memory at address 0x9000: 0x11112222

• r0 = 0x12345678
• r1 = 0x11112222
• r2 = 0x00009000
Q. No. 3) Explain the following ARM instructions i)BL ii)BX iii)LDMIA r0!,{r0-r3}
Example:

Initial Setup:

Assume:

• Register r1 contains the address 0x80000001 (a Thumb code address).

Instruction:

BX r1

Execution Steps:

1. The value in r1 (0x80000001) is read.

2. The processor checks the LSB:
o LSB = 1: Switches to Thumb mode.
3. The program execution jumps to address 0x80000000 (ignores the LSB for actual address
computation).

LDMIA Instruction Explanation

The LDMIA (Load Multiple Increment After) instruction is used to

• The instruction loads values from memory into multiple registers one by one.
• After loading, the base address register (r0) is updated to point to the next memory
location.

Syntax:
LDMIA Rn!, {register_list}
• LDMIA: Load Multiple Increment After.
• Rn: Base register holding the starting memory address.
• !: Write-back, updates Rn with the new address after the instruction.
• {register_list}: List of registers to load values into, e.g., {r0-r3}.

Ex

Memory:

• Memory[0x1000] = 10
• Memory[0x1004] = 20
• Memory[0x1008] = 30
• Memory[0x100C] = 40

Registers (Before Execution):

• r0 = 0x1000 (Base register)

• r1, r2, r3 = 0 (Registers to be loaded)

Instruction:
LDMIA r0!, {r1-r3}

Registers (After Execution):

• r0 = 0x100C (Updated base register)

• r1 = 10
• r2 = 20
• r3 = 30

Q. No. 4) Explain the following ARM instructions i)LDR r0,[r1] ii)STR r0,[r1] ii)LDR r0,[r1,#2] iii)STR
r0,[r1,#4]

i) LDR r0, [r1]

The LDR (Load Register) instruction loads a word (32-bit value) from memory into a
register. The address is specified in the base register (r1 in this case).

Syntax:

LDR r0, [r1]

• r0: Destination register.

• [r1]: Address in r1 from where the value will be loaded.

Example:

• Memory: Memory[0x1000] = 0x12345678

• Registers (Before Execution): r1 = 0x1000, r0 = 0.

Instruction:
LDR r0, [r1]
Execution:

1. r0 = Memory[0x1000] = 0x12345678.

Registers (After Execution):

• r1 = 0x1000 (unchanged)
• r0 = 0x12345678.

ii) STR r0, [r1]

The STR (Store Register) instruction stores a word (32-bit value) from a register into
memory. The address is specified in the base register (r1).
Syntax:

STR r0, [r1]

• r0: Source register.

• [r1]: Address in r1 where the value will be stored.

Example:

• Registers (Before Execution): r1 = 0x2000, r0 = 0x87654321.

• Memory (Before Execution): Memory[0x2000] = 0.

Instruction:
STR r0, [r1]
Execution:

1. Memory[0x2000] = r0 = 0x87654321.

Registers (After Execution):

• r1 = 0x2000 (unchanged).
• Memory (After Execution): Memory[0x2000] = 0x87654321.

iii) LDR r0, [r1, #2]

The LDR instruction here loads a word from an offset address. The offset value #2 is added
to the base address (r1) before accessing the memory.

Syntax:

LDR r0, [r1, #offset]

• r0: Destination register.

• [r1, #2]: Address is r1 + 2.

Example:

• Memory: Memory[0x1002] = 0x56789ABC.

• Registers (Before Execution): r1 = 0x1000, r0 = 0.

Instruction:
LDR r0, [r1, #2]
Execution:

1. Effective address = r1 + 2 = 0x1002.

2. r0 = Memory[0x1002] = 0x56789ABC.

Registers (After Execution):

 • r1 = 0x1000 (unchanged).
• r0 = 0x56789ABC.

iv) STR r0, [r1, #4]

The STR instruction here stores a word from a register to memory at an offset address. The
offset value #4 is added to the base address (r1) before storing.

Syntax:

STR r0, [r1, #offset]

• r0: Source register.

• [r1, #4]: Address is r1 + 4.

Example:

• Registers (Before Execution): r1 = 0x2000, r0 = 0xABCDEF01.

• Memory (Before Execution): Memory[0x2004] = 0.

Instruction:
STR r0, [r1, #4]
Execution:

1. Effective address = r1 + 4 = 0x2004.

2. Memory[0x2004] = r0 = 0xABCDEF01.

Registers (After Execution):

• r1 = 0x2000 (unchanged).
• Memory (After Execution): Memory[0x2004] = 0xABCDEF01
Q. No. 5) Explain the elements of an embedded system with neat block diagram

1. System Core

• The central part of the embedded system, which processes data and coordinates all
activities.
• It usually includes:
o Processor: Executes instructions and performs computations.
o Controller: Manages and controls the flow of data between other components.

2. Memory

• Used for storing program instructions and temporary data.

o Program Memory: Holds the firmware or application code.
o Data Memory: Stores temporary variables and intermediate results during
execution.

3. Input Ports

• These allow the system to receive data or signals from external sources such as sensors,
buttons, or other devices.
• Example: A temperature sensor providing input to the system.

4. Output Ports

• Used to send processed data or signals to external devices.

 • Example: Controlling an LED, a motor, or displaying data on a screen.

5. Other Devices

• Includes additional components or peripherals required for specific tasks, such as:
o Timers: For scheduling tasks.
o Communication Modules: To interact with other systems (e.g., UART, SPI, or I2C).
o Power Supply: Ensures all components receive the necessary electrical power.

Flow of Operation

1. Input Data: Comes into the system via input ports.

2. Processing: The system core processes the data using instructions stored in memory.
3. Output Data: The result is sent to output ports to control devices or provide feedback.
4. Other Devices: Assist in system-specific tasks such as communication or real-time scheduling

Q. No. 6) Mention the differences between RISC and CISC architecture

RISC (Reduced Instruction Set CISC (Complex Instruction Set

Feature
Computing) Computing)
Instruction Small, simple, and highly optimized Large, complex set of
Set instruction set. instructions.
Instruction Uniform instruction length (usually 1 Variable instruction
Format word). length.
Execution Instructions typically take one cycle Instructions may take multiple cycles
Time to execute. to execute.
Complexity of Simple and straightforward, More complex instructions that can
Instructions requiring fewer cycles. perform multiple tasks.
Use of Often requires more memory accesses Can perform more operations per
Memory (due to simpler instructions). instruction, reducing memory accesses.
Number of Large number of general-purpose registers (to Fewer registers, heavily
Registers minimize memory access). reliant on memory.
Addressing Few addressing modes (e.g., Many addressing modes (e.g., direct,
Modes register, immediate). indirect, indexed).
Instruction Easier to decode and execute More complex decoding due to variety
Decoding due to simplicity. of instruction formats.
Pipeline Highly efficient with pipelining (due Pipelining less efficient due to
Efficiency to simple instructions). variable instruction lengths.
Examples of Processors ARM, MIPS, SPARC. Intel x86, VAX, Zilog Z80.
7) Illustrate big-endian and little-endian formats with necessary sketch

Big-Endian and Little-Endian Formats

In computer architecture, Endianness refers to the order in which bytes are arranged in
memory. There are two primary formats for this arrangement: Big-Endian and Little-
Endian.

1. Big-Endian Format

In the Big-Endian format, the most significant byte (MSB) of a word is stored at the lowest
memory address.

• The MSB is stored first.

• For example, in a 4-byte (32-bit) value, the first byte (highest byte) is placed at the first
memory address, the second byte at the next address, and so on.

Illustration:

For the 32-bit hexadecimal number 0x12345678, the bytes will be stored as:

Memory Address Value (Byte)

0x00 0x12

0x01 0x34

0x02 0x56

0x03 0x78

So, the bytes are stored in memory as:

Memory: 0x12 0x34 0x56 0x78 (Big-Endian)

In this case, the most significant byte (0x12) is stored at the lowest address.

2. Little-Endian Format

In the Little-Endian format, the least significant byte (LSB) of a word is stored at the
lowest memory address.

• The LSB is stored first.

• For example, in a 4-byte (32-bit) value, the last byte (lowest byte) is placed at the first
memory address, and the most significant byte follows.

Illustration:
For the 32-bit hexadecimal number 0x12345678, the bytes will be stored as:

Memory Address Value (Byte)

0x00 0x78

0x01 0x56

0x02 0x34

0x03 0x12

So, the bytes are stored in memory as:

Memory: 0x78 0x56 0x34 0x12 (Little-Endian)

In this case, the least significant byte (0x78) is stored at the lowest address.

Q. No. 8) Explain different types storage devices used in the embedded system (both ROM and RAM)

1. ROM (Read-Only Memory)

ROM is a non-volatile memory, meaning it retains its data even when the power is turned
off. It is primarily used to store the firmware (permanent software programmed into the
system) in embedded systems. There are several types of ROM used in embedded systems:

Types of ROM:

• Mask ROM (MROM):

o Description: This is the most basic form of ROM, where data is permanently written
during the manufacturing process.
o Use: It is used when the data is known and does not need to be changed (e.g.,
firmware for a device).
o Characteristics:
▪ Slow write speed (if even possible).
▪ Data cannot be modified after production.
• PROM (Programmable ROM):
o Description: PROM is a type of ROM that can be programmed by the user after
manufacturing using a special device (programmer).
o Use: It is used for custom applications where the data needs to be written once and
can’t be altered afterward.
o Characteristics:
▪ Can be programmed once.
▪ Data is written with high voltage (called "burning").
• EPROM (Erasable Programmable ROM):
o Description: EPROM can be erased and reprogrammed. Data is erased by exposing
the chip to ultraviolet (UV) light.
o Use: Common in systems where the software might need updates or modifications.
o Characteristics:
 ▪ Can be erased using UV light and then reprogrammed.
▪ It can be reused multiple times, but requires external equipment for erasing.
• EEPROM (Electrically Erasable Programmable ROM):
o Description: EEPROM allows data to be erased and reprogrammed electrically. It is
more flexible than EPROM because it doesn’t require UV light to erase data.
o Use: Used in applications where the data needs to be updated frequently, such as
storing configuration data.
o Characteristics:
▪ Erased and reprogrammed electrically.
▪ Slower write speeds and more limited write cycles compared to other forms
of memory.
• Flash Memory:
o Description: Flash memory is a type of EEPROM that is faster and more reliable. It is
widely used in embedded systems to store large amounts of data.
o Use: Often used to store firmware, bootloaders, or large datasets in embedded
systems.
o Characteristics:
▪ Non-volatile (retains data without power).
▪ Can be electrically erased and reprogrammed.
▪ Common in SD cards, USB drives, and in-circuit programming for embedded
systems.

2. RAM (Random Access Memory)

RAM is a volatile memory, meaning it loses its contents when the power is turned off. It is
used to store data and variables that are actively used by the system during operation.

Types of RAM:

• SRAM (Static RAM):

o Description: SRAM uses flip-flops to store data. It is faster and requires less power
than DRAM, but it is more expensive.
o Use: Often used for small data storage such as cache memory or in systems that
require high-speed memory access.
o Characteristics:
▪ Fast read and write speeds.
▪ Consumes more power compared to DRAM.
▪ More expensive due to its complexity.
• DRAM (Dynamic RAM):
o Description: DRAM stores data as charges in capacitors, which need to be
periodically refreshed to maintain the data.
o Use: Used for larger memory storage in embedded systems where speed is not the
most critical factor.
o Characteristics:
▪ Slower than SRAM but offers higher memory density and lower cost.
▪ Requires periodic refreshing to maintain the stored data.
▪ Common in systems with higher memory requirements, such as multimedia
processing.
Q. No. 10) Differentiate Embedded Vs General computing system

Aspect Embedded System General Computing System

Purpose Specific task or set of tasks General-purpose, multi-tasking

Specialized hardware for specific General-purpose hardware (CPU, RAM,

Hardware
tasks etc.)

Software Firmware, embedded software Operating systems (Windows, Linux, etc.)

User Interaction Little to no user interaction Extensive user interaction

Operating System Real-time or none Full operating systems

Power
Low power consumption Higher power consumption
Consumption

Real-Time
Often real-time Not real-time, non-strict timing
Operation

Size and Complexity Small, low-complexity Larger, more complex

Cost Low cost Higher cost

Examples Washing machines, medical devices PCs, laptops, servers, gaming consoles