NAME NAGARJUN S

ROLL NUMBER 2114501172

PROGRAM BACHELOR OF COMPUTER APPLICATIONS BCA
SEMESTER 03
COURSE CODE DCA2103
SUBJECT Computer Organisation
ASSIGNMENT INTERNAL ASSIGNMENT SET-1 & 2

SET-I

Q. No. 1. Discuss Booth's multiplication algorithm, trace the steps for multiplying (-
7)*(+3).
Ans:

Booth’s algorithm is a multiplication algorithm that multiplies two signed binary

numbers in 2’s complement notation.

Booth used desk calculators that were faster at shifting than adding and created the algorithm to
increase their speed. Booth’s algorithm is ofi interest in the study ofi computer architecture.
Examples:

Input : 0110, 0010

Output :

qn q[n+1] AC
QR sc(step count)

initial
0000 0010 4

0 0 rightShift
0000 0001 3
 1 0 A= A -
BR 1010

rightShift
1101 0000 2

0 1 A= A +
BR 0011

rightShift
0001 1000 1

0 0 rightShift
0000 1100 0

Result=1100

Algorithm :

Put multiplicand in BR and multiplier in QRi

and then the algorithm works as per the following conditions :

1. Ifi Qn and Qn+1 are same i. e. 00 or 11 perform arithmetic shift by 1 bit.

2. Ifi Qn Qn+1 = 01 do A= A + BRi and perform arithmetic shift by 1 bit.

3. Ifi Qn Qn+1 = 10 do A= A – BR and perform arithmetic shift by 1 bit.

Here we have two numbers, 7 and 3. we need to convert 7 and 3 into binary numbers like 7
= (0111) and 3 = (0011). Now set 7 (in binary 0111) as multiplicand (M) and 3 (in binary
0011) as a multiplier (Q). And SC (Sequence Count) represents the number ofi bits, and here we
have 4 bits, so set the SC = 4. Also, it

Qn Qn +i 1 M = (0111) AC Q Qn + 1 SC
M' + 1 = (1001) & Operation
 1 0 Initial 0000 0011 0 4

Subtract (M' + 1) 1001

1001

Perform Arithmetic Right Shift operations 1100 1001 1 3

(ashr)
1 1 Perform Arithmetic Right Shift operations 1110 0100 1 2
(ashr)
0 1 Addition (A + M) 0111

0101 0100

Perform Arithmetic right shift operation 0010 1010 0 1

0 0 Perform Arithmetic right shift operation 0001 0101 0 0

The numerical example ofi the Booth's Multiplication Algorithm is 7 x 3 = 21 and the
binary representation ofi 21 is 10101. Here, we get the resultant in binary 00010101.
Now we convert it into decimal, as (000010101)10 = 2*4 + 2*3 + 2*2 + 2*1 + 2*0 =>
21.

Q. No. 2. Write a note on the following addressing modes:

i) Direct Addressing ii) Indirect Addressing iii) Register Addressing iv) Register
Indirect Addressing
Ans:

i) Direct addressing mode:

The addressing mode in which the effective address ofi the memory location is
written directly in the instruction.

Example:
MOV AX, [1592H], MOV AL, [0300H]
ii) Indirect Addressing
It is a scheme in which the address specifies which memory word or register
contains not the operand but the address of the operand.

Example:
LOAD R1, @R2

iii) Register Addressing

It addressing mode indicates the operand data is stored in the register itself, so
the instruction contains the address of the register. The data would be retrieved
from the register. Here's how this would work.

Example:
MOV AX,CX

iv)Register Indirect Addressing

I this mode, the instruction specifies the register whose contents give us the
address of operand which is in memory.

Example:
LDAX B

Q. No. 3. Discuss the organization ofi main memory.

Ans:

The main memory acts as the central storage unit in a computer system. It is a
relatively large and fast memory which is used to store programs and data during the
run time operations.

The primary technology used fori the main memory is based on semiconductori
integrated circuits. The integrated circuits for the main memory

RAM (Random Access Memory) integrated circuit chips:

The RAM integrated circuit chips are further classified into two possible operating
modes, static and dynamic.

The primary compositions ofi a static RAM are flip-flops that store the binary information.
The nature ofi the stored information is volatile, i The static RAM is easy to use and
takes lesstime performing read and write operations as compared to dynamic RAM.

RAM chips are available in a variety ofi sizes and are used as per the system
requirement. The following block diagram demonstrates the chip interconnection in a
128 * 8 RAM chip.

 A 128 * 8 RAM chip has a memory capacity ofi 128 words ofi eight bits (one
byte) peri word. This requires a 7-bit address and an 8-bit bidirectional data bus.
 The 8-bit bidirectional data bus allows the transfer ofi data either from memory
to CPU during a read operation or from CPU to memory during a write
operation.
  The read and write inputs specify the memory operation, and the two chip select(CS)
control inputs are for enabling the chip only when the microprocessor selects it.
 e ofi the three possible states which include a signal equivalent to logic 1, a
signal equal to logic 0, or a high-impedance state.

ROM (Read Only Memory) integratedn circuit chips:

The primary component of the main memory is RAM integrated circuit chips, but aportion
of memory may be constructed with ROM chips.

A ROM memory is used for keeping programs and data that are permanently resident
in the computer.

Apart from the permanent storage o f data, the ROM portion o f main memory is
needed for storing an initial program called a bootstrap loader. The primary function
o f the bootstrap loader program is to start the computer software operating when power is
turned on.
ROM chips are also available in a variety ofi sizes and are also used as per the
system requirement. The following block diagram demonstrates the chip
interconnectionin a 512 * 8 ROM chip.

 A ROM chip has a similar organization as a RAM chip. However, a ROM can
only perform read operation; the data bus can only operate in an output mode.
 SET-II

Q. No. 4. Explain the process ofi fetching a word from the memory.
Ans:

CPU transfers the address o f the needed information word to the memory address
register(MAR). Address ofi the needed word is transferred to the primary memory.

● In the meantime, the CPU uses the control lines ofi the memory bus to mention
that a read operation is needed.
● Afteri issuing this request, the CPU waits till it retains an answer from the
memory, informing it that the required function has been finished. It is
accomplished through the use ofi another control signal on the memory bus,
which will be denoted as Memory Function Completed (MFC).
● The memory sets this signal to one to mention that the contents ofi the
particular location in the memory have been read and are available on the data
lines ofi the memory bus.
● We will suppose that as soon as the MFC signal is set to one, the information
on the data lines is loaded into
● MDR and is therefore available fori use inside the CPU. It finishes the memory
fetch operation.
 The actions required for instruction Move (R1), R2 are:

MAR - [R1]

Begin Read operation on the memory bus

Wait for the response ofi the MFC from the memory
Load MDR from the memory bus
R2 - [MDR]
Signals activated fori that problem are:

WMFC MDRoutR1out,
MARin,
Read MDRinE, , R2in

Q. No. 5. What is Interrupt driven I/O? Explain its full working through flowchart.
Ans:

Interrupt driven I/O is an approach to transfer data between ‘memory’ and ‘I/O devices’
through the ‘processor’. The otheri two techniques for the same are programmed I/O and
direct memory access (DMA). The interrupt-driven I/O involves the use ofi interrupt to
exchange data between I/O and memory.
programmed I/O we have seen it is a processor who keeps on checking whether the I/O
module is ready for reception and transmission ofi data or whether the I/O module has completed
the desired task or not. This long waiting ofi the processor deteriorates the performance ofi the
system.

To improve the performance ofi the system an alternative approach can be used where
after issuing the I/O command to the I/O module the processor can get itselfi busy doing
some otheri work. In this way, the valuable time ofi the processor can be utilized.
 1. So let’s again start, to retrieve data from the I/O module the processor issues a
READ command and proceeds in doing something else.
For example, it starts executing some other program as it may be working on multiple
programs at a time.

2. As we know that whenever the processor is executing any program, after every
instruction cycle it checks for interrupts that have occurred. Ifi it finds the pending
interrupts it responds and serves the occurred interrupt.

3. The moment processor finds the interrupts by the I/O module, it suspends its current
execution and saves the context (e. g. , program counter, processor register) to serve the
interrupt.

4. Now processor request data from the I/O module and accept the word ofi data over
the data line. The processor stores this data onto the memory and restores the context
ofi the program it was working on and resumes its execution.

The figure shows you how with the help ofi interrupt I/O the data transfer is carried
out between memory and I/O. Though it is more efficient than programmed I/O still it
wastes some ofi the processor’s time. As the transferi ofi data from memory to the I/O
module or from the I/O module to memory passes through the processor.

Q. No. 6. What is synchronous and asynchronous data transfer? Discuss in detail.

Ans:

What is Synchronous Transmission?

Synchronous transmission is an effective and dependable method ofi sending huge
amounts ofi data. The data travels in a full-duplex method in the type ofi frames or
blocks in Synchronous Transmission. The transmitter and receiver must be synced so
that the sender knows where to start the new byte. As a result, every data block is
marked with synchronization characters, and the receiving device obtains the data until
a certain ending character is found.

It also allows connected devices to interact in real time. Synchronous transmission

can be seen in chat rooms, video conferencing, telephonic talks, and face-to-face
interactions. It utilizes the broad-band and voice band channels because they enable
quicker speeds ofi up to 1200 bps and meet the objective ofi high data transfer speed.

Advantages
---------------------------------------------------------------------------------------------------------------------------------------
 ● It aids the user in transferring a huge amount ofi data.
● Every byte is sent without a pause before the next.
● It also helps to reduce timing errors.
● It allows connected devices to communicate in real-time.

Disadvantages

● The sender and receiver must operate at the same clock frequency simultaneously.
● The accuracy ofi the received data is determined by the receiver's capacity to
count the received bits precisely.

What is Asynchronous Transmission?

Asynchronous transmission is also referred to as start and stop transmission. It sends
data from the transmitter to the receiver using the flow control approach and
synchronizes data between the source and destination without utilizing a clock.

This transmission technique sends 8 bits or one letter at a time and it also transmits the stop
bit when the character is sent. The total number ofi bits is 10, including the character,
start, and stop bits. It employs character-based synchronization for the receiving
terminal to synchronize with receiving data on a character. It is easy, quick, and
inexpensive and doesn't need two-way communication. Asynchronous transmission is
demonstrated via letters, televisions, emails, forums, and radios.

Asynchronous transmission makes use ofi voice-band channels that are narrow and
operate at a slower speed.

Advantages

● It doesn't require synchronizing the receiver and transmitter.

● It is a very flexible technique ofi data transmission.
● This kind ofi transmission is simple to implement.
● It allows users to send signals from sources with varying bit rates.
● When the data byte transmission is complete, the data transmission may be
resumed.

Disadvantages

● The timing errors may occur because synchronization is difficult to determine.

● These bits could be mistakenly recognized due to the noise on the channel.
 ● The start and stop bits are extra bits that must be utilized in asynchronous
transmission.
● It transmits information at a slower rate.

The key differences between Synchronous and Asynchronous Transmission. Some ofi
themain differences between Synchronous and Asynchronous Transmission are as follows:

1. A synchronous transmission is a form ofi transmission that enables synchronized

communication by sharing a common clock pulse between the sender and the
receiver. In contrast, an asynchronous transmission is internal clocks and hence
don't require an external common clock pulse.
2. Data is transmitted as frames in synchronous transmission. In contrast,
asynchronous transmission transmits data one byte at a time.
3. In synchronous transmission, the amount ofi time between two successive
broadcasts remains constant. In contrast, the time gap between two successive
transmissions is random in asynchronous transmission.
4. The data transfer rate ofi synchronous transmission is fast. In contrast, the data
transfer rate ofi asynchronous transmission is slow.
5. Synchronous transmission is complicated and costly. In contrast, asynchronous
transmission is simple and cost-effective.
6. Synchronous transmission is simple to design.
7. There is no gap between data in Synchronous transmission due to the common
clock pulse. Whereas there is a gap between the data bytes in asynchronous
transmission. It has start and end bits between which actual data is present.
8. Local storage is not necessary for synchronous transmission at the terminal end.
In contrast, local buffer storages are needed to construct blocks at both ends ofi
the line in asynchronous transmission.
9. In Synchronous Transmission, the voice-band and broad-band channels are
primarily utilized.