- حلول اسئلة اعوام
- حلول اسئلة اعوام
c
M/IO RD’ A15A14A13A12 A11 A10 A7 A6 A5 A3 A2 A1
A9A8 A4 A0
0 0 1111 0011 0000 0000
2) Write a piece of code maintain the temp .between 18C & 25C
Start:mov dx,F300h
in al,dx
mov dx,F301h
cmp al,18
JG n1
mov al,01h
out dx,al
jmp start
n1:cmp al,25
JG n2
xor al,al
out dx,al
jmp start
n2:mov al,02h
out dx,al
jmp start
Q-A
A Dam( )سدhardware consists of 8-bit water level transducer which gives the water level in
meters and three gates servos to control the four gates of the dam (logic 1 opens the hate while
logic 0 closes the gate). Design the hardware required to interface the Dam Control system.
Use Port Number F300h to interface 8-bit water Level transducer, and Number F301h to
interface the three gates servos
A
i
M/IO RD’ A15A14A13A12 A11 A10 A7 A6 A5 A3 A2 A1
A9A8 A4 A0
0 0 1111 0011 0000 0000
B.Write a piece of code to initialize the PPI 82C55 and Dam gates according the
Following:
• Water level ≤ 50m close all the gates
• 50 m < Water level ≤ 70m open one gate only
• 70 m < Water level ≤ 90m open two gate only
• 120 m < Water level open all the gate
B-
Start:Mov dx,F300h
In al,dx
mov dx,F301h
Cmp al,50
Ja n1
xor al,al
out dx,al
jmp start
n1:cmp al,70
ja n2
mov al,01
out dx,al
jmp start
n2:cmp al,90
ja n3
mov al,03
out dx,al
jmp start
n3:mov al,07h
out dx,al
jmp start
Programmable Peripheral Interface (PPI)
Ex1\
Design H/W to interface temp control system using PPI 82C55 use port A to interface the
Temp-transducer and port C to Control heater and fan base AddressF300h in the interfacing
A/
mov dx,F306h
mov al,90h
out dx,al
Start:mov dx,F300h
in al,dx
mov dx,F304h
cmp al,18
JG n1
mov al,01h; Heater
out dx,al
jmp start
n1:cmp al,25
JG n2
xor al,al
out dx,al
jmp start
n2:mov al,02h; FAN
out dx,al
jmp start
Q.A
A Dam hardware consists of 8-bit water level transducer which gives the of water in
meters and four gates servos to control the four gates of the dam (logic 1 opens the hate while
logic 0 closes the gate). Design the hardware required to interface the Dam Control system
using PPI 82C55. Use Port-A of the PPI inter the 8-bit water Level transducer, and Port-C to
interface the four gates servos. Use base address F300h.
mov dx,F306h
mov al,90h
out dx,al
start:mov dx,F300h
In al,dx
mov dx,F302h
Cmp al,60
Ja n1
xor al,al
out dx,al
jmp start
n1:cmp al,80
ja n2
mov al,01
out dx,al
jmp start
n2:cmp al,100
ja n3
mov al,03
out dx,al
jmp start
n2:cmp al,120
ja n3
mov al,07
out dx,al
jmp start
n3:mov al,0Fh
out dx,al
jmp start
DAC0808 8-Bit D/A Converters
Ex: Design H/W to interface DAC0808 at address F301h setup the DAC to Vmax=6v
start:mov cx,8
xor bx, bx
mov dx,3f01h
next:mov al, fd[bx]
out dx,al
call delay 10ms
inc bx
loop next
jmp start
fd db : 0,43,85,128,171,128,85,43
sta:Mov cx,172
Xor al,al
N1:mov dx,F301h
out dx,al
Inc al
Loop n1
Jmp sta
Vo=3+3sin(100πt) volt
Wt=100 πt ,W=100π,2πf=100π
F=100π/2π ,F=50
T=1/F=1/50=20us
t=T/M=20ms/72=278
2π
3 +3sin(100π∗ 𝑡)
fd = 100
∗ 256 t=0,1,2 … 71
6
fd=حسب القيم المعادلة
mov dx,F300h
xor bx,bx
mov cx,8
n1:mov al,fd[bx]
out dx,al
call delay 20us
inc bx
loop n1
jmp str
Q2)
A. Design the hardware to interface DAC0808 at port B of PPI 82C55. Interface the PPI
82C55 at Base address F300h. Setup the DAC0808 to Vmax= 6 volt.
𝑣𝑜=2.5+2𝑠𝑖𝑛(100𝜋𝑡) volt
Wt=100 πt ,W=100π,2πf=100π
F=100π/2π ,F=50
T=1/F=1/50=20ms
t=T/M=20ms/72=278
2π
2.5 +2sin(100π∗ 𝑡)
fd = 100
∗ 256 t=0,1,2 … 71
6
start:mov dx,f307h
mov al,80h
out dx,al
mov dx,f303h
next:xor al,al
out dx,al
call delay 100ms
mov al,85
out dx,al
call delay 100ms
n1:inc al
out dx,al
cmp al,ffh
jnz n1
n2:dec al
out dx,al
cmp al,85
jnz n2
out dx,al
delay call 100ms
jmp next
M/IO A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
0 1111 0011 0000 0XX0
0000→PA
0010→PB
0100→PC
0110→CS
R A G R A G R A G R A G
x 1 0 0 x 1 0 0 x 1 0 0 x 0 0 1 4441h
x 1 0 0 x 1 0 0 x 1 0 0 x 0 1 0 4442h
x 1 0 0 x 1 0 0 x 0 0 1 x 1 0 0 4414h
x 1 0 0 x 1 0 0 x 0 1 0 x 1 0 0 4424h
x 1 0 0 x 0 0 1 x 1 0 0 x 1 0 0 4144h
x 1 0 0 x 0 1 0 x 1 0 0 x 1 0 0 4244h
x 0 0 1 x 1 0 0 x 1 0 0 x 1 0 0 1444h
x 0 1 0 x 1 0 0 x 1 0 0 x 1 0 0 2444h
B.
Lamp Dw 4441h, 4442h, 4414h, 4424h, 4144h, 4244h, 1444h, 2444h
St : xor bx,bx
Mov cx,4
Mov dx,F300h
Mov al,Lamp[bx]
Out dx,al
Mov dx,F302h
Mov al,Lamp[bx+1]
Out dx,al
Call delay 50s
Mov dx,F300h
Mov al,Lamp[bx+2]
Out dx,al
Mov dx,F302h
Mov al,Lamp[bx+3]
Out dx,al
Call delay 5 s
Add Bx,4
Loop n1
Jmp St
A-
M/IO A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
0 1111 0011 000X X001
0000 1001→PB
0001→PA
0000
0001→PC
0001 1001→CS
0001
D7 D6 D5 D4 D3 D2 D1 D0
1 M M PA PCH M PB PCL
1 0 0 0 0 X X X
8 0h
B.
𝑣𝑜=2.5+2𝑠𝑖𝑛(100𝜋𝑡) volt
Wt=100 πt ,W=100π,2πf=100π
F=100π/2π ,F=50
T=1/F=1/50=20ms
t=T/M=20ms/36=555.6
2π
2.5 +2sin(100π∗ 𝑡)
fd = 100
∗ 256 t=0,1,2 … 71
6
Mov dx,F319h
Mov al,80h
Out dx,al
Start:Mov si,36
Xor bx,bx
Mov cl,4
Next:Mov ax,fd[bx]
Shl Ax,cl
Mov dx,f311h
Out dx,al
Mov dx,f301h
Mov al,ah
Out dx,al
Call delay dt
Add bx,2
Dec si
Jnz next
Jmp start
Fd dw 2276,2592,289,….,1959
A. Design the hardware to interface 82C54 Timer to 8086 microprocessor system buses at
Base address F300h.
913msec 87mse
Note: make any assumptions you need in the H/W design; given a crystal of 1 MHZ.
F=1/T=1/1000msec=1Hz
913msec 87mse
F=1/T=1/1000msec=1Hz
A1
A2
Mov BX ,70h
SHL BX,1
SHL BX,1
XOR AX, AX
Mov ES, AX
MOV ES: [BX], offset ISR-82
Mov ES: [BX+2], segment ISR-82
STI
Mov dx,f306h
Mov al,80h PPI
Out dx,al
Mov al,0
Mov dx,f300h PA
Out dx,al
STI
Next: jmp next
---------------------------------------------------
ISR_70 Proc
PUSH AX
PUSH DX
Mov DX, F300H
Mov al,0ffh
Out dx,al
POP DX
POP AX
IRET
ISR-70 ENDP
H.W: Design the H/W to interface UART 16650 at base address F301h use crystal of
frequency 1.8432MHz.
3rd
2.Write a piece of code to initiative the UART with the following configuration parameters 8-
bit one stop bit even parity 4800 baud rate and no interrupt enabled.
POP DX
RET
Send ENDP
EX1: A. Design the H/W required to interface 16550 UART at base address F300h. The frequency
of the crystal is 18.432 MHz (that to be tied to the 16550 UART);
POP DX
RET
Send ENDP
EX2:
Microprocessor system 1 and 2 are connected serially as shown in the figure below. The
UART of system 1 and 2 are interfaced at base address F300h.
where: -
X dq 200 dup(?)
Y dw 200 dup(?)
Z dd 200 dup(?)
1. 2.
mov cx,1600 mov cx,1600
Send proc ;Byte in Ah
xor bx, bx PUSH DX xor bx, bx
XX:mov ah, X[bx] XX: call Receive
call send MOV DX, F30Ah ; LSReg mov X[bx],al
inc bx N2:IN AL, DX inc bx
loop XX cmp AL,20H loop XX
JZ N2
mov cx,400 mov cx,400
xor bx, bx MOV DX,F300h ;DataReg xor bx, bx
YY:mov ah, Y[bx] MOV AL,Ah
YY:call Receive
OUT DX,AL
call send mov Y[bx],al
inc bx inc bx
POP DX
loop YY RET loop YY
Send ENDP
mov cx,800 Receive proc mov cx,800
xor bx, bx push DX xor bx, bx
ZZ:mov ah, Z[bx] MOV DX,f30Ah ZZ:call Receive
call send N1:IN AL,DX mov Z[bx],al
inc bx Test AL,1 inc bx
JZ N1
loop ZZ loop ZZ
MOV DX,F300h
IN AL,DX
POP DX
RET
Receive ENDP
IO/M A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 Register Addrest
0 1 1 1 1 0 0 1 1 0 0 0 0 X X X
1 F301 Data Reg
0 0 0 1 F303 IE Reg
0 0 1 1 F305 II Reg
0 1 0 1 F307 LC Reg
0 1 1 1 F309 MC Reg
1 0 0 1 F30B LS Reg
1 0 1 1 F30D MS Reg
1 1 0 1 F30F Scratch Reg
1 1 1 1
3-
Call Receive
Mov Buffer,al
Receive proc
push DX
MOV DX,LSReg
N1:IN AL,DX
Test AL,1
JZ N1
MOV DX,DataReg
IN AL,DX
POP DX
RET
Receive ENDP
A.
Send proc
;Byte in Ah
PUSH DX
MOV DX,LSReg
N2:IN AL,DX
Test AL,20H
JZ N2
MOV DX,DataReg
MOV AL,Ah
OUT DX,AL
POP DX
RET
Send ENDP
EX: Write a program to static test a 32Kbyte of RAM starting at address 80000h.
Sol:
8000
.model small 1024𝑥64 = = 4000ℎ save_pat proc
2(𝑑𝑤)
.stack 1024 xor di,di
.data rep stosw
Pattern1 dw 0 ret
Pattern2 dw 0FFFFh save_pat endp
Count dw 4000h check_pat proc
mok db 'RAM is OK.$' xor di,di
merr db 'RAM failure.$' repe scasw
jne N2
.code xor al,al
main proc jmp N3
mov ax,@data N2: mov al,1
mov ds,ax N3: ret
cld check_pat endp
mov ax,8000h end main
mov es,ax
mov cx, Count
mov ax, Pattern1
call save_pat
mov cx, Count
mov ax, Pattern1
call check_pat
or al,al
jnz err
mov cx, Count
mov ax, Pattern2
call save_pat
mov cx, Count
mov ax, Pattern1
call check_pat
or al,al
jnz err
lea dx , mok
mov ah,9
int 21h
jmp N1
err: lea dx , merr
mov ah,9
int 21h
N1: mov ax,4c00h
int 21h
main endp
EX: Write a program to static test a 64Kbyte of SRAM starting at address 88000h.
lea dx , mok
mov ah,9
int 21h
jmp N1
err: lea dx , merr
mov ah,9
int 21h
N1: mov ax,4c00h
.model small
.stack 1024
.data
Pattern db 0,1, 3, 7,0fh, 1fh, 3fh, 7fh, 0ffh, 0feh,0fch, 0f8h, 0f0h, 0e0h, 0c0h, 80h
db 0,1, 3, 7,0fh, 1fh, 3fh, 7fh, 0ffh, 0feh,0fch, 0f8h, 0f0h, 0e0h, 0c0h, 80h
N5: pop cx
Ret
PassTest endp
end main
3M
= 30 = 1𝐸 𝐻 = 11110
100K
EDX AX
MOVZX EDX,AX 0000 0000 0000 0000 1000 0000 0000 0000 1000 0000 0000 0000
EDX
SHR EDX,4 0000 0000 0000 0000 0000 1000 0000 0000
ESI DX
MOVSX ESI,DX 0000 0000 0000 0000 0000 1000 0000 0000 0000 1000 0000 0000
EAX SI
BSR EAX,SI 0000 0000 0000 0000 0000 0000 0000 1011 0000 1000 0000 0000
AL
MOV AL,80 0101 0000
EAX
MOVSX EAX,AL 0000 0000 0000 0000 0000 0101 0000 0000
CDQ
EDX EAX
0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0101 0000 0000
AL
MOV AL,80H 1000 0000
AX AL
MOVSX AX,AL 1111 1111 1000 0000 1000 0000
EAX AX
MOVZX EAX,AX 0000 0000 0000 0000 1111 1111 1000 0000 1111 1111 1000 0000
ECX
BSR ECX,EAX 0000 0000 0000 0000 0000 0000 0000 1111
EAX
0000 0000 0000 0000 1111 1111 1000 0000
EAX
SHR EAX,16 0000 0000 0000 0000 0000 0000 0000 0000
AX
PUSH AX 0000 0000 0000 0000
CX
PUSH CX 0000 0000 0000 1111
EAX
POP EAX 0000 0000 0000 0000 0000 0000 0000 1111
AX
MOV AX,800FH
1000 0000 0000 1111
EAX AX
MOVZX EAX,AX 0000 0000 0000 0000 1000 0000 0000 1111 1000 0000 0000 1111
EAX AL
BTR EAX,AL 0000 0000 0000 0000 0000 0000 0000 1111 0000 1111
CF=1
.model small 20000
1024𝑥128 = 2(𝑑𝑤)=10000h save_pat proc
.stack 1024 xor di,di
.data rep stosw
Pattern1 dw 0 ret
Pattern2 dw 0FFFFh save_pat endp
Count dw 10000h;
mok db 'RAM is OK.$' check_pat proc
merr db 'RAM failure.$' xor di,di
repe scasw
.code jne N2
main proc xor al,al
mov ax,@data jmp N3
mov ds,ax N2: mov al,1
N3: ret
cld check_pat endp
mov ax,0h end main
mov es,ax
lea dx , mok
mov ah,9
int 21h
jmp N1
err: lea dx , merr
mov ah,9
int 21h
N1: mov ax,4c00h
int 21h
main endp
.model small save_pat proc
.stack 1024 10000
xor di,di
1024𝑥64 = =8000h
.data 2(𝑑𝑤)
rep stosw
Pattern1 dw 0 ret
Pattern2 dw 0FFFFh save_pat endp
Count dw 8000h;
mok db 'RAM is OK.$' check_pat proc
merr db 'RAM failure.$' xor di,di
repe scasw
.code jne N2
main proc xor al,al
mov ax,@data jmp N3
mov ds,ax N2: mov al,1
N3: ret
cld check_pat endp
mov ax,6000h end main
mov es,ax
lea dx , mok
mov ah,9
int 21h
jmp N1
err: lea dx , merr
mov ah,9
int 21h
N1: mov ax,4c00h
int 21h
main endp
1-
MOV DX,3F0Ah
N2:IN AL,DX
Test AL,20H
JZ N2
MOV DX,3f00h
MOV AL,Ah
OUT DX,AL
Pop dx
Pop ax
RET
Send ENDP
M/IO A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
0 1 1 1 1 0 0 1 1 0 0 0 0 0 0 x 0
1M
= 10 = 1𝐸 𝐻 = 01010𝐵 HexKey
100K
N5:XOR Bh,Bh
Mov dx,F302h MOV BL,AL
Mov al,00101010B ;Program clock SHR BL,1
Out dx,al
AND AL,3
OR BL,AL
Mov al,00010000B ;8 digit – right entry Encoded
Out dx,al MOV Ah,digit[BX]
;2-key lockout MOV AL,digitAdd
Mov al,01010000B Call Disply
Out dx,al ; Program FIFO CMP digitAdd,7
JME N6
Mov al,11011100B;DC CMP digitAdd,0
; clear Display all
Out dx,al JMP Next
one
N6:ADD digitAdd,1
maskch db 80h JMP Next
mask db 7
Addr db 0
Digit db coh,f9h,….. Display pro
Next: Call ReadKey Mov dx,f302h
Text al,40h Shift
Or al,80h
Jz n2
Out dx,al
Cmp digitadd,0
JE N3 Mov dx,f300h
SUB DigitAdd,0 Mov al,ah
JMP N4 Out dx,al
N3:MOV digitAdd,1 Ret
N4:MOV AL,digitAdd
MOV Ah,0FFh Display ENDP
Call Display
JMP NEXT Readkey proc
Control
N2:Test AL,80H Mov dx,f302h
JZ N5 NN:in al,dx
Test al,mask
MOV digitAdd,0 Jz NN
MOV DX,F302H
Mov dx,f300h
MOV AL,11011100B
In al,dx
OUT DX,AL
JMP Next Ret
Readkey ENDP
A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
1111 0011 0000 0001
IO/M A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 Register Addrest
0 1 1 1 1 0 0 1 1 0 0 0 1 X X X 1
0 0 0 1 F311 Data Reg
0 0 1 1 F313 IE Reg
0 1 0 1 F315 II Reg
0 1 1 1 F317 LC Reg
1 0 0 1 F319 MC Reg
1 0 1 1 F31B LS Reg
1 1 0 1 F31D MS Reg
1 1 1 1 F31F Scratch Reg
𝑓𝑟𝑒𝑞𝑢𝑒𝑐𝑦 𝑜𝑓 𝑖𝑛𝑝𝑢𝑡 18.432∗106
1- 𝐷𝑖𝑣𝑖𝑠𝑜𝑟 = = = 480 = 01 𝐸0ℎ
𝐵𝑎𝑛𝑑 𝑅𝑎𝑡𝑒∗16 2400∗16
Mov dx, F317h Mov dx, F317h
Mov al, 80h Mov al,1Bh frame شكل ال
Divisor
Out dx, al
Out dx, al
Mov dx, F311h
Mov dx, F313h
Mov al, E0h Low byte interrupt
MOV al, 01h
Out dx, al E0
Mov dx, F313h Out dx, al
Mov al, 01h High byte DL SB ST P PE SP L1 L0 D SB S P P S L L
Out dx, al 1 0 0 0 0 0 0 0 L T E P 1 0
01 0 0 0 1 1 0 1 1
8 0 h
1 B h
2- 0 0 0 0 M L T R
Mov dx,f301h S X X
0 0 0 0 0 0 0 1
Mov al,1Bh ICW1 0 1 h
Out dx,al
Mov dx,f303h
Mov al,70h ICW2
Out dx,al
Mov al,11h
ICW4
Out dx,al
3-
.data
Buff db 1024 dup(?)
Index dw 0
mesat db ‘datafull.$'
.code
main proc
Mov cx,1024
Xor si,si
N1:call Receive
Mov buff[si],al
Mov index,si
Cmp index,1024
Je N4
Inc si
Loop next
N4:lea dx,mesat
mov ah,9
int 21h
mov ax,4c00h
int 21h
main endp
Receive proc
push DX
MOV DX,F317h
N1:IN AL,DX
Test AL,1
JZ N1
MOV DX,F311h
IN AL,DX
POP DX
RET
Receive ENDP
AL
MOV AL,80 0101 0000
EAX AL
MOVSX EAX,AL 0000 0000 0000 0000 0000 0000 0101 0000 0101 0000
EAX
PUSH EAX 0000 0000 0000 0000 0000 0000 0101 0000
CX
POP CX 0000 0000 0000 0000
DX
POP DX 0000 0000 0101 0000
N5:XOR Bh,Bh HexKey
Mov dx,F302h MOV BL,AL
Mov al,00111110B ;Program clock SHR BL,1
Out dx,al
AND AL,3
OR BL,AL
Mov al,00000000B ;8 digit – Left entry Encoded
Out dx,al MOV Ah,digit[BX]
;2-key lockout MOV AL,digitAdd
Mov al,01010000B Call Disply
Out dx,al ; Program FIFO CMP digitAdd,7
JME N6
Mov al,11011100B;DC CMP digitAdd,0
; clear Display all
Out dx,al JMP Next
one
N6:ADD digitAdd,1
maskch db 80h JMP Next
mask db 7
Addr db 0
Digit db coh,f9h,….. Display pro
Next: Call ReadKey Mov dx,f302h
Text al,40h Shift
Or al,80h
Jz n2
Out dx,al
Cmp digitadd,0
JE N3 Mov dx,f300h
SUB DigitAdd,0 Mov al,ah
JMP N4 Out dx,al
N3:MOV digitAdd,1 Ret
N4:MOV AL,digitAdd
MOV Ah,0FFh Display ENDP
Call Display
JMP NEXT Readkey proc
Control
N2:Test AL,80H Mov dx,f302h
JZ N5 NN:in al,dx
Test al,mask
MOV digitAdd,0 Jz NN
MOV DX,F302H
Mov dx,f300h
MOV AL,11011100B
In al,dx
OUT DX,AL
JMP Next Ret
Readkey ENDP
A.
UART Initialization
Mov dx, F306h Mov dx, F306h
Mov al, 80h frame شكل ال
Divisor Mov al,1Bh
Out dx, al 8-bit-1stop bit-even party
Out dx, al
Mov dx, F300h
Mov dx, F302h
Mov al, 3Ch Low byte No interrupt
MOV al, 0h
Out dx, al 3C
Mov dx, F302h Out dx, al
Mov al, 0h High byte DL SB ST P PE SP L1 L0 D SB S P P S L L
Out dx, al 1 0 0 0 0 0 0 0 L T E P 1 0
00 0 0 0 1 1 0 1 1
8 0 h
2M 1 B h
= 20 = 14 𝐻 = 10100𝐵 0 0 0 0 M L T R
100K S X X
0 0 0 0 0 0 0 0
0 0 h
RET
EX:
A 8086 microprocessor is to be used in a dedicated controller application as shown in figure1.
Refer to figure 2:
1. Write an assembly subroutine to initialize the PPI. Port-A is to be programmed to operate as strobed
input with interrupt enable, while Port-B as basic output.
2. Write an assembly subroutine to initialize the Timer. Counter-0 and Counter-1 are to be programmed to
generate square waves with 5 KHz and 500 KHz respectively.
3. Write an assembly subroutine to initialize the PIC. IRQ1 will generate interrupt number 61h.
4. Write a piece of code to realize the digital filter.
Figure 1
A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 Hex
1111 0000 1100 0XX0
0000→PA F0C0
0010→PB F0C2
0100→PC F0C4
0110→CS F0C6
PPI-Init Proc D7 D6 D5 D4 D3 D2 D1 D0
MOV DX,F0C6h 1 mode PA PC.H mode PB PC.L
1 0 1 1 0 0 0 0
MOV AL,B0h
OUT DX,AL B 0 h
D7 D6 D5 D4 D3 D2 D1 D0
MOV AL,9 0 X X X Bit Set/Reset
0 X X X 1 0 0 1
OUT DX,AL
RET 0 9 h
PPI-Init ENDP
1M 1M
𝑂𝑈𝑇0 = = 200 = 𝐶8 , 𝑂𝑈𝑇1 = = 2000 = 07𝐷0
5K 500
Time-Init Proc
C0 D7 D6 D5 D4 D3 D2 D1 D0
MOV DX,F0CEh SC1 SC0 RW1 RW0 M2 M1 M0 BCD
MOV AL,36h 0 0 1 1 0 1 1 0
OUT DX,AL 3 6 h
MOV AL,76h
OUT DX,AL
C1 D7 D6 D5 D4 D3 D2 D1 D0
SC1 SC0 RW1 RW0 M2 M1 M0 BCD
0 1 1 1 0 1 1 0
MOV DX,F0C8h
MOV AL,C8 7 6 h
OUT DX,AL
MOV AL,0h
OUT DX,AL
MOV DX,F0CAh
MOVAL,D0h
OUT DX,AL
MOV AL,07h
OUT DX,AL
RET
Time-Init ENDP
A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 Hex
1111 0000 1101 10X0
1000 F0D0
1010 F0D2
PIC-Init Proc
ICW1 D7 D6 D5 D4 D3 D2 D1 D0
MOV DX,F0D0h A7 A6 A5 1 LTIM ADI SNGL IC4
MOV AL,13h 0 0 0 1 0 0 1 1
OUT DX,AL 1 3 h
ICW2
D7 D6 D5 D4 D3 D2 D1 D0
MOV DX,F0D2h A15 A14 A13 A12 A11 A10 A9 A8
MOV AL,61h 0 1 1 0 0 0 0 1
OUT DX,AL 6 1 h
ICW4
D7 D6 D5 D4 D3 D2 D1 D0
MOV AL,11h 0 0 0 SFN BUF M/S AEOI mPM
OUT DX,AL M
0 0 0 1 0 0 0 1
MOV AL,0FDh OCW1 1 1 h
OUT DX,AL D7 D6 D5 D4 D3 D2 D1 D0
M7 M6 M5 M4 M3 M2 M1 M0
1 1 1 1 1 1 0 1
MOV DX,F0D0h F D h
MOV AL,20h OCW2
D7 D6 D5 D4 D3 D2 D1 D0
OUT DX,AL R SL EOI 0 0 L2 L1 L0
RET 0 0 1 0 0 0 0 0
2 0 h
PIC-Init ENDP
4-
.data
Xn db 0
X db 2 dup (0)
Y db 2 dup (0)
Done db 0
Call PPI-Init
Call Time-Init
Call PIC-Init
Mov BX ,61h
SHL BX,1
SHL BX,1
XOR AX, AX
Mov ES, AX
Mov ES: [BX], offset ISR-61
Mov ES: [BX+2], segment ISR-61
STI
MOV CL,5
Next: CMP done,0
JE Next
Mov AL,32
IMUL Byte ptr Xn
Mov DX, AX
Mov AL, B
IMUL Byte ptr X [0]
ADD DX, AX
Mov AL,0
IMUL Byte ptr X [1]
ADD DX, AX
Mov AL,5
IMUL Byte ptr, Y [0]
SUB DX, AX
Mov AL,9
IMUL Byte ptr Y [1]
SUB DX, AX
Mov CL,5
SHR DX, CL
Mov AL, DL
Mov DX, F300H
OUT DX, AL
ICW1 D7 D6 D5 D4 D3 D2 D1 D0
MOV DX,F300h A7 A6 A5 1 LTI ADI SNG IC4
M L
MOV AL,13h 0 0 0 1 0 0 1 1
OUT DX,AL
ICW2 1 3 h
D7 D6 D5 D4 D3 D2 D1 D0
MOV DX,F302h A15 A14 A13 A12 A11 A10 A9 A8
MOV AL,70h
0 1 1 1 0 0 0 0
OUT DX,AL
ICW4 7 0 h
D7 D6 D5 D4 D3 D2 D1 D0
MOV AL,11h 0 0 0 SFN BUF M/S AEOI mPM
OUT DX,AL M
0 0 0 1 0 0 0 1
MOV AL,0FEh OCW1 1 1 h
OUT DX,AL D7 D6 D5 D4 D3 D2 D1 D0
M7 M6 M5 M4 M3 M2 M1 M0
1 1 1 1 1 1 1 0
MOV DX,F300h F E h
MOV AL,20h OCW2
OUT DX,AL D7 D6 D5 D4 D3 D2 D1 D0
R SL EOI 0 0 L2 L1 L0
0 0 1 0 0 0 0 0
N1 :Mov dx,70h 2 0 h
In al,dx
Cmp al,0
Jz N1
Mov dx,F310h
Mov al,0FFh
Out dx,al
Main ENDP
A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 Hex
1111 0011 0000 0XX1
0001→C0 F301
0011→C1 F303
0101→C2 F305
0111→CS F307
t=T/M=8ms/100=278
𝑓𝑎 2
𝑓𝑑 = 28 = ∗ 256
𝑉𝑚𝑎𝑥 12
mov dx,f301h
next:xor al,al
out dx,al
call delay 20ms
mov al,43
out dx,al
call delay 20ms
n1:inc al
out dx,al
cmp al,171
jnz n1
mov al,43
out dx,al
call delay 20ms
jmp next