Page 1 of 16 SPH 3119 – Digital Systems and Circuits, Lecture Notes Jan – Apr 2020

Boolean Algebra and logic gates

 Basic logic operators

1. The OR operator
- Symbolized using “ + ” (plus sign).
- Truth table: if A and B are input variables,

- The 𝑸 output is a function of the input variables 𝑨 and 𝑩.

Thus: 𝑄(𝐴, 𝐵) = 𝐴 + 𝐵. Read “A or B”.

2. The AND operator

- Symbolized using “ · ” (center-placed dot).
- Truth table: if A and B are input variables,

- The 𝑸 output is a function of the input variables 𝑨 and 𝑩.

Thus: 𝑄(𝐴, 𝐵) = 𝐴 ∙ 𝐵. Read “A and B”.

3. The NOT operator

- Symbolized using “ ‾ ” (an overbar) or “ ′ ” (prime).
- Truth table: if A is an input variable,

- The 𝑸 output is a function of the input variable 𝑨.

- Thus: 𝑄(𝐴) = 𝐴̅ or 𝑄(𝐴) = 𝐴′ . Read “NOT A” or “A complement” or “A
inverted”.

NB: Supplement your learning from the lecture and lecture notes by independent study and discussions.
Page 2 of 16 SPH 3119 – Digital Systems and Circuits, Lecture Notes Jan – Apr 2020

 Boolean algebra
o Laws and theorems of Boolean algebra
If 𝐴, 𝐵 and 𝐶 is a variable, a term or an expression,
1. OR and AND laws
i. Operations with ‘0’: 𝐴 + 0 = 𝐴 , 𝐴 ∙ 0 = 0
ii. Operations with ‘1’: 𝐴 + 1 = 1, 𝐴 ∙ 1 = 𝐴
iii. Identity law: 𝐴 + 𝐴 = 𝐴, 𝐴 ∙ 𝐴 = 𝐴
iv. Complementation law: 𝐴 + 𝐴̅ = 1, 𝐴 ∙ 𝐴̅ = 0
2. Commutative laws
𝐴+𝐵 =𝐵+𝐴
𝐴∙𝐵 =𝐵∙𝐴
3. Associative laws
𝐴 + (𝐵 + 𝐶) = 𝐵 + (𝐴 + 𝐶) = 𝐶 + (𝐴 + 𝐵)
𝐴 ∙ (𝐵 ∙ 𝐶) = 𝐵 ∙ (𝐴 ∙ 𝐶) = 𝐶 ∙ (𝐵 ∙ 𝐴)
4. Distributive laws
𝐴 ∙ (𝐵 + 𝐶) = 𝐴 ∙ 𝐵 + 𝐴 ∙ 𝐶
𝐴 + 𝐵 ∙ 𝐶 = (𝐴 + 𝐵) ∙ (𝐴 + 𝐶)
5. Absorption laws (or redundancy laws)
𝐴+𝐴∙𝐵 =𝐴
𝐴 ∙ (𝐴 + 𝐵) = 𝐴
6. Involution law
𝐴̿ = 𝐴
7. Inversion laws (DeMorgan’s theorem)
̅̅̅̅̅̅̅̅
𝐴 + 𝐵 = 𝐴̅ ∙ 𝐵̅
̅̅̅̅̅̅
𝐴 ∙ 𝐵 = 𝐴̅ + 𝐵̅
8. Duality principle: A Boolean expression is valid if its dual is also valid.
The dual of a Boolean expression is obtained by replacing all · with +, + with ·, 0s with 1s,
and 1s with 0s while leaving all literals unchanged.
Example: commutative laws:
𝐴+𝐵 =𝐵+𝐴
𝐴∙𝐵 =𝐵∙𝐴

→ Consider the first expression 𝐴 + 𝐵 = 𝐵 + 𝐴 - replacing ‘+’ with ‘∙’ results into 𝐴 ∙ 𝐵 =
B∙ 𝐴 i.e. the second expression in the pair.

NB: Supplement your learning from the lecture and lecture notes by independent study and discussions.
Page 3 of 16 SPH 3119 – Digital Systems and Circuits, Lecture Notes Jan – Apr 2020

→ Consider the second expression 𝐴 ∙ 𝐵 = B∙ 𝐴 - replacing ‘∙’ with ‘+’ results into 𝐴 + 𝐵 =
𝐵 + 𝐴 i.e. the first expression in the pair.

o Forms of Boolean functions

→ Sum-of-products (SOP) Boolean function
Obtained by ORing all the product terms. A product term is the logical AND of
a set of variables that are either complemented or uncomplemented. A variable
is complemented if there’s a ‘1’ for the input and it is uncomplemented if there’s
a ‘0’. Thus, if A and B are inputs and Q is an output,
Product
𝑨 𝑩 𝑸
terms
0 0 1 𝐴̅ ∙ 𝐵̅
0 1 0

1 0 0
1 1 1 𝐴∙𝐵
𝑄(𝐴, 𝐵) = 𝐴̅ ∙ 𝐵̅ + 𝐴 ∙ 𝐵

→ Product-of-sums (POS) Boolean function

Obtained by ANDing all the sum terms. A sum term is the logical OR of a set
of variables that are either complemented or uncomplemented. A variable is
complemented if there’s a ‘0’ for the input and it is uncomplemented if there’s
a ‘1’. Thus, if A and B are inputs and Q is an output,

Sum
𝑨 𝑩 𝑸
terms
0 0 1
0 1 0 𝐴 + 𝐵̅
1 0 0 𝐴̅ + 𝐵
1 1 1
𝑄(𝐴, 𝐵) = (𝐴 + 𝐵̅ ) ∙ 𝐴̅ + 𝐵

→ Canonical Boolean function

- Canonical SOP ⇒ Boolean function that is expressed as a sum of
minterms.

NB: Supplement your learning from the lecture and lecture notes by independent study and discussions.
Page 4 of 16 SPH 3119 – Digital Systems and Circuits, Lecture Notes Jan – Apr 2020

Minterm – a product term in which each of the variables appears once and
only once (in complemented or uncomplemented form).
- Canonical POS ⇒ Boolean function that is expressed as a product of
maxterms.
Maxterm – a sum term in which each of the variables appears once and
only once (in complemented or uncomplemented form).

→ Boolean functions written in Sigma and Pi notations

- Sigma notation: a sum of minterms.
Thus,

𝑄(𝐴, 𝐵) = 𝐴̅ ∙ 𝐵̅ + 𝐴 ∙ 𝐵
𝑄(𝐴, 𝐵) = 𝑚0 + 𝑚3

𝑄(𝐴, 𝐵) = ∑(0,3)

- Pi notation: a product of maxterms.

Thus,

𝑄(𝐴, 𝐵) = (𝐴 + 𝐵̅ ) ∙ 𝐴̅ + 𝐵
𝑄(𝐴, 𝐵) = 𝑀1 ∙ 𝑀2
𝑄(𝐴, 𝐵) = Π(1,2)

NB: Supplement your learning from the lecture and lecture notes by independent study and discussions.
Page 5 of 16 SPH 3119 – Digital Systems and Circuits, Lecture Notes Jan – Apr 2020

o Applications of the laws and theorems of Boolean algebra

→ Simplification of Boolean functions

̅̅̅̅ )(𝐴̅ + 𝐵)(𝐵̅ + 𝐵)

Example: simplify the Boolean function (𝐴𝐵
Solution:
̅̅̅̅)(𝐴̅ + 𝐵)(𝐵̅ + 𝐵)
(𝐴𝐵 = ̅̅̅̅ )(𝐴̅ + 𝐵)(1)
(𝐴𝐵 → OR law; complementation
= (𝐴̅ + 𝐵̅ )(𝐴̅ + 𝐵) → AND law; operations with “1”
= 𝐴̅𝐴̅ + 𝐴̅𝐵 + 𝐵̅ 𝐴̅ + 𝐵̅ 𝐵 → Distributive law
→ AND laws; identity,
= 𝐴̅ + 𝐴̅(𝐵 + 𝐵̅ ) + 0 complementation, Distributive
law
= 𝐴̅ + 𝐴̅(1) → OR law; complementation
= 𝐴̅ + 1 → AND law; operations with “1”
𝐴̅ OR law; operations with “1”
̅̅̅̅ )(𝐴̅ + 𝐵)(𝐵̅ + 𝐵) = 𝐴̅
Therefore, (𝐴𝐵

→ Conversion from SOP to POS and vice versa

Example: Convert the Boolean function 𝑌 = 𝐴 ∙ 𝐵 + 𝐴̅ ∙ 𝐵̅ into POS form.
Solution:
𝑌 = 𝐴 ∙ 𝐵 + 𝐴̅ ∙ 𝐵̅ = (𝐴 + 𝐵) ∙ (𝐴̅ + 𝐵̅) → 𝑑𝑢𝑎𝑙𝑖𝑡𝑦 𝑝𝑟𝑖𝑛𝑐𝑖𝑝𝑙𝑒

→ Conversion of a standard Boolean function into canonical Boolean form

Example: convert the Boolean function 𝑌(𝐴, 𝐵, 𝐶) = 𝐴 ∙ 𝐵 + 𝐴 ∙ 𝐶̅ + 𝐵 ∙ 𝐶 into
canonical form.
Solution:
𝑌 = 𝐴𝐵 + 𝐴𝐶̅ + 𝐵𝐶
𝑌 = 𝐴𝐵(𝐶 + 𝐶̅ ) + 𝐴(𝐵 + 𝐵̅)𝐶̅ + (𝐴 + 𝐴̅)𝐵𝐶
𝑌 = 𝐴𝐵𝐶 + 𝐴𝐵𝐶̅ + 𝐴𝐵𝐶̅ + 𝐴𝐵̅𝐶̅ + 𝐴𝐵𝐶 + 𝐴̅𝐵𝐶 → 𝑑𝑖𝑠𝑡𝑟𝑖𝑏𝑢𝑡𝑖𝑣𝑒 𝑙𝑎𝑤
𝑌 = 𝐴𝐵𝐶 + 𝐴𝐵𝐶̅ + 𝐴𝐵̅𝐶̅ + 𝐴̅𝐵𝐶
→ 𝑂𝑅 𝑙𝑎𝑤; 𝑖𝑑𝑒𝑛𝑡𝑖𝑡𝑦 𝑖. 𝑒. 𝑟𝑒𝑚𝑜𝑣𝑖𝑛𝑔 𝑟𝑒𝑑𝑢𝑛𝑑𝑎𝑛𝑐𝑦

NB: Supplement your learning from the lecture and lecture notes by independent study and discussions.
Page 6 of 16 SPH 3119 – Digital Systems and Circuits, Lecture Notes Jan – Apr 2020

 Logic gates
o Logic gate
→ An electronic circuit which makes logical decisions based on the combination
of digital signals present at its inputs.
→ It is a circuit implementation of a logic operator.
→ It can be basic or derived:

1. Basic logic gates – table summary

Logic Logic
Circuit symbol Truth table Timing waveforms
gate function
A B Y
0 0 0
OR 𝑌 = 𝐴+𝐵 0 1 1
1 0 1
1 1 1

A B Y
0 0 0
AND 𝑌 =𝐴∙𝐵 0 1 0
1 0 0
1 1 1

A Y
NOT 𝑌 = 𝑋̅ 0 1
1 0

→ Note: There are also multiple input logic gates (apart from the NOT gate, of
course).

2. Derived logic gates

 Buffer gate

Thus, a buffer routes its input, unchanged, to its output.

NB: Supplement your learning from the lecture and lecture notes by independent study and discussions.
Page 7 of 16 SPH 3119 – Digital Systems and Circuits, Lecture Notes Jan – Apr 2020

i.e. behavior opposite to that of a NOT gate.

Circuit symbol:

Truth table:
Input Output
A Q
0 0
1 1

 NAND gate

Circuit symbol:

Truth table:
Inputs Output
A B Q
0 0 1
0 1 1
1 0 1
1 1 0
Boolean function: 𝑄(𝐴, 𝐵) = ̅̅̅̅̅̅
𝐴∙𝐵

 NOR gate

Circuit symbol:

NB: Supplement your learning from the lecture and lecture notes by independent study and discussions.
Page 8 of 16 SPH 3119 – Digital Systems and Circuits, Lecture Notes Jan – Apr 2020

Truth table:
Inputs Output
A B Q
0 0 1
0 1 0
1 0 0
1 1 0
Boolean function: 𝑄(𝐴, 𝐵) = ̅̅̅̅̅̅̅̅
𝐴+𝐵

 XOR (exclusive-OR, EX-OR) gate

Truth table:
Inputs Output
A B Q
0 0 0
0 1 1
1 0 1
1 1 0
Boolean function: 𝑄(𝐴, 𝐵) = 𝐴̅𝐵 + 𝐴𝐵̅ = 𝐴⨁𝐵

 XNOR (exclusive-NOR, EX-NOR) gate

Truth table:
Inputs Output
A B Q
0 0 1
0 1 0
1 0 0
1 1 1
Boolean function: 𝑄(𝐴, 𝐵) = 𝐴̅𝐵̅ + 𝐴𝐵 = 𝐴⨁𝐵
̅̅̅̅̅̅̅

 Exercise:
i. Using AND and NOT gates only, draw a circuit for,
a. An OR function.
b. A NOR function.
ii. Using OR and NOT gates only, draw a circuit for,
NB: Supplement your learning from the lecture and lecture notes by independent study and discussions.
Page 9 of 16 SPH 3119 – Digital Systems and Circuits, Lecture Notes Jan – Apr 2020

a. An AND function.
b. A NAND function.
iii. Using AND, OR and NOT gates only, draw a circuit for an XOR
function.
iv. Using AND, OR and NOT gates only, draw a circuit for an XNOR
function.
3. Universal Gates
 The NAND and NOR gates can be configured in circuits to make them
perform the three basic logic operations OR, AND and NOT.
i. The NAND gate as NOT gate:

ii. The NAND gate as AND gate:

iii. The NAND gate as OR gate:

o Exercise:
i. Circuit implement the NOT, AND and OR gates using the NOR gate
only.
ii. Using the NAND gate only, circuit implement a buffer, NOR gate,
XOR gate and XNOR gate.
iii. Using the NOR gate only, circuit implement a buffer, NAND gate,
XOR gate and XNOR gate.

NB: Supplement your learning from the lecture and lecture notes by independent study and discussions.
Page 10 of 16 SPH 3119 – Digital Systems and Circuits, Lecture Jan – Apr 2020
Notes

o Common logic gate applications:

i. Monitoring parameters in a machine.
In a factory, some parameters of a machine need to be monitored so that they do not
exceed a safe value. Otherwise if they do, some protective measure is applied.

- Two parameters in a machine,

temperature and pressure, are being
monitored by sensors.
- The outputs from the sensors are
fed to comparators which compares
them with a reference value.
- Depending on comparator
configuration, the outputs (A and
B) can be set to give a high voltage
level (equivalent to a logic HIGH
for the OR gate) or a low voltage
level (equivalent to a logic LOW
for the OR gate).

The use of the OR gate means that the machine will shut down when the outputs of the
comparators are such that if either one of them is interpreted to be logic HIGH or both
of them are interpreted to be logic HIGH, then the machine will shut down. Truth table:

The OR gate can therefore be used in applications that require the detection of the
occurrence of one or more events.

ii. Construction of square wave oscillators.

iii. Controlling the interior lighting of a car.

NB: Supplement your learning from the lecture and lecture notes by independent study and discussions.
Page 11 of 16 SPH 3119 – Digital Systems and Circuits, Lecture Jan – Apr 2020
Notes

The interior lighting system of a two-door car can be designed so that the light is
switched off only when both doors are shut.
The bulb will therefore light-up when both doors are open (S1 = 0 and S2 = 0) or when
either of the two doors is open (S1 = 0, S2 = 1 or S1 = 1, S2 = 0) and it will be off
when both doors are shut (S1 = 1 and S2 = 1). Thus,

Remark: AND gate followed by a NOT gate ≡ NAND gate.

NB: Supplement your learning from the lecture and lecture notes by independent study and discussions.
Page 12 of 16 SPH 3119 – Digital Systems and Circuits, Lecture Jan – Apr 2020
Notes

o Logic gates in integrated circuits (ICs)

 An IC  a circuit that consists of resistors, transistors, capacitors, diodes, etc.
connected in a way to perform a desired function.

 Logic gates are contained in digital ICs  ICs containing electronic circuitry that
are configured to perform logic functions.

 Digital ICs contain numerous logic gates and the number per chip varies from as
few as 4 to >10,000. These are classified in the so-called scales of integration:
Scale of integration Abbreviation No. of logic gates
Small Scale Integration SSI <10
Medium Scale Integration MSI 10 - 100
Large Scale Integration LSI 100 – 10,000
Very Large Scale Integration VLSI 10,000 – 100,000

 There are many different types of IC packages but the most common type that is
used in basic logic gates applications is the so-called dual-in-line (DIP) package.
It is rectangular in shape with a ceramic/plastic protective casing and pins along
the long sides. Diagram below:

NB: Supplement your learning from the lecture and lecture notes by independent study and discussions.
Page 13 of 16 SPH 3119 – Digital Systems and Circuits, Lecture Jan – Apr 2020
Notes

 Most commonly, logic gate ICs that are used for basic applications consist of 14
pins.

 The pins are numbered counterclockwise when viewed from the top of the IC
with respect to an identifying notch on the chip (diagram below).

Notch

 A layout of the logic gates contained in an IC and how the pins are to be used is
provided in the so-called pinout diagram. E.g. the pinout diagram for a quad
(four) two-input AND logic gate IC:

Notch

From the diagram above,

- It’s a 14-pin IC.
- The IC contains four 2-input AND logic gate circuits. The two inputs to each gate
are labelled A and B. The output from each gate is labelled Y.
- Pin 14, labelled Vcc, is a power supply input pin and should always be connected
to +5V dc when in use.
- Pin 7 is the ground pin (0V).

NB: Supplement your learning from the lecture and lecture notes by independent study and discussions.
Page 14 of 16 SPH 3119 – Digital Systems and Circuits, Lecture Jan – Apr 2020
Notes

 Transistor switches are critical building blocks of logic gates. Transistors can
either be unipolar (FETs) or bipolar (BJTs).
Correspondingly, logic gate ICs are either based on unipolar transistors or the
bipolar transistors.
- Those that are fabricated using unipolar transistors are said to belong to the
unipolar logic family while those that are fabricated using bipolar transistors
are said to belong to the bipolar logic family.
- Logic ICs that belong to the same logic family have similar performance
characteristics and therefore compatible.

These characteristics include:

i. Voltage supply range – the range of voltages required for an IC to function
properly.
ii. Propagation delay time - a measure of the time it takes the output of a logic gate
to respond to a change on the input. It is equivalent to the speed of operation of a
given IC. Normally specified in nanoseconds (ns).
iii. Power dissipation – amount of power dissipated in an IC. Normally specified in
milliwatts (mW).
iv. Acceptable input and output signal levels.
v. Noise margin – a measure of how much external electrical noise a gate can
withstand before producing an incorrect output.
vi. Operating temperature range – the temperature range within which an IC
functions properly.
vii. Fan-out – the number of similar gates that can be driven by a given gate.

 Examples of unipolar logic families include the P-channel MOSFET (PMOS), the
N-channel MOSFET (NMOS) and the complementary MOSFET (CMOS). Here, the
CMOS logic family is the most commonly used.

NB: Supplement your learning from the lecture and lecture notes by independent study and discussions.
Page 15 of 16 SPH 3119 – Digital Systems and Circuits, Lecture Jan – Apr 2020
Notes

 Examples of bipolar logic families include the resistor-transistor logic (RTL,

obsolete), the diode-transistor logic (DTL), transistor-transistor logic (TTL) and the
emitter-coupled logic (ECL). Here, the TTL logic family is the most commonly
used.

 IC manufacturers observe a standard numbering scheme on the IC that makes it easy

to identify them.
- Since some applications are extreme compared to others, there exists commercial
and military grade ICs.
- Commercial grade ICs are identified by a prefix 74 (hence referred to as 7400
series ICs) while military grade ICs are identified by a prefix 54 (hence referred
to as 5400 series ICs).
- Military versions operate on much wider temperature and voltage ranges. For
example, typical temperature range for the 5400 series ICs is -55°C to 125°C
while that for the 7400 ICs is 0°C to 70°C.
o In the 7400 series ICs a C is placed to denote a CMOS family IC.
o There exists sub-families within each logic family. These subfamilies have different
rating for speed, power consumption, temperature range, voltage level, etc. E.g. for the
TTL family:
 Standard TTL (74) – the original TTL family. Obsolete. Propagation delay: 10
ns, power dissipation: 10 mW.
 High-speed TTL (74H) – Improved speed but increased power consumption.
 Low-power TTL (74L) – Improved power consumption and speed.
 Schottky TTL (74S) - Improved power consumption and speed.
 Low-power Schottky TTL (74LS) - Improved power consumption and speed.
 Advanced Schottky TTL (74AS) - Twice as fast as 74S with approximately same
power consumption.

NB: Supplement your learning from the lecture and lecture notes by independent study and discussions.
Page 16 of 16 SPH 3119 – Digital Systems and Circuits, Lecture Jan – Apr 2020
Notes

 Advanced low-power Schottky TTL (74ALS) - Improved power consumption

and higher speed than 74LS. Most Popular
 Fast TTL (74F) – Performance between 74AS and 74ALS.

 Illustration of a numbering scheme used on a TTL IC (e.g. SN74LS08N):

 From the numbering scheme above, this IC

- is manufactured by Texas Instruments,

- belongs to the TTL family,
- belongs to the subfamily LS (low-power schottky  improved power
consumption and speed) of the TTL family,
- is an AND logic gate IC,
- has a plastic packing and is dual-in-line.

NB: Supplement your learning from the lecture and lecture notes by independent study and discussions.