Mod 4 answers
1.Write equation for generate Gi and propagate Pi functions for stage i
2.Design a logic circuit to perform addition / subtraction of two 'n' bit numbers
XandY.
3.Design 4 bit carry look ahead logic and explain how it is faster them 4 bit ripple
adder. Writethe logical expressions for C1, C2, C3, C4.
4.Implement logical expressions for Si, C1, C2, C3 and C4 for 4 bit carry look
aheadadder
For a 4-bit carry lookahead adder, the carry output for each bit (C1, C2, C3, C4) depends
on the inputs (A0, B0, A1, B1, A2, B2, A3, B3) and the carry input (Cin). The logical
expressions for the carry outputs can be derived using the carry lookahead logic. Here are
the logical expressions for C1, C2, C3, and C4:
C1 = G0 + (P0 · Cin)
C2 = G1 + (P1 · G0) + (P1 · P0 · Cin)
C3 = G2 + (P2 · G1) + (P2 · P1 · G0) + (P2 · P1 · P0 · Cin)
C4 = G3 + (P3 · G2) + (P3 · P2 · G1) + (P3 · P2 · P1 · G0) + (P3 · P2 · P1 · P0 · Cin)
Where:
- G0, G1, G2, G3 are the generate signals for each bit.
- P0, P1, P2, P3 are the propagate signals for each bit.
The generate and propagate signals can be derived from the inputs A and B as follows:
Gi = Ai · Bi
Pi = Ai + Bi
So, for example:
- G0 = A0 · B0
- P0 = A0 + B0
And similarly for other bits.
These expressions capture the carry lookahead logic, enabling faster determination of
carry outputs without waiting for the carry ripple through the entire adder. They can be
implemented using logic gates such as AND, OR, and XOR gates.
In a carry lookahead adder, the sum output for each bit (S0, S1, S2, S3) depends on the
inputs (A0, B0, A1, B1, A2, B2, A3, B3) and the carry input (Cin). The logical expressions
for the sum outputs can be derived from the half-adder and full-adder equations. Here are
the logical expressions for Si:
S0 = A0 ⊕ B0 ⊕ Cin
S1 = A1 ⊕ B1 ⊕ C1
S2 = A2 ⊕ B2 ⊕ C2
S3 = A3 ⊕ B3 ⊕ C3
Where:
- ⊕ represents the XOR (exclusive OR) operation.
These expressions represent the sum output for each bit in the adder. They can be
implemented using XOR gates to calculate the sum of the corresponding input bits and
carry input.
5.Design the 16 bit carry look ahead adder using 4-bit adder. Also unite the
expression for Ci+1
The expressions for C1, C2, C3, C4 and Ci+1 would be calculated based on the individual
Gi and Pi generated from each bit's inputs A and B. These expressions would then be
combined to determine the carry input for the next stage, Ci+1.
In carry lookahead logic, Ci+1 is determined by the generate (Gi) and propagate (Pi)
signals from the current stage, along with the carry input (Ci). The expression for Ci+1 is:
Ci+1 = Gi + Pi · Ci
Where:
- Gi is the generate signal, representing whether the ith stage generates a carry.
- Pi is the propagate signal, representing whether the ith stage propagates a carry.
- Ci is the carry input to the ith stage.
Given that we have carry outputs C1, C2, C3, and C4 from each 4-bit adder stage, we can
derive Gi and Pi for each stage:
For the 1st stage:
- G1 = A0 · B0
- P1 = A0 + B0
For the 2nd stage:
- G2 = A1 · B1 + P1 · G1
- P2 = A1 + B1
For the 3rd stage:
- G3 = A2 · B2 + P2 · G2
- P3 = A2 + B2
For the 4th stage:
- G4 = A3 · B3 + P3 · G3
- P4 = A3 + B3
Then, we can use these expressions to calculate Ci+1:
Ci+1 = G4 + P4 · C4
This expression represents the carry input for the next stage based on the carry
lookahead logic.
6.List different methods of binary division
Certainly, here are shorter descriptions of different methods of binary division:
1. Long Division: Traditional method involving repeated subtraction.
2. Restoring Division: Divisor alignment and subtraction, adjusting if the result is too large.
3. Non-Restoring Division: Similar to restoring but adds back if the result is too small.
4. Radix-4 SRT Division: High-speed algorithm using lookup tables, producing two
quotient bits per iteration.
5. Booth's Algorithm: Multiplication-based method utilizing signed number representation
for faster division.
Each method varies in speed, complexity, and suitability for different scenarios.
7.Explain booth algorithm
8.Explain the concept of carry save addition for the multiplication operation, M(X)
Q=Pfor4- bit operands with diagram and suitable example.
9.. Explain the generation and propagation functions used in Carry look ahead
adder.
In a Carry Lookahead Adder (CLA), the generation (G) and propagation (P) functions are
essential for determining carry inputs to each stage of the adder. They help in predicting
whether a carry will be generated or propagated from lower-order bits, enabling faster
carry calculation without the need for ripple propagation. Let's delve into these functions:
1. Generation Function (Gi):
The generation function (Gi) for each bit position (i) indicates whether a carry must be
generated at that position, regardless of carries from lower-order positions. It solely
depends on the input bits at position i. The generation function is defined as:
Gi = Ai · Bi
Where:
- Gi is the generation function for bit position i.
- Ai is the ith bit of the first operand (A).
- Bi is the ith bit of the second operand (B).
If both Ai and Bi are 1, indicating a carry must be generated at that bit position, Gi
evaluates to 1.
2. Propagation Function (Pi):
The propagation function (Pi) for each bit position (i) determines whether a carry from a
lower-order position must propagate to bit position i. It depends on both the input bits at
position i and the carry inputs from lower-order positions. The propagation function is
defined as:
Pi = Ai + Bi
Where:
- Pi is the propagation function for bit position i.
- Ai is the ith bit of the first operand (A).
- Bi is the ith bit of the second operand (B).
If either Ai or Bi (or both) is 1, indicating a carry from lower-order positions must
propagate to bit position i, Pi evaluates to 1.
These functions are instrumental in CLA, as they enable the prediction of carry inputs
without the need for carry propagation from lower bits. By utilizing these functions, a CLA
can compute carry outputs swiftly, making it a preferred choice for high-speed arithmetic
operations.
10.Differentiate between restoring and non-restoring division
11.Explain Bit Pair Recording / Fast multiplication with an example.
12.With the help of necessary diagram write steps of restoring division algorithm.
13.Using sequential circuit binary multiplier, multiply 1101 with 1011.
14.Apply Booth Algorithm to multiply the signed numbers. using Booth's
algorithmandBit-pairrecording method multiply the following. a) +13 and -6 b) 14
and - 8
15.Perform division of number 8 by 3 (8 / 3) using the restoring division algorithm.
(refer module notes for numericals)
16.Explain circuit arrangement for binary integer division
The circuit arrangement for binary integer division includes:
1. Dividend and divisor registers to hold the numbers being divided.
2. Comparator to compare dividend and divisor.
3. Subtractor to subtract divisor from dividend.
4. Shifter to align registers during each iteration.
5. Quotient register to store the result.
6. Control logic to coordinate operations.
The process involves comparing, subtracting, shifting, and updating the quotient
iteratively until the division is complete.
