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4574 65 111 Integrated Circuits Lab Manual-1

The document outlines experiments in an electronics lab, focusing on measuring current, voltage, frequency, and phase shift in RC networks using an oscilloscope, as well as constructing various rectifier circuits and clipping circuits. It includes detailed procedures, theoretical background, and calculations for ripple factor and efficiency in rectifiers, along with circuit diagrams and expected results. The aim is to provide hands-on experience in electronic measurements and circuit design.

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0% found this document useful (0 votes)
26 views16 pages

4574 65 111 Integrated Circuits Lab Manual-1

The document outlines experiments in an electronics lab, focusing on measuring current, voltage, frequency, and phase shift in RC networks using an oscilloscope, as well as constructing various rectifier circuits and clipping circuits. It includes detailed procedures, theoretical background, and calculations for ripple factor and efficiency in rectifiers, along with circuit diagrams and expected results. The aim is to provide hands-on experience in electronic measurements and circuit design.

Uploaded by

ranya.rahana
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Department of Electronics & Computer Engineering

Exp No: 1
Date :

MEASUREMENT OF CURRENT, VOLTAGE, FREQUENCY AND PHASE SHIFT


OF SIGNAL IN A RC NETWORK USING OSCILLOSCOPE

AIM: -
To measurement of current, voltage, frequency and phase shift of signal in a RC
network using oscilloscope
COMPONENTS AND EQUIPMENTS REQUIRED: -
COMPONENTS SPECIFICATIONS QUANTITY
Resistor 10kΩ 1
Capacitor 0.1µF 1
Bread board
CRO

THEORY: -
An oscilloscope is an electronic measuring device which provides a two dimensional
visual representation of a signal. Because the oscilloscope allows the user to see the signal(s),
their characteristics can be easily measured and observed. The oscilloscope displays a graph of
voltage (on the vertical axis) versus time (on the horizontal axis). Most electrical circuits can
be easily connected to the oscilloscope typically with probes. oscilloscope, previously called
an oscillograph, and informally known as a scope, CRO (for cathode-ray oscilloscope), or DSO
(for the more modern digital storage oscilloscope), is a type of electronic test instrument that
allows observation of constantly varying signal voltages, usually as a two-dimensional graph
of one or more electrical potential differences using the vertical or 'Y' axis, plotted as a function
of time (horizontal or 'x' axis).
A Lissajous figure could be obtained on the CRO screen when two sinusoidal waves
are applied at the same time to both pairs of deflection plates. This method is also termed as
X-Y phase measurement. From this figure calculate the phase difference using the expression
𝑎
𝜃 = 𝑠𝑖𝑛−1 (𝑏)

CIRCUIT DIAGRAM
To measure the voltage, current and frequency of a signals

SJCET, Palai 1 ERL 202 Integrated Circuits Lab


Department of Electronics & Computer Engineering

To measure the phase difference of two signals

PROCEDURE: -
To measure amplitude (voltage) of a signal
1. Switch on the CRO. Obtain a sharply defines trace of a horizontal line on the screen by
adjusting intents and focus knobs.
2. Adjust the Y-position knob to make the trace to coincide with the center line on the
screen by keeping the AC-DC switch in GND position.
3. Count the number of divisions occupied by the signal from peak to peak.
4. Multiply this by the scale indicated by the AMP/DIV knob. This gives the peak-to-peak
amplitude of the signal. Half of this will give the maximum (peak) value of the voltage.
To measure the frequency of the signal
1. Obtain a sharply defined trace of horizontal line on the screen by adjusting INTENTS
and FOCUS knobs. Feed the signal whose frequency is to be measured, to either of the
channels using a probe and observe the signal on CRO.
2. Adjust the TIME/DIV knob so as to see two or three cycles of the waveform.
3. Count the number of divisions in one cycle of the waveform. Multiply this by the time-
base setting. This is the time period of the signal.
4. Reciprocal of the time period will give the frequency of the signal.
To measure the current
1. Attach a probe with the resistor to an electrical circuit. Make sure that resistor’s power
rating should be equal or greater than the power output of the system.
2. Now take the value of resistance and plug into Ohm’s Law to calculate the current.
According to Ohm’s Law,

To measure the phase difference of two signals


1. Set up the circuit on the bread board as shown in figure.
2. Feed a 2V sine wave to the input of the circuit.
3. Observe the input on the channel A and output on channel B. Keep the CRO in the
transfer characteristics mode. (This can be done by turning TIME/DIV knob to X via A
position or pushing x-y button).
𝑎
4. Calculate the phase difference using the expression 𝜃 = 𝑠𝑖𝑛−1 (𝑏)
RESULT
Studied how to measure amplitude, frequency and phase difference of signals.

SJCET, Palai 2 ERL 202 Integrated Circuits Lab


Department of Electronics & Computer Engineering

Exp No: 2
Date :
RECTIFIER
AIM:-
To assemble a half wave, full wave, and bridge rectifier circuit with C filter and to
calculate the ripple factor, efficiency and percentage of regulation.

COMPONENTS AND EQUIPMENTS REQUIRED:-

COMPONENTS SPECIFICATIONS QUANTITY


Diode 1N 4007 4
Resistor 1kΩ 1
Capacitor 100µF/ 50V electrolytic 2
Transformer 6 - 0 - 6V 1
Bread board
CRO

THEORY:-
Half wave rectifier:- A rectifier changes AC to DC. The unique property of a diode permitting
the current flow only in one direction is utilized in rectifiers. Due to the polarity, the diode will
conduct current in one cycle only. In the other cycle it will act as open circuit i.e., the entire
positive half cycles of step down AC supply passes through the diode and all negative half
cycles get eliminated.
Centre-tapped full wave rectifier:- During positive half cycle of the signal, the diode D1
conducts and D2 does not conduct. The current flows through the diode D1, load resistor and
upper half of the secondary winding of the transformer. During negative half cycle of the signal,
the diode D2 conducts and D1 does not conduct. The current flows through the diode D2, load
resistor and lower half of the secondary winding. Load current in both half cycles are in the
same direction.
Bridge rectifier:- During +ve half cycles of transformer secondary voltage, diodes D2 and D4
are forward biased and diodes D1 and D3 are reverse biased. The current then flows through,
secondary winding, D2, RL and D4. During -ve half cycle diodes D1 and D3 are forward biased
and D2 and D4 are reverse biased. The current then flows through secondary winding, D3, load
resistor RL and D1. In both cases current passes through RL in same direction. Ripple factor of
the bridge rectifier is same as that of centre-tapped full wave rectifier.
FILTER CIRCUITS
All rectifier outputs contains contain considerable amount of ripple in addition to the
DC component. In order to avoid the AC components, a filter is connected at the output of the
rectifier.
Capacitor as filter:-
The output of rectifier is pulsating DC. The capacitor filter is used to smooth the
pulsating DC. A high value capacitor is connected across the load resistance. The capacitor
offers low reactance to AC and high reactance to DC. Hence a small ripple will be available at
the output. When the rectifier output voltage increases, the capacitor charges to peak value.
When the output voltage falls, the capacitor discharges through the load. The discharging of

SJCET, Palai 3 ERL 202 Integrated Circuits Lab


Department of Electronics & Computer Engineering

capacitor is slow. When the rectifier’s output voltage rises, the capacitor charges again. This
repeats for each cycle.
The rms value of the filtered output is calculated assuming the wave as a triangular
wave and it is Vr, rms = Vrpp 23, where Vrpp is the peak-to-peak value of ripple voltage.
Average value (DC value), Vdc= Vm – (Vrpp /2)
γ =Vrms / Vdc
Ripple factor
For half wave rectifier, γ = 1/ 2√3 fCRL
For full wave rectifier, γ = 1/ 4√3 fCRL, where ‘f’ is frequency of un-rectified signal.
DESIGN:-
Output requirements of capacitor input filter
Ripple factor = 3%
1
Theoretical value of  =
4 3 fCRL
Frequency f = 50Hz. Assume RL = 1KΩ. Then C = 100µF (approx)
PROCEDURE:-
1. Wire the rectifier circuit without filter after testing all the components.
2. Apply the AC voltages from the transformer.
3. Observe the transformer secondary voltage waveform and output voltage waveform
across the load resistor simultaneously on the CRO by keeping AC – DC switch in DC
mode.
4. Calculate ripple factor and efficiency of the circuit.
5. Connect the capacitor filter and observe the waveforms. Note down Vm and Vrpp and
calculate ripple factor using the expression.
CIRCUIT DIAGRAM:-

Figure: Half wave Rectifier without filter

Figure: Half wave Rectifier with C filter

SJCET, Palai 4 ERL 202 Integrated Circuits Lab


Department of Electronics & Computer Engineering

Figure: Full wave Rectifier without filter

Figure: Full wave Rectifier with C filter

Figure: Bridge Rectifier without filter

Figure: Bridge Rectifier with C filter

SJCET, Palai 5 ERL 202 Integrated Circuits Lab


Department of Electronics & Computer Engineering

MODEL WAVEFORM:-

OBSERVATION:-

WITHOUT FILTER WITH FILTER (Vrpp)


RECTIFIER Time Time
Amplitude Amplitude
period period
Half wave
Full wave
Bridge
Calculations:-
For half wave rectifier
Vrms= Vm / 2, Vdc =Vm / π
Where, Vrms is the rms value of the input. Vdc is the average value of the input. Vm is the peak
value of the output.
2
V 
Ripple factor,  =  rms  − 1 , typically γ = 1.21.
 Vdc 
Rectification efficiency, η = dc power delivered to load  ac input from T/F secondary.
η = Pdc  Pac.
Pdc = V2dc/ RL = (Vm  ) 2/ RL

SJCET, Palai 6 ERL 202 Integrated Circuits Lab


Department of Electronics & Computer Engineering

Pac = V2rms/ (rd + RL), where rd is the dynamic forward resistance of the diode.
 R L  rd , = (Vdc ) 2 /(Vrms ) 2 .
The theoretical value is 40.6%
For Centre-tapped full wave rectifier
Vrms= Vm / √2, Vdc = 2Vm / π
2
V 
Ripple factor,  =  rms  − 1 , typically γ = 48.2%
 Vdc 
Rectification efficiency, η = Pdc  Pac.
For Bridge rectifier
Vrms= Vm / √2, Vdc = 2Vm / π
2
V 
Ripple factor,  =  rms  − 1 , typically γ = 48.2%
 Vdc 
With filter
Vrpp
Vrms 2 3
Ripple factor,  = =
Vdc Vrpp
Vm −
2
RESULT:-
Designed and observed output waveform of rectifier circuits with and without filters
and calculated ripple factor and efficiency.

Parameter HW FW BR
Without filter
γ
With C filter
η
INFERENCE

Viva questions:-
1. What is meant by filters?
2. What is a rectifier?
3. What is PIV of a diode in a rectifier circuit?
4. Define ripple as referred to in a rectifier circuit.
5. What is the value of ripple factor for half wave and full wave rectifiers?
6. How does the performance of the capacitor input filter improve when RC time
constant is increased?
7. Why the capacitor input filter is called so?

********

SJCET, Palai 7 ERL 202 Integrated Circuits Lab


Department of Electronics & Computer Engineering

Exp No: 3 (a)


Date :
CLIPPING CIRCUITS
AIM:-
To study various clipping circuits and observe their output wave forms.

COMPONENTS & EQUIPMENTS REQUIRED:-

COMPONENTS SPECIFICATIONS QUANTITY


Diode 1N 4007 2
Resistor 3.3K 1
Function generator 1
Bread board
CRO

THEORY:-
The property of a diode as a switching device is utilized in clipping circuits. Clipping
circuits are linear wave shaping circuits. They are useful to clips off the positive or negative
portions of an input waveform. It can also be used to slice off an input waveform between two
voltage levels. Using a positive clipper, a moderate quality square waveform can be generated
from a sine wave. The diode clippers can be classified as series and shunt clippers.
A resistance is used to limit the current flow through the diode. The value of the series
resistance used in the clipping circuit is given by the expression R = √ (Rf X Rr).
Where Rf = forward resistance of the diode, Rr = reverse resistance of the diode.
Positive clipper with clipping level at 0V
This circuit passes only negative going half waves of the input to the output. The entire
positive half cycles is bypassed through the diode since the diode gets forward biased when the
input voltage becomes positive. Due to the voltage drop across the diode the clipping occurs
exactly at + 0.6 V.
Negative clipper with clipping level at 0V
This circuit passes only positive going half waves of the input to the output. The entire
negative half cycles are bypassed through the diode since the diode gets forward biased when
the input voltage becomes negative.
Due to the voltage drop across the diode the clipping occurs exactly at - 0.6 V.
Positive clipper with clipping level at +3V
Till the input becomes greater than +3V, diode is reverse biased and the input will
appear at the output. When input exceeds +3V, diode becomes forward biased and dc source
voltage becomes appears at the output. Since the diode is in series with the dc source, the
clipping level is at +3.6V.
Negative clipper with clipping level at -3V
Till the input becomes less than -3V, diode is reverse biased and the input will appear
at the output. When input is less than -3V, diode becomes forward biased and dc source voltage
becomes appears at the output. Since the diode is in series with the dc source, the clipping level
is at -3.6V.

SJCET, Palai 8 ERL 202 Integrated Circuits Lab


Department of Electronics & Computer Engineering

Double clipper with clipping levels at +3V and -3V


This circuit is the merging of positive and negative clippers. During the positive half
cycle of the input, one branch will be effective and the other remains open and vice versa during
the negative half cycle. Actual clipping levels are +3.6V and -3.6V due to the diode drops.
Two-level slicer with slicing levels at +3V and +5V
This circuit allows the signal pass to the output only between +3V and +5V. During the
negative half cycle of the input, diode D1 conducts and diode D2 gets reverse biased. Thus the
output remains at +3V. During the positive half cycle of the input when input exceeds +3V, D1
is reverse biased and input appears at the output. If the input exceeds +5V, D2 conducts and
output remains at +5V. When the diode drop is considered, actual clipping occurs at +2.4V and
+5.6V.

DESIGN:-
For 1N4007:
The series resistance R = √Rf × Rr, where Rf is the forward resistance of the diode and Rr is the
reverse resistance.
Typical values are Rf = 30Ω, Rr=300K

 R = R f  R r = 30  300  10 3 = 3K, use3.3K


PROCEDURE:-
1. Setup the circuit as shown in figure.
2. Apply sinusoidal signal with 20V peak to peak from the function generator.
3. Observe the output in CRO at dc position and note down voltage levels.
4. Transfer characteristics of the circuit can be observed by feeding Vin to CH1 and Vo to
CH2 of the CRO and activating X-Y mode.
5. Repeat the process for various clipping circuits.

INPUT WAVEFORM

CIRCUIT DIAGRAM:- OUTPUT TRANSFER CHARA

Positive clipper with clipping level at 0V

SJCET, Palai 9 ERL 202 Integrated Circuits Lab


Department of Electronics & Computer Engineering

Negative clipper with clipping level at 0V

Positive clipper with clipping level at +3V

Negative clipper with clipping level at -3V

Double clipper with clipping levels at +3V and -3V

Two-level slicer with slicing levels at +3V and +5V


RESULT:-
Studied the characteristics of different clipping circuits and observed their output
wave forms.
INFERENCE

Viva questions:-
1. Define clipper, limiter and slicer.
2. What is the application of clippers?
3. What is the need of resistance in clipping circuits?
4. Why is the resistance mentioned above taken as (Rf*Rr) 1/2?

SJCET, Palai 10 ERL 202 Integrated Circuits Lab


Department of Electronics & Computer Engineering

Exp No: 3 (b)


Date :
CLAMPING CIRCUITS
AIM:-
To design and set up various clamping circuits using diode and study their performance.
COMPONENTS AND EQUIPMENTS REQUIRED:-

COMPONENTS SPECIFICATIONS QUANTITY


Diode 1N 4007 1
Capacitor 1µF / 25V 1
Function generator 1
Bread board 1
DC power supply 1
CRO

THEORY:-
In some situations it is necessary to add or subtract a DC voltage to a given waveform
without changing the shape of waveform. Circuits used for this purpose are called clamping
circuits. A capacitor which is charged to a voltage and subsequently prevented from
discharging can serve as a suitable replacement for battery. This principle is utilized in
clampers. Clamping circuits are also called DC restoring or inserting circuits.
1. Clamping negatively at 0.7V
During positive half cycle of input sine wave diode conducts and capacitor charges to
Vm with negative polarity at right side of the capacitor. During negative half cycle, the capacitor
cannot discharge as the diode will not conduct. Thus the capacitor act as a source of Vm-0.7v
connected in series with the input signal. Then output voltage, VO= -Vm+ 0.7+ Vm Sin wt.
2. Clamping positively at 0.7V
During negative half cycle diode conducts and charges to Vm-0.7v with positive
polarity at the right side of the capacitor. During positive half cycle, capacitor cannot discharge
due to diode being non- conducting. Thus capacitor acts as a DC source of Vm- 0.7v connected
in series with input. Then output voltage, VO= Vm +0.7v +Vm Sin wt.
3. Clamping positively at 2.3V
During the negative half cycle the capacitor charged through DC source and the diode
till (Vm+ 3 – 0.7v) with positive polarity at its right side. The charging of capacitor is extended
up to (Vm + 3 – 0.7v) due to the presence of DC source. Then output VO = (Vm+ 3 - 0.7v) + Vm
Sin wt.
4. Clamping negatively at 3.7V
During negative half cycle the capacitor charged through DC source and the diode till
(Vm - 3 - 0.7v) with negative polarity of the capacitor at its right side. The charging is limited
to (Vm- 3- 0.7v) due to the presence of Dc source. The output voltage, VO = - (Vm-3-0.7v) +Vm
Sin wt.

SJCET, Palai 11 ERL 202 Integrated Circuits Lab


Department of Electronics & Computer Engineering

5. Clamping negatively at -2.3V


During positive half cycle the capacitor charged through DC source and the diode till
(Vm + 3 – 0.7v) with negative polarity of the capacitor at its right side. The charging is extended
to (Vm+ 3 – 0.7v) due to the presence of DC source. The output voltage, VO= - (Vm + 3 – 0.7v)
+ (Vm Sin wt).

PROCEDURE:-
1. Connections are made as shown in figure.
2. From the function generator give a sine wave with 10V peak to peak to the input of the
circuit. Using another probe connect this input to CH 11 of the CRO.
3. Output of the circuit is connected to the other channel of the CRO and observed the
input and output wave forms at the same time. Characteristic curves can also be seen
in the CRO.
CIRCUIT DIAGRAM:- INPUT OUTPUT

Positive clamper at 0V

Negative clamper at 0V

Positive clamper at -3V

Negative clamper at +3V

SJCET, Palai 12 ERL 202 Integrated Circuits Lab


Department of Electronics & Computer Engineering

Negative clamper at -3V

Positive clamper at +3V

RESULT:
Studied various clamping circuits and observed their output wave forms.

INFERENCE

********

Viva questions:-
1. What are the other names of clamping circuits?
2. Give an application of clamping circuits?

SJCET, Palai 13 ERL 202 Integrated Circuits Lab


Department of Electronics & Computer Engineering

Exp No: 4
Date :
RC COUPLED AMPLIFIER
AIM:-
To design and set up RC coupled amplifier in common emitter configuration and plot
its frequency response with and without feedback.

COMPONENTS REQUIRED:-

COMPONENTS SPECIFICATIONS QUANTITY


Transistor BC107 1
Resistor 47KΩ, 2.2KΩ, 10KΩ,
680Ω 1
Capacitor 10µF 2
22µF 1
Function generator
Bread board
CRO
THEORY:-
RC coupled CE amplifier is widely used in audio frequency applications in radio and
TV receivers. It provides current, voltage and power gains. Base current controls the collector
current of a common emitter amplifier. A small increase in base current results in a relatively
large increase in collector current. Similarly, a small decrease in base current causes large
decrease in collector current. The emitter – base junction must be forward biased and the
collector – base junction must reverse biased for the proper functioning of an amplifier.
Common emitter amplifier accomplishes current and voltage amplification. In the circuit
diagram, an NPN transistor is connected in a common emitter AC amplifier. R1 and R2 are used
for forward biasing the base – emitter circuit. VCC is the DC supply which supplies collector
current to the transistor. It also functions as a source voltage to the voltage divider R 1 and R2.
The input signal VM is coupled through CC1 to the base and output voltage is coupled from
collector through the capacitor CC2.
PROCEDURE:-
1. Setup the circuit as per the circuit diagram without connecting the capacitor.
2. Check the DC conditions.
3. When the DC conditions are satisfied, the capacitors are connected and apply 50mV
peak to peak sinusoidal signal from function generator.
4. Keeping the amplitude constant, the input frequency is varied from 50Hz to 1MHz and
the corresponding output voltage was noted.
5. Then the frequency response curve is plotted.
6. Repeat step 3 and 4 without emitter capacitor.

DESIGN:-
Let the required Mid-band voltage gain of the amplifier = 100.
Selection of transistor - select transistor BC 107 since its minimum hfe is 100.
DC biasing conditions VCC = 12 V, IC = 2mA, VRC = 40% of VCC = 4.8 V,
VRE = 10% of VCC = 1.2 V and VCE = 50% of VCC = 6 V.

SJCET, Palai 14 ERL 202 Integrated Circuits Lab


Department of Electronics & Computer Engineering

Design of RC VRC = IC  RC = 4.8 V


From this we get RC = 2.4 K. Use 2.2 K std.
Design of RE VRE = IE  RE = 1.2 V
From this we get RE = 600. Use 680  std.
Design of voltage divider R1 and R2
From the data sheet of BC 107 its minimum hfe is 100.
IB = IC ∕ hfe = 2 mA ∕ 100 = 20 A.
Assume the current through R1 = 10 IB and current through R2 = 9IB to avoid loading
of potential divider by the base current.
VR2 = VBE + VRE
i.e., VR2 = 0.6 + 1.2 = 1.8 V. Also VR2 = 9IBR2 = 1.8 V
Then R2 = VR2 ∕ 9 IB = 10 K.
VR1 = VCC − VR2 = 12 V − 1.8 V = 10.2 V
Also VR1 = 10 IB R1 = 10.2 V
Then R1 = VR1 ∕ 10 IB = 51 K. select 47 K std.
[Design of RL
Gain of the is given by the expression AV = (rC || re)
Rc = Rc // RL
Here re = 25mV ∕ IE = 25mV ∕ 2 mA = 12.5 
Substituting the values we get RL = 2.7K]
Design of coupling capacitors CC
Then XC  RC ∕ 10
So, CC  1 ∕ 2fL  220 = 7.23 F. Select 10 F std.
Design of bypass capacitor CE
To bypass the lowest frequency (100 Hz) XCE Should be equal to one tenth or less than the
resistance RE
Then XCE  RE ∕ 10, CE  1 ∕( 2 x 100  68) = 23 F. Select 22 F std.
CIRCUIT DIAGRAM:-

SJCET, Palai 15 ERL 202 Integrated Circuits Lab


Department of Electronics & Computer Engineering

OBSERVATION
Vin =
𝑉0
Frequency, f (Hz) Log f Vo (V) 𝐺𝑎𝑖𝑛 = 20 𝑙𝑜𝑔10 ( )
𝑉𝑖𝑛

FREQUENCY RESPONSE

Band width = f2 – f1
RESULT:-
The circuit of RC coupled amplifier has been set up and frequency response curve is
plotted.
Mid band gain = dB
Band width = kHz
INFERENCE

VIVA QUESTIONS:-

1. What is meant by Q point?


2. What happens to bandwidth if Cc is reduced?
3. What are the functions of RE?
4. Why the gain of amplifier decreases if CE is removed?
5. Why is the efficiency of Class A amplifier very low?
6. What are self bias and fixed bias?
7. Give some examples of RC coupled amplifier?

********

SJCET, Palai 16 ERL 202 Integrated Circuits Lab

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