Assembly Level Programming

oWe have already discussed software is nothing but binary

patterns representing code (instructions) and data
oThese patterns will be decoded by the control logic of the
processor and accordingly control signals will be activated and
data will be moved around
Intel 8086 Microprocessor oFor humans writing software in binary is quite challenging and
extremely error prone
Data Addressing Modes oThis led to the development of assembly level programming
(ALP)
oLater for better productivity, we moved to high-level programming
2

Assembly Level Programming Assembly Level Programming

oRemember for out fictitious processor, we had a binary pattern oPrograms written using mnemonics are called assembly level
programs
0020H
oBut ultimately programs should be in machine code since that is
to store the number 0x20 in register 0
the language understood by the processor
oThis binary (hexadecimal) representation of program is what we
refer as machine code oHence somebody should convert assembly level programs to
machine code before executing it
oFor humans (neurotypicals), it will be easier to remember this
operation using mnemonics (expressions similar to natural oIt could be done manually (still quite error-prone) called hand-
languages) rather than the actual binary pattern assembling or with the help of computers with a special program
MOV R0,20H called the assembler
oThis considerably improves productivity, reduces errors and oSimilarly, disassembler converts machine code to assembly level
makes debugging much easier 3 program 4
Assembly Level Programming Sample 8086 Assembly program

oInstructions written in assembly usually will have two parts oFind the sum of 20H, 30H, 40H and 50H
MOV destination, source
mov ax, 20h ; Load 20h into AX
Opcode Operands
add ax, 30h ; Add 30h to AX
oopcode (stands for operational code) corresponds to the add ax, 40h ; Add 40h to AX
operation the processor needs to carry out add ax, 50h ; Add 50h to AX AX now contains
oAnd the operations are carried out on operations the result (E0h)
oAgain, coming back to the definition of software as collection of oMachine code for the above program
code and data, opcodes corresponds to the code portion and B8 20 00 05 30 00 05 40 00 05 50 00
operands corresponds to the data portion 5 6

Assembly program Execution Flow Addressing modes

o Addressing modes are different ways processor accesses code

or data stored in registers and memory to perform operations
o 8086 supports far more varieties of addressing modes compared
to its predecessors
o Later x86 family of processors support additional addressing
add.asm add.hex Load the hex file to
8086 assembler program Start processor modes
8086 main memory
o 8086 addressing modes we will consider data addressing
modes and program addressing modes separately
o We will use MOV instruction to demonstrate different data
addressing modes
7 8
Data Addressing modes Register Addressing

o Data addressing modes are used to access data o Copies one or more bytes from one register to another
MOV AX,BX
o They are classified as Copies 16-bit data from BX register to AX register
→ Register addressing
MOV AL,BL
→ Immediate addressing Copies 8-bit data from BL register to AL register
→ Direct addressing
MOV CH,AL
→ Displacement addressing Copies 8-bit data from AL register to CH register
→ Register indirect addressing
MOV AL,BX
→ Base plus index addressing
Trying to move 16-bit data from BX to AL (8-bit register)
→ Register relative addressing May be no syntax error but should not use
9 10
→ Base relative plus index addressing Practically copies BX to AX → AH is also modified

Register Addressing Immediate Addressing

oYou can move data between general purpose registers and oTransfers an immediate data (a constant byte or a word) to a
general-purpose registers and segment registers but you cannot register or memory
move data between segment registers
MOV AL,22
MOV AX,CX Copies data 22H to AL register (1 Byte data transfer)
MOV between general purpose register
MOV BX,49FE
MOV CS,BX Copies data 49FEH to BX register (2 Bytes (one word) data
MOV between general purpose and segment registers transfer)

MOV DS,CS MOV CH,145

MOV between segment registers is illegal Error since CH (1 byte register) cannot store 145H (2 bytes)
11 12
Immediate Addressing Immediate Addressing

oWhen moving data to register, the size of data (1-byte or 2-bytes) to oBut if you need to store 35H in memory address 2000H, the
copy assembler can understand from destination register size instruction will look exactly same
MOV AL,20;One byte transfer since AL is 1 byte
MOV AX,20;Two bytes transfer since AX is 2 bytes How to distinguish between them?
oBut when immediate data is moved to a memory location, assembler
cannot decide the data transfer size since using 8086 both 1-byte oWe need to add this information to the instruction
data and 2-byte data can be transferred to memory
MOV BYTE PTR [2000],35 ;move byte (1 byte)
oEg: We need to store 0035H in main memory starting from address
2000H (0035H will be stored as 35H in 2000H and 00H in 2001H MOV WORD PTR [2000],35 ;move word (2 bytes)
since Intel follows little endian architecture) MOV DWORD PTR [2000],35;move dword (4 bytes)
MOV [2000],35 13 14

Immediate Addressing Immediate Addressing

MOV WORD PTR [2000],35 ;move byte (1 byte)
Address
MOV WORD PTR [2000],35 ;move word
2000 35 MOV BYTE PTR [2000],35 ;move byte
2001 00
Latch oThe machine codes (binary) for MOV WORD PTR and MOV BYTE
2002 XX
PTR are different
2003 XX
Memory oThat is how the assembler understands which machine code to be
MOV BYTE PTR [2000],35 ;move byte (1 byte) used during assembling
Address oYou cannot move immediate data to segment registers
2000 35
2001 XX
Latch
2002 XX MOV CS,800 ;illegal
2003 XX 15 16

Memory
Direct Addressing Displacement Addressing

oMoves a byte or word between memory and AL or AX register oMoves a byte or word between memory and register
oThe address is directly specified in the instruction oLooks exactly same as direct addressing in assembly, but instead of AX or
AL any other register is used

MOV AX,[23FE] MOV CX,[23FE]

oCopies 16-bit data (word) from address 23FE to AX register. Since oCopies 16-bit data (word) from address 23FE to CX register. Since 16-bit
16-bit data, data in 23FE will get copied to AL register and 23FF to data, data in 23FE will get copied to CL register and 23FF to CH
AH
oDifference between direct and displacement addressing is in instruction
MOV [12FC],AL size
oDirect addressing takes 3 bytes in machine code whereas displacement
oCopies 8-bit data from AL register to address DS:12FC 17 18
takes 4 bytes

Displacement Addressing Register Indirect Addressing

oThere is no support for memory-to-memory data transfer in oData is accessed with the help of a pointer register
8086 oMemory address of data is stored in a pointer register, then using
MOV [34F8],[23FE] ;illegal that pointer data is accessed
oWe can use BP, BX, DI and SI as pointer registers
oFirst copy from memory to register and then register to memory oEg: Assume you need to copy data from address 1000 and 1001 to
MOV AL,[23FE] AX register
MOV [34F8],AL oWe can use BX register as pointer
MOV BX,1000 ;store address in pointer
MOV AX,[BX] ;using pointer, access data

19 20
Register Indirect Addressing Base Plus Index Addressing

oInstructions such as oSimilar to register indirect addressing, but uses two registers (one
MOV [DI],10 base and one index) to calculate the physical address
also creates ambiguity regarding size of data (whether 1-byte or 2- oCan use BP or BX as base registers
bytes) oCan use SI or DI as index registers
oWill have to use size specification MOV DX,[BX+SI]
MOV byte ptr [DI],10 ;move 1 byte
oMemory offset address here = BX+SI
MOV word ptr [DI],10 ;move 1 word
oThis style of addressing is very helpful in accessing array elements
MOV dword ptr [DI],10 ;move 1 dword
by storing the array start address in a base address and using an
oThe qualifiers byte ptr, word ptr etc. are assembler directives, index register to specify index number of array element
which help assembler to choose the proper machine code
21 22

Register Relative Addressing Base Relative Plus Index Addressing

oLike base+index, but instead of specifying the offset in a register, it is oCombination of base+index and register relative
specified as a 16-bit signed number oAddress is specified by a base register (BX or BP), index register (SI
or DI) and a 16-bit signed constant displacement
oBP,BX,SI or DI can be used to store the base address
MOV AX,[BP+100] MOV AX,[BX+SI+100]
MOV BL,[BX-200]
MOV CX,[SI+2000] oHere memory offset address will be BX+SI+100
MOV CL,[DI+305]

oDisplacement value between -32768 (8000H) to +32767 (7FFFH)

23 24
Thank you any
questions

25
 Background

oMost of the present-day computers use von-Neuman architecture

oThis means code and data share the same physical memory
oHence there is a real danger of a program over writing the
instructions and corrupting itself

Intel 8086 Microprocessor Memory Address(0x) Instruction

Memory Segmentation 1000 MOV AX,15H
1003 ADD AX,BX
1005 MOV [1000],AX ;Coding
2
mistake. wanted to store data in 2000H but accidently wrote 1000H

Background Memory Segmentation

oConsider memory with 20-bit address bus

oOverwriting an instruction results is unpredicted system behavior
and could be disastrous 10000H
10001H
oOne way to avoid it is to use Harvard architecture where physically . 64K Memory region to store code (instructions)
separate memory chips are used to store program and data .
1FFFFH
oOne idea is to logically partition a physical memory instead of 20000H
having physically multiple memory chips 20001H
. 64K Memory region to store data (Eg: variables)
oThat is what we do in memory segmentation .
2FFFFH

3 4
How to Segment? 8086 Programming Model Cont..

oThe idea is not to directly use the addresses specified in the →Contains the upper 16-bits of
program the starting address of a
Instruction Pointer (IP)(16) memory segment (partition)
oInstead use those addresses as an offset from a base address
Code Segment (CS)(16) →In 8086 the size of a segment
oFor example, in the previous memory partitioning, we observe most is 64KB
significant nibble for code partition is always 0x1 and for the data Stack Segment (SS) (16)

partition is always 0x2 →Total addressable memory is

Data Segment(DS)(16) 1MB
oSo instead telling the programmer that the actual address but is 20-
Extra Segment (ES) (16) →At any given point in time,
bits we tell him it is only 16 bits
there will be a maximum of 4
oThe upper 4-bits are added separately depending on which partition active segments present in the
memory
needs to be accessed
→Segments may overlap
5 6

Generation of Physical Memory Address Generation of Physical Memory Address

oSegment registers contain the upper 16-bits of memory address Eg:

oThis is called segment base address 0x1000 0x1FF0
oSegment base address is left shifted by 4 positions and added CS IP
with an offset to get final memory address called physical
address Physical address of instruction
oFor example, to fetch an instruction, 8086 uses instruction pointer Step 1: Left shift CS by 4 positions. 0x1000 << 4 = 0x10000
(IP)
Step 2: Add IP to it 0x10000 + 0x1FF0 = 0x11FF0
oInstruction pointer by default uses CS register to get its segment
o0x11FF0 is the final 20-bit address going to the memory
base address
oIt is called the physical address since physically that is the address
oPhysical address of instruction is obtained by left shifting CS by 4
seen by the memory
bits and adding IP
7 8
Generation of Physical Memory Address Example Segmented Memory
Address
20000H 2000
DS
Data segment

2FFFFH 348A
348A0H
CS
8086 BIU has a dedicated Code segment
adder to find the physical
address. Using ALU for this 4489FH
Purpose would have had 50000H
significant effect on performance 5000
SS Stack Segment
5FFFFH
70000H
7000 Extra segment
ES
9
7FFFFH 10
Bottom of data segment
Memory

Generation of Physical Memory Address Quick review of addressing modes

o20-bit physical address can be also represented in segment:offset Immediate addressing:

format MOV BYTE PTR [2000],35
oThus, address of an instruction can be represented as CS:IP oDefault segment register is data segment (DS)
oFor the previous example, physical address of instruction is 11FF0 o35H is copied to (DS<<4)+2000H
or 1000:1FF0 oThis instruction can be written with explicit segment register also
oThere is no memory access without a segment register MOV BYTE PTR DS:[2000],35
involved!!
oThe default segment can be overridden by explicitly specifying it
Access Type Default Segment Access Type Default Segment
Direct DS DI DS
MOV BYTE PTR ES:[2000],35
IP CS BX DS o35H is copied to (ES<<4)+2000H
SP SS BP SS
SI DS Immediate DS 11 12
Quick review of addressing modes Quick review of addressing modes

Direct/Displacement addressing: Base+Index/Register Relative/Base relative+Index:

MOV CX,[23FE] oBX, DI and SI use DS as the default segment register
oDefault segment register is data segment (DS) oBP uses stack segment
oData is copied from (DS<<4)+23FEH to CX MOV DX,[BP+SI]; Physical address = (SS<<4)+BP+SI
oDefault segment can be over-ridden
MOV AX,[BX+100]; Physical address = (DS<<4)+BP+100
MOV CX,SS:[23FE]
MOV AX,[BP+SI+100]; Physical address =
Register Indirect addressing:
(SS<<4)+BP+SI+100
oBX, DI and SI use DS as the default segment register
oAgain, default segments can be overridden
oBP uses stack segment
MOV AX,[BX]; physical address is (DS<<4)+BX
MOV AX,[BP]; physical address is (SS<<4)+BP
13 14

Caution!! Caution!!

oSize of an 8086-memory segment is always 64KB oWhat processor does is; it will only take 16-bits of offset for adding
oYou should be careful when you use addressing modes such as with segment register
base+index, register relative etc. to access data within the segment oIf offset contains more than 16-bits, it will drop the MS bits (upper
oEg: DS = 2000 → Segment starting address 20000, segment ending bits)
address 2FFFF, BX = E200 oFor previous example, total offset
MOV AX,[BX+1F2E] BX+1F2E = E200+1F2E = 1012E
oIf you blindly calculate physical address oSince 1012E contains 17 bits, MS bit is dropped and offset is taken
Physical Address = DS<<4+BX+1F2E = 3012E as 012E
oBut this address is not in this segment oThus, physical address is
DS<<4+012E = 2012E, which is with in the segment
15 oSimilar approach is taken if the final physical address calculated has 16

more than 20-bits

Other Advantages of Segmentation: Multi-tasking Other Advantages of Segmentation: Multi-tasking

oEarlier computers were not capable to multi-tasking and were used oIdea is to use different code/data segments for the two programs
for executing a single program for a single user
mov ax,bx mov ax,cx
oWhen multi-tasking was introduced, it was necessary to keep more add ax,cx sub ax,cx
mov [bx],ax mov [bp],ax
than one program concurrently in the main memory ……….
……….
……… ………
oIt is very much possible that these multiple programs were written ………
………
assuming they will be stored in the main memory starting at the
same address (Eg: Address 0x0)
oIf segmentation were not there, multi-tasking is not possible here pgm1.asm pgm2.asm
since both cannot concurrently occupy same address oStore both programs at address 10000H and 20000H and store
oBut with the help of segmentation, multi-tasking is possible 1000H in CS while executing program1 and 2000H in CS while
17 18
executing program2

Other Advantages of Segmentation: Multi-tasking Other Advantages of Segmentation: Multi-tasking

10000H 10000H
pgrm1 pgrm1

1000
CS 20000H CS 20000H

pgrm2 0000 pgrm2

IP IP
8086 8086

RAM Now 8086 is executing pgrm1 RAM

19 20
Other Advantages of Segmentation: Multi-tasking

10000H
pgrm1

2000 Thank you any

CS 20000H
questions
0000 pgrm2
IP
8086

Now 8086 is executing pgrm2 RAM 21

22
 Instructions

oAn instruction causes the circuit inside a processor to perform a set

of operations
o For example, instruction
MOV AX,BX
activates circuits to read from BX register and write that value to AX
Intel 8086 Microprocessor register
oAs we discussed in introduction, instructions written in mnemonics
Instruction Set Part-1 are converted into binary, which controls muxes and encoders and
state machines inside processor with help of control logic
oThus, control logic decodes an instruction 2

Instruction Set Data Movement Instructions

oSet of all instructions supported by a processor oData Movement instructions are used to transfer data between
oAny program written in any programming language needs to be registers, memory and I/O ports
ultimately converted to instructions from instruction set of that 1.MOV
processor to execute it Function: Copies data from a source to destination
oAll your word processing software, image editors, web browsers and Syntax: MOV destination, source
games are ultimately composed of these low-level instructions
Eg: MOV AX, BX ;copy data from Bx register to Ax
oWe use assemblers to convert assembly-level programs to binary
MOV [5000], AX ;copy data from Ax register to
representation of instructions and compilers to convert high-level
memory offset address 5000
language codes to binary instructions
MOV AL, [SI] ;copy one byte data pointed by
oBut your assemblers and compilers are also built using these
3 contents of ds:SI to AL register 4
instructions!!
Data Movement Instructions Data Movement Instructions

2.XCHG 3.LEA
Function: Exchanges the contents of two operands Function: Load Effective Address. Used to load a 16 bit register with
Syntax: XCHG destination, source the effective offset address
Eg: XCHG AX, BX ;swaps data between Ax and Bx Syntax: LEA 16-bit destination register, source
registers Eg: LEA BX, [SI+DI] ;store SI+DI in BX register
XCHG [5000], AX ;swaps data between Ax register o This instruction is widely used for initializing pointers
and memory offset address 5000 o Note that the destination should be always a 16-bit register
XCHG AL, [SI] ;swaps one byte data pointed by
contents of ds:SI and AL register
5 6

Arithmetic Instructions Arithmetic Instructions

oArithmetic instructions are used to perform various arithmetic operations
such as addition, subtraction, multiplication, division etc. 2.ADC
oBased on the result, flag register bits are modified
Function: Adds two operands along with carry and stores the result in
1.ADD
the destination operand
Function: Adds two operands and stores the result in the destination
operand Syntax: ADD destination, source
Syntax: ADD destination, source Eg: ADC AX,BX ;adds data from Ax register and Bx
Eg: ADD AX,BX ;adds data from Ax register to Bx Register wity carry and stores the result in Ax
register and stores the result in Ax register register
ADD AL,20 ;adds constant 20 to AL register and
stores result in AL register ADC AL,20 ;adds constant 20 and AL register
ADD [BP],Bx ;add content of Bx register with memory with carry and stores result in AL register
pointed by BP and store result in memory pointed by BP 7 8
Arithmetic Instructions Arithmetic Instructions

3.SUB 4.SBB
Function: Subtracts source operand from destination and stores the Function: Subtracts source operand and borrow flag bit from
result in the destination operand destination and stores the result in the destination operand
Syntax: ADD destination, source Syntax: SBB destination, source
Eg: SUB AX,BX ;subtracts BX register content from Eg: SBB AX,BX ;subtracts BX and borrow bit from Ax
Ax register and stores the result in Ax register register stores result in AX register
SUB AL,20 ;subtracts constant 20 from AL SBB AL,20 ;subtracts constant 20 and borrow bit
register and stores result in AL register from AL register and stores result in AL register

9 10

Arithmetic Instructions Arithmetic Instructions

4.INC 5.DEC
Function: Increments (adds 1) to register or memory location Function: Decrements (subtracts 1) from register or memory location
Syntax: INC destination Syntax: DEC destination
o When incrementing memory content, size of data must be described o When incrementing memory content, size of data must be described
using the BYTE PTR, WORD PTR directives using the BYTE PTR, WORD PTR directives
oINC instruction doesn’t affect the carry flag bit oDEC instruction doesn’t affect the carry flag bit

Eg: INC BL Eg: DEC BL

INC SP DEC SP
INC BYTE PTR[BX] DEC BYTE PTR[BX]
11 12
Arithmetic Instructions Arithmetic Instructions

6.CMP 7.MUL
Function: Compares two operands. Internally processor does a Function: Performs unsigned multiplication
subtraction Syntax: MUL source
Syntax: CMP destination, source o One implicit operand will be always AX or AL (depending on size of
o results are reflected in the flag register source) other could be memory or register but not immediate value
Condition Zero flag Carry flag o If MUL is used with 8-bit operands, the 16-bit product will be stored
destination==source 1 0 in AX register
destination>source 0 0
destination<source 0 1
o If MUL is used with 16-bit operands, the 32-bit product will be
stored in DX:AX register pair (DX upper 16 bits, AX lower 16 bits)
o A compare operation is usually followed by jump instruction
Eg: MUL BX
Eg: CMP AX,BX 13 14

Arithmetic Instructions Arithmetic Instructions

9.DIV
8.IMUL
Function: Performs unsigned division
Function: Performs signed multiplication
Syntax: DIV source
Syntax: MUL source
o The dividend will be always AX register or DX:AX register pair and
o One implicit operand will be always AX or AL (depending on size of source operand acts as the divisor
source) other could be memory or register but not immediate value oDivisor could be memory or register but not immediate value
o If IMUL is used with 8-bit operands, the 16-bit product will be stored o If DIV is used with 8-bit source, the 8-bit quotient (AX/source) will be
in AX register stored in AL register and the 8-bit reminder (AL%source) in AH register
o If IMUL is used with 16-bit operands, the 32-bit product will be o If DIV is used with 16-bit source, the 16-bit quotient (DX:AX/source) will
stored in DX:AX register pair (DX upper 16 bits, AX lower 16 bits) be stored in AX register and 16-bit reminder (DX:AX%source) will be
Eg: IMUL BX stored in DX register
15 Eg: DIV BX 16
Arithmetic Instructions Program Control Instructions

10.IDIV
JUMP Group
Function: Performs signed division
Syntax: IDIV source o Allows the programmer to skip sections of a program and branch to
any part of the memory for the next instruction
o The dividend will be always AX register or DX:AX register pair and
source operand acts as the divisor oA conditional jump instruction allows decisions based upon
oDivisor could be memory or register but not immediate value numerical tests
o If IDIV is used with 8-bit source, the 8-bit quotient (AX/source) will be oResults of numerical tests are held in the flag bits, which are then
stored in AL register and the 8-bit reminder (AX%source) in AH register tested by conditional jump instructions
o If IDIV is used with 16-bit source, the 16-bit quotient (DX:AX/source) will oSyntax: JMP_Instruction label (address)
be stored in AX register and 16-bit reminder (DX:AX%source) will be
stored in DX register
Eg: IDIV BX 17 18

Program Control Instructions Program Control Instructions

JUMP Group JUMP Group

oUnconditional jump: Makes a jump without checking for any condition oConditional jump instructions: Makes a jump only if certain condition is
met
oSyntax JMP Label (address)
oA conditional jump instruction follows an arithmetic/logical instruction
oShort jump: 2 Byte instruction. Allows jump within memory address +127
to -128 bytes from the address of JMP instruction+2 Menumonic Tested Condition Operation
JA Z = 0 and C = 0 Jump if above
oNear jump: 3 Byte instruction. Allows jump within -32KB to +32KB-1
JAE C=0 Jump if above or equal
from the address where jump instruction is stored (jump is within the
current code segment) JB C=1 Jump if below
JBE Z=1 Jump if below or equal
oFar jump: 5 Byte instruction. Allows jumping to anywhere in the memory
(1MB) JC C=1 Jump if carry
JE or JZ Z=1 Jump if equal or jump if
19 20
zero
Program Control Instructions Program Control Instructions

Menumonic Tested Condition Operation Menumonic Tested Condition Operation

JG Z = 0 and S = 0 Jump if greater than JO O=1 Jump if overflow
JGE S=0 Jump if greater than or equal JP or JPE P=1 Jump if parity or jump if
JL S != 0 Jump if less than parity even
JLE Z = 1 or S != 0 Jump if less than or equal JS S=1 Jump if sign (negative)
JNC C=0 Jump if no carry JCXZ CX = 0 Jump if CX is zero
JNE Z=0 Jump if not equal or jump if
not zero
JNO O=0 Jump if no overflow
JNS S=0 Jump if no sign (positive)
JNP or JPO P=0 Jump if no parity or jump if
parity odd 21 22

Program Control Instructions Program Control Instructions

Eg: Add 5 1-byte data starting from memory 2000H oIn the example loop is a label
MOV CX,5 ;used as loop control oThey are used as a place holder for address
MOV AL,0 ;initialize accumulator to 0 oIt will be difficult to manually calculate the offset address for the
jump instruction
MOV BX,2000 ;Will use as memory pointer
oInstead, we use a label to represent that address
loop:
oDuring assembling, assembler will replace the label with the
ADD AL,[BX] corresponding address
INC BX
DEC CX
JNZ loop ;check loop variable became 0 23 24
Thank you any
questions

25
 Stack Memory
0
oStack is a logical memory block allocated 2

in the main memory 4

6
oIn modern computers, each process will 8
have its own stack memory A
C
oThey are indispensable in the
E
Intel 8086 Microprocessor implementation of subroutines (functions)
since function variables (local variables),
10
12
Stack Memory and Subroutines function parameters and return addressStack Memory 14
are stored in the stack 16
18
oStack is implemented as a LIFO (Last in 1A
2
First Out) 1C

Stack Pointer Stack PUSH

0 0
2
oWe use push instruction to store new 2
oThere should be some way to track till
4 data into stack 4
what point data is available in stack
6 Eg: push AX 6
oThis is done with the help of stack 8 8
pointer (SP) A oThis causes SP to decrement its A
C content by 2 (thus points to next empty C
oStack pointer points to the top of
E location in stack) E
the stack→ stack pointer stores the 10 10
address till which data is filled 12
oStore the data at the location 12
Stack Memory 14 1234 Stack Memory 14
16 AX 16

001C 18 A5A5 001A

001C 18
1A 1234
XXXX 1A
SP 3 BX SP 4
XXXX 1C XXXX 1C
Stack PUSH Push Instructions
0
oNote than in the slides SP content is 2 o8086 push instruction always pushes a 16-bit value to the stack
directly used as the physical memory 4
address for simplicity 6
Eg:
oPractically the physical address 8 push ax ; push 16 bit register
A
pointed by stack will be C
push 16 ; Even if you write 16, 0016 is pushed
ss<<4+SP E push [1000];Contents of address 1000 and 1001 (16
10 bit data) is pushed
12
Stack Memory 14
pushf;Push 16-bit flag to stack
16

001A 18
1234 1A
SP 5 6
XXXX 1C

Stack POP Pop Instructions

0
oWe use pop instruction to pull data
2 o8086 pop instruction always pops a 16-bit value from the top of
from stack 4 the stack
Eg: pop BX 6
8 Eg:
oThis causes data from top of stack A pop ax;pops 16-bit data from stack memory and
(pointed by SP) to copy to the C
stores in ax
destination E
10 pop [1000];pops 16-bit data from stack and stores
oSP increments by 2
12 in address 1000 and 1001 (16-bit data)
1234 Stack Memory 14
AX
popf;pops 16-bit data from stack and stores in
16
18
flag register
XXXX
1234 001C
001A
1234 1A
BX SP 7 8
XXXX 1C
Swapping using Stack Swapping using Stack
0 0
push AX
oSwap AX and BX registers using Stack 2 2
4 4
6 6
8 8
A A
C C
E E
10 10
12 12
1234 Stack Memory 14 1234 Stack Memory 14
AX 16 AX 16

5678 001C 18 5678 001A 18

1A 1234 1A
BX SP 9 BX SP 10
XXXX 1C XXXX 1C

Swapping using Stack Swapping using Stack

0 0
push AX push AX
2 2
push BX 4 push BX 4
6 6
pop AX
8 8
A A
C C
E E
10 10
12 12
1234 Stack Memory 14 5678 Stack Memory 14
AX 16 AX 16

5678 0018 5678 18 5678 001A 5678 18

1234 1A 1234 1A
BX SP 11 BX SP 12
XXXX 1C XXXX 1C
Swapping using Stack Stack and Subroutines
0
push AX
2 oStack is indispensable in implementing sub-routines (functions)
push BX 4
6
oHave you wondered how a function returns once it finishes
pop AX execution?
8
pop BX A oEg:
C
main(){ foo(){
E
……… ………
10 ……… ………
12 foo() ………
5678 ……… return
Stack Memory 14 } }
AX 16

1234 001C 5678 18

1234 1A
BX SP 13 14
XXXX 1C

Stack and Subroutines Stack and Subroutines

oAssembly instruction used to call a subroutine is the call instruction oAssembly instruction used to return from a subroutine is the RET
o Eg: call myFunction instruction
oHere myFunction represents the starting address of the oA subroutine may have one or more RET instructions (similar to a
subroutine high-level language function having more than one return
statement)
oSo how program control goes to the subroutine is pretty straight
forward oYou should make sure in assembly the processor always
encounters an RET instruction
oThe starting address of the subroutine is loaded to the instruction
pointer (IP) oBut how the program flows comes back to the instruction after
CALL instruction since there are not return address specified with
the RET instruction?
15 16
oThat is where stack comes into picture
Stack and Subroutines Stack and Subroutines
main: add: 0 main: add: 0
100: mov ax,10 200: add ax,bx 2 100: mov ax,10 200: add ax,bx 2
103: mov bx,20 202: ret 4 103: mov bx,20 202: ret 4
106: call add 6 106: call add 6
109: mov cx,ax 8 109: mov cx,ax 8
A A
C C
XXXX E XXXX E
CX 10 CX 10
12 12
XXXX 100 Stack Memory 14 0010 100 Stack Memory 14
AX IP 16 AX IP 16

XXXX 001C 18 XXXX 001C 18

1A 1A
BX SP 17 BX SP 18
XXXX 1C XXXX 1C

Stack and Subroutines Stack and Subroutines

main: add: 0 main: add: 0
100: mov ax,10 200: add ax,bx 2 100: mov ax,10 200: add ax,bx 2
103: mov bx,20 202: ret 4 103: mov bx,20 202: ret 4
106: call add 6 106: call add 6
109: mov cx,ax 8 109: mov cx,ax 8
A A
C C
XXXX E XXXX E
CX 10 CX 10
12 12
0010 103 Stack Memory 14 0010 106 Stack Memory 14
AX IP 16 AX IP 16

0020 001C 18 0020 001C 18

1A 1A
BX SP 19 BX SP 20
XXXX 1C XXXX 1C
Stack and Subroutines Stack and Subroutines
main: add: 0 main: add: 0
100: mov ax,10 200: add ax,bx 2 100: mov ax,10 200: add ax,bx 2
103: mov bx,20 202: ret 4 103: mov bx,20 202: ret 4
106: call add 6 106: call add 6
109: mov cx,ax 8 109: mov cx,ax 8
A A
C C
XXXX E XXXX E
Automatic push Automatic push
CX 10 CX 10
12 12
0010 106 Stack Memory 14 0010 106 Stack Memory 14
AX IP 16 AX IP 16

0020 001C 18 0020 001A 18

1A 0109 1A
BX SP 21 BX SP 22
XXXX 1C XXXX 1C

Stack and Subroutines Stack and Subroutines

main: add: 0 main: add: 0
100: mov ax,10 200: add ax,bx 2 100: mov ax,10 200: add ax,bx 2
103: mov bx,20 202: ret 4 103: mov bx,20 202: ret 4
106: call add 6 106: call add 6
109: mov cx,ax 8 109: mov cx,ax 8
A A
C C
XXXX E XXXX E
CX 10 CX 10
12 12
0030 200 Stack Memory 14 0030 202 Stack Memory 14
AX IP 16 AX IP 16

0020 001A 18 0020 001A 18

0109 1A 0109 1A
BX SP 23 BX SP 24
XXXX 1C XXXX 1C
Stack and Subroutines Stack and Subroutines
main: add: 0 main: add: 0
100: mov ax,10 200: add ax,bx 2 100: mov ax,10 200: add ax,bx 2
103: mov bx,20 202: ret 4 103: mov bx,20 202: ret 4
106: call add 6 106: call add 6
109: mov cx,ax 8 109: mov cx,ax 8
A A
Automatic pop C C
XXXX E XXXX E
CX 10 CX 10
12 12
0030 202 Stack Memory 14 0030 109 Stack Memory 14
AX IP 16 AX IP 16

0020 001A 18 0020 001A 18

0109 1A 0109 1A
BX SP 25 BX SP 26
XXXX 1C XXXX 1C

Stack and Subroutines Stack and subroutine arguments and return value
main: add: 0
100: mov ax,10 200: add ax,bx 2 oStack can be used as a method to pass arguments and return
103: mov bx,20 202: ret 4 values(s) from a subroutine
106: call add 6
oIn 8086 this is slightly tricky
109: mov cx,ax 8
A oBefore calling the subroutine, you can push the arguments to the
C stack
0030 E oInside the subroutine, top of the stack is popped and backedup
CX 10 (that is the return address)
12
0030 109 Stack Memory 14
oThen arguments are popped
AX IP 16 oAfter processing return values(s) are pushed and then the return
0020 001A 18 address
0109 1A
BX SP 27 oIn the main function( calling function) return values are popped 28
XXXX 1C
Stack and subroutine arguments and return value Stack and subroutine arguments and return value
main: add: 0
oThe following example uses a subroutine add to find the sum of 2 100: push 100 200: pop cx 2

16-bit numbers 103: push 200 203: pop ax 4

106: call add 206: pop bx 6
oFunction arguments are passed through the stack and the return 109: pop cx 209: add ax,bx 8
value also comes through stack 20b: push ax A
20e: push cx C
oMain function passes 100H and 200H as the subroutine arguments
XXXX 211: ret E
CX 10
12
XXXX 100 Stack Memory 14
AX IP 16

XXXX 001C 18
1A
29 BX SP 30
XXXX 1C

Stack and subroutine arguments and return value Stack and subroutine arguments and return value
main: add: 0 main: add: 0
100: push 100 200: pop cx 2 100: push 100 200: pop cx 2
103: push 200 203: pop ax 4 103: push 200 203: pop ax 4
106: call add 206: pop bx 6 106: call add 206: pop bx 6
109: pop cx 209: add ax,bx 8 109: pop cx 209: add ax,bx 8
20b: push ax A 20b: push ax A
20e: push cx C 20e: push cx C
XXXX 211: ret E XXXX 211: ret E
CX 10 CX 10
12 12
XXXX 100 Stack Memory 14 XXXX 103 Stack Memory 14
AX IP 16 AX IP 16

XXXX 001A 18 XXXX 0018 0200 18

0100 1A 0100 1A
BX SP 31 BX SP 32
XXXX 1C XXXX 1C
Stack and subroutine arguments and return value Stack and subroutine arguments and return value
main: add: 0 main: add: 0
100: push 100 200: pop cx 2 100: push 100 200: pop cx 2
103: push 200 203: pop ax 4 103: push 200 203: pop ax 4
106: call add 206: pop bx 6 106: call add 206: pop bx 6
109: pop cx 209: add ax,bx 8 109: pop cx 209: add ax,bx 8
20b: push ax A 20b: push ax A
20e: push cx C 20e: push cx C
XXXX 211: ret E 0109 211: ret E
CX 10 CX 10
12 12
XXXX 106 Stack Memory 14 XXXX 200 Stack Memory 14
AX IP 0109 16 AX IP 0109 16

XXXX 0016 0200 18 XXXX 0018 0200 18

0100 1A 0100 1A
BX SP 33 BX SP 34
XXXX 1C XXXX 1C

Stack and subroutine arguments and return value Stack and subroutine arguments and return value
main: add: 0 main: add: 0
100: push 100 200: pop cx 2 100: push 100 200: pop cx 2
103: push 200 203: pop ax 4 103: push 200 203: pop ax 4
106: call add 206: pop bx 6 106: call add 206: pop bx 6
109: pop cx 209: add ax,bx 8 109: pop cx 209: add ax,bx 8
20b: push ax A 20b: push ax A
20e: push cx C 20e: push cx C
0109 211: ret E 0109 211: ret E
CX 10 CX 10
12 12
0200 203 Stack Memory 14 0200 206 Stack Memory 14
AX IP 0109 16 AX IP 0109 16

XXXX 001A 0200 18 0100 001C 0200 18

0100 1A 0100 1A
BX SP 35 BX SP 36
XXXX 1C XXXX 1C
Stack and subroutine arguments and return value Stack and subroutine arguments and return value
main: add: 0 main: add: 0
100: push 100 200: pop cx 2 100: push 100 200: pop cx 2
103: push 200 203: pop ax 4 103: push 200 203: pop ax 4
106: call add 206: pop bx 6 106: call add 206: pop bx 6
109: pop cx 209: add ax,bx 8 109: pop cx 209: add ax,bx 8
20b: push ax A 20b: push ax A
20e: push cx C 20e: push cx C
0109 211: ret E 0109 211: ret E
CX 10 CX 10
12 12
0300 209 Stack Memory 14 0300 20b Stack Memory 14
AX IP 0109 16 AX IP 0109 16

0100 001C 0200 18 0100 001A 0200 18

0100 1A 0300 1A
BX SP 37 BX SP 38
XXXX 1C XXXX 1C

Stack and subroutine arguments and return value Stack and subroutine arguments and return value
main: add: 0 main: add: 0
100: push 100 200: pop cx 2 100: push 100 200: pop cx 2
103: push 200 203: pop ax 4 103: push 200 203: pop ax 4
106: call add 206: pop bx 6 106: call add 206: pop bx 6
109: pop cx 209: add ax,bx 8 109: pop cx 209: add ax,bx 8
20b: push ax A 20b: push ax A
20e: push cx C 20e: push cx C
0109 211: ret E 0109 211: ret E
CX 10 CX 10
12 12
0300 20e Stack Memory 14 0300 211 Stack Memory 14
AX IP 0109 16 AX IP 0109 16

0100 0018 0109 18 0100 0018 0109 18

0300 1A 0300 1A
BX SP 39 BX SP 40
XXXX 1C XXXX 1C
Stack and subroutine arguments and return value Stack and subroutine arguments and return value
main: add: 0 main: add: 0
100: push 100 200: pop cx 2 100: push 100 200: pop cx 2
103: push 200 203: pop ax 4 103: push 200 203: pop ax 4
106: call add 206: pop bx 6 106: call add 206: pop bx 6
109: pop cx 209: add ax,bx 8 109: pop cx 209: add ax,bx 8
20b: push ax A 20b: push ax A
20e: push cx C 20e: push cx C
0109 211: ret E 0300 211: ret E
CX 10 CX 10
12 12
0300 0109 Stack Memory 14 0300 0109 Stack Memory 14
AX IP 0109 16 AX IP 0109 16

0100 001A 0109 18 0100 001C 0109 18

0300 1A 0300 1A
BX SP 41 BX SP 42
XXXX 1C XXXX 1C

Stack to restore register values Stack and subroutine arguments and return value
add: 0
oIt is possible that in subroutines you modify register values 100: mov ax,10 200: push ax 2
103: mov bx,20 201: pushf 4
oIt is also possible that different people write different subroutines 106: call add 202: add ax,bx 6
for the same program 109: mov cx,[1000] 204: mov [1000],ax 8

oHow do you make sure that you are not inadvertently modifying 208: popf A
209: pop ax C
register contents which are used in other subroutines?
XXXX 20a: ret E
oTo avoid this, a thumb rule is any register content you are CX 10
modifying within a subroutine should be restored before returning 12
0010 100 Stack Memory 14
from the subroutine
AX IP 16
oIn the following example, subroutine is modifying ax register, but is 18
XXXX 001C
restored before returning 1A
43 BX SP 44
XXXX 1C
Stack and subroutine arguments and return value Stack and subroutine arguments and return value
add: 0 add: 0
100: mov ax,10 200: push ax 2 100: mov ax,10 200: push ax 2
103: mov bx,20 201: pushf 4 103: mov bx,20 201: pushf 4
106: call add 202: add ax,bx 6 106: call add 202: add ax,bx 6
109: mov cx,[1000] 204: mov [1000],ax 8 109: mov cx,[1000] 204: mov [1000],ax 8
208: popf A 208: popf A
209: pop ax C 209: pop ax C
XXXX 20a: ret E XXXX 20a: ret E
CX 10 CX 10
12 12
0010 103 Stack Memory 14 0010 106 Stack Memory 14
AX IP 16 AX IP 16

0020 001C 18 0020 001A 18

1A 0109 1A
BX SP 45 BX SP 46
XXXX 1C XXXX 1C

Stack and subroutine arguments and return value Stack and subroutine arguments and return value
add: 0 add: 0
100: mov ax,10 200: push ax 2 100: mov ax,10 200: push ax 2
103: mov bx,20 201: pushf 4 103: mov bx,20 201: pushf 4
106: call add 202: add ax,bx 6 106: call add 202: add ax,bx 6
109: mov cx,[1000] 204: mov [1000],ax 8 109: mov cx,[1000] 204: mov [1000],ax 8
208: popf A 208: popf A
209: pop ax C 209: pop ax C
XXXX 20a: ret E XXXX 20a: ret E
CX 10 CX 10
12 12
0010 200 Stack Memory 14 0010 201 Stack Memory 14
AX IP 16 AX IP FlagReg 16

0020 0018 0010 18 0020 0016 0010 18

0109 1A 0109 1A
BX SP 47 BX SP 48
XXXX 1C XXXX 1C
Stack and subroutine arguments and return value Stack and subroutine arguments and return value
add: 0 add: 0
100: mov ax,10 200: push ax 2 100: mov ax,10 200: push ax 2
103: mov bx,20 201: pushf 4 103: mov bx,20 201: pushf 4
106: call add 202: add ax,bx 6 106: call add 202: add ax,bx 6
109: mov cx,[1000] 204: mov [1000],ax 8 109: mov cx,[1000] 204: mov [1000],ax 8
208: popf A 208: popf A
209: pop ax C 209: pop ax C
XXXX 20a: ret E XXXX 20a: ret E
CX 10 CX 10
12 12
0010 201 Stack Memory 14 0030 202 Stack Memory 14
AX IP FlagReg 16 AX IP FlagReg 16

0020 0016 0010 18 0020 0016 0010 18

0109 1A 0109 1A
BX SP 49 BX SP 50
XXXX 1C XXXX 1C

Stack and subroutine arguments and return value Stack and subroutine arguments and return value
add: 0 add: 0
100: mov ax,10 200: push ax 2 100: mov ax,10 200: push ax 2
103: mov bx,20 201: pushf 4 103: mov bx,20 201: pushf 4
106: call add 202: add ax,bx 6 106: call add 202: add ax,bx 6
109: mov cx,[1000] 204: mov [1000],ax 8 109: mov cx,[1000] 204: mov [1000],ax 8
208: popf A 208: popf A
209: pop ax C 209: pop ax C
XXXX 20a: ret E XXXX 20a: ret E
CX 10 CX 10
12 12
0030 204 Stack Memory 14 0030 204 Stack Memory 14
AX IP FlagReg 16 AX IP FlagReg 16

0020 0016 0010 18 0020 0018 0010 18

0109 1A 0109 1A
BX SP 51 BX SP 52
XXXX 1C XXXX 1C
Stack and subroutine arguments and return value Stack and subroutine arguments and return value
add: 0 add: 0
100: mov ax,10 200: push ax 2 100: mov ax,10 200: push ax 2
103: mov bx,20 201: pushf 4 103: mov bx,20 201: pushf 4
106: call add 202: add ax,bx 6 106: call add 202: add ax,bx 6
109: mov cx,[1000] 204: mov [1000],ax 8 109: mov cx,[1000] 204: mov [1000],ax 8
208: popf A 208: popf A
209: pop ax C 209: pop ax C
XXXX 20a: ret E XXXX 20a: ret E
CX 10 CX 10
12 12
0010 204 Stack Memory 14 0010 20a Stack Memory 14
AX IP FlagReg 16 AX IP FlagReg 16

0020 0018 0010 18 0020 0018 0010 18

0109 1A 0109 1A
BX SP 53 BX SP 54
XXXX 1C XXXX 1C

Stack and subroutine arguments and return value Stack and subroutine arguments and return value
add: 0 add: 0
100: mov ax,10 200: push ax 2 100: mov ax,10 200: push ax 2
103: mov bx,20 201: pushf 4 103: mov bx,20 201: pushf 4
106: call add 202: add ax,bx 6 106: call add 202: add ax,bx 6
109: mov cx,[1000] 204: mov [1000],ax 8 109: mov cx,[1000] 204: mov [1000],ax 8
208: popf A 208: popf A
209: pop ax C 209: pop ax C
XXXX 20a: ret E 0030 20a: ret E
CX 10 CX 10
12 12
0010 109 Stack Memory 14 0010 109 Stack Memory 14
AX IP FlagReg 16 AX IP FlagReg 16

0020 001C 0010 18 0020 001C 0010 18

0109 1A 0109 1A
BX SP 55 BX SP 56
XXXX 1C XXXX 1C
Stack Overflow (in 8086) Stack Overflow (in 8086)

oYou can see stack is a dynamic memory, it grows and shrinks oTo minimize the scenario, if you are using stack memory, it will be a
oIf you are not careful enough, it is possible that stack keeps good idea to initialize it to towards the end of the segment
growing and encroaches portions of memory where you are stored oMost 8086 systems initialize SP to 0xFFFE
other data/code
oThis could be catastrophic
oThis scenario is especially possible when you have recursive
subroutines
oEach time the subroutine is called, the return address is pushed to
the stack and if termination condition takes too long, stack overflow
may happen
57 58

Thank you any

questions

59