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HW12 Solution

The document presents a circuit analysis involving a MOSFET, where key parameters such as VDSQ, VDSmin, and VDSmax are calculated as 11V, 6V, and 14V respectively. It also includes the determination of ID and VDS for a separate circuit using Thevenin's equivalent, leading to results of VGS = 3V and ID = 2mA with VDS = 16V. The analysis employs KVL and saturation region assumptions to derive these values.

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17 views4 pages

HW12 Solution

The document presents a circuit analysis involving a MOSFET, where key parameters such as VDSQ, VDSmin, and VDSmax are calculated as 11V, 6V, and 14V respectively. It also includes the determination of ID and VDS for a separate circuit using Thevenin's equivalent, leading to results of VGS = 3V and ID = 2mA with VDS = 16V. The analysis employs KVL and saturation region assumptions to derive these values.

Uploaded by

吳宇崙
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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HW12

1. Consider the circuit shown in Figure (a). The characteristics of the MOSFET are shown
in Figure (b).
(i)Please find 𝑉𝐷𝑆𝑄 、 𝑉𝐷𝑆𝑚𝑖𝑛 and 𝑉𝐷𝑆𝑚𝑎𝑥 .
(ii)Please plot 𝑉𝐺𝑆 and 𝑉𝐷𝑆 versus time for the circuit.
𝑖𝐷 (𝑚𝐴)

𝑖𝐷 20
1KΩ
𝑣𝐺𝑆 = 5𝑉
15
𝐷
𝐺
𝑆 10 4𝑉
𝑣𝐷𝐷 = 15𝑉
𝑣𝑖𝑛 (𝑡) sin(2000𝜋𝑡)
5 3𝑉
𝑣𝐺𝐺 3𝑉
2𝑉

5 10 15 20
𝑣𝐷𝑆 (𝑉)
(a) (b)

1KΩ 𝑖𝐷

𝐷 𝑣𝐷𝐷 = 15𝑉
𝐺

𝑣𝑖𝑛 (𝑡) 𝑆
sin(2000𝜋𝑡) KVL
KVL
𝑣𝐺𝐺 3𝑉

Use KVL method:


𝑣𝐺𝑆 (𝑡) = 𝑣𝑖𝑛 (𝑡) + 𝑣𝐺𝐺 ⇒ 𝑣𝐺𝑆 (𝑡) = sin(2000𝜋𝑡) + 3 (1)
𝑣𝐷𝐷 = 𝑖𝐷 ∙ 1𝐾Ω + 𝑣𝐷𝑆 (𝑡) ⇒ 15 = 𝑖𝐷 ∙ 1𝐾Ω + 𝑣𝐷𝑆 (𝑡) (2)
According equation(2) we can plot load line

𝑖𝐷 (𝑚𝐴)

20

𝑣𝐺𝑆 = 5𝑉
15
load line

10 𝐴 4𝑉

𝑄𝑝𝑜𝑖𝑛𝑡
5 3𝑉
𝐵 2𝑉

5 10 15 20
𝑣𝐷𝑆 (𝑉)
𝑣𝐷𝑆𝑚𝑖𝑛 𝑣𝐷𝑆𝑄 𝑣𝐷𝑆𝑚𝑎𝑥

⇒ 𝑉𝐷𝑆𝑄 = 11𝑉, 𝑉𝐷𝑆𝑚𝑖𝑛 = 6𝑉 and 𝑉𝐷𝑆𝑚𝑎𝑥 = 14𝑉


𝑣𝐺𝑆 (𝑉)

4
𝑣𝐺𝑆 (𝑡) = sin(2000𝜋𝑡)
3 +3
2

𝑡(𝑚𝑠)
0.5 1 1.5 2
𝑣𝐷𝑆 (𝑉)

15
𝑣𝐷𝑆𝑚𝑎𝑥 = 14
11
10

𝑣𝐷𝑆𝑚𝑖𝑛 = 6
5

𝑡(𝑚𝑠)
0.5 1 1.5 2
2. Determine 𝐼𝐷 and 𝑉𝐷𝑆 for the following circuit. The transistor has Kn = 1mA/𝑉 2 ,
𝑉𝑇𝑁 = 1𝑉

𝐼𝐷
𝑅1 = 1.3MΩ

𝐷
𝐺 𝑣𝐷𝐷 20𝑉
𝑆

𝑅2 = 700KΩ 𝑅𝑠 = 2KΩ

cut

𝐼𝐷 𝐼𝐷

𝑅1 = 1.3MΩ
𝐷 𝐷 𝑣𝐷𝐷 20𝑉
𝐺 𝑅𝐺 𝐺
𝑣𝐷𝐷 20𝑉
𝑆 𝑆

𝑅𝑠 = 2KΩ 𝑅𝑠 = 2KΩ
𝑅2 = 700KΩ 𝑣𝐺 = 7𝑉

Thevenin's equivalent circuit:


𝑅2
𝑣𝐺 = 𝑣𝐷𝐷 = 7𝑉
𝑅1 +𝑅2

𝑅𝐺 = 𝑅1 //𝑅2 = 455𝐾Ω

Use KVL method:


Assume operate at Saturation region.
𝑣𝐺 = 𝑖𝐺 𝑅𝐺 + 𝑣𝐺𝑆 + 𝐼𝐷 𝑅𝑠 (𝑖𝐺 is too small so ignore it. )
𝑉𝐷𝑆 = 𝑣𝐷𝐷 − 𝐼𝐷 𝑅𝑠
{
1
𝐼𝐷 = 𝐾𝑛(𝑣𝐺𝑆 − 𝑉𝑇𝑁 )2
2
7 = 𝑣𝐺𝑆 + 𝐼𝐷 ∙ 2𝐾
𝑉 = 20 − 𝐼𝐷 ∙ 2𝐾
⇒ { 𝐷𝑆
1
𝐼𝐷 = ∙ 0.001 ∙ (𝑣𝐺𝑆 − 1)2
2
⇒ 7 = 𝑣𝐺𝑆 + (𝑣𝐺𝑆 − 1)2
2
⇒ 𝑣𝐺𝑆 − 𝑣𝐺𝑆 − 6 = 0
⇒ 𝑣𝐺𝑆 = 3𝑉
𝐼 = 2𝑚𝐴
⇒{ 𝐷
𝑉𝐷𝑆 = 16𝑉
Because 𝑉𝐷𝑆 > 𝑣𝐺𝑆 − 𝑉𝑇𝑁 , assumption is true.

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