Harvard Architecture

Last Updated : 31 Jan, 2025

In a normal computer that follows von Neumann architecture,

instructions, and data both are stored in the same memory. So same
buses are used to fetch instructions and data. This means the CPU
cannot do both things together (read the instruction and read/write
data). So, to overcome this problem, Harvard architecture was
introduced.

The Harvard architecture is a computer architecture that separates

memory storage and buses for instructions and data, unlike the von
Neumann architecture, which uses a single memory and bus for both.
This separation allows the CPU to access instructions and read/write
data simultaneously, overcoming the bottleneck of von Neumann’s
architecture and enhancing processing speed. By enabling parallel
access to instructions and data, the Harvard architecture improves
performance, making it particularly suitable for applications requiring
high-speed processing, such as embedded systems and digital signal
processing.

Structure of Harvard Architecture

 Structure of Harvard Architecture

Buses
Buses are used as signal pathways. In Harvard architecture, there are
separate buses for both instruction and data. Types of Buses:

Data Bus: It carries data among the main memory system, processor,
and I/O devices.
Data Address Bus: It carries the address of data from the processor
to the main memory system.
Instruction Bus: It carries instructions among the main memory
system, processor, and I/O devices.
Instruction Address Bus: It carries the address of instructions from
the processor to the main memory system.

Operational Registers
There are different types of registers involved in it which are used for
storing addresses of different types of instructions. For example, the
Memory Address Register and Memory Data Register are operational
registers.

Program Counter: It has the location of the next instruction to be

executed. The program counter then passes this next address to the
memory address register.

Arithmetic and Logic Unit: The arithmetic logic unit is part of the CPU
that operates all the calculations needed. It performs addition,
 subtraction, comparison, logical Operations, bit Shifting Operations,
and various arithmetic operations.

Control Unit: The Control Unit is the part of the CPU that operates
all processor control signals. It controls the input and output devices
and also controls the movement of instructions and data within the
system.

Input/Output System: Input devices are used to read data into main
memory with the help of CPU input instruction. The information from
a computer as output is given through Output devices. The computer
gives the results of computation with the help of output devices.

Features of Harvard Architecture

Separate memory spaces: Harvard architecture uses distinct
memory spaces for instructions and data, enabling simultaneous
access for faster processing.

Fixed instruction length: In Harvard architecture, instructions are of

fixed length, which simplifies the instruction fetch process and
allows for faster instruction processing.

Parallel instruction and data access: The separation of instruction

and data memories allows parallel access, improving overall
efficiency.

More efficient memory usage: Harvard architecture allows for more

efficient use of memory as the data and instruction memories can be
optimized independently, which can lead to better performance.

Suitable for embedded systems: Harvard architecture is commonly

used in embedded systems because it provides fast and efficient
access to both instructions and data, which is critical in real-time
applications.

Limited flexibility: The separate memory spaces restrict tasks like

modifying instructions at runtime, reducing flexibility.
 Advantage of Harvard Architecture
Fast and efficient data access: Since Harvard architecture has
separate memory spaces for instructions and data, it allows for
parallel and simultaneous access to both memory spaces, which
leads to faster and more efficient data access.

Better performance: The use of fixed instruction length, parallel

processing, and optimized memory usage in Harvard architecture can
lead to improved performance and faster execution of instructions.

Suitable for real-time applications: Harvard architecture is

commonly used in embedded systems and other real-time
applications where speed and efficiency are critical.

Security: The sepa5y spaces can also provide a degree of security

against certain types of attacks, such as buffer overflow attacks.

Disadvantages of Harvard Architecture

Complexity: The use of separate memory spaces for instructions and
data in Harvard architecture adds to the complexity of the processor
design and can increase the cost of manufacturing.

Limited flexibility: Harvard architecture has limited flexibility in

terms of modifying instructions at runtime because instructions and
data are stored in separate memory spaces. This can make certain
types of programming more difficult or impossible to implement.

Higher memory requirements: Harvard architecture requires more

memory than Von Neumann architecture , which can lead to higher
costs and power consumption.
Aptitude Engineering Mathematics Discrete Mathematics Operating System DBMS Computer Netw
Code size limitations: Fixed instruction length in Harvard
architecture can limit the size of code that can be executed, making it
unsuitable for some applications with larger code bases.
Frequently Asked Questions on Harvard Architecture
– FAQs

How can we distinguish Harvard Architecture from Von

Neumann Architecture?

Harvard Architecture has separate memory spaces for data and

instructions while Von Neumann Architecture has single memory
space for both making it slower than Harvard Architecture.

What are the types of buses present in Harvard Architecture?

The types of buses present in Harvard Architecture are Data Bus,

Data Address Bus, Instruction Bus, Instruction Address Bus.

What is the role of Program Counter in Harvard Architecture?

Program Counter is an operational register that is required to store

the address of instruction that will be executed next.

Related Articles
Computer Organization and Architecture Tutorials

Difference between Von Neumann and Harvard Architecture

Computer Organization – Von Neumann Architecture

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