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Aqua-V0.2 2

The document outlines the architecture of aqua v0.2, developed by Hai Cao, which includes components such as a branch predictor, fetch buffer, decoders, and execution units. It highlights the structure of the system with various units like the forwarding unit, schedule unit, and memory subsystems. The design emphasizes a streamlined process for instruction fetching and execution with specific capacities for each component.

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hung.phamvie186
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20 views1 page

Aqua-V0.2 2

The document outlines the architecture of aqua v0.2, developed by Hai Cao, which includes components such as a branch predictor, fetch buffer, decoders, and execution units. It highlights the structure of the system with various units like the forwarding unit, schedule unit, and memory subsystems. The design emphasizes a streamlined process for instruction fetching and execution with specific capacities for each component.

Uploaded by

hung.phamvie186
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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aqua v0.

2
Hai Cao

Branch Predictor Instruction


G-share Memory

8B/cycle
from BRU
Fetch Buffer — 3 entries

Decoder Decoder

Decode Queue — 32 entries

Forwarding Schedule
Unit Unit
RegFile

Arbitrator

ALU
AGU ALU
BRU to BP

Data
LSU
Memory

Writeback

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