RAVINDU BANDARANAYAKE #ictfromabc
ishÆ u ysñlï weúßKs /All Rights Reserved ]
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Ravindu Bandaranayake - ictfromabc Communication
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LOGIC GATES LESSON WISE PAPER
1.(a)(i) What is a Boolean event?
nQ,shdkq isoaêhla hkq l=ulao@
(ii) Define what a logic gate is and write examples of the 2 main types of division.
;d¾lsl oajdrhla hkak l=ulaoehs yÿkajd tAjd fnfok m%Odk wdldr 2 fukau tAjdg WodyrK ,shkak'
(b) Complete the resulting expression, the diagram of the gates, and the truth table of the gates after each input
is input through the gates.
tla tla wdodkhka oajdr u.ska wdodkh l, miq ,efnk m%ldYkho" oajdrj, wod, rEmigyko yd
oajdrj,g wod, i;H;d j.=jo iïmQ¾K lrkak'
Logic Gates (;d¾lsl oajdr)
AND OR NAND NOR XOR XNOR
Inputs (wdodk)
ICN
A B C A. B. C
1
2
3
4
5
6
7
8
(c) Draw the Venn diagram that matches each of the statements below.
my; tla tla m%ldYhkag .e,fmk fjka rEm igyk weo olajkak'
i. A AND B
ii. A NOT B
iii. A NOR B
iv. A XNOR B
v. A NAND B
vi. NOT B
vii. B
RAVINDU BANDARANAYAKE -2- #ictfromabc
2.(a) Consider the below expressions and simplify them using Boolean Laws.
my; m%ldYk i,ld n,d nQ,shdkq kS;s Ndú;fhka tAjd ir, lrkak'
(i) DD + C̅(DD
̅̅̅̅ + B1)
̅B
(ii) A ̅C̅ + A
̅B ̅ BC̅ + A
̅C + A ̅ BC + AB
̅C̅ + ABC̅
̅ + C)(B + C)
(iii) (A + B)(A
̅+B
(iv) (C + D)(C + A)(A ̅ + D)
̅ + B + C)
̅ + C)(A
(v) (A + B + C)(A + B
(b) Show that two methods of redundancy law can be prove by using other Boolean laws.
wfkl=;a nQ,shdkq kS;s Ndú;fhka iu;srsla; kHdh kS;sfha l%u fol ikd: l< yels nj fmkajkak'
(i) A + AB = A
̅ B = A+B
(ii) A + A
(c) A smart home security system uses sensors to monitor and trigger an alarm based on the following
conditions:
iqyqre ksjdi wdrlaIl moaO;shla my; i|yka fldkafoais u; mokïj wk;=re weÕùula ksÍlaIKh
lsÍug iy l%shd;aul lsÍug ixfõol Ndú;d lrhs(
• Input A:
The door is open
fodr újD;hs.
• Input B:
A motion detector senses movement inside the house
p,k wkdjrlhlg ksji ;=< p,kh wkdjrKh fõ.
• Input C:
The system is armed.
moaO;sh l%shd;aulhs (security mode is active / wdrlaIl udÈ,sh il%Shhs).
The output (X) of the system follows these rules
moaO;sfha m%;sodkh (X) fuu kS;s wkq.ukh lrhs:
The alarm is triggered (X = 1) if the door is open (A = 1) or motion is detected (B = 1) while the
system is armed (C = 1).
moaO;sh l%shd;aulú ;sìhos fodr újD;j ;sfí kï (A = 1) fyda p,khla wkdjrKh jqjfyd;a (B = 1)
wk;=re weÕùu l%shd;aul fõ. (X = 1) '
The alarm remains off (X = 0) if these conditions are not met.
fuu fldkafoais imqrd fkdue;s kï wk;=re weÕùu l%shd úrys;j mj;S. (X = 0)'
(i) Draw a truth table for the above scenario.
by; isÿúu ioyd i;H;d j.=jla weo olajkak'
(ii) Obtain a SOP expression from the above truth table and simplify it using the Boolean laws.
by; i;H;d j.=fjka SOP m%ldYkhla ,ndf.k nQ,shdkq kS;s Ndú;fhka th ir, lrkak'
(iii) Obtain a POS expression from the above truth table and simplify it using the Boolean laws.
by; i;H;d j.=fjka POS m%ldYkhla ,ndf.k nQ,shdkq kS;s Ndú;fhka th ir, lrkak'
RAVINDU BANDARANAYAKE -3- #ictfromabc
3.(a)(i) What is a Standard POS?
iïu; POS tlla hkq l=ulao@
(ii) Convert the following Boolean expressions into standard POS form.
my; nQ,shka m%ldYk iïu; POS wdldrh njg mßj¾;kh lrkak'
(A + B). (A + C). (B + C̅)
̅)(C + D)(A
(A + B ̅+D ̅)
(b)(i) What is a Standard POS?
iïu; SOP tlla hkq l=ulao@
(ii) Convert the following Boolean expressions into standard SOP form.
my; nQ,shka m%ldYk iïu; SOP wdldrh njg mßj¾;kh lrkak'
̅C + A
AB ̅B̅ + ABC̅D
ABC + AB ̅C + AC
(iii) What is the importance of converting from Non standard POS to standard POS and converting from Non
standard SOP to standard SOP ?
iïu; fkdjk POS isg iïu; POS njg iy iïu; fkdjk SOP isg iïu; SOP njg mßj¾;kh
lsÍfï jeo.;alu l=ulao@
(iv) Which one from Standard POS/SOP and simplified POS/SOP is most suitable when constructing
followings and why?
iïu; POS/SOP iy ir, l< POS/SOP j,ska my; ioyka oE f.dvkÕk úg jvd;a iqÿiq jkafka
l=ulao iy tfia th iqÿiq jkafka wehs oehs myokak'
Karnaugh Maps / ldfkda is;shï -
Truth Tables / i;H;d j.= -
Logic circuits / ;d¾lsl mßm: -
4.(a) Find Boolean expression using Boolean laws to demonstrate A ⊕ B ⊕ C using basic logic gates.
uQ,sl ;d¾lsl oajdr Ndú;fhka A ⊕ B ⊕ C ksrEmKh lsÍug nQ,shdkq m%ldYkh nQ,shdkq kS;s Ndú;fhka
fidhkak'
(b) Construct a 2 input XNOR gate using the basic logic gates.
uQ,sl ;d¾lsl oajdr Ndú;d lrñka wdodk 2l XNOR oajdrhla idokak'
Input / wdodkh 1 = A
Input / wdodkh 2 = B
Output / m%;sodkh = Z
(c) Fill in the truth table below according to the Boolean diagram constructed above.
by; f.dvk.d we;s nQ,Sh rEm igykg wkqj my; i;H;d j.=j mqrjkak'
A B ̅
A B ̅
A. B ̅. B
A A. B ̅. B
̅+A ̅̅̅̅̅̅̅̅̅̅̅̅̅
̅+A
A. B ̅. B
RAVINDU BANDARANAYAKE -4- #ictfromabc
(d) (2016 AL Question)
The top secret recipe for making milk rice at the restaurant chain SLFC is kept in an electronic safe
at their head office. The lock (L) of the safe can either be in locked or unlocked states represented by
logical truth values 0 and 1 respectively. This lock has three different key holes K1, K2 and K3 each
with a unique key. These three keys are in the custody of three directors of SLFC. The lock opens
when at least two keys are inserted into the corresponding key holes. The situation where the
corresponding key is properly inserted into any key hole is represented by the logical truth value 1
and all the other situations are represented by the logical truth value 0.
SLFC kue;s wdmk Yd,d odufha lsßn;a ms<sfh, lsÍu i|yd Ndú; lrk b;d ryis.; jÜfgdarej
m%Odk ld¾hd,fhys we;s wdrlaIs; úoHq;a fiamamqjl ;ekam;a lr we;' fuu fiamamqfjys w.=, (L)
w.=¨,d fyda w.=¨ wer fyda wjia:d foflka tll mej;sh yels w;r" tu wjia:d ms<sfj<ska 0 iy 1
hk ;d¾lsl i;H;d w.hka u.ska ksrEmKh lrhs' fuu w.=,g K1, K2 iy K3 hk tlsfklg fjkia
jQ h;=re isÿre ;=kla we;s w;r iEu h;=re isÿrlg u wkkH jQ h;=rla o we;' fuu h;=re ;=k
SLFC wdh;kfha wOHlaIljre ;sfokl= Ndrfha mj;S' h;=re isÿrej,g wju jYfhka wod< h;=re
follaj;a we;=<;a lr we;s úg w.=, újD; fjhs' ´kEu h;=re isÿrlg wod< h;=r ksis f,i we;=<;a
lr we;s wjia:dj ;d¾lsl i;H;d w.h 1 u.ska o wksla ish¨u wjia:d ;d¾lsl i;H;d w.h 0 u.ska
o ksrEmKh fõ'
Assuming that only the following Integrated Circuits (ICs) are available, construct a logic circuit to
operate the lock (L) of the safe, by using the truth tables and Boolean algebra. Clearly show the truth
tables, Boolean expressions and the Boolean algebraic rules used to construct your circuit.
my; olajd we;s ix.Dys; mßm: (ICs) muKla we;s nj Wml,amkh lrñka i;H;d j.= iy nQ,shdkq
ùc.Ks;h Ndú; lrñka by; w.=, (L) l%shd;aul lsÍu i|yd ;d¾lsl mßm:hla f.dvk.kak' Tfí
mßm:h f.dvke.Su i|yd Ndú; l< i;H;d j.=" nQ,shdkq m%ldYk iy ir, lsÍug fhdod.;a nQ,shdkq
ùc.Ks; kS;s meyeÈ,s j i|yka lrkak'
20 19 18 17 16 15 14 13 12 11 8 7 6 5
1 2 3 4 5 6 7 8 9 10 1 2 3 4
5.(a)(i) Which of the following arguments is used when simplifying using Karnaugh maps?
ldfkda is;shï Ndú;fhka ir, lsÍfï§ my; i|yka ;¾lj,ska l=uk ;¾lh Ndú;d lrkq ,nhso@
1) If an output changes when an input changes, then the input does not affect the output.
wdodkhla fjkia jk úg m%;sodkhla fjkia jqjfyd;a" wdodkh m%;sodkhg n,mdkafka ke;'
2) If an output does not change when an input changes, then the input does not affect the output.
wdodkhla fjkia jk úg m%;sodkhla fjkia fkdjkafka kï" wdodkh m%;sodkhg n,mdkafka ke;'
3) The number of 1s in the Karnaugh map determines the complexity of the simplified expression.
ir, l< m%ldYkfha ixlS¾K;ajh ldfkda is;shfï 1 .Kk ;SrKh lrhs'
4) Karnaugh maps are only useful for simplifying functions with up to four variables.
ldfkda is;shï m%fhdackj;a jkafka úp,H y;rla olajd we;s Y%s; ir, lsÍu i|yd muKs'
5) None of the above.
by; lsisjla fkdfõ.
RAVINDU BANDARANAYAKE -5- #ictfromabc
(ii) Which of the following rules is not a rule of a Kmap?
my; olajd we;s kS;s w;ßka ldfkda is;shul kS;shla fkdjkafka l=ulao@
1) All 1's and 0's in the output of the truth table must be represented in the Kmap.
i;H;d j.=fõ m%;sodkfha mj;sk ish¨u 1 iy 0 w.hka ldfkda is;shu ;=, ksrEmKh lr.; hq;=h'
2) An element that already exists in a group can be shared with another group.
ldKavhla ;=, oekgu;a mj;sk wjhj fjk;a ldKavhla iu. fnod yod .ekSu isÿl, yelsh'
3) A group can wrap around a Kmap.
ldKavhla ldfkda is;shula jgd t;S mej;sh yel'
4) Groups can exist along the diagonal.
úl¾K Èf.a ldKav mej;sh yel'
5) Subgroups should not be created using elements that already belong to a group.
fï jk úg;a lsishï ldKavhlg wh;a jk wjhj Ndú;fhka wkq ldKav iE§u isÿ fkdl, hq;=h'
(b) Among the Kmaps given below, indicate whether the correctly marked Kano maps are correct or incorrect.
my; olajd we;s ldfkda is;shï w;ßka ksjerÈj i,l=Kq lr we;s ldfkda is;shï bÈßfhka ksjerÈo"
jerÈo hkak ioyka lrkak'
(i)
(ii)
(iii)
(iv)
(v)
RAVINDU BANDARANAYAKE -6- #ictfromabc
(vi)
(vii)
(viii)
(ix)
(x)
(xi)
RAVINDU BANDARANAYAKE -7- #ictfromabc
(xii)
(xiii)
(c) Write the SOP and POS expressions derived from the Kmaps given below.
my; olajd we;s ldfkda is;shï u.ska iq¿ lrk ,o SOP yd POS m%ldYk ,shd olajkak'
(i)
(ii)
(iii)
RAVINDU BANDARANAYAKE -8- #ictfromabc
(iv)
(v)
(d) Which of the following is not correctly marked on the Kmap according to the truth table given below?
my; olajd we;s i;H;d j.=jg wkqj ksjerÈj i,l=Kq lr fkdue;s ldfkda is;shu jkafka l=ulao@
ICN A B C F
1 0 0 0 0
2 0 0 1 1
3 0 1 0 1
4 0 1 1 0
5 1 0 0 0
6 1 0 1 0
7 1 1 0 1
8 1 1 1 1
1) 2) 3)
4) 5) All of the above are correct.
by; ish,a,u ksjerÈ fõ
RAVINDU BANDARANAYAKE -9- #ictfromabc
• Arisu and Usagi are trapped in a game where they must solve puzzles involving binary calculations. The
system uses half adders, and their survival depends on understanding its logic.
Arisu iy Usagi oaúuh .Kkh lsÍï iïnkaO m%fya,sld úi¢h hq;= l%Svdjl isrù isá;s' moaO;sh
w¾O wdl,lhka Ndú;d lrk w;r" Tjqkaf.a meje;au r|d mj;skafka tys ;¾lkh f;areï .ekSu u;h'
6.(a) Arisu is tasked with completing the truth table for a half adder with inputs A and B. He needs to determine
the outputs: Sum (S) and Carry (C). Based on the completed truth table, derive the logic equations for both
outputs.
A iy B wdodk iys; w¾O wdl,lhla i|yd i;H;d j.=j iïmQ¾K lsÍu wßiqg mejÍ we;' Tyq
m%;sodkhka ;SrKh l< hq;=h( Sum (S) iy Carry (C)' iïmQ¾K lrk ,o i;H j.=j u; mokïj"
m%;sodk folgu ;d¾lsl iólrK jHq;amkak lrkak'
(b) The next game challenges participants to design distinct circuit implementations for the half adder.
B<Õ l%Svdfõ§" w¾O wdl,lh i|yd fjkia mßm: l%shd;aul lsÍï ie,iqï lsÍug iyNd.sjkakkag
wNsfhda. flf¾'
(i) Design the half adder circuit without using XOR gates. Instead, use only AND, OR and NOT gates to
implement the Sum and Carry outputs.
XOR oajdr Ndú;d fkdlr w¾O wdl,l mßm:h ie,iqï lrkak' tA fjkqjg" tl;=j iy /f.k hdfï
m%;sodk l%shd;aul lsÍug AND" OR iy NOT oajdr muKla Ndú;d lrkak'
(c) Arisu and Usagi are presented with a challenge to solve an 8-bit binary addition problem. They are given
two 8-bit binary inputs, A and B,
wßiq iy Wi.s 8-bit oaúuh tl;= lsÍfï .eg¿jla úi£u i|yd wNsfhda.hla bÈßm;a flfra' Tjqkag
A iy B hk 8-bit oaúuh wdodk folla ,nd § we;"
• A = 11011010
• B = 10110101
Your task is to draw the block diagram of an 8-bit binary adder, which includes a half adder for the least
significant bit and seven full adders for the remaining bits. Clearly label the inputs (A0 to A7, B0 to B7),
outputs (S0 to S7), and carry (Cin and Cout).
Tfí ld¾hh jkafka wju ie,lsh hq;= ìÜ i|yd w¾O wdl,lhla iy b;sß ìÜ i|yd mQ¾K wdl,l
y;la we;=<;a 8-bit oaúuh wdl,lfha íf,dla rEm igyk we£uhs' wdodk ^A0 isg A7 olajd" B0 isg
B7 olajd&" m%;sodk (S0 isg S7 olajd& iy /f.k hdu ^Cin iy Cout& meyeÈ,sj igyka lrkak'
Then, use the diagram to solve the binary addition problem and write the resulting sum (S) and the carry-
out (Cout).
bkamiq" oaúuh tl;= lsÍfï .eg¿j úi£ug rEm igyk Ndú;d lr m%;sM,hla f,i ,efnk tl;=j
(S) iy /f.k hdu (Cout) ,shkak'
7.(a) Fill in the blanks / ysia;eka mqrjkak'
Logic circuits can be mainly divided into two categories. The first type, called ___________, includes
circuits that perform operations based solely on current inputs. Examples include ___________,
___________, etc. The second type, ___________, use ___________ and store information, depending
not only on current inputs but also on past states. Examples include the ___________, ___________, etc.
;d¾lsl mßm: m%Odk jYfhka ldKav follg fnÈh yelsh' ___________, f,i y÷kajk m<uq j¾.hg"
j;auka wdodk u; muKla mokïj fufyhqï isÿ lrk mßm: we;=<;a fõ' WodyrKj,g ___________,
___________, wdÈh we;=<;a fõ' fojk j¾.h" ___________, j;auka wdodk u; muKla fkdj w;S;
;;ajhka u; mokïj ___________ Ndú;d lr f;dr;=re .nvd lrhs' WodyrKj,g ___________,
___________, wdÈh we;=<;a fõ'
[Feedback loops, Two-way switches, Flip-flops, Sequential circuits, Combinational circuits, SR latch,
Adders]
[m%;sfmdaIK Æm" oaú-ud¾. iaúp" ms,s-fmd<" wkql%ñl mßm:" ixhqla; mßm:" SR latch" wdl,l]
RAVINDU BANDARANAYAKE -10- #ictfromabc
(i) Write one structural and one functional difference between feedback loops and SR latches.
m%;sfmdaIK Æm iy SR latch w;r tla jHqyd;aul iy ld¾hnoaO fjkila ,shd olajkak'
(ii) Mention two instances where SR latches are used in day-to-day life.
tÈfkod Ôú;fha§ SR latch Ndú;d lrk wjia:d folla i|yka lrkak'
(b) John was in a hurry to meet his friend, Marta. He went to the apartment complex where Marta lives in and
got on the elevator. He wanted to go to the 4th floor but accidentally pressed the 2nd floor button instead.
Realizing his mistake, he quickly pressed the 4th floor button, hoping to fix it. To his surprise, when he
tried to "un-press" the 2nd floor button, nothing happened. The elevator still went to the 2nd floor first,
and only after that did the button clear itself and the elevator finally head to the 4th floor.
fcdaka ;u ñ;=ßh jk ud¾;d yuqùu ioyd l,n,fhka miq úh' Tyq ud¾;d isák uy,a ksjdi ixlS¾Khg
f.dia fidamdkhg ke.af.ah' Tyqg 4 jk uy,g hdug wjYH jQ kuq;a wyïfnka 2 jk uyf,a fnd;a;u
tnqfõh' isÿ jQ je/oao jgyd .;a Tyq blaukska 4 jk uyf,a fnd;a;u Tnd th ksjerÈ lsÍug
n,dfmdfrd;a;= úh' Tyq mqÿuhg m;a lrñka" 2 jk uyf,a fnd;a;u "un-press" lsÍug W;aidy l<
úg" lsisjla isÿ fkdùh' fidamdkh ;jo m<uqj 2 jk uy,g .sh w;r" bka miqj muKla fnd;a;u
th úiskau bj;a ù wjidkfha fidamdkh 4 jk uy,g .sfhah'
Then, he remembered something he had learned in Logic Gates lesson at school, that was similar to this
behavior, and he recalled: "Oh... this is like a feedback loop!".
bkamiq" Tyqg mdif,a§ ;d¾lsl oajdr mdvfï§ bf.k .;a fohla isysm;a lf<ah" th fuu yeisÍug
iudk jQ w;r" Tyq th isysm;a lf<ah( "wfka''' fïl m%;sfmdaIK Æmhla jf.a".
(i) Do you completely agree with John's conclusion? Explain your argument briefly.
Tn fcdakaf.a ks.ukhg iïmQ¾Kfhkau tlÕ fõo@ Tfí ;¾lh fláfhka meyeÈ,s lrkak'
(ii) Construct the logical circuit that matches the functionality of the elevator's floor buttons using NOR gate/s.
NOR oajdr^hla& Ndú;fhka fidamdkfha ìï fnd;a;ïj, l%shdldÍ;ajhg .e,fmk ;d¾lsl mßm:h idokak'
(iii) This mechanism stores the input when a floor button is pressed (high), and clears it when a sensor signals
that the elevator has arrived at the floor (high). Complete the timing diagram, showing the state of the Q
output over time with the given changes to the Set and Reset switches. Assume that Q begins in the high
state on power-up.
fuu hdka;%Kh ìï fnd;a;ula tnQ úg ^by<& wdodkh .nvd lrk w;r" ixfõolhla fidamdkh ìug
^by<& meñK we;s njg ix{d lrk úg th clear lrhs' Set iy Reset iaúp i|yd ,nd § we;s
fjkialï iuÕ ld,h;a iuÕ Q m%;sodkfha ;;a;ajh fmkajk ld, igyk iïmQ¾K lrkak' n,h
we;s úg Q by< ;;ajfhka wdrïN jk nj Wml,amkh lrkak'
Set
Reset
̅
Q