We have discussed about the two main crystal growth techniques,

The Bridgman crystal growth technique is a simpler process but,

there will be a lot of dislocations present .

While in Czochralski technique , the crystal is pulled out of the melt

by the seed crystal. Therefore, the amount of defects present in this
crystal will be much less.
Cz technique is more complicated, more expensive equipment is
needed, but it will give much better quality of crystal, much lesser
defect density.

But, the Czochralski grown crystal is still not the perfect crystal that
we would, may like to have for certain applications.
The primary source of problems in a Czochralski grown crystal is
because of the oxygen.
if this oxygen is beyond a certain limit, then this oxygen will be
precipitated inside the crystal and from where dislocations will
emanate.
If we are trying to fabricate power devices on such a material, then
those devices may have lower breakdown voltage, premature
breakdown or higher leakage current.

if you have very stringent requirements, then it may be necessary

to further purify the Czochralski grown crystal and that is called
zone refining.

Zone refining is even more expensive but the idea is fairly simple.
We have a water cooled silica envelope just like in a Czochralski
unit and have gas inlet and gas outlet. an inert ambient has to be
provided
Impurity Type Distribution Coefficient

As n-type dopant 0.3

P N-type dopant 0.35

B P-type dopant 0.72

Au Defect 2.2 x 10-5

Fe Defect 6.4 x 10 -6

O Defect 1.25
• Dopant concentration is not constant
- Less at start, more at the end
- Wafers always specify a range (1-10 Ohm-cm), never exact
numbers
• Stating end is more pure than the end
- Front of the ingot yield “PRIME” grade wafers
Float Zone Technique (Fz technique) :-
• A silicon bar is vertically hold in cooled silica envelope.
• At one end of this silicon bar, a small seed crystal is fixed.
• The heating is provided by the movable RF source.
• The heating starts from the seed end of the silicon bar and a
small region about 1.5 cm in length that is first molten. Now the
heater is moved slowly along the length of the rod.
• As the heater is moving up, it will leave behind a portion of
silicon that is getting solidified and since that portion is in
contact with the seed crystal, it will grow as a single crystal as a
continuation of the seed crystal itself.
• The advantage is that here is no need of a crucible. Therefore,
do not introduce any contamination.
• So, by this technique we can reduce the oxygen content by a
factor of 10 or even 100 and no dissolved impurity,
• So, the purity of the float zone crystal much better than the
normal Czochralski grown crystal.
• A float zone material will necessarily have lesser oxygen
content,
• better resistivity and the devices fabricated on this will have
higher breakdown voltage of 1000 volts or so..
• After we get this single crystal a lot of mechanical and chemical
processes will involve to get the wafer. The seed end and the
bottom end are normally cut off as they are not used.
• Then mechanically it has to be grinded out. Then, it has to be
cut into slices, then each slice has to be chemo mechanically
polished;
• By using a slurry of aluminum oxide and glycerin, chemo
mechanically polish can be performed, so finally have one
surface mirror polished that is the surface on which you are
going to fabricate device.
A typical {111} p-type wafer has one major flat. If you see this
major flat, it is a p-type {111} wafer.
If it is a p-type {100} wafer, it will have two flats.
An n-type {100} wafer will have two flats that are 1800 to each
other.
Depending upon where the flat is, you can tell the doping type
and the orientation of the wafer.
Next, the ingot is sawed into wafers, but during the sawing
process, always create damage at the surface.
So, in order to remove that damage typically you etch around
20 microns of the surface of the wafer.
This is typically done chemically, using a variety of baths;
some of them are acidic in nature, some of them are basing in
nature.
Chemical Etching :-
After sawing , wafer surface is damaged and contaminated

Usually 20 micrometer of the surface etched off

- Done in chemical baths

Case; 1:- HNO3:CH3COOH:HF (4:3:1)

- Etch is isotropic (same in all directions): but needs stirring
- Not very uniform for large sizes

NaOH or KOH
- Etch is anisotropic so needs no stirring
- Uniform for large wafers too.

in order to smooth it to an optical finish, you then do chemical

mechanical polishing.
Specifications and applications for Si wafer
Specifications Applications
Float Zone Si High efficiency solar cell, highly resistive
substrates, power electronics , detectors
Si (111) Prime Bipolar Junction Transistor
Si (100) Prime General purpose , Field effect transistors
Si (110) Prime Perpendicular tranches in microfluidics,
Higher mobility p-channel FET
Test/Mechanical grade MEMS, NEMS, dummy samples, substrate
Si for characterization experiments
Micro-crystalline/solar For low cost sola cells
grade
Double side polished Structures with back alignment, devices on
(DSP) wafer both front and back, etc.
• This bulk material can then be subjected to some guttering
processes.
• The active region of the device is free of any metallic
contamination through guttering process .
• The actual silicon wafer is, may be 300 to 500 microns thick ie 0.3
to 0.5 mm, but the actual device is contained may be within the
first maximum 5 or 10 microns and rest of the crystal is only going
to give you the mechanical support.
• The active region (top few microns) can make free from any
metallic contamination via guttering process , can be extrinsic or
intrinsic.
• The extrinsic guttering, mean that the wafer is subjected to
LASER aberration or electron irradiation in the back side of the
wafer not polished side of the wafer.
It will give rise to dislocations near the back surface and these
dislocations will act as sinks for metallic contamination. So, when
the wafer is subjected to processing, if there are metallic
contaminants, they will travel through the active region of the
device and get sunk at the bottom, so that the active region of the
device is free of such contaminants.
The intrinsic guttering:- it uses the oxygen, is in the crystal. if the
oxygen is above a certain range, then it will give rise to
precipitates, are usually undesirable because dislocations will
emanate from that. But, has advantageous when such precipitates
are not there in the active region.
• The wafer is heated at 10000C or above in an inert ambient.
The oxygen from near the surface will be evaporated and so,
the active region is free of this oxygen precipitates.
but wafer still have oxygen precipitates deeper in the bulk, which
can be used as guttering centers, which can be used as sinks for
metallic impurities.
But for various applications, just having this bulk single crystal is
not enough.
So go for the second processing step after crystal growth known as
epitaxy.
Epitaxy :- is a combination of two words - epi means upon and
taxis means ordered - ordered upon. Means the epitaxial layer is
arranged or ordered upon the bulk crystal (grow a thin layer, much
thinner than this bulk crystal, thickness of the order of few
microns or fraction of microns , arranged on the top of already
existing bulk single crystal)
Can we grow anything on anything?
So there are two type of epitaxy – Home and Hetero epitaxy.
Homo epitaxy :- Growth of the same material layer over the
same material bulk crystal, may be of a different doping
concentration, of a different resistivity. This epitaxy is fairly simple.
Hetero Epitaxy :- Growth of the material of the epitaxial layer
which is dissimilar from the bulk material. A very common example
of hetero epitaxy is silicon on sapphire (SOS).
Sapphire is actually nothing but Aluminium oxide, Al2O3. It has a
hexagonal lattice pattern and silicon has a diamond lattice
structure. So, hetero epitaxy is much more complicated.
The three cardinal rules should be followed during hetero epitaxy –
(i) No chemical reaction between the substrate and the epitaxial
layer (truly very stringent)
(ii). No lattice mismatch but can tolerate up to a certain level.
When there is a lattice mismatch, there will be a lot of strain in the
epitaxial layer and can be tolerated up to certain thickness .
The hetero epitaxy is particularly useful for compound
semiconductor technology, because we want so many things like
aluminum gallium arsenide on gallium arsenide (lattice is matching
perfectly) , indium gallium arsenide on gallium arsenide (lattice is
not matching).
(iii). The coefficient of thermal expansions should match.

Epitaxy system can be classified as

(i). Liquid phase epitaxy (LPE)
(ii). Vapour phase epitaxy and (VPE)
(iii). Molecular beam epitaxy (MBE)

(i). Liquid Phase Epitaxy (LPE):-

Liquid phase epitaxy (LPE) :- It is not much useful for the Silicon
because it is very difficult to dissolve. So we almost always use
vapour phase epitaxy for Silicon. Liquid phase epitaxy is done in
liquid phase. We have a solution and cool down the solution. Due to
cooling (temperature is reduced), the solubility will be reduced and
there will be a precipitate of solute. For example. If a wafer of
gallium arsenide is in contact with the solution of Gallium as it is
being cooled, then precipitate and will be deposited on the bulk
crystal. The precipitate will take the orientation of the bulk crystal
only by very carefully controlled deposition and will get single crystal
epitaxial layer on the bulk crystal itself.

Vapour phase epitaxy (VPE) :- The material transport must be in

form of vapour. So, we have to use gas reactants.
We have to use some gas or a liquid with a very high vapour
pressure, which can be vaporized very easily.
Principle of VPE:- The system is very simple. Samples are placed on
a sample holder. The gas, containing the reactants flow over the
samples in controlled manner (by mass flow controllers). The
reactants will react with the samples and deposition will take place
on top of the samples.

Problems in Vapour phase epitaxy :- The gas containing the

reactants, is flowing inside with a finite velocity. But, just at the
point of contact at the substrate, the velocity is zero. So, in the
stream, the gases have finite velocity and at the surface boundary,
the velocity is zero. So, in between there must be a region where
the velocity is changing from this finite velocity to zero velocity and
there must be a region very close to the substrate where this
velocity is very low.
A stagnant layer or boundary layer of reactants is formed as the
reactants are not moving very fast.
The flow of the gas inside the tube is characterized by Reynolds
number. Reynolds number is given by the equation

Where
d is the diameter of the tube through which the gas flow is taking
place,
v is the velocity of gas flow
ρ is the density of the gas and
μ is the viscosity of this gas
If this Reynolds number is less than 2000, than the flow a laminar
flow and if it is higher than 2000, it is a turbulent flow.
For VPE system, the Reynolds number is much less than 2000. it
is around 100 or 200 or maximum 500,
The width of the boundary layer or the stagnant layer is related
to the Reynolds number by the formula,

by substituting the value of NR from the first equation, we get as

where x is the distance along the chamber.

 i.e. the width of the stagnant layer is increases as we move along
the epitaxy chamber.
Only distance ‘x’ along the chamber and the velocity ‘v’ of the gas
can be controlled , the viscosity ‘μ’ and the density ‘d’ of the gas.
cannot be controlled as these are material properties.
The development of stagnant layer means gas is not flowing there.
Therefore, the reactants in the gas stream will get exhausted.
So, we will not get constant epitaxial layer growth as If the
stagnant layer width is varying from point to point, the growth
rate will also vary from point to point along the chamber, and in
result, will have different thicknesses of epitaxial layer on different
samples.
So, it is very important to control the velocity of the gas flow in
order to make sure that the stagnant layer thickness is within
acceptable limits.
The flux is given by the equation as

Where, Ng is the concentration of the reactants in the gas,

Ns is the concentration of reactants on the surface.
D is the proportionality constant or the diffusion constant, The
negative sign signifies that the flow is from the higher
concentration side to the lower concentration side. Therefore, the
concentration gradient is given by Ng -Ns divided by the thickness
of the boundary layer y
So , if the deposition has to take place, then this flux must be high.
There must be a movement of the reactants on to the surface. The
boundary layer thickness must be made small with high velocity of
gas flow, but remember within a certain limit as the Reynolds
number cannot go beyond 2000.
Apart from that, a very high level of cleanliness should be
ensured by taking proper care of the chamber material.
The chamber is made of very high purity quartz and the gas inlets
and outlets are with seamless stainless steel pipes.
The reactants may need a carrier gas and 6N purity hydrogen is
usually used as a carrier gas.
The heating system, can be again either RF heated or resistance
heated. But, one prefers RF heating, over resistance heating
which will give rise to hot wall reactors.
Hot walls means there will be contamination, very simply. If the
reactors are cold, reactor wall is cold, then the contamination
deposition tends to be on the reactor wall.
If the reactor wall is hot, then contamination deposition tends to
be on the sample itself.
The epitaxial layer is being grown on the top surface of bulk
crystal and it is one which is most prone to contamination.
So, if we grow an epitaxial layer on this contaminated surface, then
this contamination will come into the epitaxial layer also and it will
deteriorate epitaxial layer quality and finally the device
performance will be degraded.
So, must make sure that before this epitaxial layer is grown, there is
provision for an in-situ cleaning means there must be a provision
for cleaning the sample inside the chamber before the epitaxy.

To solve the problem of stagnant layer, ( thickness will decrease)

the velocity of the gas flow may be increase but then more
consumption of gas, more consumption of reactant materials and
that costs will be more.
The other possibility is to use a tilted sample holder. The top
surface is an inclined plane and the samples are kept on it.
so that the effective width of the stagnant layer remains more or
less the same.
Particularly when the gas flow is parallel to the sample surface
that is in these reactors ( the horizontal reactors), this is almost
universally the sample holder design that is accepted in order to
reduce the boundary layer problem.

There are different epitaxial reactor configuration.

(i) Horizontal reactor
(ii). Vertical reactor, and
(iii). Barrel type reactor.
(i). Horizontal reactor:- The gas flow is parallel
to the surface of the sample and the samples are
placed on an inclined plane.

(ii).Vertical reactor :- the gas flow is in a

direction normal to the surface of the sample,
Here the boundary layer problem is less acute,
but the reactor design is more complex
compared to the simple horizontal reactor and
also cannot place too many samples at a time in
a vertical reactor.

(iii). Barrel type reactor :- is actually a horizontal

type of reactor, the reactor holder is a barrel or
a drum and in this drum, small niches or small
grooves are carved out and in each of these
grooves the sample can be placed. It is used for
better throughput, for mass production.