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DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING
Two Marks Q & A
EE3302 - DIGITAL LOGIC CIRCUITS
UNIT – I NUMBER SYSTEMS AND DIGITAL LOGIC FAMILIES
1. What is the difference between analog and digital systems?
In a digital system the physical quantities or signals can assume only discrete values, while in analog
systems the physical quantities or signals vary continuously over a specified range.

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2. What is a binary number system and why are binary numbers used in digital systems?

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The number system with base (or radix) two is known as the binary number system. Only two
symbols are used to represent the numbers in the system and these are 0 and 1.The outputs of the

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switching devices used in digital systems assume only two different values. Hence it is natural to use
binary numbers internally in digital systems.
3. Where the digital systems are used?

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Digital systems are used extensively in computation and data processing, control systems,
Communications and measurements. Since digital systems are capable of greater accuracy and reliability
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than analog systems, many tasks formerly done by analog are now being performed digitally.
4. What is the difference between binary code and BCD?
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Binary:
i. Any distinct element can be represented by a binary code.
ii. No limitation for the minimum or maximum number of elements required for coding the element.
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BCD:
i. Only a decimal digit can be represented.
ii. It is a four bit representation.
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5. What is an Excess3 code?

The excess3 code is a non weighted code which is obtained from the 8-4-2-1 code by adding
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3(0011) to each of the codes.

6. What is a gray code and mention its advantages.
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A gray code is a non weighted code which has the property that the codes for successive decimal
digits differ in exactly one bit.
The gray code is used in applications where the normal sequence of binary numbers may produce an
error during the transition from one number to the next.
7. What is meant by non-weighted codes?
Each bit has no positional value i). Excess-3 code ii).Gray code iii).Five bit BCD

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8. List the names of universal gates. Why it is named so?

NAND and NOR gates are universal gates. Because a combination of NAND gates or a
combination of NOR gates can be used to perform functions of any of the basic logic gates
9. Given the two binary numbers X = 1010100 and Y = 1000011, perform the subtraction (a)
X-Yand (b) Y - X using 2’s complements.
a) X = 1010100
2‟s complement of Y = + 0111101
--------------

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Sum = 10010001
Discard end carry

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Answer: X - Y = 0010001
b) Y = 1000011

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2‟s complement of X = + 0101100
---------------
Sum = 1101111
There is no end carry, e
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Therefore the answer is Y-X = -(2‟s complement of 1101111) = -0010001
10. Define binary logic?
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Binary logic consists of binary variables and logical operations. The variables are designated by
the alphabets such as A, B, C, x, y, z, etc., with each variable having only two distinct values: 1 and 0.
There are three basic logic operations: AND, OR, and NOT.
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11. What are the basic digital logic gates?

The three basic logic gates are
 AND gate
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 OR gate
 NOT gate
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12. What is a Logic gate?

Logic gates are the basic elements that make up a digital system. The electronic gate is a circuit
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that is able to operate on a number of binary inputs in order to perform a Particular logical function.
13. Give the classification of logic families
Bipolar Unipolar
Saturated Non Saturated PMOS NMOS CMOS
RTL Schottky TTL
ECL DTL
IIL
TTL

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14. Which gates are called as the universal gates? What are its advantages?
The NAND and NOR gates are called as the universal gates. These gates are used to perform any
type of logic application.
15. Classify the logic family by operation?
The Bipolar logic family is classified into
Saturated logic
Unsaturated logic.
The RTL, DTL, TTL, I2L, HTL logic comes under the saturated logic family.

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The Schottky TTL, and ECL logic comes under the unsaturated logic family.
16. State the classifications of FET devices.

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FET is classified as
1. Junction Field Effect Transistor (JFET)

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2. Metal oxide semiconductor family (MOS).
17. Mention the classification of saturated bipolar logic families.
The bipolar logic family is classified as follows:
 RTL- Resistor Transistor Logic e
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 DTL- Diode Transistor logic
 IIL- Integrated Injection Logic
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 TTL- Transistor Transistor Logic

 ECL- Emitter Coupled Logic
18. Mention the important characteristics of digital IC’s?
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 Fan out
 Power dissipation
 Propagation Delay
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 Noise Margin
 Fan In
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 Operating temperature
 Power supply requirements
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19. Define Fan-out?

Fan out specifies the number of standard loads that the output of the gate can drive with out
impairment of its normal operation.
20. Define power dissipation?
Power dissipation is measure of power consumed by the gate when fully driven by all its inputs.
21. What is propagation delay?
Propagation delay is the average transition delay time for the signal to propagate from input to
output when the signals change in value. It is expressed in ns.

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22. Define noise margin?

It is the maximum noise voltage added to an input signal of a digital circuit that does not cause
an undesirable change in the circuit output. It is expressed in volts.
23. Define fan in?
Fan in is the number of inputs connected to the gate without any degradation in the voltage
level.
24. What is Operating temperature?
All the gates or semiconductor devices are temperature sensitive in nature. The

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temperature in which the performance of the IC is effective is called as operating temperature.
Operating temperature of the IC vary from 00C to 700 c.

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25. What is High Threshold Logic?
Some digital circuits operate in environments, which produce very high noise signals. For

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operation in such surroundings there is available a type of DTL gate which possesses a high threshold to
noise immunity. This type of gate is called HTL logic or High Threshold Logic.
26. What are the types of TTL logic?
1. Open collector output e
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2. Totem-Pole Output
3. Tri-state output.
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27. What is depletion mode operation MOS?

If the channel is initially doped lightly with p-type impurity a conducting channel exists at
zero gate voltage and the device is said to operate in depletion mode.
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28. What is enhancement mode operation of MOS?

If the region beneath the gate is left initially uncharged the gate field must induce a Channel
before current can flow. Thus the gate voltage enhances the channel current and such a device is said to
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operate in the enhancement mode.

29. Mention the characteristics of MOS transistor?
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1. The n- channel MOS conducts when its gate- to- source voltage is positive.
2. The p- channel MOS conducts when its gate- to- source voltage is negative
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3. Either type of device is turned of if its gate- to- source voltage is zero.
30. How Scotty transistors are formed and state its use?
A Scotty diode is formed by the combination of metal and semiconductor. The presence
of Scotty diode between the base and the collector prevents the transistor from going into
saturation. The resulting transistor is called as Scotty transistor.
The use of Scotty transistor in TTL decreases the propagation delay without a sacrifice of
power dissipation.

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31. List the different versions of TTL

1. TTL (Std.TTL)
2. LTTL (Low Power TTL)
3. HTTL (High Speed TTL)
4. STTL (Schottky TTL)
5. LSTTL (Low power Schottky TTL)
32. Why totem pole outputs cannot be connected together.
Totem pole outputs cannot be connected together because such a connection might produce

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excessive current and may result in damage to the devices.
33. State advantages and disadvantages of TTL

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Advantages:
1. Easily compatible with other ICs

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2. Low output impedance
Disadvantages:
Wired output capability is possible only with tri-state and open collector types special circuits in
Circuit layout and system design are required. e
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34. When does the noise margin allow digital circuits to function properly?
When noise voltages are within the limits of VNA (High State Noise Margin) and VNK for a
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particular logic family.

35. What happens to output when a tri-state circuit is selected for high impedance.
Output is disconnected from rest of the circuits by internal circuitry.
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36. What is 14000 series?

It is the oldest and standard CMOS family. The devices are not pin compatible or electrically
compatible with any TTL Series.
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UNIT – II COMBINATIONAL CIRCUITS

1. Define combinational logic

When logic gates are connected together to produce a specified output for certain
specified combinations of input variables, with no storage involved, the resulting circuit is called
combinational logic.
2. Explain the design procedure for combinational circuits
1. The problem definition

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2. Determine the number of available input variables & required O/P variables.
3. Assigning letter symbols to I/O variables

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4. Obtain simplified Boolean expression for each O/P.
5. Obtain the logic diagram.

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3. Give the 2 canonical forms of Boolean function.
1. Sum of products 2. Product of sums
4. What is minterm & maxterm?
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A product term containing all the „n‟ variables of the function in either complemented or
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uncomplemented form is called minterm. A sum term containing all the „n‟ variables of the function in
either complemented or Uncomplemented form is called maxterm.
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5. What is SOP, POS?

The sum of products expression consists of two or more product (AND) terms that are OR ed
together. Each product term consists of one or more literals in either complemented or Uncomplemented
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form.
The product of sums expression consists of two or more sum (OR) terms that are AND ed
together. Each sum term consists of one or more literals in either complemented or uncomplemented
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form.
6. What is a K- map?
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Karnaugh map is a useful tool for simplifying and manipulating switching functions. It is a map
containing 2n cells for a „n variable case. Each cell corresponds to one row of the truth table.
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7. What is prime implicant and non-prime implicant?

Prime implicant is a product term obtained by combining the maximum possible number of
adjacent squares in the K-map. It cannot be enclosed by a larger implicant. Non prime implicant can be
enclosed by a larger group.
8. What is essential prime implicant?
If a minterm is covered by only one prime implicant that is said to be essential and it must be
included in the minimum sum of products.

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9. What is incompletely specified functions/don’t care conditions?

In certain digital systems some combinations of input variables do not occur. The outputs
corresponding to that input combinations do not matter. So the designer can assume a 0 or 1 as output
for each of these combinations. This condition is known as don‟t care conditions denoted by X in K-map.
10. What are the limitations of K-map?
The map method is convenient as long as the number of variables does not exceed five or six. As
the number of variable increases, the excessive number of squares prevents a reasonable selection of
adjacent squares.

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11. What is tabulation method?
The tabulation or Quine McCluskey method is a specific step by step procedure guaranteed to

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produce a simplified standard form expression for a function. It can be applied to problems with many
variables and has the advantage of being suitable for machine computation.

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12. What are the steps to design a combinational logic circuit?
(1) The problem is stated
(2) The number of available input variables and required output variables is determined
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(3) The input and output variables are assigned letter symbols
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(4) The truth table that defines the required relationships between inputs and outputs is derived
(5) The simplified Boolean function for each output is obtained
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(6) The logic diagram is drawn

13. Define half adder and full adder
The logic circuit that performs the addition of two bits is a half adder. The circuit that performs
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the addition of three bits is a full adder.

14. Define Decoder?
A decoder is a multiple - input multiple output logic circuits that converts coded inputs into coded
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outputs where the input and output codes are different.

15. What is binary decoder?
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A decoder is a combinational circuit that converts binary information from n input lines
to a maximum of 2n out puts lines.
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16. Define Encoder?

An encoder has 2n input lines and n output lines. In encoder the output lines generate the binary
code corresponding to the input value.
17. What is priority Encoder?
A priority encoder is an encoder circuit that includes the priority function. In priority encoder, if
2 or more inputs are equal to 1 at the same time, the input having the highest priority will
take precedence.

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18. Define multiplexer?

Multiplexer is a digital switch. If allows digital information from several sources to be routed onto
a single output line.
19. What do you mean by comparator?
A comparator is a special combinational circuit designed primarily to compare the relative
magnitude of two binary numbers.
20. What is the need for a code converter?
The availability of a large variety of codes for the same discrete elements of information results in

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the use of different codes for different digital systems. It is sometimes necessary to use the output of one
system as the input to another. A conversion circuit must be inserted between the two systems if each

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uses different codes for the same information. Thus a code converter is a circuit that makes the two
systems compatible even though each uses a different binary code.

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21. What is an Encoder & Decoder?
An encoder is a combinational circuit that has 2n input lines and „n output lines. The output lines
generate the binary code corresponding to the input value.eg. octal to binary encoder has 8 inputs and 3
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outputs that generate the binary number corresponding to the octal digit.
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The decoder is a combinational circuit that converts binary information from „n input lines to a maximum
of 2n unique output lines. A binary code of n bits is capable of representing up to 2n distinct elements.
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22. What is a Multiplexer and Demultiplexer?

Multiplexing means transmitting a large number of information units over a smaller number of
channels or lines.
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A digital Multiplexer (data selector) is a combinational circuit that selects binary information from one of
many input lines and directs it to a single output line. A Demultiplexer (data distributor) is a
combinational circuit that receives the information on a single line and transmits this information on one
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of 2n possible output lines.

23. Mention the applications of Multiplexer.
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1) Data selection and data routing. 2) Logic function generator.

3) Control sequencer. 4) Parallel to serial converter.
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24. Compare decoder and Demultiplexer.

The Decoder is a combinational circuit that converts binary information from n input lines to a
maximum of 2n unique output lines.
A Demultiplexer (data distributor) is a combinational circuit that receives the information on a
single line and transmits this information on one of 2n possible output lines. A decoder with enable input
can function as a Demultiplexer.

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UNIT – III SYNCHRONOUS SEQUENTIAL CIRCUITS

1. What is a sequential circuit & List the types of sequential circuit.

The sequential circuit consists of a combinational circuit to which memory elements are connected to
form a feed back path. The output at any instant of time depends on the present inputs and past output.
Synchronous Sequential Circuit and Asynchronous Sequential Circuit.
2. What do you mean by synchronous sequential circuit & clocked sequential circuits?
A synchronous sequential circuit is a system whose behavior can be defined from the knowledge of its

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signal at discrete instants of time. Synchronous sequential circuit that uses clock pulses in the inputs of
memory elements is called clocked sequential circuit. The change of internal state occurs in response to

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the synchronized Clock pulses.
3. What is called a latch?

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Unclocked flip-flop that responds to pulse duration is called a latch.
4. What is a flip-flop & List the different types of flip-flops.
It is a basic memory element used to store one bit of information. It is also called as a bistable
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multivibrator. A flip-flop circuit has two outputs, one for the normal value and one for the complement of
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the bit stored in it. It can store the binary value indefinitely until directed by an input signal to switch
states. RS, D, T, J K and J K master slave flip-flop.
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5. Name the different types of triggering employed in a flip-flop?

Level triggering and Edge triggering
6. What are the differences between RS latch and edge triggered RS flip-flop?
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RS LATCH: 1.No clock pulse input is present

2. Output changes state on the application of inputs
Edge Triggered RS FLIPFLOP:
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1. Clock pulse input is present

2.Output changes state only on the transition of clock pulses depending on the input.
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7. Give the truth table of RS flip-flop and JK flip-flop.

R S flipflop
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J K flip flop

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8. What do you mean by race around condition in a flip-flop?
When both J = K = 1 and clock pulse is „1‟ it causes the output to complement again and repeat

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complementing until the pulse goes back to „0‟(i.e.) the output toggles continuously. This Race condition
arises when the width of the clock pulse is greater than the propagation delay time of the flip-flop.

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9. What is a master slave flip-flop?
A master slave flip-flop is constructed from two separate flipflops. One circuit serves as a master and the
other as a slave, the overall circuit is referred to as a master slave flip-flop. Both the flipflops are positive
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level triggered but the presence of inverter at the clock input of the slave flip-flop forces it to trigger at
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the negative level.
10. What is direct preset and clear inputs?
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Preset -used to set the flip-flop in the initial stage.

Clear- used to clear the flip-flop in the initial stage
11. What is the difference between truth table and excitation table?
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A truth table is a table indicating the output of a combinational circuit for all input states.An excitation
table is a list of Flip-flop input conditions that will cause the required state transitions.
12. What is a counter?
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A Sequential circuit that goes through a prescribed sequence of states upon the application of input
pulses is called a counter.
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13. Difference between synchronous and asynchronous counter.

Synchronous counter:
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All the flipflops are clocked simultaneously

No connection between the output of the first flip-flop and the clock input for the next Flip-flop.
Design involves complex logic circuit as the number of states increases.
As the clock is simultaneously given to all flipflops there is no problem of propagation delay.
Asynchronous counter:
All the flipflops are not clocked simultaneously
The output of the first flip-flop drives the clock input for the next Flip-flop.
Logic circuit is simple even for more number of stages.

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Main drawback of these counters is their low speed as the clock is propagated through number of
flipflops before it reaches the last flip-flop.
14. What is a presettable counter & ripple counter?
Normally the count starts from zero in a counter. A presettable counter is used to start the count from
any number other than zero. A ripple counter is an asynchronous counter, in which the output of the flip-
flops change state like a ripple in water and hence the name ripple counter.
15. Mention the applications of counter?
They are used for counting the number of occurrences of an event and are useful for generating timing

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sequences to control operations in a digital systems.They are used as frequency dividers in digital time
pieces, such as, electronic digital clocks, Automobile digital clock and wrist watches, frequency counters,

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and oscilloscope and television receivers.
16. What is a modulo counter, ring and Johnson counter?

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Modulo „n‟ counter have „n‟ different states that counts from 0 to n-1 by making small changes in a
counter circuit.A ring counter is a circular shift register with only one flipflop being set at any particular
time, all others are cleared. A Johnson /switched tail ring counter is a circular shift register with the
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complement output of the last flip-flop connected to the input of the first flip-flop.
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17. What is a BCD counter?
A BCD counter counts in binary coded decimal from 0000 to 1001 and back to 0000.It is also a decade
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counter since it counts from 0 to 9.

18. What is a register & a shift register?
A register is group of binary cells suitable for holding binary information. A group of flipflops constitutes a
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register, since each flip-flop is a binary cell capable of storing one bit of information.A register capable of
shifting the binary information either to the right or in the left is called a shift register.
19. What are the types of shift registers?
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Serial in Serial out(SISO) Serial in Parallel out(SIPO)

Parallel in Parallel out(PIPO) Parallel in Serial out(PISO)
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20. Mention the applications of shift registers?

To introduce time delay, Serial to Parallel converter, Parallel to serial converter, Sequence generator, Ring
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counter.
21. What is sequence generator?
A circuit which generates a prescribed sequence of bits in synchronism with a clock is referred to as a
sequence generator.
22. What is a state table, state diagram& state equation?
The table which lists the time sequence of inputs, outputs and flip-flop states. A state diagram is a
graphical representation of the information available in a state table. In the diagram, a state is denoted
by a circle and the transitions between the states are indicated by directing lines connecting the circles.A

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state equation (transition equation) specifies the condition for a flip-flop state transition. It denotes the
next state as a function of the present state and inputs.
23. Explain mealy model and Moore model.
Moore Model:
Its output is a function of present state only.
Input changes does not affect the output
It requires more number of states for implementing same function.
Mealy model:

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Its output is a function of present state as well as present input
Input changes may affect the output of the circuit

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It requires less number of states for implementing same function.
24. What is the need for debounce circuit?

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It is the one that removes the series of pulses that result from a contact bounce and produces a single
smooth transition of the binary signal from 0 to 1 or from 1 to 0.
25. What are the classifications of sequential circuits?
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The sequential circuits are classified on the basis of timing of their signals into two types.
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They are,
1) Synchronous sequential circuit.
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2) Asynchronous sequential circuit.

26. Define Flip flop.
The basic unit for storage is flip flop. A flip-flop maintains its output state either at 1 or 0 until
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directed by an input signal to change its state.

27. What are the different types of flip-flop?
There are various types of flip flops. Some of them are mentioned below they are,
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1. RS flip-flop
2. SR flip-flop
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3. D flip-flop
4. JK flip-flop
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5. T flip-flop
28. What is the operation of D flip-flop?
In D flip-flop during the occurrence of clock pulse if D=1, the output Q is set and if D=0, the
output is reset.
29. What is the operation of JK flip-flop?
• When K input is low and J input is high the Q output of flip-flop is set.
• When K input is high and J input is low the Q output of flip-flop is reset.
• When both the inputs K and J are low the output does not change

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• When both the inputs K and J are high it is possible to set or reset the flip-flop (ie) the output toggle on
the next positive clock edge.
30. What is the operation of T flip-flop?
T flip-flop is also known as Toggle flip-flop.
• When T=0 there is no change in the output.
• When T=1 the output switch to the complement state (ie) the output toggles.
31. Define race around condition.
In JK flip-flop output is fed back to the input. Therefore change in the output results change in

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the input. Due to this in the positive half of the clock pulse if both J and K are high then output toggles
continuously. This condition is called „race around condition‟.

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32. What is edge-triggered flip-flop?
The problem of race around condition can solved by edge triggering flip flop. The term

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edge triggering means that the flip-flop changes state either at the positive edge or negative
edge of the clock pulse and it is sensitive to its inputs only at this transition of the clock.
33. What is a master-slave flip-flop?
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A master-slave flip-flop consists of two flip-flops where one circuit serves as a master and the
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other as a slave.
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UNIT – IV ASYNCHRONOUS SEQUENTIAL CIRCUITS AND PROGRAMMABLE LOGIC DEVICES

1. Define state of sequential circuit.

The binary information stored in the memory elements at any given time defines the “state” of sequential
circuit.
2. Define fundamental mode .
Only one input variable can change at any one time and the time between two inputs changes must be
longer than the time it takes the circuit to reach a stable state.

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3. What is meant by state reduction?
The reduction of number of flip flops in a sequential circuit is referred as state reduction problem. The

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state reduction algorithms are concerned with procedures for reducing the number of states in a state
table while keeping the external input – output requirements unchanged.

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4. Mention the application areas of asynchronous sequential circuits.
i. Used where speed is important,(i.e.) where the digital system must respond quickly without the need to
wait for clock pulse.
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ii. Require only few components (i.e) no need for additional clock pulses.
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iii. Used where the input change at any time independent of clock.
iv. Communication between two units where each has own independent clock.
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5. Mention the faults in asynchronous sequential circuits.

(1)Hazards (2) Oscillations (3) Critical races
6. Define secondary variables of asynchronous sequential circuits.
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The present state and the next state variables in asynchronous sequential circuits are called Secondary /
excitation variables.
7. What do you mean by race in asynchronous sequential circuits?
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When two or more binary state variables change their value in response to a change in an input variable,
race condition occurs in an asynchronous sequential circuit. In case of unequal delays, a race condition
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may cause the state variables to change in an unpredictable manner.

8. Define critical race in asynchronous sequential circuits.
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If the final stable state depends on the order in which the state variables changes, the race condition is
harmful and it is called a critical race. This should be avoided.
9. Define non-critical race
If the final stable state that the circuit reaches does not depend on the order in which the state variables
changes , the race condition is not harmful and it is called a noncritical race.
10. Define Hazard & Name the types of hazards
Hazard is unwanted switching transients that may appear at the output of a circuit because different
paths exhibit different propagation delays. Static hazard, Dynamic hazard, Essential hazard.

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11. What is a glitch?

These glitches are very narrow pulses, often having a width of a few nano seconds that occur during the
switching of variables.
12. Define Static hazard & Dynamic hazard.
In a combinational circuit, if the outputs before and after change of input are the same then the hazard is
called a static hazard.If the output before and after the change of input are different and the output
changes three times instead of once and passes through an additional temporary sequence of 0 1 or 1 0
in going to the final output.

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13. Define Essential hazard.
An essential hazard is caused by unequal delays along two or more paths that originate from the same

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input. Such hazards can be eliminated by adjusting the amount of delays in the affected path.
14. What is a flow table & primitive flow table?

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During the design of asynchronous sequential circuits, it is more convenient to name the states by letter
symbols without making specific reference to their binary values. Such a table is called a flow table.
Primitive flow is the flow table that has only one stable state in each row.
15. What is static 0 and 1 hazard? e
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Static 1 hazard – if the outputs before and after the change of input are both 1 with an incorrect output 0
in between.
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Static 0 hazard - if the outputs before and after the change of input are both 0 with an incorrect output 1
in between.
16. Mention the algorithm for state reduction.
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Two states are said to be equivalent if, for each member of the set of inputs, they give exactly the same
output and send the circuit to an equivalent state. When two states are equivalent, one of them can be
removed without altering the input – output relationships.
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17. How will you avoid the race conditions in asynchronous sequential circuits?
Races may be avoided by proper binary assignment to state variables. The state variables must be
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assigned binary numbers in such a way that only one state variable can change at any one time when a
state transition occurs in the flow table.
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18. What is meant by cycles in asynchronous sequential circuits?

Races can be avoided by directing the circuits through intermediate unstable states with a unique state
variable change. When a circuit goes through a unique sequence of unstable states, it is said to have a
cycle.
19. Give the comparison between PROM and PLA.
PROM PLA
1. And array is fixed and OR Both AND and OR arrays are
array is programmable. Programmable.

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2. Cheaper and simple to use. Costliest and complex than PROMS.

20. What are the steps to be followed for the purpose of merging a flow table?
(1) Determine all compatible pairs by using the implication table.
(2) Find the maximal compatibles using a merger diagram.
(3) Find a maximal collection of compatibles that covers all the states and is closed.
21. What is meant by compatible pairs?
Two states are said to be compatible, if in every column of the corresponding rows in the flow table,
there are identical states and if there is no conflict in the output values.

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22. What is maximal compatibles?
The maximal compatible is a group of compatibles that contains all the possible combinations of

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compatible states.
23. What is the use of merger diagram?

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The maximal compatibles can be obtained from a merger diagram which is a graph in which each state is
represented by a dot placed along the circumference of a circle.Lines are drawn between any two
corresponding dots that form a compatible pair.All possible compatibles can be obtained from the merger
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diagram by observing the geometrical patterns in which states are connected to each other.
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24. How will you remove the hazards in combinational logic circuits?
It can be removed by covering any two minterms that may produce a hazard with a product term
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common to both. The removal of hazards requires the addition of redundant gates to the circuit.
25. Compare Synchronous counters and Asynchronous counters.
S.no Asynsynchronous counters Synchronous counters
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1. Flipflops are connected in such a way that There is no connection between the output of
the output of first flipflop drives the clock first flipflop and clock input of the next flipflop.
for the next flipflop
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2. All the flipflops are not clocked All the flipflops are clocked simultaneously.
simultaneously.
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3. Logic circuit is simple even for more Design involves complex logic circuit as
number of states. number of states increases.
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4. Main drawback of these counters is their As clock is simultaneously given to all flipflops
low speed as the clock is propagated there is no problem of propagation delay.
through number of flipflops before it Hence they are preferred when number of
reaches last flipflop. flipflops increase in the given design.
26. List basic types of programmable logic devices.
1. . Read only memory
2. . Programmable logic Array

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3. Programmable Array Logic

27. Explain ROM
A read only memory(ROM) is a device that includes both the decoder and the OR gates
within a single IC package. It consists of n input lines and m output lines. Each bit combination of the
input variables is called an address. Each bit combination that comes out of the output lines is called a
word. The number of distinct addresses possible with n input variables is 2 n
28. Define address and word:
In a ROM, each bit combination of the input variable is called on address. Each bit combination

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that comes out of the output lines is called a word.
29. State the types of ROM

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1. Masked ROM.
2. Programmable Read only Memory

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3. Erasable Programmable Read only memory.
4. Electrically Erasable Programmable Read only Memory.
30. What is programmable logic array? How it differs from ROM?
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In some cases the number of don‟t care conditions is excessive, it is more economical to use a
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second type of LSI component called a PLA. A PLA is similar to a ROM in concept; however it does not
provide full decoding of the variables and does not generates all the min-terms as in the ROM.
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31. Bubbled OR gate is equal to--------------

NAND gate
32. Bubbled AND gate is equal to--------------
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NOR gate
33. Explain PROM.
PROM (Programmable Read Only Memory)
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It allows user to store data or program. PROMs use the fuses with material like nichrome and
polycrystalline. The user can blow these fuses by passing around 20 to 50mA of current for the period 5
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to 20µs.The blowing of fuses is called programming of ROM. The PROMs are one time programmable.
Once programmed, the information is stored permanent.
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34. Explain EPROM.

EPROM (Erasable Programmable Read Only Memory)
EPROM use MOS circuitry. They store 1‟s and 0‟s as a packet of charge in a buried layer of the IC
chip. We can erase the stored data in the EPROMs by exposing the chip to ultraviolet light via its
quartz window for 15 to 20 minutes. It is not possible to erase selective information. The chip can
be reprogrammed.
35. Explain EEPROM.
EEPROM (Electrically Erasable Programmable Read Only Memory)

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EEPROM also use MOS circuitry. Data is stored as charge or no charge on an insulated layer or
an insulated floating gate in the device. EEPROM allows selective erasing at the register level
rather than erasing all the information since the information can be changed by using electrical
signals.
36. What is RAM?
Random Access Memory. Read and write operations can be carried out.
37. What is programmable logic array? How it differs from ROM?
In some cases the number of don‟t care conditions is excessive, it is more economical to use a

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second type of LSI component called a PLA. A PLA is similar to a ROM in concept; however it does not
provide full decoding of the variables and does not generates all the min-terms as in the ROM.

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38. What is mask - programmable?
With a mask programmable PLA, the user must submit a PLA program table to the manufacturer.

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39. What is field programmable logic array?
The second type of PLA is called a field programmable logic array. The user by means of
certain recommended procedures can program the EPLA.
40. List the major differences between PLA and PAL e
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PLA: Both AND and OR arrays are programmable and Complex, Costlier than PAL
PAL : AND arrays are programmable OR arrays are fixed, Cheaper and Simpler
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41. Define PLD.

Programmable Logic Devices consist of a large array of AND gates and OR gates that can be
programmed to achieve specific logic functions.
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42. Give the classification of PLDs.

PLDs are classified as PROM (Programmable Read Only Memory), Programmable Logic Array
(PLA), Programmable Array Logic (PAL), and Generic Array Logic (GAL)
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43. Define PROM.

PROM is Programmable Read Only Memory. It consists of a set of fixed AND gates connected to a
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decoder and a programmable OR array.

44. Define PLA
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PLA is Programmable Logic Array (PLA). The PLA is a PLD that consists of a programmable AND
array and a programmable OR array.
45. Define PAL
PAL is Programmable Array Logic. PAL consists of a programmable AND array and a fixed OR
array with output logic.

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46. Why was PAL developed?

It is a PLD that was developed to overcome certain disadvantages of PLA, such as longer delays
due to additional fusible links that result from using two programmable arrays and more circuit
complexity.
47. Why the input variables to a PAL are buffered
The input variables to a PAL are buffered to prevent loading by the large number of AND gate
inputs to which available or its complement can be connected.
48. What does PAL 10L8 specify?

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PAL - Programmable Logic Array
10 - Ten inputs

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L - Active LOW Output
8 - Eight Outputs

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UNIT –V VHDL
1. What are the languages that are combined together to get VHDL language ?
Sequential language, Concurrent language, Net- list language, Timing specification, Waveform generation
language.
2. State the features of VHDL.
i. VHDL has powerful constructs.
ii. In VHDL, designs may be decomposed hierarchically
iii. Each design element has a well- defined interface useful for connecting it to other elements

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iv. VHDL handles asynchronous as well as synchronous sequential circuits
v. VHDL supports design library

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3. What is VHDL?
Vey high speed integrated circuit hardware description language. It was initiated from American DOD. It

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is a language for describing a hardware, which has to be readable for machines and humans at the same
time & it structured and comprehensible code, so that the source code can serve as a kind of
specification document.
4. What are sequential and concurrent statements? e
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Sequential statements are executed one after other , like in software programming languages.
Subsequent programs can override the effect of previous statements this way. The order of assignment
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must be considered when sequential statements are used.

Concurrent statements are active continuously. So the order of the statements is not relevant. Concurrent
statements are especially suited model the parallelism of hardware
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5. Define abstraction.
It is defined as the hiding of information that is too detailed. It is therefore necessary to differentiate
between the essential and non- essential information . information that is not important for the current
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view of the problem will be left out from the description. The levels of this are characterized by the kind
of information that is common to all models of this level.
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6. Name the abstraction levels .

There are four abstraction levels. They are Behavior RTL Logic Layout.
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VHDL is applicable in upper three levels. The transition from one level to another is by software.
7. Define stimuli & validation bench.
Bus systems or complex algorithms are described without considering synthesizability. The stimuli fro
simulation if RTL models are described in the behavior level.
Stimuli are signals of the input ports of the model and are described in the test-benches sometimes called
validation bench

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8. What are the RTL description processes?

The pure combinational process and the clocked process . all clocked processes infer flip-flops and can be
described in terms of state machine syntax.
9. Define modularity.
It allows partitioning of big functional blocks into smaller units and to group closely related parts in self-
contained sub blocks, so called module.
10. What does hierarchy mean about?
Hierarchy allows the building of a design out of modules which themselves may be built out of sub-

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modules.
11. What are the VHDL structural elements?

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The main units in VHDL are
Entity , Architecture , Configuration, Process , Package , Library

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12. What is entity?
The interface between a module and its environment is described within the entity declaration which is
initiated by the keyword entity.
13. Define process. e
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A process statement starts with an optional label and „:‟ symbol, followed by the process keyboard. The
sensitivity list is also optional and is enclosed in a „(„ „ )‟ pair.
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14. Name the data types.

The data types of VHDL :Standard data types, Data type „time‟, Definition of arrays Integer and bit
types, Assignments with array types ,Types of assignment for bit data types,Aggregates ,Slices of arrays.
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15. Name the types of operators

The operators are Logical , Relational, Shift and arithmetic.
16. Write the HDL behavioral model of D flip flop.
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LIBRARY IEEE;
USE IEEE.std_logic_1164.all;
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ENTITY DFF IS
PORT (D,clock : IN STD_LOGIC; Q : OUT STD_LOGIC);
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END DFF;
ARCHITECTURE Behaviour OF DFF IS
BEGIN
PROCESS
BEGIN
WAIT UNTIL Clock „ EVENT‟ AND clock = „1‟;
Q<= D;
END PROCESS;

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END Behavior;
17. Write the VHDL code to realize a 2 x 1 multiplexer.

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18. List out the operators present in VHDL.
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Adding_operator +|-|&
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logical_operator and | or | nand | nor | xor | xnor

miscellaneous_operator ** | abs | not

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multiplying_operator * | / | mod | rem

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relational_operator = | /= | < | <= | > | >=

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shift_operator sll | srl | sla | sra | rol | ror

19. Write the VHDL code for a logical gate which gives high output only when both the
inputs are high.

library IEEE;

use IEEE.STD_LOGIC_1164.ALL;

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entity and_or_top is

Port ( INA1 : in STD_LOGIC; -- AND gate input

INA2 : in STD_LOGIC; -- AND gate input

OA : out STD_LOGIC; -- AND gate output

end and_or_top;

architecture Behavioral of and_or_top is

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begin

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OA <= INA1 and INA2; -- 2 input AND gate

end Behavioral;

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20. Give the syntax for package declaration and package body in VHDL.

Package declaration format:

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package package_name is
... exported constant declarations
... exported type declarations
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... exported subprogram declarations

end package_name;
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Example:
package ee530 is
constant maxint: integer := 16#ffff#;
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type arith_mode_type is (signed, unsigned);

function minimum(constant a,b: in integer) return integer;
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end ee530;

Package body format:

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package body package_name is

... exported subprogram bodies
... other internally-used declarations
end package_name;

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21. State the advantages of package declaration over component declaration in VHDL
A component declaration declares a virtual design entity interface that may be used in
component instantiation statement. A component declaration does not define which entity/architecture
pair is bound to each instance.
Packages are the only language mechanism to share objects among different design units.
Usually, they are designed to provide standard solutions for specific problems, e.g. data types and
corresponding subprograms like type conversion functions for different data types, procedures and
functions for signal processing purposes, etc.

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Prepared by Approved by

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Mr.P.MARISH KUMAR HOD/EEE

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