Computer organization and

architecture

Chapter 5:
Basic Computer Organization and Design

1
 outlines

• Instructional code
• Computer Register
• Computer Instructions
• Timing and control
• Memory reference instructions
• Design of Basic computers
• Design of accumulator logic
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 What is Instruction?
• The user of a computer can control the process by
means of a program
• A program is a set of instructions that specify the
operations, operands, and the processing sequence.
• A computer instruction is a binary code that
specifies a sequence of micro-operations for the
computer.
• The collection of different instructions that the
processor can execute is referred to as the processor’s
instruction set.

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 Instruction Codes
• An Instruction code is a group of bits that instructs
the computer to perform a specific operation
• It is divided into parts (basic part is the operation
part)
• The operation code of an instruction is a group of
bits that defines certain operations such as add,
subtract, shift, and complement
• Instruction codes and data are stored in memory
• The computer reads each instruction from memory
and places it in a control register.

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 Instruction Codes cont.
• The number of bits required for the operation code
depends on the total number of operations available
in the computer
• 2n distinct operations  n bit operation code

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 Instruction Codes cont.

Memory It’s an
ADD
operation
Op code
Control
110010?????????? Unit

Read instruction
from memory

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 Instruction Codes cont.
• An operation must be performed on some data stored in
processor registers or in memory
• An instruction code must therefore specify not only the
operation, but also the location of the operands (in
registers or in the memory), and where the result will
be stored (registers/memory)

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 Instruction Codes cont.
• Each computer has its own particular instruction
code format
• Instruction code formats are conceived by
computer designers who specify the architecture of
the computer

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 Instruction code format
 It defines the layout of the bits in the instruction.
 It must contain the opcode and the address
 The basic computer has three instruction code formats

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 5-10
Instruction code format
Hex Code
Symbol I = 0 I = 1 Description
AND 0xxx 8xxx And memory word to AC
 Memory-reference instruction ADD 1xxx 9xxx Add memory word to AC
LDA 2xxx Axxx Load memory word to AC
» Opcode = 000  110 STA 3xxx Bxxx Store content of AC in memory
 I=0 : 0xxx ~ 6xxx, I=1: 8xxx ~Exxx BUN 4xxx Cxxx Branch unconditionally
I=0 : Direct, 15 14 12 11 0 BSA 5xxx Dxxx Branch and Save return address
I=1 : Indirect ISZ 6xxx Exxx Increment and skip if zero
I Opcode Address
CLA 7800 Clear AC
CLE 7400 Clear E
CMS 7200 Complement AC
 Register-reference instruction
CME 7100 Complement E
» 7xxx (7800 ~ 7001) : CLA, CMA, …. CIR 7080 Circulate right AC and E
15 14 12 11 0 CIL 7040 Circulate left AC and E
INC 7020 Increment AC
0 1 1 1 Register Operation
SPA 7010 Skip next instruction if AC positive
SNA 7008 Skip next instruction if AC negative
SZA 7004 Skip next instruction if AC zero
 Input-Output instruction SZE 7002 Skip next instruction if E is 0
HLT 7001 Halt computer
» Fxxx(F800 ~ F040) : INP, OUT, ION, SKI, ….
15 14 12 11 0
INP F800 Input character to AC
OUT F400 Output character from AC
1 1 1 1 I/O Operation SKI F200 Skip on input flag
SKO F100 Skip on output flag
ION F080 Interrupt On
IOF F040 Interrupt Off
Computer System Architecture Chap. 5 Basic Computer Organization and Design Dept. of Info. Of Computer
 5-11
Instruction Type

I Data transfer: registers, main memory, stack or I/O.

Store, load, exchange, move, clear, set, push, pop
 Specifies: source and destination (memory, register, stack), amount of data
II Data processing: arithmetic, logical.
o Arithmetic:
 Add, Subtract, Multiply, Divide for signed integer (+ floating point and
packed decimal) – may involve data movement
 May include
− Absolute (|a|), Increment (a++), Decrement (a--) and Negate (-a)
o Logical
 Bitwise operations: AND, OR, NOT, XOR, CMP, SET
 logical right shift for unpacking: send 8-bit character from 16-bit word
 arithmetic right shift: division and truncation for odd numbers
 arithmetic left shift: multiplication without overflow
III. Control: systems control, transfer of control

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Computer System Architecture Chap. 5 Basic Computer Organization and Design Dept. of Info. Of Computer
 Stored Program Organization
The ability to store and execute instructions is the
most important property of a general-purpose
computer.
That type of stored program concept is called stored
program organization.
The simplest way to organize a computer is to have
one processor register and an instruction code format
with two parts. The first part specifies the operation
to be performed and the second specifies an address.

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Stored Program Organization cont.

15 12 11 0 Memory
Opcode Address 15
4096x16
0
Instruction Format
Instructions
15 0
(program)
Binary Operand

Operands
(data)

15 0

Processor register
(Accumulator AC)

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 Computer Registers
• Computer instructions are normally stored in
consecutive memory locations and executed
sequentially one at a time
• The control reads an instruction from a specific
address in memory and executes it, and so on
• This type of sequencing needs a counter to calculate
the address of the next instruction after execution of
the current instruction is completed

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Table 4 List of registers for the basic computer

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 Registers in the Basic Computer
11 0
PC
11 0
AR Memory

15 0 4096 x 16
IR
15 0 15 0
TR DR
7 0 7 0 15 0
OUTR INPR AC

Basic Computer Registers and Memory

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 S2
S1 Bus
S0
Memory unit 7
4096 x 16
Address
Write Read
AR 1

LD INR CLR
PC 2

LD INR CLR

DR 3

LD INR CLR

Adder E
and
logic
AC 4 Computer Registers
LD INR CLR Common Bus System
INPR
IR 5
LD
TR 6
LD INR CLR
OUTR
Clock
LD
16-bit common bus

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 Computer Registers
Common Bus System cont.
• S2S1S0: Selects the register/memory that would use the bus
• LD (load): When enabled, the particular register receives the
data from the bus during the next clock pulse transition
• DR, AC, IR, and TR: have 16 bits each
• AR and PC: have 12 bits each since they hold a memory
address.
• When AR or PC receives information from the bus, only the
12 least significant bits are transferred into the register
• INPR and OUTR: communicate with the eight least
significant bits in the bus

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 Computer Registers
Common Bus System cont.
• INPR: Receives a character from the input device
(keyboard,…etc) which is then transferred to AC
• OUTR: Receives a character from AC and delivers it
to an output device (say a Monitor)
• Five registers have three control inputs: LD (load),
INR (increment), and CLR (clear)

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 Computer Registers
Memory Address
• The input data and output data of the memory are
connected to the common bus
• But the memory address is connected to AR
• Therefore, AR must always be used to specify a
memory address

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 Computer Registers
Memory Address cont.

• Register  Memory: Write operation

• Memory  Register: Read operation (note that
AC cannot directly read from memory!!)
• Note that the content of any register can be
applied onto the bus and an operation can be
performed in the adder and logic circuit during
the same clock cycle

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 Computer Registers
Memory Address cont.
1. place the contents of AC on the bus (S2S1S0=100)
2. enabling the LD (load) input of DR
3. Transferring the contents of the DR through the
adder and logic circuit into AC
4. enabling the LD (load) input of AC
5. All during the same clock cycle
6. The two transfers occur upon the arrival of the clock
pulse transition at the end of the clock cycle

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 Instruction Set Completeness
The set of instructions are said to be complete if
the computer includes
 Arithmetic, logical, and shift instructions
Instructions for moving information to and
from memory and processor registers
Program control instructions together with
instructions that check status conditions
Input & output instructions

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 Timing & Control
 In order to control the steps of the instruction cycle, it is
necessary to introduce a counter, whose output is used as input
to the control logic.
 Sequence Counter Register (SC) holds a count value, can be
reset/cleared to zero and can be incremented.
 Each instruction will require a specified number of time steps
to complete a sequence of micro-operations.
 Each step of the sequence is marked by a count value in SC.
 A master clock generator controls the timing for all registers
in the basic computer.
 The clock pulses are applied to all F/Fs and registers in system
 The clock pulses do not change the state of a register unless
the register is enabled by a control signal

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 Timing & Control cont.
The control signals are generated in the control
unit and provide control inputs for the
multiplexers in the common bus, control inputs
in processor registers, and microoperations for
the accumulator
There are two major types of control
organization:
Hardwired control
Microprogrammed control
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 Timing & Control cont.
• In the hardwired organization, the control logic
is implemented with gates, flip-flops,
decoders, and other digital circuits.
• In the microprogrammed organization, the
control information is stored in a control
memory (if the design is modified, the
microprogram in control memory has to be
updated)

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 Comparison table
Hardwired control Microprogrammed
control
 The control logic is  The control information is
implemented with gates, flip- stored in a control memory.
flops, decoders, and other digital The control memory is
circuits. programmed to initiate the
required sequence of
microoperations.

 The advantage that it can be  Compared with the hardwired

optimized to produce a fast control operation is slow.
mode of operation.
 Requires changes in the wiring  Required changes or
among the various components modifications can be done by
if the design has to be modified updating the microprogram in
or changed. control memory.
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The Control Unit for the basic computer
Instruction register (IR)
15 14 13 12 11 - 0 Other inputs

3x8
decoder
7 6543 210
D0
I
D7 Control Control
logic outputs
gates
T15
T0

15 14 . . . . 2 1 0
4 x 16
Sequence decoder

4-bit Increment (INR)

sequence Clear (CLR)
counter
(SC) Clock

Fig: control unit of basic computer

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- Generated by 4-bit sequence counter and 4x16 decoder
- The SC can be incremented or cleared.

- Example: T0, T1, T2, T3, T4, T0, T1, . . .

Assume: At time T4, SC is cleared to 0 if decoder output D3
is active. D3T4: SC 0
T0 T1 T2 T3 T4 T0
Clock

T0

T1

T2

T3

T4

D3

CLR
SC

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 Instruction Cycle
• A program is a sequence of instructions stored
in memory
• The program is executed in the computer by
going through a cycle for each instruction (in
most cases)
• Each instruction in turn is subdivided into a
sequence of sub-cycles or phases

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 Instruction Cycle cont.

• Instruction Cycle Phases:

1. Fetch an instruction from memory
2. Decode the instruction
3. Read the effective address from memory if the
instruction has an indirect address
4. Execute the instruction
• This cycle repeats indefinitely unless a HALT
instruction is encountered

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Thank you!!!

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