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IP Verification JD - Cadence Design Systems, Noida

The document outlines the job responsibilities and skills required for a Design Verification Engineer, emphasizing the need for a background in Electrical, Electronics, or Computer Science Engineering with expertise in HDLs like Verilog and VHDL. Key qualifications include experience in simulation/emulation, EDA tools, scripting for process automation, and functional verification of complex digital systems. Additionally, strong behavioral skills such as communication, collaboration, and integrity are essential for the role.

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0% found this document useful (0 votes)
58 views1 page

IP Verification JD - Cadence Design Systems, Noida

The document outlines the job responsibilities and skills required for a Design Verification Engineer, emphasizing the need for a background in Electrical, Electronics, or Computer Science Engineering with expertise in HDLs like Verilog and VHDL. Key qualifications include experience in simulation/emulation, EDA tools, scripting for process automation, and functional verification of complex digital systems. Additionally, strong behavioral skills such as communication, collaboration, and integrity are essential for the role.

Uploaded by

naresh_sambhvani
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Job Responsibilities & Skills: (Design Verification Engineer)

• The person should be an Electrical, Electronics or Computer Science Engineer with very good
understanding of HDLs (Verilog and/ or VHDL).
• Prior experience in simulation/emulation using these languages. He/ she should have a good
working knowledge of EDA tools (Cadence/ Others) with focus towards debugging design/
verification problems using these tools.
• Experience in process automation with scripting.
• Experience with System Verilog, C++, UVM.
• Experience with Functional Verification of complex digital systems, e.g. SoC Verification, with
a Hardware Verification Language (HVL) like System Verilog.
• Experience designing and implementing complex functional verification environments is
required.
• Must have solid experience on any of the protocols like Ethernet, PCIe, DDR, USB3/4,
DisplayPort (DP), MIPI, UCIe, NVMe, HDMI.

Behavioral skills required

• Must possess strong written, verbal and presentation skills.


• Ability to establish a close working relationship with both customer peers and management.
• Explore what’s possible to get the job done, including creative use of unconventional
solutions.
• Work effectively across functions and geographies.
• Push to raise the bar while always operating with integrity.

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