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NCP167 D-2316956

The NCP167 is a linear regulator designed for RF and analog circuits, capable of supplying 700 mA with low noise and high power supply rejection ratio (PSRR). It operates within a voltage range of 1.9 V to 5.5 V and features ultra-low quiescent current, making it suitable for battery-powered devices. The device is available in compact chip scale packages and is compliant with RoHS standards.

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0% found this document useful (0 votes)
33 views14 pages

NCP167 D-2316956

The NCP167 is a linear regulator designed for RF and analog circuits, capable of supplying 700 mA with low noise and high power supply rejection ratio (PSRR). It operates within a voltage range of 1.9 V to 5.5 V and features ultra-low quiescent current, making it suitable for battery-powered devices. The device is available in compact chip scale packages and is compliant with RoHS standards.

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NCP167

LDO Regulator - Ultra-Low


Noise, High PSRR, RF and
Analog Circuits
700 mA
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The NCP167 is a linear regulator capable of supplying 700 mA
output current. Designed to meet the requirements of RF and analog
circuits, the NCP167 device provides low noise, high PSRR, low MARKING
quiescent current, and very good load/line transients. The device is DIAGRAMS
designed to work with a 1 mF input and a 1 mF output ceramic capacitor.
It is available in two thickness ultra−small 0.35P, 0.65 mm x 0.65 mm
Chip Scale Package (CSP) and XDFN4 0.65P, 1 mm x 1 mm. XM
WLCSP4 A1
CASE 567JZ
Features
• Operating Input Voltage Range: 1.9 V to 5.5 V
• Available in Fixed Voltage Option: 1.8 V to 5.2 V
1
• ±2% Accuracy Over Load/Temperature
XDFN4
XX M
• Ultra Low Quiescent Current Typ. 12 mA CASE 711AJ 1

• Standby Current: Typ. 0.1 mA


• Very Low Dropout: 210 mV at 700 mA X or XX = Specific Device Code
• Ultra High PSRR: Typ. 85 dB at 20 mA, f = 1 kHz M = Date Code

• Ultra Low Noise: 8.5 mVRMS


• Stable with a 1 mF Small Case Size Ceramic Capacitors PIN CONNECTIONS
• Available in −WLCSP4 0.65 mm x 0.65 mm x 0.33 mm IN OUT
−XDFN4 1 mm x 1 mm x 0.4 mm
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS A1 A2
Compliant
B1 B2
Typical Applications
• Battery−powered Equipment
EN GND
• Wireless LAN Devices (Top View)
• Smartphones, Tablets
• Cameras, DVRs, STB and Camcorders

VIN VOUT
IN OUT

NCP167
CIN EN COUT
1 mF ON 1 mF
Ceramic Ceramic (Top View)
OFF GND

ORDERING INFORMATION
See detailed ordering and shipping information on page 10 of
this data sheet.
Figure 1. Typical Application Schematics

© Semiconductor Components Industries, LLC, 2016 1 Publication Order Number:


September, 2019 − Rev. 3 NCP167/D
NCP167

IN

ENABLE THERMAL
EN LOGIC SHUTDOWN

BANDGAP
REFERENCE MOSFET
INTEGRATED
DRIVER WITH
SOFT−START
CURRENT LIMIT

OUT

* ACTIVE DISCHARGE
Version A only

EN

GND

Figure 2. Simplified Schematic Block Diagram

PIN FUNCTION DESCRIPTION


Pin No. Pin No. Pin
CSP4 XDFN4 Name Description
A1 4 IN Input voltage supply pin
A2 1 OUT Regulated output voltage. The output should be bypassed with small 1 mF ceramic capacitor.
B1 3 EN Chip enable: Applying VEN < 0.4 V disables the regulator, Pulling VEN > 1.2 V enables the LDO.
B2 2 GND Common ground connection
− EPAD EPAD Expose pad should be tied to ground plane for better power dissipation

ABSOLUTE MAXIMUM RATINGS


Rating Symbol Value Unit
Input Voltage (Note 1) VIN −0.3 V to 6 V
Output Voltage VOUT −0.3 to VIN + 0.3, max. 6 V V
Chip Enable Input VCE −0.3 to VIN + 0.3, max. 6 V V
Output Short Circuit Duration tSC unlimited s
Maximum Junction Temperature TJ 150 °C
Storage Temperature TSTG −55 to 150 °C
ESD Capability, Human Body Model (Note 2) ESDHBM 2000 V
ESD Capability, Machine Model (Note 2) ESDMM 200 V
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
2. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per EIA/JESD22−A114
ESD Machine Model tested per EIA/JESD22−A115
Latchup Current Maximum Rating tested per JEDEC standard: JESD78.

THERMAL CHARACTERISTICS
Rating Symbol Value Unit
Thermal Characteristics, WLCSP4 (Note 3)
108
Thermal Resistance, Junction−to−Air
RqJA °C/W
Thermal Characteristics, XDFN4 (Note 3)
198
Thermal Resistance, Junction−to−Air
3. Measured according to JEDEC board specification. Detailed description of the board can be found in JESD51−7

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2
NCP167

ELECTRICAL CHARACTERISTICS −40°C ≤ TJ ≤ 125°C; VIN = VOUT(NOM) + 1 V; IOUT = 1 mA, CIN = COUT = 1 mF, unless otherwise
noted. VEN = 1.2 V. Typical values are at TJ = +25°C (Note 4).

Parameter Test Conditions Symbol Min Typ Max Unit


Operating Input Voltage VIN 1.9 5.5 V
Output Voltage Accuracy (Note 5) VIN = VOUT(NOM) + 1 V to 5.5 V
VOUT −2 +2 %
0 mA ≤ IOUT ≤ 700 mA

Line Regulation VOUT(NOM) + 1 V ≤ VIN ≤ 5.5 V LineReg 0.02 %/V


Load Regulation IOUT = 1 mA to WLCSP4 0.001
700 mA LoadReg %/mA
XDFN4 0.002
Dropout Voltage (Note 6) IOUT = 700 mA VOUT(NOM) = 1.8 V 315 450
VDO mV
VOUT(NOM) = 3.3 V 190 290
Output Current Limit VOUT = 90% VOUT(NOM) ICL 800 1000
mA
Short Circuit Current VOUT = 0 V ISC 1050
Quiescent Current IOUT = 0 mA IQ 9.7 18 mA
Shutdown Current VEN ≤ 0.4 V, VIN = 4.8 V IDIS 0.01 1 mA
EN Pin Threshold Voltage EN Input Voltage “H” VENH 1.2
V
EN Input Voltage “L” VENL 0.4
EN Pull Down Current VEN = 4.8 V IEN 0.2 0.5 mA
Turn−On Time COUT = 1 mF, From assertion of VEN to
120 ms
VOUT = 95% VOUT(NOM)
Power Supply Rejection Ratio VOUT(NOM) = 3.3 V, f = 100 Hz 83
IOUT = 20 mA f = 1 kHz 85
PSRR dB
f = 10 kHz 80
f = 100 kHz 63
Output Voltage Noise f = 10 Hz to 100 kHz IOUT = 20 mA VN 8.5 mVRMS
Thermal Shutdown Threshold Temperature rising TSDH 160 °C
Temperature falling TSDL 140 °C
Active output discharge resistance VEN < 0.4 V, Version A only RDIS 280 W
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Performance guaranteed over the indicated operating temperature range by design and/or characterization. Production tested at TA = 25°C.
Low duty cycle pulse techniques are used during the testing to maintain the junction temperature as close to ambient as possible.
5. Respect SOA.
6. Dropout voltage is characterized when VOUT falls 100 mV below VOUT(NOM).

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3
NCP167

TYPICAL CHARACTERISTICS
2.90 16
2.89

IQ, QUIESCENT CURRENT (mA)


14
VOUT, OUTPUT VOLTAGE (V)

2.88 TJ = 25°C
12 TJ = 125°C
2.87
2.86 10
TJ = −40°C
IOUT = 10 mA
2.85 8
2.84 6
2.83 VIN = 3.85 V
VOUT = 2.85 V 4 VOUT = 2.85 V
2.82 CIN = 1 mF
CIN = 1 mF
2.81 COUT = 1 mF 2 COUT = 1 mF
2.80 0
−40 −20 0 20 40 60 80 100 120 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
TJ, JUNCTION TEMPERATURE (°C) VIN, INPUT VOLTAGE (V)
Figure 3. Output Voltage vs. Temperature − Figure 4. Quiescent Current vs. Input Voltage
VOUT = 2.85 V

1800 0.50
VIN = 3.85 V VOUT = 1.8 V TJ = 125°C
1600 0.45
VDROP, DROPOUT VOLTAGE (V)
IGND, GROUND CURRENT (mA)

VOUT = 2.85 V CIN = 1 mF


1400 0.40 COUT = 1 mF
CIN = 1 mF TJ = 25°C
COUT = 1 mF 0.35
1200
0.30
1000
TJ = 125°C 0.25 TJ = −40°C
800
0.20
600 TJ = 25°C
0.15
400 0.10
200 TJ = −40°C 0.05
0 0
0.001 0.01 0.1 1 10 100 1000 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8
IOUT, OUTPUT CURRENT (mA) IOUT, OUTPUT CURRENT (A)
Figure 5. Ground Current vs. Output Current Figure 6. Dropout Voltage vs. Output Current −
VOUT = 1.8 V

0.30 0.30
TJ = 125°C TJ = 125°C
0.27 VOUT = 2.85 V 0.27 VOUT = 3.3 V
VDROP, DROPOUT VOLTAGE (V)

VDROP, DROPOUT VOLTAGE (V)

CIN = 1 mF CIN = 1 mF
0.24 COUT = 1 mF 0.24 COUT = 1 mF
0.21 0.21
0.18 0.18
TJ = 25°C
0.15 0.15 TJ = 25°C
TJ = −40°C
TJ = −40°C
0.12 0.12
0.09 0.09
0.06 0.06
0.03 0.03
0 0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8
IOUT, OUTPUT CURRENT (A) IOUT, OUTPUT CURRENT (A)
Figure 7. Dropout Voltage vs. Output Current − Figure 8. Dropout Voltage vs. Output Current −
VOUT = 2.85 V VOUT = 3.3 V

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4
NCP167

TYPICAL CHARACTERISTICS
1050 1050

ISC, SHORT CIRCUIT CURRENT (mA)


1000 1000
ICL, CURRENT LIMIT (mA)

950 950
900 900
850 850
800 800
750 750
700 VIN = 3.85 V 700 VIN = 3.85 V
VOUT = 2.85 V VOUT = 2.85 V
650 650
CIN = 1 mF CIN = 1 mF
600 COUT = 1 mF 600 COUT = 1 mF
550 550
−40 −20 0 20 40 60 80 100 120 −40 −20 0 20 40 60 80 100 120
TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C)
Figure 9. Current Limit vs. Temperature Figure 10. Short Circuit Current vs.
Temperature

1000 0.50
ISC, SHORT CIRCUIT CURRENT (mA)

TJ = 125°C
900 TJ = −40°C 0.45 CIN = 1 mF
800 IDIS, DISABLE CURRENT (mA) 0.40 COUT = 1 mF

700 TJ = 25°C 0.35


600 0.30
500 0.25
VIN = 5.5 V
400 0.20
300 0.15
200 0.10 VIN = 3.85 V
CIN = 1 mF
100 COUT = 1 mF 0.05
0 0
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 −40 −20 0 20 40 60 80 100 120
VIN, INPUT VOLTAGE (V) TJ, JUNCTION TEMPERATURE (°C)
Figure 11. Short Circuit Current vs. Input Figure 12. Disable Current vs. Temperature
Voltage

400 800
VIN = 5.5 V
VEN, VOLTAGE ON ENABLE PIN (V)

360 750
VOUT = 2.85 V
IEN, ENABLE CURRENT (nA)

320 700 OFF −> ON IOUT = 10 mA


CIN = 1 mF
280 650
COUT = 1 mF
240 600
VEN = 5.5 V ON −> OFF
200 550
160 500
VIN = 5.5 V
120 VOUT = 2.85 V 450
80 IOUT = 1 mA 400
CIN = 1 mF
40 350
COUT = 1 mF
0 300
−40 −20 0 20 40 60 80 100 120 −40 −20 0 20 40 60 80 100 120
TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C)
Figure 13. Current to Enable Pin vs. Figure 14. Enable Voltage Threshold vs.
Temperature Temperature

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5
NCP167

TYPICAL CHARACTERISTICS
100 100
90 90
1 mA
RR, RIPPLE REJECTION (dB)

RR, RIPPLE REJECTION (dB)


1 mA
80 80
70 70
60 60
50 20 mA 50
40 40 VIN = 3.6 V 20 mA
VIN = 3.8 V
30 VOUT = 3.3 V 30 VOUT = 3.3 V
CIN = 1 mF CIN = 1 mF
20 COUT = 1 mF 100 mA 20 COUT = 1 mF 100 mA
10 MLCC, X7R, 0805 10 MLCC, X7R, 0805
0 0
100 1K 10K 100K 1M 10M 100 1K 10K 100K 1M 10M
FREQUENCY (kHz) FREQUENCY (kHz)
Figure 15. Power Supply Rejection Ratio vs. Figure 16. Power Supply Rejection Ratio vs.
Current, VDROP = 0.5 V, COUT = 1 mF Current, VDROP = 0.3 V, COUT = 1 mF

100 100
90 4.3 V 90 4.3 V
RR, RIPPLE REJECTION (dB)

80 RR, RIPPLE REJECTION (dB) 80


3.6 V 3.6 V
70 3.8 V 70
60 60 3.8 V
50 50
40 40 VOUT = 3.3 V
VOUT = 3.3 V
30 IOUT = 100 mA 30 IOUT = 20 mA
CIN = 1 mF CIN = 1 mF
20 20 COUT = 1 mF
COUT = 1 mF
10 MLCC, X7R, 0805 10 MLCC, X7R, 0805
0 0
100 1K 10K 100K 1M 10M 100 1K 10K 100K 1M 10M
FREQUENCY (kHz) FREQUENCY (kHz)
Figure 17. Power Supply Rejection Ratio vs. Figure 18. Power Supply Rejection Ratio vs.
Input Voltage, IOUT = 100 mA, COUT = 1 mF Input Voltage, IOUT = 20 mA, COUT = 1 mF

100K 100K
VIN = 3.6 V VIN = 3.8 V
OUTPUT VOLTAGE NOISE (nV/√Hz)

OUTPUT VOLTAGE NOISE (nV/√Hz)

VOUT = 3.3 V VOUT = 3.3 V


IOUT = 20 mA IOUT = 250 mA
10K CIN = 1 mF 10K
CIN = 1 mF
COUT = 1 mF COUT = 1 mF
MLCC, X7R, 0805 MLCC, X7R, 0805
1K 1K

100 100

10 10
10 100 1K 10K 100K 1M 10 100 1K 10K 100K 1M
FREQUENCY (kHz) FREQUENCY (kHz)
Figure 19. Output Voltage Noise Spectral Density Figure 20. Output Voltage Noise Spectral Density
for VOUT = 3.3 V, IOUT = 20 mA, COUT = 1 mF for VOUT = 3.3 V, IOUT = 250 mA, COUT = 1 mF

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6
NCP167

APPLICATIONS INFORMATION

General maximum value of ESR should be less than 1.7 W. Larger


The NCP167 is an ultra−low noise 700 mA low dropout output capacitors and lower ESR could improve the load
regulator designed to meet the requirements of RF transient response or high frequency PSRR. It is not
applications and high performance analog circuits. The recommended to use tantalum capacitors on the output due
NCP167 device provides very high PSRR and excellent to their large ESR. The equivalent series resistance of
dynamic response. In connection with low quiescent current tantalum capacitors is also strongly dependent on the
this device is well suitable for battery powered application temperature, increasing at low temperature.
such as cell phones, tablets and other. The NCP167 is fully
protected in case of current overload, output short circuit and Enable Operation
overheating. The NCP167 uses the EN pin to enable/disable its device
and to deactivate/activate the active discharge function. If
Input Capacitor Selection (CIN) the EN pin voltage is <0.4 V the device is guaranteed to be
Input capacitor connected as close as possible is necessary disabled. The pass transistor is turned−off so that there is
for ensure device stability. The X7R or X5R capacitor virtually no current flow between the IN and OUT. The
should be used for reliable performance over temperature active discharge transistor is active so that the output voltage
range. The value of the input capacitor should be 1 mF or VOUT is pulled to GND through a 280 W resistor. In the
greater to ensure the best dynamic performance. This disable state the device consumes as low as typ. 10 nA from
capacitor will provide a low impedance path for unwanted the VIN. If the EN pin voltage >1.2 V the device is
AC signals or noise modulated onto constant input voltage. guaranteed to be enabled. The NCP167 regulates the output
There is no requirement for the ESR of the input capacitor voltage and the active discharge transistor is turned−off. The
but it is recommended to use ceramic capacitors for their low EN pin has internal pull−down current source with typ. value
ESR and ESL. A good input capacitor will limit the of 200 nA which assures that the device is turned−off when
influence of input trace inductance and source resistance the EN pin is not connected. In the case where the EN
during sudden load current changes. function isn’t required the EN should be tied directly to IN.
Output Decoupling (COUT) Output Current Limit
The NCP167 requires an output capacitor connected as Output Current is internally limited within the IC to a
close as possible to the output pin of the regulator. The typical 1000 mA. The NCP167 will source this amount of
recommended capacitor value is 1 mF and X7R or X5R current measured with a voltage drops on the 90% of the
dielectric due to its low capacitance variations over the nominal VOUT. If the Output Voltage is directly shorted to
specified temperature range. The NCP167 is designed to ground (VOUT = 0 V), the short circuit protection will limit
remain stable with minimum effective capacitance of 0.7 mF the output current to 1050 mA (typ.). The current limit and
to account for changes with temperature, DC bias and short circuit protection will work properly over whole
package size. Especially for small package size capacitors temperature range and also input voltage range. There is no
such as 0201 the effective capacitance drops rapidly with the limitation for the short circuit duration.
applied DC bias. Please refer Figure 21.
Thermal Shutdown
When the die temperature exceeds the Thermal Shutdown
threshold (TSD = 160°C typical), Thermal Shutdown event
is detected and the device is disabled. The IC will remain in
this state until the die temperature decreases below the
Thermal Shutdown Reset threshold (TSDU = 140°C typical).
Once the IC temperature falls below the 140°C the LDO is
enabled again. The thermal shutdown feature provides the
protection from a catastrophic device failure due to
accidental overheating. This protection is not intended to be
used as a substitute for proper heat sinking.

Reverse Current
The PMOS pass transistor has an inherent body diode
Figure 21. Capacity vs DC Bias Voltage which will be forward biased in the case that VOUT > VIN.
Due to this fact in cases, where the extended reverse current
There is no requirement for the minimum value of condition can be anticipated the device may require
Equivalent Series Resistance (ESR) for the COUT but the additional external protection.

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7
NCP167

Power Supply Rejection Ratio maximum power dissipation supported by the device is
The NCP167 features very high Power Supply Rejection dependent upon board design and layout. Mounting pad
ratio. If desired the PSRR at higher frequencies in the range configuration on the PCB, the board material, and the
100 kHz – 10 MHz can be tuned by the selection of COUT ambient temperature affect the rate of junction temperature
capacitor and proper PCB layout. rise for the part. The maximum power dissipation the
NCP167 can handle is given by:
Turn−On Time
ƪ125oC * T Aƫ
The turn−on time is defined as the time period from EN P D(MAX) + (eq. 1)
assertion to the point in which VOUT will reach 98% of its q JA
nominal value. This time is dependent on various
The power dissipated by the NCP167 for given application
application conditions such as VOUT(NOM), COUT, TA.
conditions can be calculated from the following equations:
Power Dissipation P D [ V IN @ I GND ) I OUTǒV IN * V OUTǓ (eq. 2)
As power dissipated in the NCP167 increases, it might
become necessary to provide some thermal relief. The

160 1.6
qJA, JUNCTION TO AMBIENT THERMAL RESISTANCE (°C/W)

PD(MAX), TA = 25°C, 2 oz Cu
150 1.4

PD(MAX), MAXIMUM POWER DISSIPATION (W)


140 PD(MAX), TA = 25°C, 1 oz Cu 1.2

130 1.0

120 0.8

qJA, 1 oz Cu
110 0.6

100 0.4

qJA, 2 oz Cu
90 0.2

80 0
0 100 200 300 400 500 600 700
PCB COPPER AREA (mm2)
Figure 22. qJA and PD (MAX) vs. Copper Area (CSP4)

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8
NCP167

220 1.0

qJA, JUNCTION TO AMBIENT THERMAL RESISTANCE (°C/W)


PD(MAX), TA = 25°C, 2 oz Cu

210 0.9

PD(MAX), MAXIMUM POWER DISSIPATION (W)


200 0.8
PD(MAX), TA = 25°C, 1 oz Cu

190 0.7
qJA, 2 oz Cu

180 qJA, 1 oz Cu 0.6

170 0.5

160 0.4

150 0.3
0 100 200 300 400 500 600 700
PCB COPPER AREA (mm2)
Figure 23. qJA and PD (MAX) vs. Copper Area (XDFN4)

PCB Layout Recommendations


To obtain good transient performance and good regulation pins will also improve the device thermal resistance. The
characteristics place CIN and COUT capacitors close to the actual power dissipation can be calculated from the equation
device pins and make the PCB traces wide. In order to above (Equation 2). Expose pad can be tied to the GND pin
minimize the solution size, use 0402 or 0201 capacitors with for improvement power dissipation and lower device
appropriate capacity. Larger copper area connected to the temperature.

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9
NCP167

ORDERING INFORMATION (XDFN4)


Device Nominal Output Voltage Description Marking Package Shipping
NCP167AMX180TBG 1.8 V CH
NCP167AMX280TBG 2.8 V CP
NCP167AMX285TBG 2.85 V 700 mA, Active CK
NCP167AMX300TBG 3.0 V Discharge CQ XDFN4 3000 / Tape
(Pb−Free) & Reel
NCP167AMX330TBG 3.3 V CR
NCP167AMX350TBG 3.5 V CL
700 mA, Non-Active
NCP167BMX330TBG 3.3 V AR
Discharge

ORDERING INFORMATION (WLCSP4)


Nominal
Output
Device Voltage Description Marking* Rotation Package Shipping†
NCP167AFCT180T2G 1.8 V H 0°
NCP167AFCT285T2G 2.85 V K 0°
NCP167AFCT295T2G 2.95 V 700 mA, Active Discharge P 0°
NCP167AFCT330T2G 3.3 V R 0°
WLCSP4 5000 / Tape
NCP167AFCT350T2G 3.5 V L 0° (Pb-Free) & Reel
NCP167AFCTC350T2G 3.5 V 700 mA, Active Discharge, L 0°
Backside Coating
NCP167BFCT330T2G 3.3 V 700 mA, Non−Active R 180°
Discharge
*Marking letter with overbar.
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.

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10
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS

WLCSP4, 0.64x0.64
CASE 567JZ
SCALE 4:1 ISSUE A
DATE 03 AUG 2016

NOTES:

È
E A B 1. DIMENSIONING AND TOLERANCING PER
PIN A1 ASME Y14.5M, 1994.

È
REFERENCE 2. CONTROLLING DIMENSION: MILLIMETERS.
3. COPLANARITY APPLIES TO SPHERICAL
D CROWNS OF SOLDER BALLS.
MILLIMETERS
DIM MIN NOM MAX
A −−− −−− 0.33
TOP VIEW A1 0.04 0.06 0.08
A2 0.23 REF
b 0.195 0.210 0.225
A2 D 0.610 0.640 0.670
0.05 C E 0.610 0.640 0.670
e 0.35 BSC
A
0.05 C RECOMMENDED
NOTE 3
A1 C SEATING SOLDERING FOOTPRINT*
SIDE VIEW PLANE
A1 PACKAGE
OUTLINE

e
4X b
e 0.35 4X
0.03 C A B
PITCH 0.20
B
0.35
A PITCH
1 2 DIMENSIONS: MILLIMETERS

BOTTOM VIEW *For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.

Electronic versions are uncontrolled except when accessed directly from the Document Repository.
DOCUMENT NUMBER: 98AON85781F Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

DESCRIPTION: WLCSP4, 0.64X0.64 PAGE 1 OF 1

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.

© Semiconductor Components Industries, LLC, 2019 www.onsemi.com


MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS

XDFN4 1.0x1.0, 0.65P


CASE 711AJ
1 ISSUE B
SCALE 4:1 DATE 25 JUN 2021

GENERIC
MARKING DIAGRAM* *This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
XX M XX = Specific Device Code or may not be present. Some products may
1 M = Date Code not follow the Generic Marking.

Electronic versions are uncontrolled except when accessed directly from the Document Repository.
DOCUMENT NUMBER: 98AON67179E Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

DESCRIPTION: XDFN4, 1.0X1.0, 0.65P PAGE 1 OF 1

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.

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