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Izoo report 2

The document outlines practical experiments conducted in a physics course at Chuka University, focusing on digital electronics and the verification of Kirchhoff's laws. It details the implementation of logic diagrams using various logic gates and the analysis of circuit behavior, along with the verification of Kirchhoff's Voltage Law through experimental procedures. The results confirm the theoretical principles of digital electronics and circuit analysis, emphasizing the importance of accurate measurements and the application of Boolean algebra.

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0% found this document useful (0 votes)
9 views

Izoo report 2

The document outlines practical experiments conducted in a physics course at Chuka University, focusing on digital electronics and the verification of Kirchhoff's laws. It details the implementation of logic diagrams using various logic gates and the analysis of circuit behavior, along with the verification of Kirchhoff's Voltage Law through experimental procedures. The results confirm the theoretical principles of digital electronics and circuit analysis, emphasizing the importance of accurate measurements and the application of Boolean algebra.

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hozmor5k
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
You are on page 1/ 39

CHUKA UNIVERSITY

DEPARTMENT OF PHYSICALSCIENCES

PHYSICS SECTION

SECOND SEMESTER

PHYS 428

NAME:ISAAC NGETICH

EB7/56778/21

E1. DIGITALELECTRONICS: Logic Diagram implementation.


E2: VERIFICATION OF KIRCHOFF’S LAWS
E3: ZENER DIODE AS VOLTAGE REGULATOR
1
E4: REALIZATION OF XNOR GATES USING DISCRETE COMPONENTS

W1: WAVES ON A VIBRATING STRING


H2: NEWTON’S LAW OF COOLING

E1. DIGITALELECTRONICS: Logic Diagram implementation.


Aim:

2
The objective of this practical report is to implement and analyze various logic diagrams
using basic logic gates such as AND, OR, NOT, NAND, NOR, XOR, and XNOR. The goal
is to understand how these gates can be combined to form complex digital circuits.

Introduction:

Digital electronics is a branch of electronics that deals with digital signals and devices. One
of the fundamental concepts in digital electronics is the implementation of logic diagrams,
which represent the combination of logic gates used to perform specific logical operations.
These logic diagrams are essential in designing and analyzing digital circuits.

THEORY

Logic diagrams are graphical representations of logic circuits, where symbols are used to
denote different logic gates. Each gate performs a specific logical operation based on
Boolean algebra.

Basic Logic Gates:

 AND Gate: Outputs HIGH (1) only if both inputs are HIGH.
 OR Gate: Outputs HIGH if at least one input is HIGH.
 NOT Gate (Inverter): Outputs the complement of the input.
 NAND Gate: Outputs LOW only if both inputs are HIGH.
 NOR Gate: Outputs HIGH only if both inputs are LOW.
 XOR Gate (Exclusive OR): Outputs HIGH if only one of the inputs is HIGH.
 XNOR Gate (Exclusive NOR): Outputs HIGH if both inputs are equal.

Boolean algebra:

Boolean algebra provides the mathematical framework for analyzing and designing logic
circuits. The basic laws of Boolean algebra include:

Implementation of Logic Diagrams:

Logic diagrams can be implemented using either:

3
 Discrete Logic Gates: Individual gate ICs (e.g., 7400 series)
 Programmable Logic Devices (PLDs): Such as FPGA or CPLD
 Simulation Software: Tools like Logistic, Proteus, or Multisim

APPARATUS

Parts needed: 74LS04, 74LS08, 74LS32

PROCEDURE

Logic diagram Implementation

1. The Boolean expression for the logic diagram below was written. Hint: the outputs
expression for each gate in the diagram was written, left-to-right.

Figure 1 circuit diagramme


F=(A+B) + (A.B.C)

2. Without building the circuit yet, c the truth table below WAS completed for this circuit.
Table 1 truth table for the circuit

A B C A+B A.B.C (A+B)+A.B.C (A+B)+A.B.C


4
0 0 0 0 0 0 1
0 0 1 0 0 0 1
0 1 0 1 0 1 0
0 1 1 1 0 1 0
1 0 0 1 0 1 0
1 0 1 1 0 1 0
1 1 0 1 0 1 0
1 1 1 1 0 1 0

3. Using the I.C shown somewhere in the manual, I.C pin numbers were assigned to each
gate in the logic diagram and the circuit built using reeds provided for inputs and an
LED for the “f” output.
4. By setting the input reeds appropriately, the expected results were verified from the
truth table against the actual output for each input combination. And noted that outputs
match those in the truth table.

Results

Consider the circuit given in the figure above with the logic gates:

 OR Gate (A + B)
 AND Gate (B. C)
 OR Gate combining the outputs of the first OR gate and the AND gate
 NOT Gate (Inverter) for final output

The Boolean expression for this circuit is:

F= (A+B) + (A.B.C)
The expected output from the filled truth table were verified to be true.

Table 2 expected output

A B C A+B A.B.C (A+B)+A.B.C (A+B)+A.B.C


0 0 0 0 0 0 1
0 0 1 0 0 0 1
0 1 0 1 0 1 0
0 1 1 1 0 1 0
1 0 0 1 0 1 0
1 0 1 1 0 1 0
1 1 0 1 0 1 0
1 1 1 1 0 1 0

CONCLUSION
5
Logic diagram implementation is a crucial aspect of digital electronics, enabling the design
and analysis of digital systems. Understanding the behavior of basic and complex logic
gates is essential for building more advanced digital circuits. Through practical
implementation, students gain hands-on experience in applying Boolean algebra and
constructing digital circuits.

REFERECES

Digital Electronics. (2025). Google Books. https://books.google.co.ke/books?

hl=en&lr=&id=Ljsr7UA83ScC&oi=fnd&pg=PR7&dq=DIGITAL+ELECTRONICS:

+Logic+Diagram+implementation.&ots=dy-

e0sTKs9&sig=F2sXzAfOIBZYekKIBDD0bWrSckE&redir_esc=y#v=onepage&q=DIGITA

L%20ELECTRONICS%3A%20Logic%20Diagram%20implementation.&f=false

Digital Logic Design. (2025). Google Books. https://books.google.co.ke/books?

hl=en&lr=&id=o7enSwSVvgYC&oi=fnd&pg=PP1&dq=DIGITAL+ELECTRONICS:

+Logic+Diagram+implementation.&ots=zFClZwifbl&sig=43R1T9v0H2ldBaZj0nJ7GqTliT

g&redir_esc=y#v=onepage&q=DIGITAL%20ELECTRONICS%3A%20Logic%20Diagram

%20implementation.&f=false

FUNDAMENTALS OF DIGITAL CIRCUITS, Fourth Edition. (2016). Google Books.

https://books.google.co.ke/books?

hl=en&lr=&id=CyavDAAAQBAJ&oi=fnd&pg=PP1&dq=DIGITAL+ELECTRONICS:

+Logic+Diagram+implementation.&ots=Xs9PR5p624&sig=o-

7lo3EnTIHNApIhKhhuQv4t_yA&redir_esc=y#v=onepage&q=DIGITAL

%20ELECTRONICS%3A%20Logic%20Diagram%20implementation.&f=false

gration. https://doi.org/10.1115/fpmc2024-141218

Spectral Logic and Its Applications for the Design of Digital Devices. (2025). Google Books.

https://books.google.co.ke/books?

6
hl=en&lr=&id=Uxv7t7btTJYC&oi=fnd&pg=PR5&dq=DIGITAL+ELECTRONICS:

+Logic+Diagram+implementation.&ots=GQRVZOagdf&sig=-

ELitrZDhuyZdTpADGsQdsgCVWU&redir_esc=y#v=onepage&q=DIGITAL

%20ELECTRONICS%3A%20Logic%20Diagram%20implementation.&f=false

E2: VERIFICATION OF KIRCHOFF’S LAWS

AIM:
To verify the Kirchhoff’s voltage law for a given circuit,
THEORY

We learned that a single equivalent resistance, (RT) can be found when two or
more resistors are connected together in either series, parallel or combinations of
both, and how these circuits obey Ohm’s Law. However, sometimes in complex
circuits such as bridge or T networks, we cannot simply use Ohm’s Law alone to
find the voltages or currents circulating within the circuit. For these types of
calculations, we need certain rules which allow us to obtain the circuit equations
and for this we can use Kirchhoff’s Circuit Law.

In 1845, a German physicist, Gustav Kirchhoff developed a pair or set of rules or


laws which deal with the conservation of current and energy within electrical
circuits. These two rules are commonly known as: Kirchhoff’s Circuit Laws; one of
Kirchhoff’s laws is dealing with the current flowing around a closed circuit and it is
called Kirchhoff’s Current Law, (KCL) while the other law deals with the voltage
sources present in a closed circuit and it is called Kirchhoff’s Voltage Law, (KVL)

Kirchhoff’s First Law – The Current Law, (KCL) Kirchhoff’s Current Law or
KCL, states that the “total current or charge entering a junction or node is exactly
equal to the charge leaving the node as it has no other place to go except to leave,
as no charge is lost within the node”. In other words, the algebraic sum of ALL the
7
currents entering and leaving a node must be equal to zero, I(exiting) + I(entering)
= 0. This idea by Kirchhoff is commonly known as the Conservation of Charge.

Kirchhoff’s Voltage law states that the algebraic sum of the voltage around any closed path
in a given circuit is always zero. In any circuit, voltage drops across the resistors always
have polarities opposite to the source polarity. When the current passes through the resistor,
there is a loss in energy and therefore a voltage drop. In any element, the current flows from
a higher potential to lower potential. Consider the fig (1a) shown above in which there are 3
resistors are in series. According to kickoff’s voltage law….
V = V1 + V2 + V3

Apparatus
1. Power supply 0-30volts DC
2. Ammeter
3. Voltmeter
4. Resistors (R1=1K, R2 = 480R, R3&R4=500R)
5. Breadboard and connecting wires

Circuit Diagram

8
How to measure the voltage across the resistors (KVL)

Practical Circuit

PROCEDURE:

Kirchhoff’s Voltage law:


1. The circuit was connected as shown in fig (2a).
The voltages across the resistors were measured.
2. It was observed that the algebraic sum of voltages in a closed loop was
equal to zero.
OBSERVATION TABLE: KVL:

Table 3 E2 resultes

S.NO VOLTAGE THEORETICAL PRACTICAL


ACCROSS
1 1Ω 12,02 15.0V

2 330Ω 7.98 5.0V

3 470Ω 3.99 2.5V

9
4 470Ω 3.99 2.5V

ANALYSIS

Using orms law

V=I×R

Where:

V –Total voltage

I – total current

R –total resistance

The total resistance in the circuit is;

R2R3
RT = R 1+ +R4
R 2+ R 3

Since R2and R3 are in parallel

This gives us

330∗470
R=1 OOO+ +470
330+ 470

=1663.875Ω

With total voltage of 20V,

V
I=
R

20
I=
1663.875

I=0.012A

Voltage across R1 is

V= IR

0.012*1000

10
V2=12V

Using the first2R loop with R1and R2,

20= I 1 R 1+ I 2 R 2

20=0.012∗1000+470 I 2

I2=0.024 A

The voltage across R2 is 7.98V

The voltage across resistance R3 and R4 are

To get current following we use the second loop with the resistance R2, R3 and R4

7.98
I3=
R 2+ R 3

=0.0848A

V3=0.00848∗470

V3=3.99V

V4=3.99 Since they have the same resistance and same current flowing trough.

Verification of kirchoff’s law

Loop 1

Vdrop =12.02+3.99+3.99

=20v which is the supply voltage

Loop 2

Vdrop =12.02+7.98

=20 v

loop 3

Vdrop =3.99+3.99

7.98V which is the voltage gain V2


=

From the practical values

11
The voltage drop across the resistance in a closed is equal to the voltage supply .

From loop 1

Voltage drop =V1+V3+V4

=15V+2.5V+2.5V

=20V Which is the voltage supplied

Loop 2

Voltage drop =V1+V2

=15V+5V

=20V

Loop 3

Voltage drop -= V3+V4

2.5+2.5

=5V Which is equal to voltage gain V2

Conclusion

In this practical investigation of Kirchhoff's Law of Voltage (KVL), we have demonstrated


how the sum of the electrical potential differences (voltages) around a closed loop in a
circuit is always equal to zero, as stated by KVL. Our experimental results, comparing
theoretical and practical voltage measurements across various resistors in a series circuit,
showed some minor deviations, which can be attributed to measurement errors, component
tolerances, or imperfections in the experimental setup. Despite these minor discrepancies,
the overall trend validated Kirchhoff’s Law and reinforced its importance in circuit analysis.

By observing the voltage drops across each resistor, we verified that the sum of the
individual voltage drops equaled the total supplied voltage, supporting the theoretical
expectations.

12
RECOMEDATION

1. Improved Measurement Accuracy: To minimize experimental errors, it is


recommended to use more precise instruments, such as digital multimeters with
higher accuracy, and ensure proper calibration before measurements.
2. Component Tolerances: Consider the tolerance levels of the resistors used in the
circuit, as these can introduce small variations in voltage drop, which could slightly
affect the practical results. Using resistors with lower tolerance levels would
improve the precision of the results.
3. Repeat Measurements: For further validation, repeat the experiment with different
resistor combinations and under varying conditions, ensuring consistent results that
support the robustness of Kirchhoff’s Law.
4. Use of Simulation Software: Using circuit simulation tools such as SPICE could
offer a more controlled environment to predict and compare theoretical and practical
results, helping to reduce errors due to physical limitations.

REFERENCE

Lara, V., & Dechoum, K. (2015a). Kirchhoff’s voltage law corrected for radiating circuits. Revista

Brasileira de Ensino de Física, 37(1), 1307. https://doi.org/10.1590/s1806-11173711651

Lara, V., & Dechoum, K. (2015b). Kirchhoff’s voltage law corrected for radiating circuits. Revista

Brasileira de Ensino de Física, 37(1), 1307. https://doi.org/10.1590/s1806-11173711651

Quintela, Fé. R., Redondo, R. C., Melchor, N. R., & Redondo, M. (2009). A General Approach to

Kirchhoff’s Laws. IEEE Transactions on Education, 52(2), 273–278.

https://doi.org/10.1109/te.2008.928189

Trombetta, L. (2013). Experimental Verification of Kirchhoff’s Voltage Law and Kirchhoff’s

Current Law. https://courses.egr.uh.edu/ECE/ECE2100/Formal/Sample%20Formal

%20Report.pdf

13
Zhang, Z. M., Wu, X., & Fu, C. (2020). Validity of Kirchhoff’s law for semitransparent films made

of anisotropic materials. Journal of Quantitative Spectroscopy and Radiative Transfer,

245(444), 106904. https://doi.org/10.1016/j.jqsrt.2020.106904

14
15
E3: ZENER DIODE AS VOLTAGE REGULATOR

AIM: To study zener diode as voltage regulator also calculate the percentage line
regulation and load regulation.

APPARATUS: Zener diode, Resistors, Power supply, Multi meter

CIRCUIT DIAGRAM:

THEORY:
Zener diode is a P-N junction diode specially designed to operate in the reverse biased
mode. It is acting as normal diode while forward biasing. It has a particular voltage
known as break down voltage, at which the diode break downs while reverse biased. In
the case of normal diodes the diode damages at the break down voltage. But Zener diode
is specially designed to operate in the reverse breakdown region.

The basic principle of Zener diode is the Zener breakdown. When a diode is heavily
doped, it’s depletion region will be narrow. When a high reverse voltage is applied across
the junction, there will be very strong electric field at the junction. And the electron hole
pair generation takes place. Thus heavy current flows. This is known as Zener break
down.

So a Zener diode, in a forward biased condition acts as a normal diode. In reverse biased
mode, after the break down of junction current through diode increases sharply. But the
voltage across it remains constant. This principle is used in voltage regulator using Zener
diodes.
Zener diode as voltage regulator:A voltage regulator is an electronic circuit that
provides a stable DC voltage independent of the load current, temperature and AC line
voltage variations. A Zener diode of break down voltage VZ is reverse connected to an
input voltage source VI across a load resistance RL and a series resistor RS. The voltage
across the zener will remain steady at its break down voltage VZ for all the values of
zener current IZ as long as the current remains in the break down region. Hence a
regulated DC output voltage V0=VZ is obtained across RL, whenever the input voltage
remains within a minimum and maximum voltage.
16
The figure shows the zener voltage regulator, it consists of a current limiting resistor RS
connected in series with the input voltage Vs and zener diode is connected in parallel with
the load RL in reverse biased condition. The output voltage is always selected with a
breakdown voltage Vz of the diode.
The input source current, IS = IZ + IL...................(1)
The drop across the series resistance, Rs = Vin – Vz............(2)
And current flowing through it, Is = (Vin – VZ) / RS....................(3)
From equation (1) and (2), we get, (Vin - Vz)/Rs = Iz +IL...................(4)

Regulation with a varying input voltage (line regulation): It is defined as the change in
regulated voltage with respect to variation in line voltage. It is denoted by ‘LR’.

In this, input voltage varies but load resistance remains constant hence, the load current
remains constant. As the input voltage increases, form equation (3) Is also varies
accordingly. Therefore, zener current Iz will increase. The extra voltage is dropped across
the Rs. Since, increased Iz will still have a constant Vz and Vz is equal to Vout.

The output voltage will remain constant. If there is decrease in V in, Iz decreases as load
current remains constant and voltage drop across Rs is reduced. But even though Iz may
change, Vz remains constant hence, output voltage remains constant.

Regulation with the varying load (load regulation): It is defined as change in load
voltage with respect to variations in load current. To calculate this regulation, input
voltage is constant and output voltage varies due to change in the load resistance value.

Consider output voltage is increased due to increasing in the load current. The left side of
the equation (4) is constant as input voltage Vin, IS and Rs is constant. Then as load
current changes, the zener current Iz will also change but in opposite way such that the
sum of Iz and IL will remain constant. Thus, the load current increases, the zener current
decreases and sum remain constant. Form reverse bias characteristics even Iz changes, Vz
remains same hence, and output voltage remains fairly constant.

PROCEDURE: -

A) Line Regulation:
1. The connections were as shown in figure above.
2. load resistance was kept fixed at value; DC input voltage was varied from 5V to 15V.
3. The output voltage was noted down as a load voltage with high line voltage
‘VHL’ and as a load voltage with low line voltage ‘VLL’.
4. Using formula, % Line Regulation = (VHL-VLL)/ VNOM x100, where VNOM = the
nominal load voltage under the typical operating conditions. For ex. VNOM = 9.5 ± 4.5
V

B) Load Regulation:
1. For finding load regulation, the connections was made as shown in figure above.
2. The input voltage was kept constant at 10V, vary load resistance value.
3. The load voltage ‘VNL’ for maximum load resistance value and full load voltage

17
‘VFL’ for minimum load resistance value. Ware noted
4. Using, % load regulation = (VNL-VFL)/ VFL x100 the load regulation was calculated

Line Regulation:

Take RL=1KΩ
Table 4 Line legulation
Vin Vout
1 0.53

2 1.04
3 1.54
4 2.02
5 2.57
6 3.08
7 3.58
8 4.10
9 4.60
10 5.41
11 5.61
12 6.09
13 6.60
14 7.11
15 7.63

Load Regulation:
Set Vin=10V
Table 5 Load regulation
RL Vout
1K 5.13
2K 6.13
3K. 7.55
.4K 8.05
.5K 8.38
6K 8.61
7K 8.80

18
8K 8.93
9K 9.05
10K 9.14

Calculations:
% Line Regulation = (VHL-VLL) / VNOM x100 =--------------------------%
VHL=7.63V
VLL=0.53V
VNOM Coresponds to 9
Therefore VNOM =4.60V
= ((7.63−0.53)/ 4.60)∗100
=154.34%

% voltage regulation = (VNL-VFL)/VFLx100 =---------------------%


VNL=9.14V
VEL=5.13V
=(VNL-VFL)/VFLx100
=(9.14-5.13L)/5.15x100
=77.97 %

Discussion

 From your Line Regulation calculation, we found that the output voltage varied
significantly when the input voltage changed. Based the data, the % Line Regulation
was calculated to be 154.35%, which indicates a high variation in the output voltage
as the input voltage changed from 5V to 15V.

 From Load Regulation calculation, we determined the % Load Regulation to be


78.1%, meaning that the output voltage varied significantly when the load resistance
was changed between 1KΩ (full load) and 10KΩ (no load).

Expectations

 % Line Regulation: Ideally, this should be 1% or lower (typically between 0.5% to


2% in good designs). A low value indiçâtes the output voltage remains nearly constant
despite significant variations in the input voltage.

 % Load Regulation: Ideally, this should also be 1% or lower, indicating minimal


voltage change as the load resistance changes from no-load (maximum resistance) to
19
full-load (minimum resistance). The output voltage should remain stable despite
fluctuations in load.

Conclusion

It was concluded that the line leguration was approxmatry 154.34%.this indicates a high
variation output voltage in respond to input voltage ,which suggest inefficient voltage
regulator. It was also concluded that the load regulation was 77.98% meaning the output
voltage changes by 77,98% when load resistor valies from 1Kῼ to 10Kῼ.

SOURCES OF ERROR

The voltmeter output might have a limmited precision error .

Poor connection between the power supply and load resistor.

recommandation

It was recommended that the instruments should be tested before any practical and also that
the student should connect the circuit correctly.

References

mane2023zener,. (n.d.). Zener Diode: Theory, Applications, and Advancements.

Witt, T. J., Reymann, D., & Avrons, D. (1995). The stability of some Zener-diode-based voltage

standards. IEEE Transactions on Instrumentation and Measurement, 44(2), 226–229.

20
E4: REALIZATION OF XNOR GATES USING DISCRETE COMPONENTS

Aim:
To construct logic gates XNOR gates using discrete components and verify their truth
tables also familiarize with advanced integrated circuits of different logics and understand
the data sheet of thrse circuits .

THEORY

In digital electronics, the XNOR gate is a type of logic gate used to perform an
exclusive NOR gate. It is a special type of logic gate used in digital circuits. An XNOR
gate, also known as an equivalence gate or an EX-NOR gate, is a digital logic gate that
outputs true (1) when an even number of true inputs are present. It produces a true
output if both of its inputs are the same (either both true or both false). It is also known
as the material biconditional. This logic gate is denoted by this sign "⊙".
In this circuit, Q1 and Q2 transistors are connected same as AND gate and base of these
transistors are connected to input terminals. Transistors Q3 and Q4 are connected same as
OR gate and base of these transistors are connected to the same input terminals and these
transistor is powered by NAND output of Q1 and Q2.the output is inverted using another
transistor Q5. An LED is connected to output NOT (inverter) Q5I.e. output of XOR gate.
When both inputs are low Q1 and Q2 are not allowing the current flow so Q3 and Q4 are
getting the powered, but since inputs are low so current is not even flowing through these
transistors and the output is low which is inverted by Q5. So, LED is glowing. in a
condition current is not flowing through Q1 and Q2 when one of the input is low, so, Q3
and Q4 are getting powered as input B is high so Q4 is flowing the current. i.e. High output

21
in Q4 that inverted to LOW thus no current will not flow the LED it is glowing. same thing
happens when inputs are opposite. In such condition when both inputs are high current is
flowing through Q1 and Q2. So, Q3 and Q4 are not getting powered giving a low output
which is inverted by Q5.

Apparatus:

1. Breadboard
2. Resistors 10k, 1k (5), 330R.
3. Transistors 2N2222A (NPN) =5pcs
4. Connecting wires
5. DMM
6. LEDs
7. 5 volts power supply
Procedure:

1. Connections are made as per the circuit diagram.


2. Switch on the power supply.
3. Apply different combinations of inputs and observe the outputs; compare the
outputs with the truth tables.

22
Results

Table 6 Optained results

A B OUTPUT

0 O 1

0 1 0

1 0 0

1 1 1

ANALYSIS

The objective of this experiment was to realize an XNOR gate using discrete electronic
components, specifically resistors, diodes, and transistors. An XNOR gate, also known as an
Exclusive-NOR gate, is a logic gate that outputs a true (high) signal only when both of its
inputs are the same (both 0 or both 1). The logic expression for the XNOR gate is:

Output=A⊙B=(A⊕B)

Table 7 Truth table

23
A B OUTPUT

0 0 1

0 1 0

1 0 0

1 1 1

In this practical, we constructed the XNOR gate by combining basic logic gates (AND, OR,
NOT) using diodes or transistors. The circuit design involved creating an XOR gate first
and then inverting the output to obtain the desired XNOR functionality. The components
used included:

1. Diodes/Transistors: Used to create the basic logic gates such as AND, OR, and
NOT.
2. Resistors: To limit the current through the diodes and transistors, ensuring safe
operation of the components.
3. Power Supply: A regulated DC voltage source to power the circuit.
4. Breadboard: For prototyping and assembling the circuit without soldering.

During the experiment, we tested the XNOR gate's functionality by applying different
combinations of binary inputs (0, 1) and measuring the output. The output was consistent
with the truth table of an XNOR gate, confirming the correctness of the design.

Conclusion

The realization of the XNOR gate using discrete components (diodes, transistors, and
resistors) was successful. The output from the circuit matched the expected results from the
truth table of the XNOR gate. The design was straightforward, involving a combination of
basic logic gates (AND, OR, and NOT) built with the available discrete components.

Recommendations

1. Improved Precision: To enhance the accuracy of the circuit, consider using precision
resistors with lower tolerance to improve the stability of voltage levels across
components, especially in sensitive parts of the circuit like the voltage dividers.
2. Integration with Other Logic Gates: The XNOR gate could be integrated with other
gates to create more complex logic circuits, such as arithmetic operations or parity
checkers. This would involve ensuring proper interfacing between gates and managing
signal levels.

24
3. Use of Integrated Circuits: For more advanced and robust applications, using
dedicated logic ICs (such as the 4077 IC for XNOR gates) can simplify the design
process, improve reliability, and reduce the component count.

Reference

Digital Electronics. (2025). Google Books. https://books.google.co.ke/books?

hl=en&lr=&id=Ljsr7UA83ScC&oi=fnd&pg=PR7&dq=DIGITAL+ELECTRONICS:

+Logic+Diagram+implementation.&ots=dy-

e0sTKs9&sig=F2sXzAfOIBZYekKIBDD0bWrSckE&redir_esc=y#v=onepage&q=DIGITA

L%20ELECTRONICS%3A%20Logic%20Diagram%20implementation.&f=false

Digital Logic Design. (2025). Google Books. https://books.google.co.ke/books?

hl=en&lr=&id=o7enSwSVvgYC&oi=fnd&pg=PP1&dq=DIGITAL+ELECTRONICS:

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%20implementation.&f=false

FUNDAMENTALS OF DIGITAL CIRCUITS, Fourth Edition. (2016). Google Books.

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Optica Publishing Group. (2025). Optica.org. https://opg.optica.org/oe/fulltext.cfm?uri=oe-19-7-

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Spectral Logic and Its Applications for the Design of Digital Devices. (2025). Google Books.

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XNOR gates, from discrete elements - Page 1. (2023). Eevblog.com.

https://www.eevblog.com/forum/beginners/xnor-gates-from-discrete-elements/

W1: WAVES ON A VIBRATING STRING


Aims: To study the harmonics and their relation to the tension of a vibrating string
To calculate the wavelength of the waves on vibrating string

Date 29th January 2025

Theory

When a string is fixed on both sides is caused to vibrate it produces a standing wave. A
standing wave is when the wave appears to stand still moving up and down in just one sport.
The ends of such a wave do not move.

Figure 2 standing wave (Yang Alcocer, Y. , 2020)


The circles shows the sports that do not move.im between the circle the wave moves up and
down.when using a string that vibrate with a standing wave the pattern is
observed ,depending on frequency the string is vibrating with ,different number of sports are
observed .this sports are called the nodes and in between them is the antinode.

Consider a string fixed at the two ends. Subsequently, these ends become nodes - points of
no displacement. In between these two nodes at the end of the string, there must be at least
one antinode. The most fundamental harmonic for a guitar string is the harmonic associated
with a standing wave having only one antinode positioned between the two nodes on the

26
end of the string. This would be the harmonic with the longest wavelength and the lowest
frequency. The lowest frequency produced by any particular instrument is known as the
fundamental frequency. The fundamental frequency is also called the first harmonic of
the instrument. Figure 6 shows the first harmonic of a vibrating string.

First
Harmonic

Fundament
al
Figure 6: Fundamental frequency of a vibrating string

If you analyze the wave pattern in the vibrating string for this harmonic, you will notice that
there is not quite one complete wave within the pattern. A standing wave pattern is not
actually a wave, but rather a pattern of a wave. Thus, it does not consist of crests and
troughs, but rather nodes and antinodes. The pattern is the result of the interference of two
waves to produce these nodes and antinodes.) In this pattern, there is only one-half of a
wave within the length of the string. This is the case for the first harmonic or fundamental
frequency of a guitar string.

The second harmonic of a vibrating string is produced by adding one more node between
the ends of the guitar string. And of course, if a node is added to the pattern, then an
antinode must be added as well in order to maintain an alternating pattern of nodes and
antinodes. In order to create a regular and repeating pattern, that node must be located
midway between the ends of the guitar string. This additional node gives the second
harmonic a total of three nodes and two antinodes. The standing wave pattern for the second
harmonic is shown in figure 7.

Second
Harmonic

First
Overtone
Figure 7: Second harmonic of a vibrating string

The third harmonic of a vibrating string is produced by adding two nodes between the ends
of the string. And of course, if two nodes are added to the pattern, then two antinodes must
be added as well in order to maintain an alternating pattern of nodes and antinodes. In order
27
to create a regular and repeating pattern for this harmonic, the two additional nodes must be
evenly spaced between the ends of the vibrating string. This places them at the one-third
mark and the two-thirds mark along the string. These additional nodes give the third
harmonic a total of four nodes and three antinodes. The standing wave pattern for the third
harmonic is shown in figure 8.

Third
Harmonic

Second
Overtone
Figure 8: Third harmonic of a vibrating string

After a discussion of the first three harmonics, a pattern can be recognized. Each harmonic
results in an additional node and antinode, and an additional half of a wave within the
string. If the number of waves in a string is known, then the equations relating the
wavelength of the standing wave pattern to the length of the string are shown below.

Apparatus:
A string,
Masses of 150 g, 20 g, 10 g, 2g and 1 g

28
Experimental procedure
1. The apparatus were Set up as shown in figure below

Figure 9 : Vibrating string of length L

2. Before switching the power ON .The string was fixed and its length measured L =
98.0 cm
3. Mass of 150 g was placed on the pan and the power switched ON. And the type of
harmonic observed and the number of nodes recorded in table 5.then the power was
switched OFF
4. The mass of 150 g was replaced with 30 g plus big and small circular masses
provided. The power Switched ON and the type of harmonic observed recorded in
table 5 and the number of nodes. And the power switched OFF.
5. The mass of 30 g was replaced with 10 g plus big and small circular masses
provided, the power Switched ON and the type of harmonic observed recorded in
table 5 and the number of nodes. And the power Switched OFF
6. The big and small circular masses provided were used on the pan the power
switched ON and the type of harmonic observed and the number of nodes recorded
in table 5. Switch OFF the power

Table 8 Harmonic of vibrating string

Mass on the Type of Harmonic Number of Tension on the string


string (g) Nodes (N)
150 First harmonic 2 1.700
33 Secord harmonic 3 0.323
13 Third harmonic 4 0.127
3 Fifth harmonic 6 0.294

Tension (T) =Mg


g = 9.8 ms-2

DATA ANALYSIS
1. Calculate the wavelength for each harmonic observed
First harmonic

29
1
L= 2 ℷ

ℷ=2L=2*0.98m

1.96m

Second harmonic/first overtone

ℷ =L

=0.98m

Third harmonic

ℷ=2/3L

=0.653m

Fifth harmonic

ℷ=2/5 L

=0.392M

2. What is the relationship between the tension on the string and the harmonics of a
vibrating string?
Definitions

 Fundamental Frequency: This is the lowest frequency of a periodic waveform,


often referred to as the first harmonic. It is the main frequency at which a system
oscillates and is perceived as the pitch of the sound.
 Harmonics: These are frequencies that are integer multiples of the fundamental
frequency. They contribute to the overall sound and timbre of a musical note.

Relationship between fundamental frequency and harmonics

Mathematical Representation: If the fundamental frequency is denoted as f0, the


harmonics can be expressed as:
- First harmonic (fundamental) f1=f0
30
- Second harmonic: f2=2f0
- Third harmonic: f3=3f0
and so on…

The relationship between tension of the string and the harmonics

For a given string, the frequency of the harmonic is proportional to the number of nodes.
The tension affects the frequency, and therefore, the harmonic numbers.

It was noted that every string tension has its own fundamental harmonic (as any guitar
player knows). The relationship between the tension and the fundamental harmonic involves
the mass density of the string and the distance between its two fixed ends, and this comes
from the role that tension and mass density play in the traveling wave velocity.

3. What other factors affect the harmonics of a vibrating string?

Length; When the length of a string is changed, it will vibrate with a different frequency.
That will lead to different harmonics

Diameter is the thickness of the string. Thick strings with large diameters vibrate slower
and have lower frequencies than thin ones.
The density
The density of a string will also affect its frequency.

4. Compare the wavelength of the first overtone with that of other harmonics

From the experiment it was noted that the first overtone (second harmonic) has a
wavelength equal to the length of the string while other harmonics have wavelength
equal to a fraction multiple of length

Conclusion

It was observed that as the harmonic number increases as the tension required to produce
that harmonic decreases. This is because higher harmonics correspond to higher-frequency
vibrations that require less tension to achieve the same vibration modes. The string's tension
plays a significant role in determining the frequency of each harmonic and is inversely
related to the harmonic number.The mass of the string is likely a key factor influencing the
tension required to produce the harmonic.

31
REFERENCE
Andrew Zimmerman Jones, & Robbins, D. (2010). String theory for dummies. Wiley Publishing.

Firth, I. M. (1977). Physics of the guitar at the Helmholtz and first top‐plate resonances. The

Journal of the Acoustical Society of America, 61(2), 588–593.

https://doi.org/10.1121/1.381302

He, Y., Chen, E., Zhu, W., Ferguson, N. S., Wu, Y., & Lu, Y. (2022). An analytical wave solution

for the vibrational response and energy of an axially translating string in any propagation

cycle. Mechanical Systems and Signal Processing, 181, 109507–109507.

https://doi.org/10.1016/j.ymssp.2022.109507

H2: NEWTON’S LAW OF COOLING


Aim: To investigate Newton’s laws of cooling

Apparatus:

32
Bunsen burner, tripod, beakers, thermometer and stopwatch

Theory
Newton’s laws of cooling states that in conditions of forced convention (i.e. a draught), the
rate of heat loss from a body is directly proportional to the excess temperature of the body
over that of its surrounding. Newton’s laws of cooling are approximation which can be used
only when a body cannot surround itself with a layer of warm air, i.e. in conditions of
forced convection. In still air, the approximation can still be used provided that temperature
differences do not exceed about 30 K. We use the law to predict heat losses of a body at
various temperatures so that we can design suitable heating systems or make corrections for
any losses which may occur during measurements of heat. First, we plot a cooling curve
over a convenient range of temperatures. The rate of cooling of any instance is given by the
corresponding slope, J of the curve, which is proportional to the excess temperature at that
instant.

J2 ά θ1; J2 ά θ2etc 1

Or generally,
j= kθ 2

We obtain the rate of cooling at particular excess temperatures by extrapolating a graph of


temperature excess against j

Experimental procedure
1. The liquid was heated to a temperature of 600C as shown in figure below
2. The heat source was withdrew the liquid
3. The temperature of the liquid was recorded every minute, until the temperature reaches
about 350 C .

Figure: Heating and cooling liquid.

33
34
RESULTS
Table 9 temperature and time

TEMPERATUR
60 58.7 57.3 56 54.6 53.5 53.1 52 51.3 50.7
E

TIME 1 2 3 4 5 6 7 8 9 10

49.9 49.1 48.1 47.9 47.6 45.8 45.2 44.5 44.1 43.6

11 12 13 14 15 16 17 18 19 20

42.7 42.5 42.2 41.8 41.4 41.0 40.5 40.0 39.8 39.3

21 22 23 24 25 26 27 28 29 30

38.9 38.7 38.3 37.9 37.6 37.3 36.9 36.6 36.3 36.1 35.8 35.4 35.0

31 32 33 34 35 36 37 38 39 40 41 42 43

Table 10 Excess temperature of cooling liquid

35
temp 60 58.7 57.3 56 54.6 53.5 53.1 52 51.3

Excess
33 31.7 30.3 29 27.6 26.5 26.1 25 24.3
temp

- - - - -
Slope -18.15 -15.95 -15.18 -13.75
17.435 16.665 14.575 14.355 13.365

Temp 49.9 49.1 48.1 47.9 47.6 45.8 45.2 44.5 44.1

Exces
s 22.9 22.1 21.1 20.9 20.6 18.8 18.2 17.5 17.1
temp

slope -12.595 -12.155 -11.605 -11.495 -11.33 -10.34 -10.01 -9.625 -9.405

Temp 43.6 42.7 42.5 42.2 41.8 41.4 41.0 40.5 40.0 39.8

Exces
s 16.6 15.7 15.5 15.2 14.8 14.4 14 13.5 13 12.8
temp

slope -9.13 -8.635 -8.525 -8.36 -8.14 -7.92 -7.7 -7.425 -7.15 -7.04

Temp 39.3 38.9 38.7 38.3 37.9 37.6 37.3 36.9 36.6 36.3 36.1 35.8

Exces
s 12.3 11.9 11.7 11.3 10.9 10.6 10.3 9.9 9.6 9.3 9.1 8.8
temp

- - - - - - - - -
slope 6.76 6.54 6.43 6.21 5.99 -5.83 5.66 5.44 -5.28 5.11 5.00 -4.84
5 5 5 5 5 5 5 5 5

36
Room temperature = 37.0 0 c

A graph of temperature against time was plotted

70
TEMPERATURE LINE CULVE

60

f(x) = − 0.549984898822108 x + 56.4019933554817


50

40
TEMPERATURE

T
E
M 30
P
E
R
20
A
T
U
R 10
E

0
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43

TIME
TEMPERATURE Linear (TEMPERATURE ) Linear (TEMPERATURE )

37
A graph of excess temperature against slope was plotted

EXCESS TEMPERATURE
35

30

25
excess temperature

20

15

10

0
15 65 18 55 65 95 05 33 01 05 35 36 92 25 04 45 15 83 45 15 84 -4.4
18. 6.6 15. 4.3 3.3 2.5 1.6 11. 10. 9.4 8.6 -8. -7. 7.4 -7. 6.5 6.2 -5. 5.4 5.1 -4.
- -1 - -1 -1 -1 -1 - - - - - - - - -

slope

EXCESS TEMPERATURE Exponential (EXCESS TEMPERATURE )

conclusions:
38
It was conclude that the data confirms the predictions of Newton's Law of Cooling.
As the temperature difference between the object and the environment decreases, the
cooling rate slows down obeying the newtons law of cooling .

Recommendations

Additional trials with different materials and ambient conditions would help to
understand how material properties and surrounding medium affect the rate of
cooling

References

Besson, U. (2011). The cooling law and the search for a good temperature scale, from Newton to

Dalton. European Journal of Physics, 32(2), 343–354. https://doi.org/10.1088/0143-

0807/32/2/007

Molnar, G. W., Hurley, H. J., & Ford, R. (1969). Application of Newton’s law to body cooling.

Pfl�Gers Archiv European Journal of Physiology, 311(1), 16–24.

39

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