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Chapter 9
Digital Electronics
Syllabus:
9.1 Boolean Algebra
9.1.1 Simplification of Boolean Expressions using Boolean algebra &
9.1.2 Simplification of Boolean Expressions using K map.
9.2 Logic gates – (Symbol, Truth table)
9.2.1 Basic gates – AND, OR, NOT
9.2.2 Universal gates – NAND, NOR., EX- OR, EX NOR
9.3 Adders and subtractors - Truth table & circuit of half adder ,full adder, half subtractor and full
subtractor

Analog and Digital signals

A signal is an electromagnetic or electrical current that is used for carrying data from
one system or network to another. The signal is a function that conveys information about a
phenomenon. In electronics and telecommunications, signal refers to any time-varying
voltage that is an electromagnetic wave which carries information.

Analog Signal
An analog signal is a continuous time-varying signal. Analog signals are classified
into composite and simple signals. A simple type of analog signal is nothing but a sine
wave, and that can‟t be decomposed, whereas a composite type analog signal can be
decomposed into numerous sine waves.
An analog signal can be defined by using amplitude and time period or by using
frequency, and phase. Amplitude is the highest height of the signal, frequency is the rate at
which an analog signal is varying, and phase is the signal position with respect to time. An
analog signal is not resistant toward the noise, therefore; it faces distortion as well as
reduces the transmission quality. The analog signal value range cannot be fixed.
Examples of analog signals are given below:
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Digital Signal
Digital signals have only two states – the ON state and the OFF state. Each of the two
states are designated as logic 1 and logic 0 states. These can also be characterized as true or
false. Examples of digital signals are given below.

Digital Circuits
An analog circuit processes continuously varying signals or analog signals
whereas a digital circuit processes digital signals. Digital circuits consider signals in the
form of discrete values (usually binary, a logic 0 or 1 value) that change at discrete points in
time.
Digital circuits, including digital computers, are formed from binary circuits.
Binary digital circuits are electronic circuits whose output can be only one of the two
different states. Each state is indicated by a particular voltage or current level. Binary
circuits can operate in only one of the two states (on or off) corresponding to logic 1 or 0,
respectively. Digital circuits also can use transistors. In a digital circuit, a transistor is in
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either one of the two modes of operation: on (in saturation), or off (in the cut off state).
Digital signals are less susceptible to noise or degradation in quality than analog
circuits. It is also easier to perform error detection and correction with digital signals.

LOGIC GATES
A logic gate is the basic building block of a digital circuit. It is a circuit with
one or more inputs and a single output. The relationship between the input and the output is
based on a certain logic.
More than 100 years before digital electronics was established, an English
mathematician called George Boole proved that all of the statements in human logic could
be expressed by combinations of three rules which he called AND, OR, and NOT. This logic
system is now known as Boolean logic. A logic gate is an electronic component that is
implemented using a Boolean function.

Logic gates are classified into the following three categories.

 Basic gates
 Universal gates
 Special gates

BASIC LOGIC GATES

There are three basic gates. They are
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 NOT gate
 OR gate
 AND gate

NOT Gate
NOT gate is also known as Inverter. It has one input A and one output Y. The NOT
gate reverses the logical state. The output of NOT gate is the complement of input. This
means that if the input is 0, the output will be one and if the input is 1, the output will be 0.
The logic symbol and truth table of NOT gate are given below.

Truth Table
INPUT OUTPUT

A
0 1
1 0

Lamp switch analogy of NOT gate

OR Gate
An OR gate has two or more inputs and one output.
The output of an OR gate is High when any of the inputs is High or the output of an OR
gate is low only when all the inputs are Low.
The logic symbol and the Truth table of the OR gate are shown below.
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Truth Table
INPUTS OUTPUT
A B Y=A+B
0 0 0
0 1 1
1 0 1
1 1 1

The switch equivalent of OR gate is shown below.

AND Gate
An AND gate has two or more inputs and one output.
The output of an AND gate is High only when all the inputs are High. When any of the
inputs is Low, the output is Low.
The logic symbol, switch analogy and the Truth table of the AND gate are shown
below.
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UNIVERSAL GATES
There are two universal gates. They are
 NOR gate
 NAND gate

NOR Gate
Truth Table

The NOR gate is functionally equivalent to an OR gate followed by a NOT gate.

Hence the output of the NOR gate is the complement of the output of OR gate. The
equivalent representation of NOR gate using OR and NOT is shown below.

The output of a NOR gate is High only when all the inputs are Low.
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NOR gate is known as a universal gate because all the basic logic gates can be implemented
by using NOR gate alone.
NOT gate using NOR gate

OR gate using NOR gate

AND gate using NOR gate

NAND Gate
The NAND gate is functionally equivalent to an AND gate followed by a NOT gate.
Hence the output of a NAND gate is the complement of the output of an AND gate.
The output of a NAND gate is Low only when all the inputs are High.
The equivalent circuit, logic symbol and truth table of NAND gate are given below.

Truth Table
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Like NOR gate NAND gate also is a universal gate. The universal property of NAND gate
is illustrated below.
NOT gate using NAND gate

AND gate using NAND gate

OR gate using NAND gate

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EXCLUSIVE OR GATE (EX-OR GATE)

An EX OR gate is a logic gate which gives a High output only when odd number of
inputs are High.
An EX OR gate can have two or more inputs and a single output. If A and B are the
two inputs to the EX OR gate, its output Y is represented as

The logic symbol and equivalent representation of EX OR gate is given below.

The truth table for a two input EX –OR gate is given below.

EX OR gate using NAND gate

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EX NOR gate using NAND gate

EXCLUSIVE NOR GATE (EX-NOR GATE)

The EX NOR gate is a digital logic gate whose function is the logical complement
of the Exclusive OR (XOR) gate.
The two-input version implements logical equality, behaving according to the truth
table shown below and hence the gate is sometimes called an "equivalence gate". A high
output (1) results if both of the inputs to the gate are the same. If one but not both inputs are
high (1), a low output (0) results.
The logic symbol and truth table of EX NOR gate are given below:
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The equivalent representations of EX NOR gate is given below:

EX NOR gate using NOR gate

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EX OR gate using NOR gate

Implementation of Boolean expressions using Logic gates

1.

2.
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3.

4.

5. Draw the truth table for A (B+D)

.
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6. Draw the Truth table for (A+B) (A+C)

BOOLEAN ALGEBRA

Boolean Algebra is used to analyze and simplify the digital (logic) circuits. It uses
only the binary numbers i.e. 0 and 1. It is also called as Binary Algebra or logical Algebra.
Boolean algebra was invented by George Boole in 1854.
Boolean Algebra is the mathematics we use to analyse digital gates and circuits. We
can use these “Laws of Boolean” to both reduce and simplify a complex Boolean expression
in an attempt to reduce the number of logic gates required. Boolean Algebra is therefore a
system of mathematics based on logic that has its own set of rules or laws which are used to
define and reduce Boolean expressions.
The variables used in Boolean Algebra can have one of two possible values, a logic
“0” and a logic “1” but an expression can have an infinite number of variables all labelled
individually to represent inputs to the expression, For example, variables A, B, C etc, giving
us a logical expression of A + B = C, but each variable can ONLY be a 0 or a 1.

Rules in Boolean Algebra

Following are the important rules used in Boolean algebra.
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 Variable used can have only two values. Binary 1 for HIGH and Binary 0 for LOW.
 Complement of a variable is represented by an overbar (-). Thus, complement of
variable B is represented as . Thus if B = 0 then = 1 and if B = 1 then = 0.
Note: Another method used to represent complement of variable A is as A′.
 ORing of the variables is represented by a plus (+) sign between them. For example
ORing of A, B, C is represented as A + B + C.
 Logical ANDing of two or more variable is represented by putting a dot between
them such as A.B.C. Sometime the dot may be omitted like ABC.

Laws in Boolean Algebra

The important laws in Boolean algebra are given below:

Commutative Law
Any binary operation which satisfies the following expression is referred to as a
commutative operation. Commutative law states that changing the sequence of the variables
does not have any effect on the output of a logic circuit.
 A. B = B. A
 A+ B= B +A

Associative Law
It states that the order in which the logic operations are performed is irrelevant as their
effect is the same.
 ( A. B ). C = A . ( B . C )
 ( A + B ) + C = A + ( B + C)

Distributive Law
Distributive law states the following conditions:
 A. ( B + C) = (A. B) + (A. C)
 A + (B. C) = (A + B) . ( A + C)

AND Law
These laws use the AND operation. Therefore they are called AND laws.
 A .0 = 0
 A. 1 =A
 A. A = A
 A.A¯=0

OR Law
These laws use the OR operation. Therefore they are called OR laws.
 A +0=A
 A+ 1 = 1
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 A+A=A
 A+A¯=1

Inversion Law
This law uses the NOT operation. The inversion law states that double inversion of variable
results in the original variable itself.

Absorption law

This law enables a reduction in a complicated expression to a simpler one by absorbing like
terms.

1. OR Absorption Law

A+AB = A

2. AND Absorption Law

A(A+B) = A

Proof:
1. A + AB = A (1 +B) = A
2. A (A +B) = AA + AB = A +AB = A(1+B) = A

Idempotent law
An input that is AND´ed or OR´ed with itself is equal to that input
That is A+A=A and
A.A=A

De Morgan’s theorems

First theorem
According to De Morgan‟s first theorem, the complement of a product is equal to the
sum of complements of the variables. In other words, a NAND gate is equivalent to a
bubbled OR gate.
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Verification using truth table:

A B + AB
0 0 1 1 1 0 1
0 1 1 0 1 0 1
1 0 0 1 1 0 1
1 1 0 0 0 1 0

Second theorem:
According to De Morgan‟s second theorem, the complement of a sum is equal to the
product of complements of the terms in it. In other words, a NOR gate is equivalent to a
bubbled AND gate.
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Verification using truth table:

A B A+ B
0 0 1 1 1 0 1
0 1 1 0 0 1 0
1 0 0 1 0 1 0
1 1 0 0 0 1 0

DeMorgan‟s theorems can be extended for expressions containing any number of variables.

For a 3-variable input

and also

For a 4-variable input

and also

and so on.

Examples
Example 1:
Construct a Truth Table for the logical functions at points C, D and Q in the following
circuit and identify a single logic gate that can be used to replace the whole circuit.
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The circuit consists of a 2-input NAND gate, a 2-input EX-OR gate and finally a 2-
input EX-NOR gate at the output. As there are only 2 inputs to the circuit labeled A and B,
there can only be 4 possible combinations of the input ( 22 ) and these are: 0-0, 0-1, 1-0 and
finally 1-1. Plotting the logical functions from each gate in tabular form will give us the
following truth table for the whole of the logic circuit below.

Inputs Outputs
A B C D Q
0 0 1 0 0
0 1 1 1 1
1 0 1 1 1
1 1 0 0 1

From the truth table above, column C represents the output function generated by
the NAND gate, while column D represents the output function from the Ex-OR gate. Both
of these two output expressions then become the input condition for the Ex-NOR gate at the
output.
It can be seen from the truth table that an output at Q is present when any of the two
inputs A or B are at logic 1. The only truth table that satisfies this condition is that of
an OR Gate. Therefore, the whole of the above circuit can be replaced by just one single 2-
input OR Gate.
Example 2:

Find the Boolean algebra expression for the following system.

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The system consists of an AND Gate, a NOR Gate and finally an OR Gate. The
expression for the AND gate is A.B, and the expression for the NOR gate is A+B. Both
these expressions are also separate inputs to the OR gate which is defined as A+B. Thus the
final output expression is given as:

Inputs Intermediates Output

A B AB Q

0 0 0 1 1
1 0 0 0 0
0 1 0 0 0
1 1 1 0 1
Then, the whole circuit above can be replaced by just one single Exclusive-NOR Gate and
indeed an Exclusive-NOR Gate is made up of these individual gate functions.
Example 3:
Find the Boolean expression for the following system.

As with the previous Boolean examples, we can simplify the circuit by writing down the
Boolean notation for each logic gate function in turn in order to give us a final expression
for the output at Q.
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Inputs Intermediates Output

A B C A.B.C B′ C′ B′ + C′ A(B′+C′) (ABC) + A(B′+C′)
0 0 0 0 1 1 1 0 0
0 0 1 0 1 0 1 0 0
0 1 0 0 0 1 1 0 0
0 1 1 0 0 0 0 0 0
1 0 0 0 1 1 1 1 1
1 0 1 0 1 0 1 1 1
1 1 0 0 0 1 1 1 1
1 1 1 1 0 0 0 0 1
From the above truth table, we can see that the entire logic circuit above can be
replaced by just one single input labelled “A” thereby reducing a circuit of six individual
logic gates to just one single piece of wire, This type of circuit analysis will lead to
identification of any unnecessary logic gates within a digital logic design thereby reducing
the number of gates required, the power consumption of the circuit and of course the cost.

Simplification of Logic expressions using Boolean Algebra

1. Simplify
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2. Prove that A + ĀB = A + B

A + ĀB = (A + Ā) (A + B) → using distributive law

= 1 * (A + B) → since A + Ā = 1

=A + B

3. Prove that A . (Ā+B) = AB

A . (Ā + B) = A. Ā + AB = 0 + AB = AB

4. Simplify the expression Y = AB + BC (B+C) using Boolean algebra.

5. Simplify the expression A + B (A + C) + AC using Boolean algebra.

A + B (A +C) + AC = A + AB + BC + AC ……. Distribution law

= A + BC + AC ……. Absorption law
= A + BC …….. Absorption law

6. Simplify the expression AB + A (B+C) + B (B+C) using Boolean identities

AB + A (B+C) + B (B+C) = AB + AB + AC + BB + BC {Distributive law}

= AB + AB + AC + B + BC {Idempotent law; BB = B}
= AB + AC + B + BC {Idempotent law; AB+AB = AB}
= AB + AC +B {Absorption law; B+BC = B}
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= B + AC {Absorption law; AB+B = B}

Hence, the simplified Boolean function is B + AC.

7. Prove that A + A B = A + B

8.

.
9. Simplify Y=AB+ BC + B C

10. Simplify the Boolean expression Y = A + A B + A B

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STANDARD FORMS OF BOOLEAN ALGEBRA

A Boolean expression can be used to indicate a logic network with a number of AND,
OR and NOT gates connected in a particular manner. The form of Boolean expression
determines how they are connected together. So if we simplify the Boolean expression, its
implementation becomes simple. There are certain forms of Boolean expression that are
more commonly used. The most important of these are the sum of products (SOP) and the
products of sum (POS) forms.

SUM OF PRODUCTS FORM (SOP)

A product of two or more variables or their complements is simply the AND function
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of those variables. The products of two variables can be expressed as AB, products of three
variables as ABC and so on. Similarly the sum in Boolean algebra is same as the OR
function. Therefore the SOP expression is two or more AND functions ORed together.

Eg: ABC + AC
ABC + ABC

A standard or expanded or canonical Sum Of Products form is one in which Each

product term in the SOP function contains all the variables of the function either in
complemented or uncomplemented form.

Each product term in the standard Sum Of Products expression is known as a min
term. The min term and their notations for a three variable Boolean expression is given in
the following table.

PRODUCTS OF SUM FORM (POS)

The Products Of Sum form can be thought of as the dual of sum-of-products. It is in

terms of logic functions, the AND of two or more OR functions.

Eg: (A+C) (B+D)

This form also lead to straight forward implementation using logic gates because it
involves simply ANDing of two or more OR functions resulting in a two level gate
network.
Each term in a standard Products Of Sum representation is called a max term.
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KARNAUGH MAP (K-MAP)

Karnaugh Map is a graphical method used to simplify Boolean expressions and it is
the simplest and most commonly used method. It is composed of an arrangement of
adjacent cells each representing one particular combination of 'n' variables and their
complements in product form. Since the total number of combinations of 'n' variables and
their complements is 2n , the K-map consists of 2n cells.
Karnaugh map can produce Sum of product (SOP) or product of Sum (POS)
expression considering which of the two (0,1) outputs are being grouped in it. The grouping
of 0‟s result in Product of Sum expression & the grouping of 1‟s result in Sum of Product
expression. The expression produced by K-map may be the most simplified expression but
not unique. There can be more than 1 simplified expression for a single function but they all
perform the same.
Figures below show the K-maps for 2, 3 and 4 variables.

K-map for 2 variables

 Two variable K Map is drawn for a Boolean expression consisting of two variables.

 The number of cells present in two variable K Map = 22 = 4 cells.

 So, for a Boolean function consisting of two variables, we draw a 2 x 2 K Map.

Two variable K Map may be represented as-

K-map for 3 variables

 Three variable K Map is drawn for a Boolean expression consisting of three

variables.
 The number of cells present in three variable K Map = 2 3 = 8 cells.
 So, for a Boolean function consisting of three variables, we draw a 2 x 4 K Map.

Three variable K Map may be represented as-

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K-map for 4 variables

 Four variable K Map is drawn for a boolean expression consisting of four variables.
 The number of cells present in four variable K Map = 2 4 = 16 cells.
 So, for a boolean function consisting of four variables, we draw a 4 x 4 K Map.

Four variable K Map may be represented as-

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SIMPLIFICATION OF BOOLEAN EXPRESSION USNIG K-MAP

The following are the steps to obtain simplified min term solution using K-map.
Step 1: Initiate
Express the given expression in its canonical form

Step 2: Populate the K-map

Once a Boolean expression is in the standard sum-of -products form, we can plot it in
the Karnaugh map by placing a 1 each cell corresponding to a term in the SOP expression.
Enter a zero in the remaining cells in the K-map.

Step 3: Form Groups

We can group 1's that are in the adjacent cells according to the following rules by drawing a
loop around those cells.
Groups should be as large as possible containing 1,2,4,8 or 16 cells. The terms of the
expression depend on these groups.

 If the group contains one square, then it will give a term of 4 literals.
 If the group contains two squares, then it will give a term of 3 literals.
 If the group contains four squares, then it will give a term of 2 literals.
 If the group contains eight square, then it will give a term of 1 literal.
 If the group contains sixteen square which will cover the entire whole 4-variable k-
map, the output will be 1.

While forming groups, the following rules should be adhered to:

 Adjacent cells are the cells that differ by only one variable. For example, ABCD and
ABCD are adjacent.
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 The 1's in adjacent cells must be combined in groups of 16, 8, 4, 2 or 1. Each group
should be as large as possible.

 Largest number of adjacent cells must be included in each group.

 Every 1 in the map should be included in at least one group. There can be
overlapping of groups if they include non-common 1's.

 Group should not include any cell containing zero.

 Groups may be horizontal or vertical, but not diagonal.

 Group may wrap around the table.

These rules are illustrated in detail below:

 Consider the consecutive „ones‟ in the K-map cells and group them (green boxes).

 Each group should contain the largest number of „ones‟ and no cell containing zero.
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 Each cell containing a one must be in at least one group.

 The number of „ones‟ in a group must be a power of 2 i.e. a group can contain

 Grouping has to be carried-on in decreasing order meaning, one has to try to

group for 8 (octet) first, then for 4 (quad), followed by 2 and lastly for 1 (isolated
„ones‟).

 Grouping is to done either horizontally or vertically or in terms of squares or

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rectangles. Diagonal grouping of „ones‟ is not permitted.

 The same element(s) may repeat in multiple groups only if this increases the
size of the group.

 The elements around the edges of the table are considered to be adjacent and
can be grouped together.
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 There should be as few groups as possible, as long as this does not contradict any of
the previous rules.

 Don‟t care conditions are to be considered only if they aid in increasing the
group-size (else neglected).
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Some examples of grouping in 4-variable K map are illustrated below.

As you can see in the example above the 4 corner cells make a group. In the second
example, leftmost columns can be grouped with rightmost column and uppermost row with
the lowermost row.

Solved Problems on K map

Example1: ( 2 Variable K-Map)

Function F (A, B) = ∑ (m0, m1, m2) = A̅B̅ +A̅B +AB̅

Grouping in 2 variables K-map Table

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We can form 2 groups of 1‟s. each group containing 2 min terms.

In the first group (red), variable A is changing & B remains unchanged. So the first term of
the output expression will be B̅ (because B = 0 in this group).
In the 2nd group, Variable B is changing and variable A remains unchanged. So the second
term will be of the output expression will be A̅ (because A=0 in this group).
Now the simplifies expression will be the sum of these two terms as given below,
F = A̅ + B̅
Compare this expression with the original expression of the function, this expression only
uses one gate during its implementation.

Example 2: ( 3 Variable K-Map)

Simplify the following Boolean expression using K-map
F (A,B,C) = ∑ ( m0, m1, m2, m4, m5, m6 )

In the red group, only C remains unchanged and in the blue group, only B remains
unchanged. So the simplified expression is
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Example 3: ( 3 Variable K-Map)

Simplify the expression F( A, B, C) = ∑ ( m0, m3, m4, m7 )
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Example 4: ( 4 Variable K-Map)

F(A,B,C,D) = ∑( m0, m1, m2, m4, m5, m6, m8, m9, m10, m12, m13)

The simplified Boolean expression is F = C̅ + B̅D̅ + A̅D̅

Example 5:
Minimize the following Boolean function-
F(A, B, C, D) = Σm (0, 1, 2, 5, 7, 8, 9, 10, 13, 15)
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Example 6:
Minimize the following Boolean function-
F(A, B, C, D) = Σm (0, 1, 3, 5, 7, 8, 9, 11, 13, 15)

Thus, minimized Boolean expression is-

Example 7:
Minimize the following Boolean function-
F(A, B, C, D) = Σm (1, 3, 4, 6, 8, 9, 11, 13, 15) + Σd (0, 2, 14)
Solution-
 Since the given Boolean expression has 4 variables, so we draw a 4 x 4 K Map.

 We fill the cells of K Map in accordance with the given Boolean function.

Then, we have-
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The minimized Boolean expression is:

Example 8:
Minimize the following Boolean function-
F(A, B, C) = Σm(0, 1, 6, 7) + Σd(3, 5)

Thus, minimized Boolean expression is:

Note: It may be noted that there is no need of considering the quad group. This is because
even if we consider that group, we will have to consider the other two duets. So, there is no
use of considering that quad group.
Example 9:
Minimize the following Boolean function:
F(A, B, C) = Σm(1, 2, 5, 7) + Σd(0, 4, 6)
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Thus, minimized Boolean expression is:

Example 10:
Minimize the following Boolean function:
F(A, B, C) = Σm(0, 1, 6, 7) + Σd(3, 4, 5)

Thus, minimized Boolean expression is:

Example 11:
Minimize the following Boolean function-
F(A, B, C, D) = Σm(0, 2, 8, 10, 14) + Σd(5, 15)
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The minimized Boolean expression is:

Example 12:
Minimize the following Boolean function-
F(A, B, C, D) = Σm(3, 4, 5, 7, 9, 13, 14, 15)

Thus, minimized Boolean expression is-

It is important to note that we are not

considering the quad group because we
have to consider the duets anyhow.

Example 13:
Consider the following Boolean function:
F(W, X, Y, Z) = Σm(1, 3, 4, 6, 9, 11, 12, 14)
This function is independent ________ number of variables. Fill in the blank.
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The simplified Boolean function is:

Thus it can be seen that the given Boolean expression depends on only two variables X and
Z. It is independent of the other two variables W and Y.
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COMBINATIONAL LOGIC CIRCUITS

Combinational Logic Circuits are memoryless digital logic circuits whose output at
any instant in time depends only on the combination of its inputs

Unlike Sequential Logic Circuits whose outputs are dependant on both their present
inputs and their previous output state giving them some form of Memory. The outputs of
Combinational Logic Circuits are only determined by the logical function of their current
input state, logic “0” or logic “1”, at any given instant in time.
Combinational Logic Circuits are made up from basic logic AND, OR or NOT
gates that are “combined” or connected together to produce more complicated switching
circuits. These logic gates are the building blocks of combinational logic circuits.
Combinational logic circuits can be very simple or very complicated and any
combinational circuit can be implemented with only NAND and NOR gates as these are
classed as “universal” gates.
In short the characteristics of combinational circuits are following:
 The output of combinational circuit at any instant of time, depends only on the levels
present at input terminals.
 The combinational circuit do not use any memory. The previous state of input does
not have any effect on the present state of the circuit.
 A combinational circuit can have an n number of inputs and m number of outputs.

The three main ways of specifying the function of a combinational logic circuit are:
1. Boolean Algebra – This forms the algebraic expression showing the operation of the
logic circuit for each input variable either True or False that results in a logic “1” output.
2. Truth Table – A truth table defines the function of a logic circuit by providing a
concise list that shows all the output states in tabular form for each possible
combination of input variables that the circuit could encounter.
3. Logic Diagram – This is a graphical representation of a logic circuit that shows the
wiring and connections of each individual logic gate, represented by a specific graphical
symbol, that implements the logic circuit.
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All three of these logic circuit representations are shown below.

Examples of combinational logic circuits are the adder and subtractor circuits.

ADDER CIRCUITS
An adder is a digital circuit that performs addition of numbers. In many computers
and other kinds of processors adders are used in the arithmetic logic units or ALU. Adders
are basically classified into two types: Half Adder and Full Adder.
 Half Adder
o adds 2 bits
o holds a carry bit
o but, it can‟t add the carry bit from the previous column
 Full Adder
o adds 2 bits plus the carry bit for a total of 3 bits
o capable of adding the previous column
Binary Addition
Binary Addition follows these same basic rules as for the denary addition above
except in binary there are only two digits with the largest digit being “1”. So when adding
binary numbers, a carry out is generated when the “SUM” equals or is greater than two
(1+1) and this becomes a “CARRY” bit for any subsequent addition being passed over to
the next column for addition and so on. Consider the single bit addition below.
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When the two single bits, A and B are added together, the addition of “0 + 0”, “0 + 1”
and “1 + 0” results in either a “0” or a “1” until you get to the final column of “1 + 1” then
the sum is equal to “2”. But the number two does not exists in binary however, 2 in binary is
equal to 10, in other words a zero for the sum plus an extra carry bit.
Then the operation of a simple adder requires two data inputs producing two outputs,
the Sum (S) of the equation and a Carry (C) bit. This is done by the Half Adder circuit.
HALF ADDER

Truth table of Half Adder

From the truth table, the Boolean expressions for outputs can be written as below:

Carry = A B
From the above equations for sum and carry, the logic circuit of Half adder is drawn below.

Limitations of the Half Adder

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The Half Adder stores the carry generated into the Carry Out for the next column to
process. But look at the inputs to.It cannot accept a carry bit into it, rather, only the two
inputs. This is the limitation of the half adder. It can only add two inputs and not the carry
bit
FULL ADDER
The full adder circuit takes into account of the carry factor from the previous bit
position. Thus it adds three input bits and gives sum and carry as the output. It is used for
addition of bits other than that in the LSB position.
Here significant bits of the inputs are represented as A and B, and C in is the carry
from the previous stage. S is the sum and Cout is the carry out.

The truth table and circuit arrangement of full adder are given below.

Truth table of Full Adder

INPUTS OUTPUTS
A B Cin SUM Cout
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1

From the truth table of full adder, the logic equations of the output are derived below.
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Circuit arrangement of Full Adder

SUBTRACTOR CIRCUITS
Binary subtraction

As
 Half Subtractor
The Half Subtractor is a combinational logic circuit which is used to perform
subtraction of two bits. It has two inputs, the minuend and subtrahend and two outputs the
difference and borrow out . The borrow out signal is set when the subtractor needs to
borrow from the next digit in a multi-digit subtraction.
 Full Subtractor
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The main difference between the Full Subtractor and the Half Subtractor circuit is
that a Full Subtractor has three inputs. The two inputs are the minuend and the subtrahend
which are same as those with the Half Subtractor circuit. The third input bit is the Borrow-
in (B-in) input to receive the borrow generated by the subtraction process from a previous
stage.
HALF SUBTRACTOR
The half subtractor is a combinational logic circuit which is used to perform
subtraction of two bits. It has two inputs, the minuend and the subtrahend and two outputs –
the difference and borrow out. The borrow out signal is set when the subtractor needs to
borrow from the next digit in a multidigit subtraction.

Truth table of Half Subtractor

INPUTS OUTPUTS
A B DIFFERENCE BORROW
0 0 0 0
0 1 1 1
1 0 1 0
1 1 0 0

From the truth table of Half Subtractor, the logic expressions for the outputs can be written
as below.

Logic Circuit of Half Subtractor

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FULL SUBTRACTOR
A full subtractor is a combinational circuit that performs subtraction of two bits, one
is minuend and the the other is subtrahend, taking into account borrow of the previous
adjacent lower minuend bit. The circuit has three inputs and two outputs. The three inputs
are A, B and Bin, which are the minuend, subtrahend and the borrow respectively. The two
outputs are the difference and Borrow.

The truth table and the circuit arrangement of a full subtractor are given below.

Truth table of Full Subtractor

INPUTS OUTPUTS
A B C DIFFERENCE BORROW
0 0 0 0 0
0 0 1 1 1
0 1 0 1 1
0 1 1 0 1
1 0 0 1 0
1 0 1 0 0
1 1 0 0 0
1 1 1 1 1

From the truth table of Full Subtractor, the logic expressions for the outputs Difference and
Borrow can be derived as below:
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Logic Diagram of Full Subtractor

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