ADS1232

     
ADS1234
SBAS350 – JUNE 2005

Ultra Low-Noise, 24-Bit Analog-to-Digital Converter

FEATURES DESCRIPTION
• Up to 23.5 Effective Bits The ADS1232 and ADS1234 are precision
• RMS Noise: analog-to-digital (A/D) converters featuring true 23.5
– 17nV at 10Hz effective-bit performance and exceptional ease of
use. Selectable gains of 1, 2, 64, or 128 allow
– 44nV at 80Hz full-scale differential input ranges of ±2.5V to
• On-Board Low Noise Gain-Amp ±19.5mV with a +5V reference. While the ADS1232
• 19.2-Bit Noise-Free Resolution at Gain = 64 offers a two-channel differential input and a built-in
temperature sensor, the ADS1234 features a
• Simultaneous 50Hz and 60Hz Rejection: four-channel differential input multiplexer. A very
– Internal Clock: 110 dB low-noise Gain-Amp features low differential input
– External Clock: 130 dB current to minimize errors when using
high-impedance transducers. An on-board oscillator
• ±1% Low-Drift On-Board Oscillator is provided for excellent 50Hz and 60Hz rejection
• Selectable Gains of 1, 2, 64, and 128 without an external clock source. The devices also
• Selectable 10/80SPS Conversion Rates feature a low current driver to accommodate an
external crystal; they also accept external clock
•

PRODUCT PREVIEW
2-Channel Differential Input with Built-In Temp
sources for all applications.
sensor (ADS1232)
• 4-Channel Differential Input (ADS1234) All of the features of the ADS1232/ADS1234 are
hard-wire selected, without software programming.
• External Reference up to AVDD Data is accessed over a simple serial interface
• Simple Serial Digital Interface compatible with popular microcontrollers such as the
• Supply Range: 2.7V to 5.3V MSP430. The ADS1232 is available in the 24-pin
TSSOP package, and the ADS1234 is available in
• –40°C to +105°C Temperature Range the 28-pin TSSOP.
APPLICATIONS
• Weigh Scales
• Strain Gauges
• Bridge Sensors
• Industrial Process Control
AVDD CAP REFP REFN DVDD

GAIN [1:0]
AINP1
AINN1 A = 1, 2, 64,
128 PDWN
AINP2
AINN2 Input DRDY/DOUT
Mux
PGA ∆Σ ADC
AINP3 SCLK
AINN3

AINP4 Internal Oscillator SPEED

AINN4
External Oscillator

A1/TEMP(1) A0 AGND CAP XTAL1/CLKIN XTAL2 DGND

ADS1234 Only

NOTE: (1) A1 for ADS1234, TEMP for ADS1232.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCT PREVIEW information concerns products in the forma- Copyright © 2005, Texas Instruments Incorporated
tive or design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the
right to change or discontinue these products without notice.
 ADS1232
ADS1234
www.ti.com
SBAS350 – JUNE 2005

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated
circuits be handled with appropriate precautions. Failure to observe proper handling and installation
procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision
integrated circuits may be more susceptible to damage because very small parametric changes could
cause the device not to meet its published specifications.

ORDERING INFORMATION (1)

SPECIFIED
PACKAGE PACKAGE ORDERING TRANSPORT MEDIA,
PRODUCT PACKAGE-LEAD TEMPERATURE
DESIGNATOR MARKING NUMBER QUANTITY
RANGE
ADS1232IPWT Tape and Reel, 250
ADS1232 TSSOP-24 PW –40°C to 105°C ADS1232
ADS1232IPWR Tape and Reel, 2500
ADS1234IPWT Tape and Reel, 250
ADS1234 TSSOP-28 PW –40°C to 105°C ADS1234
ADS1234IPWR Tape and Reel, 2500

(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
PRODUCT PREVIEW

ABSOLUTE MAXIMUM RATINGS

(1)
over operating free-air temperature range (unless otherwise noted)
ADS1232, ADS1234 UNIT
AVDD to AGND –0.3 to +6 V
DVDD to DGND –0.3 to +6 V
AGND to DGND –0.3 to +0.3 V
Input Current 100, Momentary mA
Input Current 10, Continuous mA
Analog Input Voltage to AGND –0.3 to AVDD + 0.3 V
Digital Input Voltage to DGND –0.3 to DVDD + 0.3 V
Maximum Junction Temperature +150 °C
Operating Temperature Range –40 to +105 °C
Storage Temperature Range –60 to +150 °C
Lead Temperature (soldering, 10s) +300 °C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

2
 ADS1232
ADS1234
www.ti.com
SBAS350 – JUNE 2005

ELECTRICAL CHARACTERISTICS: VREF = +5V

All specifications TA = –40°C to +105°C, AVDD = DVDD = VREFP = +5V, VREFN = AGND, Internal Oscillator, SPEED =
Low, Gain = 64 (unless otherwise specified).
ADS1232, ADS1234
PARAMETER CONDITIONS MIN TYP MAX UNIT
Analog Inputs
Full-Scale Input Voltage
±0.5VREF/Gain V
(AINP - AINN)
AINxP or AINxN
AGND – 0.1 AVDD + 0.1 V
Common-mode Input Range with respect to GND, Gain = 1
Gain = 64, 128 (0.5)AVDD – 1 (0.5)AVDD + 1 V
Gain = 1, 2 500 nA
Differential Input Current
Gain = 64, 128 50 nA
System Performance
Resolution No missing codes 24 Bits
Internal Oscillator, SPEED = High TBD 80 TBD SPS
Internal Oscillator, SPEED = Low TBD 10 TBD SPS
Conversion Rate
External Oscillator, SPEED = High fCLK / 61440 SPS
External Oscillator, SPEED = Low fCLK / 491520 SPS

PRODUCT PREVIEW
Digital Filter Settling Time Full Settling 4 Conversions
Differential input, End point fit
±0.0002 ±0.0015 % of FSR (1)
Gain = 1, 2
Integral Non-Linearity (INL)
Differential input, End point fit
±0.0010 TBD % of FSR
Gain = 64, 128
Gain = 1 ±0.2 TBD ppm of FS
Input Offset Error (2)
Gain = 64 ±2 TBD ppm of FS
Gain = 1 1 µV/°C
Input Offset Error Drift
Gain = 64 15 nV/°C
Gain = 1 0.001 TBD %
Gain Error (3)
Gain = 64 0.001 TBD %
Gain = 1 0.5 ppm/°C
Gain Error Drift
Gain = 64 ±4 ppm/°C
Internal oscillator, 50Hz and 60Hz 100 110 dB
Normal-mode Rejection (4) External oscillator,
120 130 dB
50Hz and 60Hz, ±1Hz
at DC, Gain = 1, ∆VDD = 1V TBD 100 dB
Common-mode Rejection
at DC, Gain = 64, ∆VDD = 0.1V TBD 75 dB
Input-Referred Noise See Noise Performance Tables
at DC, Gain = 1, ∆VDD = 1V TBD 100 dB
Power-Supply Rejection
at DC, Gain = 64, ∆VDD = 0.1V TBD 85 dB
Voltage Reference Input
Voltage Reference Input
VREF = VREFP - VREFN 1 AVDD AVDD + 0.1V V
(VREF)
Negative Reference Input
AGND – 0.1 VREFP – 1.0 V
(VREFN)
Positive Reference Input
VREFN + 1.0 AVDD + 0.1 V
(VREFP)
Voltage Reference
50 nA
Input Current

(1) FSR = full scale range = VREF/Gain

(2) Offset calibration can minimize these errors to the level of noise at any temperature.
(3) Gain errors are calibrated at the factory (AVDD = +5V, all gains, TA = +25°C).
(4) Specification is assured by the combination of design and final production test.

3
 ADS1232
ADS1234
www.ti.com
SBAS350 – JUNE 2005

ELECTRICAL CHARACTERISTICS: VREF = +5V (continued)

All specifications TA = –40°C to +105°C, AVDD = DVDD = VREFP = +5V, VREFN = AGND, Internal Oscillator, SPEED =
Low, Gain = 64 (unless otherwise specified).
ADS1232, ADS1234
PARAMETER CONDITIONS MIN TYP MAX UNIT
Digital
Logic Levels
VIH 0.6 DVDD DVDD + 0.1 V
VIL DGND 0.3 DVDD V
VOH IOH = 1mA DVDD – 0.4 V
VOL IOL = 1mA 0.2 DVDD V
Input Leakage 0 < VIN < DVDD ±10 µA
Power Supply
Power Supply Voltage
2.7 5.3 V
(AVDD, DVDD)
Normal mode, AVDD = 3V, Gain = 1, 2 600 TBD µA
Normal mode, AVDD = 3V,
1500 TBD µA
Gain = 64, 128
PRODUCT PREVIEW

Normal mode, AVDD = 5V, Gain = 1, 2 700 TBD µA

Analog Supply Current
Normal mode, AVDD = 5V,
1600 TBD µA
Gain = 64, 128
Standby mode 0.1 TBD µA
Power-down 0.1 TBD µA
Normal mode, DVDD = 3V, Gain = 1, 2 90 TBD µA
Normal mode, DVDD = 3V,
90 TBD µA
Gain = 64, 128
Normal mode, DVDD = 5V, Gain = 1, 2 110 TBD µA
Digital Supply Current
Normal mode, DVDD = 5V,
110 TBD µA
Gain = 64, 128
Standby mode, SCLK = High 50 TBD µA
Power-down 0.1 TBD µA
Normal mode, AVDD = DVDD = 3V,
2.1 TBD mW
Gain = 1, 2
Normal mode, AVDD = DVDD = 5V,
4 TBD mW
Gain = 1, 2
Normal mode, AVDD = DVDD = 3V,
Power Dissipation, Total 4.8 TBD mW
Gain = 64, 128
Normal mode, AVDD = DVDD = 5V,
8.6 TBD mW
Gain = 64, 128
Standby TBD TBD mW
Power-down TBD TBD mW

4
 ADS1232
ADS1234
www.ti.com
SBAS350 – JUNE 2005

DEVICE INFORMATION

DVDD 1 28 DRDY/DOUT

DVDD 1 24 DRDY/DOUT DGND 2 27 SCLK

DGND 2 23 SCLK XTAL1/CLKIN 3 26 PDWN

XTAL1/CLKIN 3 22 PDWN XTAL2 4 25 SPEED

XTAL2 4 21 SPEED DGND 5 24 GAIN1

DGND 5 20 GAIN1 DGND 6 23 GAIN0

DGND 6 19 GAIN0 A1 7 22 AVDD

ADS1232 ADS1234
TEMP 7 18 AVDD A0 8 21 AGND

A0 8 17 AGND CAP 9 20 REFP

CAP 9 16 REFP CAP 10 19 REFN

CAP 10 15 REFN AINP1 11 18 AINP2

PRODUCT PREVIEW
AINP1 11 14 AINP2 AINN1 12 17 AINN2

AINN1 12 13 AINN2 AINP3 13 16 AINP4

AINN3 14 15 AINN4

5
 ADS1232
ADS1234
www.ti.com
SBAS350 – JUNE 2005

DEVICE INFORMATION (continued)

PIN DESCRIPTIONS
TERMINAL
ANALOG/DIGITAL
NAME ADS1232 ADS1234 INPUT/OUTPUT DESCRIPTION
DVDD 1 1 Digital Digital Power Supply: 2.7V to 5.3V
DGND 2 2 Digital Digital Ground
XTAL1/ External Clock Input: Typically 4.9152MHz. Ties low to activate Internal Oscillator. Can also use
3 3 Digital/Digital Input
CLKIN external Crystal Oscillator across XTAL1/CLKIN and XTAL2 pins. See text for more details.
XTAL2 4 4 Digital External Clock Output pin. See text for more details.
DGND 5 5 Digital Digital Ground
DGND 6 6 Digital Digital Ground
TEMP 7 – Digital Input Onboard Temperature Diode Enable Input pin
A1 – 7 Digital Input Input Mux Select Input pin (MSB)
A0 8 8 Digital Input Input Mux Select Input pin (LSB):
A1 A0 Channel
0 0 AIN1
0 1 AIN2
1 0 AIN3
1 1 AIN4
PRODUCT PREVIEW

CAP 9 9 Analog Gain Amp Bypass Capacitor Connection

CAP 10 10 Analog Gain Amp Bypass Capacitor Connection
AINP1 11 11 Digital Input Positive Analog Input Channel 1
AINN1 12 12 Digital Input Negative Analog Input Channel 1
AINP3 – 13 Digital Input Positive Analog Input Channel 3
AINN3 – 14 Digital Input Negative Analog Input Channel 3
AINN4 – 15 Digital Input Negative Analog Input Channel 4
AINP4 – 16 Digital Input Positive Analog Input Channel 4
AINN2 13 17 Digital Input Negative Analog Input Channel 2
AINP2 14 18 Digital Input Positive Analog Input Channel 2
REFN 15 19 Digital Input Negative Reference Input pin
REFP 16 20 Digital Input Positive Reference Input pin
AGND 17 21 Analog Analog Ground
AVDD 18 22 Analog Analog Power Supply, 2.7V to 5.3V
GAIN0 19 23 Digital Input Gain Select Input pin (LSB)
GAIN1 20 24 Digital Input Gain Select Input pin (MSB):
GAIN1 GAIN0 PGA
0 0 1
0 1 2
1 0 64
1 1 128
SPEED 21 25 Digital Input Output Data Rate Select Input pin:
SPEED DATA RATE
0 10Hz
1 80Hz
Power Down Input pin: Holding this pin low powers down the entire converter and resets the A/D
PDWN 22 26 Digital Input
converter.
Serial Clock Input pin: Clock out data on the rising edge. Used to initiate Offset Calibration and
SCLK 23 27 Digital Input
Sleep modes. See text for more details.
DRDY/
24 28 Digital Input Dual-Purpose Output:
DOUT
Data Ready: Indicates valid data by going low.
Data Output: Outputs data, MSB first, on the first rising edge of SCLK.

6
 ADS1232
ADS1234
www.ti.com
SBAS350 – JUNE 2005

NOISE PERFORMANCE

The ADS1232/1234 offer outstanding noise performance that can be optimized for a givven full-scale range using
the on-chip programmable gain amplifier, Table 1, Table 2, Table 3, and Table 4 summarize the typical noise
performance with inputs shorted externally for different gains, data rates and voltage reference values.
The RMS and Peak-to-Peak noise are referred to the input. The Effective Number of Bits (ENOB) is defined as:
• ENOB = ln (FSR/RMS noise)/ln(2)
The Noise Free Bits are defined as:
• Noise-Free Bits = ln (FSR/Peak-to-Peak Noise)/ln(2)
Where FSR (Full-Scale Range) = VREF/Gain

Table 1. AVDD = 5V, VREF = 5V, Data Rate = 10SPS

GAIN RMS NOISE PEAK-TO-PEAK NOISE ENOB (rms) NOISE-FREE BITS
1 420nV 1.79µV 23.5 21.4
2 270nV 900nV 23.1 21.4
64 19nV 125nV 22.0 19.2
128 17nV 110nV 21.1 18.4

PRODUCT PREVIEW
Table 2. AVDD = 5V, VREF = 5V, Data Rate = 80SPS
GAIN RMS NOISE PEAK-TO-PEAK NOISE ENOB (rms) NOISE-FREE BITS
1 1.36µV 8.3µV 21.8 19.2
2 850nV 5.5µV 21.5 18.8
64 48nV 307nV 20.6 18
128 44nV 247nV 19.7 17.2

Table 3. AVDD = 3V, VREF = 3V, Data Rate = 10SPS

GAIN RMS NOISE PEAK-TO-PEAK NOISE ENOB (rms) NOISE-FREE BITS
1 450nV 2.8µV 22.6 20
2 325nV 1.8µV 22.1 19.7
64 20nV 130nV 21.2 18.5
128 18nV 115nV 20.3 17.6

Table 4. AVDD = 3V, VREF = 3V, Data Rate = 80SPS

GAIN RMS NOISE PEAK-TO-PEAK NOISE ENOB (rms) NOISE-FREE BITS
1 2.2µV 12µV 20.4 17.9
2 1.2µV 6.8µV 20.2 17.8
64 54nV 340nV 19.7 17.1
128 48nV 254nV 18.9 16.5

7
 PACKAGE OPTION ADDENDUM
www.ti.com 29-Jun-2005

PACKAGING INFORMATION

Orderable Device Status (1) Package Package Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Type Drawing Qty
ADS1232IPW PREVIEW TSSOP PW 24 60 TBD Call TI Call TI
ADS1232IPWR PREVIEW TSSOP PW 24 2000 TBD Call TI Call TI
ADS1234IPW PREVIEW TSSOP PW 28 50 TBD Call TI Call TI
ADS1234IPWR PREVIEW TSSOP PW 28 2000 TBD Call TI Call TI
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)

(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.

Addendum-Page 1
 MECHANICAL DATA

MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999

PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE

14 PINS SHOWN

0,30
0,65 0,10 M
0,19
14 8

0,15 NOM
4,50 6,60
4,30 6,20

Gage Plane

0,25
1 7
0°– 8°
A 0,75
0,50

Seating Plane

1,20 MAX 0,15 0,10

0,05

PINS **
8 14 16 20 24 28
DIM

A MAX 3,10 5,10 5,10 6,60 7,90 9,80

A MIN 2,90 4,90 4,90 6,40 7,70 9,60

4040064/F 01/97

NOTES: A. All linear dimensions are in millimeters.

B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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