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(55-61) Implementation of Edge Detection Algorithm (1)

The paper discusses the implementation of a Sobel edge detection algorithm on a Virtex 5 series FPGA using Xilinx System Generator and MATLAB for hardware-software co-simulation. It highlights the advantages of using FPGA for image processing, achieving a speed improvement of approximately 40% compared to software-only solutions. The results demonstrate effective edge detection for both stored and real-time images.

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0% found this document useful (0 votes)
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(55-61) Implementation of Edge Detection Algorithm (1)

The paper discusses the implementation of a Sobel edge detection algorithm on a Virtex 5 series FPGA using Xilinx System Generator and MATLAB for hardware-software co-simulation. It highlights the advantages of using FPGA for image processing, achieving a speed improvement of approximately 40% compared to software-only solutions. The results demonstrate effective edge detection for both stored and real-time images.

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bdfataniya
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© © All Rights Reserved
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Download as PDF, TXT or read online on Scribd
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Journal of VLSI Design Tools & Technology

ISSN: 2249-474X (online), ISSN: 2321-6492(print)


Volume 6, Issue 1
www.stmjournals.com

Implementation of Edge Detection Algorithm on FPGA


using Hardware Software Co-Simulation
Bhupendra Fataniya, Akash Mecwan*, Dhaval Shah
Department of Electronics and Communication, Institute of Technology, Nirma University,
Ahmedabad, Gujarat, India

Abstract
Image processing is one of the most booming research areas in modern days. Every modern
device incorporates image processing in one or the other way. Most of the image processing
algorithms start with basic edge detection. The performance of the edge detection can be
improved using state of art FPGA devices. Implementation using field programmable gate
arrays (FPGA) speeds up the processing of edge detection algorithms. The paper discusses
the implementation of edge detection algorithm on Virtex 5 series of FPGA. The design is
implemented in Xilinx System Generator using MATLAB and the simulation is performed
using Hardware Software Cosimulation. The output of implementation is observed in
MATLAB environment. The algorithm is tested for file as well as real time images.

Keywords: Edge detection, FPGA, Hardware Software Co – Simulation

*Author for Correspondence E-mail: [email protected]

INTRODUCTION programming hardware for the same is not


All modern devices incorporate various image easily available or very costly. To speed up the
processing units. Human machine interface or computational operation, yet another approach
any vision based security systems require lots is possible that is hardware based processing.
of image processing blocks [1]. All the image Field programmable gate arrays (FPGA) is the
processing tasks start with edge detection [2]. most suitable candidate for the implementation
Being the preliminary stage of image of hardware prototypes [10,11]. FPGAs are
processing blocks, edge detection requires field programmable so one can program them
special attention [3, 4]. There are various as and when required. One can create the
methods available for edge detection of an reconfigurable hardware logic in the FPGA, so
image. Sobel edge detection provides high it is very much flexible to be reprogramed.
quality output compare to other methods of Modern FPGA programming tools are very
edge detection like: Prewitt and Robert powerful and accurate to allow the user to use
methods [5]. The edge detection of an image them effectively. Lots of industry ready IP
in the real time application also demands the cores are also available, which can be used for
speed with the performance. Normally all the various image processing applications directly.
image processing tasks are practically Looking the endless advantages of FPGA, it is
implemented in the processors or controllers. quite efficient to use the FPGA device for edge
Authors discuss the implementation of image detection application. The paper discusses the
processing algorithms on the processors [6–9]. basics of Sobel edge detection and
implementation of the same on the modern
The general purpose processors available in Virtex 5 series of FPGAs.
the market do not have full-fledged capacity to
deal with image related operations as they are Rest of the paper is organized as follows: RGB
general purpose. To tackle the processing to Gray scale image conversion method and
complexity involved in the image processing, basics of Sobel edge detection are discussed
special purpose processors are required. below in two separate sections.
Modern graphical processor can be used for Implementation of the system using Xilinx’s
these kinds of processes, but it is very difficult System Generator is presented in subsequent
to use special purpose processors as the

JoVDTT (2016) 55-61 © STM Journals 2016. All Rights Reserved Page 55
Implementation of Edge Detection Algorithm on FPGA Akash Mecwan et al.

section and at the end, the results are presented are applied to make Y from them. The
in last section. resulting Y is the required Gray scale image,
which is input to the Sobel edge detector.
RGB TO GRAY SCALE IMAGE Figure 1 shows the implementation of RGB to
CONVERSION Gray scale image conversion using Xilinx
To apply the Sobel edge detection to any System Generator blocks.
image it is necessary to convert the image in to
a gray scale image. This section presents a SOBEL EDGE DETECTION
very easy and effective algorithm to convert Sobel is one of most efficient edge detection
any RGB image to gray scale image. The algorithm. It is the method of applying filter
algorithm is based on very famous Grasman’s coefficient to the given image to find out the
Law [12]. As per Grasman’s law the gradient at every point of the image. A 3x3
luminance is the intensity of reflected light matrix from the image is captured and then the
from any object and it presents the brightness filter is applied to it. It calculates the gradient
of the image. The luminance Y can be given at every pixel and compared with a threshold
as: value. Depending upon the threshold, it
Y = 0.59G + 0.3R + 0.11B (1) decides the formation of edge from one point
to the other. As it works on 3x3 matrix, it
where, G, R and B are the corresponding produces results in both X and Y direction
voltages of green, red and blue colour, simultaneously. Once the results on first 3x3
respectively. matrix is obtained the next block of 3x3 matrix
of the same image is processed.
To implement the gray scale image from RGB
image, it is necessary to separate the R, G and −1 −2 −1
B content of the image. All RGB images are 𝐺𝑦 = [ 0 0 0 ] ∗ 𝐴 𝑎𝑛𝑑
3D matrix of these three colours only, which 1 2 1
makes it easy to separate R, G and B colours −1 0 1
𝐺𝑥 = [−2 0 2] ∗ 𝐴 (2)
from an RGB image. Once the colours are
separated, the weighting factors as per Eq. (1) −1 0 1

Fig. 1: RGB to Gray Scale Image Conversion.

JoVDTT (2016) 55-61 © STM Journals 2016. All Rights Reserved Page 56
Journal of VLSI Design Tools & Technology
Volume 6, Issue 1
ISSN: 2249-474X (online), ISSN: 2321-6492(print)

Fig. 2: Decision Making Using Sobel.

Eq. (2) is 3x3 Sobel matrix applied to the the modern tools like System Generator.
image in X and Y direction. Figure 2 shows System Generator is a tool from Xilinx Inc.,
the process of decision making of Sobel which generates Xilinx’s tool boxes in
algorithm. MATLAB Simulink. These blocks are digital
blocks and design made using these blocks can
When it comes to the implementation using directly be implemented on FPGA. Yet
FPGA, Sobel algorithm is one of the strongest another important feature of the tool is the
contenders. It is easy to implement, fast and capabilities of producing Hardware Software
less computational intensive. Figure 3 shows Co-simulation. In this kind of simulations, one
the implementation of Sobel operation using can open the image in MATLAB from a file or
Xilinx System Generator. real-time captured image. This image is given
to FPGA connected to the computer.
IMPLEMENTATION OF EDGE
DETECTION USING XILINX The output of the FPGA is brought back to the
SYSTEM GENERATOR MATLAB and the processed image can be
As discussed above, the image is converted in viewed in the MATLAB environment. This
RGB to Gray scale and then the Sobel matrix method enables one to carry out simulation
is applied to it. Both the designs are using FPGA without connecting any
implemented in Xilinx’s System Generator peripherals to it, other than a computer with
tool. It is an extremely difficult task to deal tools installed like MATLAB and Xilinx’s
with the real time images with FPGA. The System Generator [13–17]. Figure 4 shows the
main problem is to load the image on FPGA complete simulation environment to carry out
and to see the output display from FPGA after the Hardware Software Co-simulation of Sobel
processing. This problem can be solved using edge detection Algorithm.

JoVDTT (2016) 55-61 © STM Journals 2016. All Rights Reserved Page 57
Implementation of Edge Detection Algorithm on FPGA Akash Mecwan et al.

Fig. 3: Sobel Operating Sobel Operation using Xilinx System Generator.

Fig. 4: Hardware Software Co-Simulation Environment.

RESULTS (Figure 5). Figure 6 with threshold of 50 and


To test the edge detection, stored images as Figure 7 with threshold of 150 shows the
well as real time images are applied as input results of file and real time images.

JoVDTT (2016) 55-61 © STM Journals 2016. All Rights Reserved Page 58
Journal of VLSI Design Tools & Technology
Volume 6, Issue 1
ISSN: 2249-474X (online), ISSN: 2321-6492(print)

Fig. 5: Final Implementation of Edge Detection in System Generator.

(a) (b) (c) (d)


Fig. 6: (a) Original File Image (b) Horizontal Masking (c) Vertical Masking (d) Final Image.

The same algorithm is simulated in MATLAB operation. Compared to the software only
without Hardware Software Co-simulation solution; the Hardware solution increases the
feature and the similar results are obtained. speed of operation by almost 40%. Figure 8
The main advantage of hardware shows the output of Software and Hardware
implementation observed is the speed of implementation of the algorithm.

(a) (b) (c) (d)


Fig. 7: (a) Original File Image (b) Horizontal Masking (c) Vertical Masking (d) Final Image.

JoVDTT (2016) 55-61 © STM Journals 2016. All Rights Reserved Page 59
Implementation of Edge Detection Algorithm on FPGA Akash Mecwan et al.

(a) (b)
Fig. 8: (a) Software Implementation (b) Hardware Implementation.

CONCLUSION 5. Shrivakshan GT, Chandrasekar C, A


In this paper Sobel edge detection is Comparison of various Edge Detection
implemented on Xilinx Virtex 5 Series of Techniques used in Image Processing, Int
FPGA. The implementation is done in Xilinx’s J Comput Sci. September 2012; 9(5): 269–
System Generator and the simulation is carried 276p.
out in MATLAB using Hardware Software 6. Prashan Premaratne, Sabooh Ajaz, Ravi
Co-simulation. The obtained results are Monaragala, et al. Design and
satisfactory and improvement in speed of Implementation of Edge Detection
about 40% is achieved using hardware Algorithm in dsPIC Embedded Processor,
implementation compared to its software 5th International Conference on
counterpart. The proposed method is a robust Information and Automation for
approach to detect edges in the image. It can Sustainibility, Colombo, December 2010,
be applied to different types of images, stored 8–13p.
or directly acquired by cameras and can be 7. Amac Guvensan M, Gokhan Yavuz A,
considered a powerful initial step for many Cihan Taysi Z, et al. Image Processing
computer vision applications. Capabilities of ARM-based Micro-
controllers for Visual Sensor Networks,
REFERENCES 9th International Conference on
1. Vijay Kumari Thakur, Priyadarshni, Embedded and Ubiquitous Computing,
Robust Hand Gesture Recognition for Melbourne, VIC, October 2011, 243–
Human Machine Interaction System, J 248p.
Global Res Comput Sci. March 2014; 5(3): 8. Lionel M. Ni, Kwan Y. Wong, Daniel T.
14–19p. Lee, et al. A Microprocessor-Based Office
2. Henrik Schafer, Frank Lenzen, Christoph Image Processing System, IEEE T
S. Garbe, Depth and Intensity Based Edge Comput. C-31(10): October 1982, 1017–
Detection in Time-of-Flight Images, 1022p.
International Conference on 3D Vision, 9. Chao Wang, Shangchang Ma, Bifeng
IEEE, Computer Society, Seattle, WA, Yang, et al. Real Time Image Collection
2013, 111–118p. and Processing Based on OMAP3530,
3. Wei Cui, Guoliang Wu, Rongjin Hua, et International Conference on Information
al. The Research of Edge Detection Engineering and Computer Science,
Algorithm for Fingerprint Images, Wuhan, December 2009.
Automation Congress, WA, Hawaii, HI, 10. Alexander Lee Jackson, A Parallel
2008, 1–5p. Algorithm For Fast Edge Detection on the
4. Abbas M. Al-Ghaili, Syamsiah Mashohor, Graphics Processing Unit, [Thesis], The
Alyani Ismail, et al. A New Vertical Edge Faculty of the Department of Computer
Detection Algorithm and its Application, Science, Washington and Lee University,
International Conference on Computer May 2009.
Engineering and Systems, Cario,
November 2008, 204–209p.

JoVDTT (2016) 55-61 © STM Journals 2016. All Rights Reserved Page 60
Journal of VLSI Design Tools & Technology
Volume 6, Issue 1
ISSN: 2249-474X (online), ISSN: 2321-6492(print)

11. Manel Elloumi, Mohamed Krid, Dorra 15. Benkrid K, Crookes D, Bouridane A, et al.
Sellami Masmoudi, Implementation of A High Level Software Environment for
Neuro-Fuzzy System based image edge FPGA Based Image Processing, Proc.
detection, Proceedings of 2013 IFIP/IEEE IPA'99, IEE Seventh International
21st International Conference on Very Conference on Image Processing and its
Large Scale Integration, Istanbul, October Applications, Manchester, July 1999.
2013, 60–61p. 16. Gulati RR, Modern Television Practice –
12. Bhupendra Fataniya, Pratik Trivedi, Principles, Technology and Services,
Implementation of Sobel Edge Detector Newage Publication. 2nd Edition, 2002.
using FPGA using System Generator, 17. Rafael C. Gonzalez, Richard E. Woods,
International Conference on Advances in Digital Image Processing, 2nd Edition,
Engineering, Technology and Science, Pearson, 2002.
Munnar, April 2014.
13. Chao Hu Z, et al. A novel FPGA-based
wireless vision sensor node, in Cite this Article
Automation and Logistics, 2009. ICAL Bhupendra Fataniya, Akash Mecwan,
'09. IEEE International Conference on, Dhaval Shah. Implementation of Edge
Shenyang 2009, 841–846p. Detection Algorithm on FPGA using
14. Crookes D, Benkrid K, Bouridane A, et al. Hardware Software Co-Simulation.
Design and Implementation of a High Journal of VLSI Design Tools and
Level Programming Environment for Technology. 2016; 6(1): 55–61p.
FPGA Based Image Processing, IEE
proceedings Vision, Image and Signal
Processing, 2000, 147(7): 377–384p.

JoVDTT (2016) 55-61 © STM Journals 2016. All Rights Reserved Page 61

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