Dell - Inspiron 3064 3464 3264 - 15107-1
Dell - Inspiron 3064 3464 3264 - 15107-1
18 CPU(SPI/SMBUS/LPC) 76 GPU(1/5):PEG
19 CPU(HDA) 77 GPU(2/5):DIGITALOUT Intel Kabylake-U Platform
20 CPU(GPIO/UART/SPI/I2C) 78 GPU(3/5):VRAM I/F LAN : Gb LAN RTL8111H
21 CPU(POWER) 79 GPU(4/5):GPIO/STRAP
22 CPU(RSVD) 80 GPU(5/5):PWR/GND AUDIO: ALC3661
23 CPU(VSS) 81 VRAM1,2(1/4) EC:
24 EC_KBC NPCE285 82 VRAM3,4(2/4)
25 Flash ROM/RTC 83 VRAM5,6(3/4)
26 FAN CIRCUITS/HOLE/THER 84 VRAM7,8(4/4)
27 AUDIO_ALC3661 85 Reserved
28 AMP_ALC1302 86 PWR_GPU_LDO
29 MIC/SPEAKER/AUDIO JACK 87 Reserved
30 Reserved 88 PWR_GPU_CORE
31 LAN_RTL8106E 89 Reserved
32 RJ45+Transformer 90 Reserved
33 CardReader CONN 91 Reserved
34 USB2.0 CONN 92 Reserved
35 USB3.0 CONN 93 Reserved
B 36 TPM 94 Reserved B
56 HDMI_IN
57 HDMI_OUT <Core Design>
Title
001_Cover Page
Size Document Number Rev
C Rosa_KBL-U AIO SB
Date: Thursday, June 23, 2016 Sheet 1 of 105
5 4 3 2 1
5 4 3 2 1
CHARGER
BQ24727RGRR P44
Project Name: Jasmine-KBL-U AIO PCB BOARD SIZE INPUTS OUTPUTS
Project Code: 3PD05F010001 185mm X 230mm DC_19V DCBATOUT
6 Layer BT+
PCB Version: SA SYSTEM DC/DC
RT6575DGQW P45
PCB Number :15107 INPUTS OUTPUTS
DCBATOUT V_5P0_A
V_3P3_A
CPU Core Power
GPU DDR4 NCP81206MNTXG P46-50
D
NVidia PCI EXPRESS X4 DDR4 SO-DIMM*2 INPUTS OUTPUTS
D
B B
EC
LPC
NUVOTON
NPCE285 P24 USB 2.0 Touch Panel
P62
Digital MIC
AUDIO CODEC AMP
RealTek TI
ALC3661 TPA3131
p27 P28
A A
HPO L/R LINEOUT L/R SPK L/R
<Core Design>
Side Rear
Title
002_Block Diagram
1-007 Size Document Number Rev
C Rosa_KBL-U AIO SB
Date: Thursday, June 23, 2016 Sheet 2 of 105
5 4 3 2 1
5 4 3 2 1
D D
C C
Blanking
B B
<Core Design>SB-010
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A
Title
003_(Reserved)
Size Document Number Rev
A Rosa_KBL-U AIO SB
Date: Thursday, June 23, 2016 Sheet 3 of 105
5 4 3 2 1
5 4 3 2 1
Rb 1V_VCCST
1V_VCCSTG
1 2 H_PROCHOT_N
1
R81
1KR2J-1-GP R94
1KR2J-1-GP 1V_VCCSTG
SA-051 SB-032
2
XDP_TMS 1 (R_) 2
THERMTRIP#_CPU 2 1 PCH_THERMTRIP_N XDP_TDI 51R2J-2-GP 1 (R_) 2 R103
D D
R96 51R2J-2-GP R111
0R0402-PAD XDP_TDO_CPU 1 (R_) 2
[PECI] and [PROCHOT#] 51R2J-2-GP R100
Impedance control: 50 ohm 4 OF 20 PH in P.99
TPAD28 TP56
1 CATERR#_CPU D63 SKYLAKE_ULT PCH_JTAG_TDI 1 2
R115 2 1 0R0402-PAD PECI_EC A54 CATERR# 51R2J-2-GP R110
24 EC_PECI PROCHOT#_CPU PECI PCH_JTAG_TDO
R82 1 2 499R2F-2-GP C65 JTAG 1 2
24,44,46 H_PROCHOT_N THERMTRIP#_CPU PROCHOT#
C63 51R2J-2-GP R114
TPAD30 TP29 1SKTOCC# A65 THERMTRIP# B61 PCH_JTAG_TMS 1 2
1A-008 SKTOCC# PROC_TCK XDP_TCLK 99
99 BPM_CPU_N[1:0] CPU MISC D60 XDP_TDI 99 51R2J-2-GP R105
BPM_CPU_N0 C55 PROC_TDI A61 XDP_TCK_JTAGX 1 (R_) 2
BPM#[0] PROC_TDO XDP_TDO_CPU 99
BPM_CPU_N1 D55 C60 1KR2J-1-GP R107
BPM#[1] PROC_TMS XDP_TMS 99
1A-008 TPAD30 TP35 1 BPM_CPU_N2 B54 B59
BPM#[2] PROC_TRST# XDP_TRST# 4,99
1A-008 TPAD30 TP34 1 BPM_CPU_N3 C56
BPM#[3] XDP_TRST# R554 1 (R_) 2 51R2J-2-GP
SIO_GPU_EN A6 B56 XDP_TCLK R99 1 2 51R2J-2-GP
85,86 SIO_GPU_EN GPP_E3/CPU_GP0 PCH_JTAG_TCK PCH_JTAG_TCK 99
SA-062 GPU_ALLPWR A7 D59 PCH_JTAG_TCK R113 1 2 51R2J-2-GP
24,86 GPU_ALLPWR GPP_E7/CPU_GP1 PCH_JTAG_TDI PCH_JTAG_TDI 99
MONITOR_NAME_ID0 BA5 A56 (R_)
55 MONITOR_NAME_ID0 MONITOR_NAME_ID1 GPP_B3/CPU_GP2 PCH_JTAG_TDO PCH_JTAG_TDO 99
SA-037 AY5 C59 PCH_JTAG_TMS 99
55 MONITOR_NAME_ID1 GPP_B4/CPU_GP3 PCH_JTAG_TMS C61
Need to Check SMI capability!!! 2 1 CPU_POPIRCOMP
PCH_POPIRCOMP
AT16
PROC_POPIRCOMP
PCH_TRST#
JTAGX
A59
XDP_TRST# 4,99
XDP_TCK_JTAGX 99
49D9R2F-GP 2 R587 1 AU16
49D9R2F-GP 2 R593 1 EDRAM_OPIO_RCOMP H66 PCH_OPIRCOMP
49D9R2F-GP 2 R547 1 EOPIO_RCOMP H65 OPCE_RCOMP
49D9R2F-GP R548 OPC_RCOMP
CPU1D
SKYLAKE-U-GP
(071.00KBL.000U)
SC-006
C C
ME ENABLE/DISABLE L NORMAL(DEFAULT)
V_3P3_A H Disable
SB3V
2
1KR2J-1-GP
24 ME_CNTL ME_CNTL 2 1 ME_CNTL1 B Q52
MMBT3906-4-GP
C
HDA_SDOUT_CPU 2 1 AUD_LINK_SDO_R1
19 HDA_SDOUT_CPU AUD_LINK_SDO_R1 17
R654
1KR2J-1-GP
SB-023
B B
A A
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
004_CPU(JTAG/CPU SIDE BAND)
Size Document Number Rev
C Rosa_KBL-U AIO SB
Date: Thursday, June 23, 2016 Sheet 4 of 105
5 4 3 2 1
5 4 3 2 1
12 M_A_DQ[63:0]
13 M_B_DQS_DN[7:0]
12 M_A_A[16:0]
12 M_A_DQS_DN[7:0] 13 M_B_DQS_DP[7:0]
D D
12 M_A_DQS_DP[7:0]
3 OF 20
2 OF 20
1
M_B_DQ19 AN65 AR66 M_B_DQS_DN2 M_B_DQ52 AP27 AR27 M_B_DQS_DP6 SA-001
M_B_DQ20 AN66 DDR1_DQ[19]/DDR0_DQ[51] DDR1_DQSN[2]/DDR0_DQSN[6] AR65 M_B_DQS_DP2 M_B_DQ53 AN27 DDR1_DQ[52] DDR1_DQSP[6] AR22 M_B_DQS_DN7 R602
M_B_DQ21 AP66 DDR1_DQ[20]/DDR0_DQ[52] DDR1_DQSP[2]/DDR0_DQSP[6] AR61 M_B_DQS_DN3 M_B_DQ54 AN25 DDR1_DQ[53] DDR1_DQSN[7] AR21 M_B_DQS_DP7 470R2F-GP
M_B_DQ22 AT65 DDR1_DQ[21]/DDR0_DQ[53] DDR1_DQSN[3]/DDR0_DQSN[7] AR60 M_B_DQS_DP3 M_B_DQ55 AP25 DDR1_DQ[54] DDR1_DQSP[7]
M_B_DQ23 AU65 DDR1_DQ[22]/DDR0_DQ[54] DDR1_DQSP[3]/DDR0_DQSP[7] M_B_DQ56 AT22 DDR1_DQ[55] AN43 DDR1_B_ALERT_N
DDR1_B_ALERT_N 13
2
M_B_DQ24 AT61 DDR1_DQ[23]/DDR0_DQ[55] AW50 DDR0_A_ALERT_N M_B_DQ57 AU22 DDR1_DQ[56] DDR1_ALERT# AP43 DDR1_B_PARITY
DDR1_DQ[24]/DDR0_DQ[56] DDR0_ALERT# DDR0_A_ALERT_N 12 DDR1_DQ[57] DDR1_PAR DDR1_B_PARITY 13
M_B_DQ25 AU61 AT52 DDR0_A_PARITY SA-001 M_B_DQ58 AU21 AT13 SM_DRAMRST# 1 2
DDR1_DQ[25]/DDR0_DQ[57] DDR0_PAR DDR0_A_PARITY 12 DDR1_DQ[58] DRAM_RESET# SM_DRAMRST#_R 12,13
M_B_DQ26 AP60 M_B_DQ59 AT21 AR18 SM_RCOMP_0 1 R577 2 121R2F-GP R603
M_B_DQ27 AN60 DDR1_DQ[26]/DDR0_DQ[58] AY67 M_B_DQ60 AN22 DDR1_DQ[59] DDR_RCOMP[0] AT18 SM_RCOMP_1 1 R576 2 80D6R2F-L-GP 0R0402-PAD
DDR1_DQ[27]/DDR0_DQ[59] DDR_VREF_CA DDR_VREF_CA 12 DDR1_DQ[60] DDR_RCOMP[1]
M_B_DQ28 AN61 AY68 M_VREF_DQ_DIM0 M_B_DQ61 AP22 AU18 SM_RCOMP_2 1 R580 2 100R2F-L1-GP-U SC-034
M_B_DQ29 AP61 DDR1_DQ[28]/DDR0_DQ[60] DDR0_VREF_DQ BA67 M_B_DQ62 AP21 DDR1_DQ[61] DDR_RCOMP[2]
DDR1_DQ[29]/DDR0_DQ[61] DDR1_VREF_DQ M_VREF_DQ_DIM1 13 DDR1_DQ[62]
M_B_DQ30 AT60 M_B_DQ63 AN21 DDR CH - B
M_B_DQ31 AU60 DDR1_DQ[30]/DDR0_DQ[62] AW67 DDR_VTT_CNTL DDR1_DQ[63]
B DDR1_DQ[31]/DDR0_DQ[63] DDR CH - A DDR_VTT_CNTL DDR_VTT_CNTL 43 SA-026 B
CPU1C
CPU1B SKYLAKE-U-GP
SKYLAKE-U-GP (071.00KBL.000U)
(071.00KBL.000U) SC-006
SC-006
SA-048 DDR_VDDQ
SC-010
1
(R_)
R545
1KR2F-3-GP
2
M_VREF_DQ_DIM0 1 2 M_VREF_DQ_DIM0_R
(R_)
R544
1
C295 R546
SCD022U16V2KX-3DLGP 1KR2F-3-GP
2
M_VREF_DQ_DIM0_RC
1
(R_)
R543
24D9R2F-L-GP
2
A A
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
005_CPU(DDR4)(NEW)
Size Document Number Rev
C Rosa_KBL-U AIO SB
Date: Thursday, June 23, 2016 Sheet 5 of 105
5 4 3 2 1