Chapter Topics to be Covered
Week # 6, Lecture 2
❑ Chapter 5
Arithmetic and Logic Instructions Continued
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5-6 String Comparisons
String instructions are powerful because they allow the
programmer to manipulate large blocks of data with
relative ease.
◼ Block data manipulation occurs with MOVS, LODS,
STOS, INS, and OUTS.
Additional string instructions allow a section of
memory to be tested against a constant or against
another section of memory.
◼ SCAS (string scan); CMPS (string compare)
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SCAS
Compares AL register with a byte block, AX with a word
block, or EAX with a double word block of memory.
◼ SCASB for byte; SCASW for word; SCASD for double
word
SCAS uses direction flag (D) to select auto-increment
or auto-decrement operation for DI.
◼ also repeat if prefixed by conditional repeat prefix
MOV DI, Offset Block
CLD
MOV CX, 256
MOV AL, 20
REPE SCASB 3
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CMPS
Always compares two sections of memory data as bytes
(CMPSB), words (CMPSW), or double words (CMPSD).
◼ contents of the data segment memory location
addressed by SI are compared with contents of extra
segment memory addressed by DI
◼ Increments/decrements SI & DI done through CLD/STD
Normally used with REPE or REPNE prefix
◼ alternates are REPZ (repeat while zero) and REPNZ
(repeat while not zero)
MOV SI, Offset Line
MOV DI, Offset Table
CLD
MOV CX, 10
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Dr. Qurban Ali, EE Department REPE CMPSB
Multiplication and Division Instructions
In this group, there are eight instructions:
◼ MUL (unsigned multiply)
◼ DIV (unsigned divide)
◼ IMUL (signed multiply – 2’s complement)
◼ IDIV (signed divide – 2’s complement)
◼ AAM (adjust AL for multiplication)
◼ AAD (Adjust AX for division)
◼ CBW (convert byte to word)
◼ CWD (convert word to double word)
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MUL Instruction
Product after a multiplication is always a double-width.
MUL CL (AL) X (CL) → (AX)
Source is 8 bits, therefore result is in AX
Let’s say CL = 02 and AL= 08, then after executing the
instruction, AX = 0010
MUL BX (AX) X (BX) → (DX)(AX)
Source is 16 bits, therefore result is in DX and AX
Let’s say BX = 0102 and AX = 1001, then after executing
the instruction, DX = 0010, and AX = 2102
The source can be either a register or memory location
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Another Example of MUL Instruction
Another Example: Multiply 320 with 42
Procedure: MOV AX, 320
MOV BX, 42
MUL BX
Now, let’s say CL contains the 2’s complement of -1
and AL contains the 2’s complement for -2, then what
is the result of MUL CL
MOV AL, FE
MOV CL, FF
MUL CL ; AX = FD02
In the above example, why isn’t the result equal to 2?
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Example of IMUL Instruction
If we used IMUL instead of MUL in previous example,
AL = FE and CL = FF, then the result of IMUL CL
MOV AL, FE
MOV CL, FF
IMUL CL ; AX = 0002
In this case we get what we expect for the result
Keep in mind that computer does not know whether
you want to multiply a signed number or unsigned
number. You have to simply use the correct instruction
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A Special Immediate 16-Bit Multiplication
8086/8088 cannot perform immediate mulitplication
80186 - Core2 processors can use a special version
of the multiply instruction.
◼ immediate multiplication must be signed;
◼ instruction format is different because it contains
three operands
First operand is 16-bit destination register; the
second a register/memory location with 16-bit
multiplicand; the third 8- or 16-bit immediate data
used as the multiplier.
◼ Example: IMUL CX, DX, 12
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32-Bit and 64-bit Multiplication
In 80386 and above, 32-bit multiplication is allowed
because these microprocessors contain 32-bit registers.
Example: MOV EAX, 123450FC
MOV EBX, 32BCA
MUL EBX
The 64 bit product is found in EDX–EAX, where EAX
contains the least significant 32 bits of the product.
The result of a 64-bit multiplication in the Pentium 4
appears in the RDX:RAX register pair as a 128-bit
product.
Examples: MUL RCX
MUL RDI
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AAM
This instruction adjusts AX for multiply - used for a
multiplication of two unpacked BCDs
◼ The result of the multiplication is assumed to be in AL
Example: AL = 09 and BL = 09
◼ If you perform the instruction MUL BL
◼ Then, after multiplication, AL = 51H which are not the
correct BCDs
◼ If you perform
MUL BL
AAM
◼ Then AX = 0801 which are the correct BCDs
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Summary: Issues with MUL
◼ MUL operates on same size numbers. If not equal,
place them in equal size registers, before using
MUL/IMUL.
◼ The second operand is always in accumulator.
◼ For negative numbers, use IMUL
◼ For unpacked BCD values, use AAM after MUL.
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DIV & IDIV Instructions
These instructions either divide AX by an 8 bit number - the
quotient is stored in AL and remainder in AH, or
Divide (DX)(AX) by a 16 bit number - the quotient is stored
in AX and remainder in DX
The divisor can be either in a register or memory
If divisor is in memory then, either “byte ptr” or “word ptr”
must be used to indicate an 8 bit divisor or 16 bit divisor
Note:
Dividend is always a double-width dividend, divided by the
operand.
In 64-bit mode Pentium 4 & Core2, divide a 128-bit number
by a 64-bit number. 13
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Example of DIV Instruction
DIV BL (AX) % BL, Quotient → AL
Remainder → AH
Source is 8 bits, therefore AX is divided by source
DIV byte ptr [SI] (AX) % [1000], if SI = 1000
Quotient → AL
Remainder → AH
DIV CX (DX)(AX) % CX, Quotient → AX
Remainder → DX
Source is 16 bits, therefore (DX)(AX) is divided by source
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Example of DIV
❑ Let’s say BL = 04 and AX = 0200, Then, after executing
DIV BL
AL = 80 and AH = 00
What happens if BL = 02 and AX = 0200 and you
perform the instruction DIV BL?
Is it possible to divide an 8 bit number by an 8 bit
number using DIV and IDIV?
Remember that DIV BL will divide AX by BL and not AL
by BL
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IDIV
Negative Numbers
IDIV performs signed division in 2’s complement,
its operation is similar to DIV
Example:
Let’s say you want to divide -2 by 2. Obviously, the result
should be -1.
So, if AL = -1 = FF and BL = 2, then
◼ DIV BL will give the result 7F with a remainder of 1.
What to do?
◼ Use IDIV
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Example of IDIV
How 8-bit number by an 8-bit number?
◼ In order to get the correct result we need to first sign
extend the 8 bit number and then use IDIV
To sign extend a byte to a word, use CBW
To sign extend a word to double word, use CWD
So, if AL = FF, CBW will cause AX = FFFF (which is -1 in
16 bits). Now, you can use IDIV BL
Example: Divide 4F by 2C
Procedure: MOV AL, 4F
CBW
MOV BL, 2C
DIV BL
Note: CBW causes AL to be extended into (AX) and CWD
cause AX to be extended into (DX)(AX) 17
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Another Example of IDIV
Example: Divide -2 by -1
Procedure: Convert numbers to 2’s complement
MOV AL, FE
CBW
MOV BL, FF
IDIV BL
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Summary: Issues with DIV
◼ With DIV, numerator needs to be double size of the
denominator. If not, make numerator a double size.
◼ The numerator is always in accumulator.
◼ For negative numbers, use IDIV
◼ For unpacked BCD values, use AAD after MUL.
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The Remainder
Could be used to round the quotient or dropped to
truncate the quotient.
If division is unsigned, rounding requires the remainder
be compared with half the divisor to decide whether to
round up the quotient
Example:
The remainder could also be converted to a fractional
remainder.
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32-Bit and 64-bit Division
80386 - Pentium 4 perform 32-bit division on signed or
unsigned numbers.
◼ 64-bit contents of EDX–EAX are divided by the operand
specified by the instruction
leaving a 32-bit quotient in EAX
and a 32-bit remainder in EDX
Pentium 4 operated in 64-bit mode performs 64-bit
division on signed or unsigned numbers.
The 64-bit division uses the RDX:RAX register pair to
hold the dividend.
The quotient is found in RAX and the remainder is in RDX
after the division.
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Exercise
Multiple 12 by 258, and then divide the answer by
2985.
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Exercise - 2
Find the result of instructions:
MOV AL, A1H
CBW
CWD
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